Lecture 14
DC imperfections of the op amp
Objectives: to study DC imperfections of the op amp. This includes offset voltage,
biasing and offset currents and PSSR.
At the end of this class you should be able to:
* Analyze op amp circuits with offset voltage and currents
* Understand meaning of PSSR
Input-Offset Voltage
* Op amps are direct-coupled devices with large DC gains. Any small DC offset voltage
of the input causes the op amp to saturate. Even with inputs being zero, the amplifier
output rests at some dc voltage offset level instead of zero.
This offset voltage is usually referred to the input port as input offset (Vos) by dividing
its value by the op amp gain. Typical values for VOS are in the range of 1 to 5mV.
* Actual sign of VOS is unknown as only upper bound is given.
* The input offset voltage can be measured as shown in Fig. 1.
Here, the amplifier is connected as voltage-follower to give output voltage equal to offset
voltage.
A
v o ≅ v os
Fig. 1: Circuit to measure the input offset voltage.
Input-Offset Voltage: Offset Nulling
* To include effect of offset voltage on circuit performance, the equivalent model shown
in Fig. 2 can be utilized.
v o ≅ v os
Fig. 2: Model of op amp with VOS
* Offset voltage of most IC op amps can be manually adjusted by adding a potentiometer
between pins 1 and 5 as shown in Fig. 3.
Here a small voltage with opposite polarity of the offset voltage is introduced to cancel
its effect.
Fig. 3: Offset Nulling
Example 1: For the inverting amplifier, find the output voltage due to the input offset
voltage.
Solution:
1. Set the input source to zero
2. Replace the op amp with its model of Fig. 2
3. Analyze the circuit to find Vo
Implementing steps 1 and 2, the circuit shown in Fig. 4 is developed.
Fig. 4: Inverting amplifier offset calculation
The circuit becomes similar to the non-inverting amplifier but with VOS as the
input. Now, the output voltage can be found by inspection as:
v o = v os (1 +
R
R
2 )
1
Input-Bias and Offset Currents:
* The second dc problem associated with op amps is due to non-zero input biasing
current as illustrated in Fig. 5.
Fig. 5: Input bias currents model
* Bias currents IB1 and IB2 (base currents in BJTs or gate currents in MOSFETs or JFETs)
are similar in value with directions depending on internal amplifier circuit type.
The difference between the bias currents is known as input offset current:
I = I −I
OS B1 B2
Sign of offset current is unknown as only upper bound is given.
* In order to investigate the effect of biasing currents on circuit performances, the
following procedure can be followed:
1. Set input to zero
2. Use the model shown in Fig. 5
3. Analyze the circuit to find Vo
Example 2: For the inverting amplifier and non-inverting amplifier, find the output
voltage due to the input biasing current.
Solution: by applying steps 1 and 2 of the above procedure, same equivalent circuit is
obtained for both amplifiers as shown in Fig. 6.
Fig. 6: Inverting and non-inverting model with offset currents
IB1 is shorted out by ground connection. Since, inverting input is at virtual ground,
amplifier output is forced to supply IB2 through R2.
Vo = I R (1)
B2 2
Note that for large gain R2 need to be large. Thus, the output offset due to the biasing
current will be large as well.
Bias Current Compensation:
* Equation (1) indicates that Vo due to IB2 is positive. This suggests that it can be reduced
if a negative voltage is introduced in the circuit. The ideal is implemented by adding a
resistor RB in series with the non-inverting input as shown in Fig. 7.
Fig. 7: Bias current compensation using RB.
Output due to IB1 alone is
⎛
⎜
⎜
⎜
⎜
⎜
⎝
R ⎞⎟
Vo = − I R 1+ 2 ⎟⎟
B1 B
R ⎟⎟
1⎠
By superposition, the total output will be given by:
Vo T = R2 I B 2 − RB I B1 −
R2 R B
I B1
R1
(2)
Consider the case IB=IB1=IB2 resulting in:
R
Vo T = [ R2 − RB (1 + 2 )]I B
R1
The output offset voltage can be set to zero by selecting RB as:
⎛
⎜
⎜
⎜
⎜
⎜
⎝
R R ⎞⎟
R = 1 2 ⎟⎟
B R +R ⎟
1 2 ⎟⎠
* With RB as above, consider now different biasing currents of IB1=IB+IOS/2 and IB2=IBIOS/2. Substituting the value of RB, IB1 and IB2 in (2) results in:
VoT = I OS R2
Since, offset current (IOS) is typically 5-10 times smaller than individual bias currents, dc
output voltage error is reduced by this method.
Power Supply Rejection Ratio (PSRR):
„ Power supply voltages change due to long-term drift or noise on supplies.
„ Equivalent input offset voltage changes in response to power supply voltage
changes
„ PSRR measures the ability of amplifier to reject power supply variations.
„ PSRR indicates how offset voltage changes in response to change in power supply
voltages.
„ Generally PSRR values for v+ and v- are different.
„ Both CMRR and PSRR fall rapidly with frequency increase.
v
PSRR + = v + dB
OS
vPSRR − = v dB
OS