Data Sheet
A m p l i fy t h e H u m a n E x p e r i e n c e
Comlinear CLC2059
®
Dual, Low Noise, 4V to 36V Amplifier
The COMLINEAR CLC2059 is a low noise, dual voltage feedback amplifier
that is internally frequency compensated to provide unity gain stability. The
CLC2059 offers 13.7MHz of unity gain bandwidth and excellent (110dB)
CMRR, PSRR, and open loop gain. The CLC2059 also features low input
voltage noise (0.7μVRMS) and low distortion (0.0005%) making it well suited
for audio applications to improve tone control. Other applications include
industrial measurement tools, pre-amplifiers, and other circuits that require
well-matched channels.
The COMLINEAR CLC2059 is designed to operate over a wide power supply
voltage range, ±2V to ±18V (4V to 36V). It utilizes an industry standard
dual amplifier pin-out and is available in a Pb-free, RoHS compliant SOIC-8
package.
APPLICATIONS
n Active Filters
n Audio Pre-Amplifiers
n Audio AC-3 Decoder Systems
n Headphone Amplifier
n General purpose dual ampliifer
Typical Application - Audio Tone Control Circuit
Boost-Bass-Cut
R1
11kΩ
VIN
R2
100kΩ
C1
0.05µF
R3
11kΩ
C2
0.05µF
R4
11kΩ
–
C3
0.005µF
R5
3.6kΩ
R6
500kΩ
VOUT
Rev 1B
1/2 CLC2059
+
R7
3.6kΩ
Boost-Treble-Cut
Ordering Information
Part Number
Package
Pb-Free
RoHS Compliant
Operating Temperature Range
Packaging Method
CLC2059ISO8X
SOIC-8
Yes
Yes
-40°C to +85°C
Reel
Moisture sensitivity level for all parts is MSL-1.
©2007-2009 CADEKA Microcircuits LLC Comlinear CLC2059 Dual, Low Noise, 4V to 36V Amplifier
General Description
FEATURES
n Unity gain stable
n 110dB voltage gain
n 0.7μVRMS (RIAA)
n 0.0005% THD
n 15MHz gain bandwidth product
n 7V/μs slew rate
n 110dB power supply rejection ratio
n 110dB common mode rejection ratio
n 4V to 36V single supply voltage range
n ±2V to ±18V dual supply voltage range
n CLC2059: improved replacement for
OP275
n CLC2059: Pb-free SOIC-8
www.cadeka.com
Data Sheet
CLC2059 Pin Configuration
8
+VS
-IN1
2
7
OUT2
+IN1
3
6
-IN2
-V S
4
5
+IN2
Pin No.
Pin Name
Description
1
OUT1
Output, channel 1
2
-IN1
Negative input, channel 1
3
+IN1
Positive input, channel 1
4
-VS
5
+IN2
Positive input, channel 2
6
-IN2
Negative input, channel 2
7
OUT2
Output, channel 2
8
+VS
Comlinear CLC2059 Dual, Low Noise, 4V to 36V Amplifier
OUT1
1
CLC2059 Pin Description
Negative supply
Positive supply
Rev 1B
©2007-2009 CADEKA Microcircuits LLC www.cadeka.com
2
Data Sheet
Absolute Maximum Ratings
The safety of the device is not guaranteed when it is operated above the “Absolute Maximum Ratings”. The device
should not be operated at these “absolute” limits. Adhere to the “Recommended Operating Conditions” for proper device function. The information contained in the Electrical Characteristics tables and Typical Performance plots reflect the
operating conditions noted on the tables and plots.
Min
Max
Unit
0
40 (±20)
60 (±30)
30 (±15)
500
V
V
V
mW
Supply Voltage
Differential Input Voltage
Input Voltage
Power Dissipation (TA = 25°C) - SOIC-8
Comlinear CLC2059 Dual, Low Noise, 4V to 36V Amplifier
Parameter
Reliability Information
Parameter
Junction Temperature
Storage Temperature Range
Lead Temperature (Soldering, 10s)
Package Thermal Resistance
SOIC-8
Min
Typ
-65
Max
Unit
150
150
260
°C
°C
°C
100
°C/W
Notes:
Package thermal resistance (qJA), JDEC standard, multi-layer test boards, still air.
Recommended Operating Conditions
Parameter
Operating Temperature Range
Supply Voltage Range
Min
-40
4 (±2)
Typ
Max
Unit
+85
36 (±18)
°C
V
Rev 1B
©2007-2009 CADEKA Microcircuits LLC www.cadeka.com
3
Data Sheet
Electrical Characteristics
TA = 25°C, +Vs = +15V, -Vs = -15V, Rf = Rg =2kΩ, RL = 2kΩ to VS/2, G = 2; unless otherwise noted.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Frequency Domain Response
Unity Gain Bandwidth
BWSS
-3dB Bandwidth
BWLS
Large Signal Bandwidth
GBWP
Gain-Bandwidth Product
G = +1, VOUT = 0.2Vpp, VS = 5V, Rf = 0
11.7
MHz
G = +1, VOUT = 0.2Vpp, VS = 30V, Rf = 0
13.7
MHz
G = +2, VOUT = 0.2Vpp, VS = 5V
6.3
MHz
G = +1, VOUT = 0.2Vpp, VS = 30V
6.8
MHz
G = +2, VOUT = 1Vpp, VS = 5V
2.8
MHz
G = +2, VOUT = 2Vpp, VS = 30V
1.7
MHz
15
MHz
VOUT = 0.2V step; (10% to 90%), VS = 5V
50
ns
VOUT = 0.2V step; (10% to 90%), VS = 30V
47
ns
VOUT = 0.2V step
16
%
VOUT = 2V step
5
%
2V step, VS = 5V
6
V/µs
4V step, VS = 30V
7
V/µs
Time Domain Response
tR, tF
Rise and Fall Time
OS
Overshoot
SR
Slew Rate
Distortion/Noise Response
THD
en
XTALK
Total Harmonic Distortion
VOUT = 5V, f = 1kHz, G = 20dB
0.0005
%
4
nV/√Hz
RIAA, 30kHz LPF, RS = 50Ω
0.7
μVRMS
Channel-to-channel, 500kHz, VS = 5V to 30V
67
dB
> 1kHz
Input Voltage Noise
Crosstalk
DC Performance
VIO
Input Offset Voltage (1)
Ib
Input Bias Current
IOS
Input Offset Current
PSRR
Power Supply Rejection Ratio (1)
AOL
Open-Loop Gain
IS
Supply Current
(1)
(1)
(1)
(1)
RS ≤ 10kΩ
0.5
3
mV
VCM = 0V
150
500
nA
5
100
nA
VCM = 0V
RS ≤ 10kΩ
80
110
dB
RL = ≥2kΩ, VOUT = ±10V
90
110
dB
Total, RL = ∞
3
7
mA
Input Characteristics
Common Mode Input Range (1)
+VS = 15V, -VS = -15V
CMRR
Common Mode Rejection Ratio (1)
DC, VCM = 0V to +VS - 1.5V, RS ≤ 10kΩ
±12
±13.5
V
80
110
dB
RL = 2kΩ
+13.8,
-13.0
V
RL = 10kΩ
±14.0,
-13.3
V
Rev 1B
CMIR
Output Characteristics
VOUT
Output Voltage Swing
ISOURCE
Output Current, Sourcing
VIN+ = 1V, VIN- = 0V, VOUT = 2V
45
mA
ISINK
Output Current, Sinking
VIN+ = 0V, VIN- = 1V, VOUT = 2V
80
mA
Notes:
1. 100% tested at 25°C at VS = ±15V.
©2007-2009 CADEKA Microcircuits LLC www.cadeka.com
Comlinear CLC2059 Dual, Low Noise, 4V to 36V Amplifier
UGBWSS
4
Data Sheet
Typical Performance Characteristics
TA = 25°C, +Vs = +15V, -Vs = -15V, Rf = Rg =2kΩ, RL = 2kΩ to VS/2, G = 2; unless otherwise noted.
Non-Inverting Frequency Response
Inverting Frequency Response
5
G = -1
G=2
0
1
G=1
Rf = 0
0
G=5
-1
G = 10
-2
-3
Normalized Gain (dB)
Normalized Gain (dB)
2
G = -2
G = -5
-5
G = -10
-10
-15
-4
VOUT = 0.2Vpp
VOUT = 0.2Vpp
-5
-20
0.1
1
10
0.1
1
Frequency (MHz)
10
Frequency (MHz)
Large Signal Frequency Response
-3dB Bandwidth vs. VOUT
5
8
0
-3dB Bandwidth (MHz)
Normalized Gain (dB)
7
VOUT = 1Vpp
VOUT = 2Vpp
-5
-10
6
5
4
3
2
1
-15
0
0.1
1
10
0.0
0.5
1.0
1.5
2.0
Frequency (MHz)
3.0
3.5
4.0
Rev 1B
Small Signal Pulse Response
Large Signal Pulse Response
0.15
3
0.1
2
Output Voltage (V)
Output Voltage (V)
2.5
VOUT (VPP)
0.05
0
-0.05
-0.1
1
0
-1
-2
-0.15
-3
0
2
4
6
Time (us)
©2007-2009 CADEKA Microcircuits LLC 8
10
0
2
Comlinear CLC2059 Dual, Low Noise, 4V to 36V Amplifier
3
4
6
8
10
www.cadeka.com
5
Time (us)
Data Sheet
Typical Performance Characteristics
TA = 25°C, +Vs = +5V, -Vs = GND, Rf = Rg =2kΩ, RL = 2kΩ to VS/2, G = 2; unless otherwise noted.
Non-Inverting Frequency Response
Inverting Frequency Response
5
4
G=2
G = -1
0
G=1
Rf = 0
2
1
G=5
0
G = 10
-1
-2
Normalized Gain (dB)
Normalized Gain (dB)
3
-3
G = -2
G = -5
-5
G = -10
-10
-15
VOUT = 0.2Vpp
-4
VOUT = 0.2Vpp
-5
-20
0.1
1
10
0.1
1
Frequency (MHz)
Large Signal Frequency Response
-3dB Bandwidth vs. VOUT
5
8
7
VOUT = 1Vpp
0
-3dB Bandwidth (MHz)
Normalized Gain (dB)
10
Frequency (MHz)
VOUT = 2Vpp
-5
-10
6
5
4
3
2
1
-15
0
0.1
1
10
0.0
0.5
1.0
Frequency (MHz)
1.5
2.0
VOUT (VPP)
Rev 1B
Small Signal Pulse Response
Large Signal Pulse Response
2.7
4
3.5
Output Voltage (V)
Output Voltage (V)
2.6
2.5
3
2.5
2
2.4
1.5
2.3
1
0
2
4
6
Time (us)
©2007-2009 CADEKA Microcircuits LLC 8
10
0
2
Comlinear CLC2059 Dual, Low Noise, 4V to 36V Amplifier
5
4
6
8
10
www.cadeka.com
6
Time (us)
Data Sheet
Typical Performance Characteristics
TA = 25°C, +Vs = +15V, -Vs = -15V, Rf = Rg =2kΩ, RL = 2kΩ to VS/2, G = 2; unless otherwise noted.
Open Loop Voltage Gain vs. Frequency
Input Voltage Noise vs. Frequency
110
Input Voltage Noise (nV/√Hz)
Open Loop Gain (dB)
100
90
80
70
60
50
40
30
20
15
10
5
RL=2K
0
10
0.001
0.01
0.1
1
10
100
1
1000
10
Maximum Output Voltage Swing vs. Frequency
1,000
Maximum Output Voltage Swing vs. RL
30
Maximum Output Voltage Swing (V)
30
Maximum Swing Voltage (V)
100
Frequency (Hz)
Frequency (KHz)
25
20
15
10
5
RL=2K
0
28
26
24
22
20
18
16
14
12
0.1
1
10
100
1000
0.1
1
Frequency (KHz)
10
Resistance Load (KΩ)
Rev 1B
Input Offset Voltage vs. Temperature
Input Bias Current vs. Temperature
2
200
Input Bias Current (nA)
Input Offset Voltage (mV)
1.5
1
0.5
0
150
100
50
-0.5
-1
0
-40
-20
0
20
40
60
Temperature (°C)
©2007-2009 CADEKA Microcircuits LLC 80
100
120
-40
-20
0
20
40
Comlinear CLC2059 Dual, Low Noise, 4V to 36V Amplifier
20
120
60
80
100
120
Temperature (°C)
www.cadeka.com
7
Data Sheet
Typical Performance Characteristics
TA = 25°C, +Vs = +15V, -Vs = -15V, Rf = Rg =2kΩ, RL = 2kΩ to VS/2, G = 2; unless otherwise noted.
Supply Voltage vs. Supply Current
Crosstalk vs. Frequency
-1.8
2.3
-1.9
-50
-55
2.1
-2.1
2
-2.2
IEE
1.9
-2.3
1.8
-2.4
2
4
6
8
10
12
Supply Voltage (+/-V)
14
16
18
-60
Crosstalk (dB)
-2
IEE (mA)
ICC (mA)
ICC
2.2
-65
-70
-75
-80
-85
0.1
1.0
Frequency (MHz)
Functional Block Diagram
VCC
-Input
Output
+Input
Comlinear CLC2059 Dual, Low Noise, 4V to 36V Amplifier
2.4
Rev 1B
VEE
©2007-2009 CADEKA Microcircuits LLC www.cadeka.com
8
Data Sheet
Application Information
Power Dissipation
Figures 1 and 2 illustrate typical circuit configurations for
non-inverting, inverting, and unity gain topologies for dual
supply applications. They show the recommended bypass
capacitor values and overall closed loop gain equations.
Power dissipation should not be a factor when operating
under the stated 2k ohm load condition. However, applications with low impedance, DC coupled loads should
be analyzed to ensure that maximum allowed junction
temperature is not exceeded. Guidelines listed below can
be used to verify that the particular application will not
cause the device to operate beyond it’s intended operating range.
+Vs
Input
6.8μF
0.1μF
+
Output
-
RL
0.1μF
Rg
Rf
6.8μF
TJunction = TAmbient + (ӨJA × PD)
G = 1 + (Rf/Rg)
-Vs
Figure 1. Typical Non-Inverting Gain Circuit
+Vs
R1
Input
Rg
+
0.1μF
Supply power is calculated by the standard power equation.
Output
6.8μF
-Vs
RL
Power delivered to a purely resistive load is:
G = - (Rf/Rg)
Pload = ((VLOAD)RMS2)/Rloadeff
The effective load resistor (Rloadeff) will need to include
the effect of the feedback network. For instance,
Rloadeff in figure 3 would be calculated as:
6.8μF
RL || (Rf + Rg)
Output
-
RL
0.1μF
6.8μF
G=1
Figure 3. Unity Gain Circuit
©2007-2009 CADEKA Microcircuits LLC These measurements are basic and are relatively easy to
perform with standard lab equipment. For design purposes however, prior knowledge of actual signal levels and
load impedance is needed to determine the dissipated
power. Here, PD can be found from
PD = PQuiescent + PDynamic - PLoad
Quiescent power can be derived from the specified IS values along with known supply voltage, VSupply. Load power
www.cadeka.com
9
Rev 1B
For optimum input offset
voltage set R1 = Rf || Rg
0.1μF
-Vs
Psupply = Vsupply × IRMS supply
Vsupply = VS+ - VS-
Rf
Figure 2. Typical Inverting Gain Circuit
+
In order to determine PD, the power dissipated in the load
needs to be subtracted from the total power delivered by
the supplies.
PD = Psupply - Pload
0.1μF
Input
Where TAmbient is the temperature of the working environment.
6.8μF
-
+Vs
Maximum power levels are set by the absolute maximum
junction rating of 150°C. To calculate the junction temperature, the package thermal resistance value ThetaJA
(ӨJA) is used along with the total die power dissipation.
Comlinear CLC2059 Dual, Low Noise, 4V to 36V Amplifier
Basic Operation
Data Sheet
can be calculated as above with the desired signal amplitudes using:
(VLOAD)RMS = VPEAK / √2
( ILOAD)RMS = ( VLOAD)RMS / Rloadeff
PDYNAMIC = (VS+ - VLOAD)RMS × ( ILOAD)RMS
Assuming the load is referenced in the middle of the power rails or Vsupply/2.
An overdrive condition is defined as the point when either one of the inputs or the output exceed their specified
voltage range. Overdrive recovery is the time needed for
the amplifier to return to its normal or linear operating
point. The recovery time varies, based on whether the
input or output is overdriven and by how much the range
is exceeded. The CLC2059 will typically recover in less
than 5μs from an overdrive condition. Figure 6 shows the
CLC2059 in an overdriven condition.
Figure 4 shows the maximum safe power dissipation in
the package vs. the ambient temperature for the packages available.
10
Input
5
Input Voltage (V)
1.5
10
Output
0
0
-5
1
Output Voltage (V)
2
Maximum Power Dissipation (W)
20
VIN = 7.5Vpp
G=5
-10
SOIC-8
-10
0.5
-20
0
4
8
12
16
20
Time (us)
0
-40
-20
0
20
40
60
80
Ambient Temperature (°C)
Figure 4. Maximum Power Derating
Increased phase delay at the output due to capacitive
loading can cause ringing, peaking in the frequency response, and possible unstable behavior. Use a series resistance, RS, between the amplifier and the load to help improve stability and settling performance. Refer to Figure 5.
Input
+
Rs
Rf
Output
CL
RL
Rg
Figure 5. Addition of RS for Driving
Capacitive Loads
©2007-2009 CADEKA Microcircuits LLC Layout Considerations
General layout and supply bypassing play major roles
in high frequency performance. CADEKA has evaluation
boards to use as a guide for high frequency layout and as
an aid in device testing and characterization. Follow the
steps below as a basis for high frequency layout:
• Include 6.8µF and 0.1µF ceramic capacitors for power
supply decoupling
• Place the 6.8µF capacitor within 0.75 inches of the power pin
• Place the 0.1µF capacitor within 0.1 inches of the power pin
• Remove the ground plane under and around the part,
especially near the input and output pins to reduce parasitic capacitance
• Minimize all trace lengths to reduce series inductances
Refer to the evaluation board layouts below for more information.
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10
Rev 1B
Driving Capacitive Loads
Figure 6. Overdrive Recovery
Comlinear CLC2059 Dual, Low Noise, 4V to 36V Amplifier
The dynamic power is focused primarily within the output
stage driving the load. This value can be calculated as:
Overdrive Recovery
Data Sheet
Evaluation Board Information
The following evaluation boards are available to aid in the
testing and layout of these devices:
Products
Comlinear CLC2059 Dual, Low Noise, 4V to 36V Amplifier
Evaluation Board #
CEB006
CLC2059
Evaluation Board Schematics
Evaluation board schematics and layouts are shown in Figures 7-9. These evaluation boards are built for dual- supply operation. Follow these steps to use the board in a
single-supply application:
1. Short -Vs to ground.
Figure 8. CEB006 Top View
2. Use C3 and C4, if the -VS pin of the amplifier is not
directly connected to the ground plane.
Rev 1B
Figure 9. CEB006 Bottom View
Figure 7. CEB006 Schematic
©2007-2009 CADEKA Microcircuits LLC www.cadeka.com
11
Data Sheet
Typical Applications
5pF
10µF
+
1kΩ
Audio_Input L
1.8kΩ
150µF
39kΩ
620Ω
Audio_Output L
+
680pF
2
3
8
–
1/2
CLC2059
+
10kΩ
470pF
Comlinear CLC2059 Dual, Low Noise, 4V to 36V Amplifier
DAC Load
Resistor
+VS
1
4
100Ω
AUDIO AMPLIFIER
Amp RV
5pF
1kΩ
Audio_Input R
10µF
1.8kΩ
150µF
39kΩ
+VS
DAC Load
Resistor
10kΩ
680pF
6
10kΩ
100µF
+
0.1µF
620Ω
100Ω
Amp RV
10kΩ
0.1µF
+
5
–
1/2
CLC2059
Audio_Output R
470pF
7
+
100µF
Figure 10: Typical Circuit for Filtering and Driving Audio in STB or DVD Player Applications
3
-50
-60
-3
Crosstalk (dB)
-6
-9
-12
-70
-80
Rev 1B
Normalized Gain (dB)
0
-90
-15
-18
-100
VOUT = 5Vpp
VOUT = 5Vpp
-21
-110
0.1
1
10
100
1000
Frequency (kHz)
Figure 11: AC Reponse of Figure 10 (VS=10V, RL=630Ω)
©2007-2009 CADEKA Microcircuits LLC 0.1
1
10
100
1000
Frequency (kHz)
Figure 12: Cross-Talk Performance of Figure 10 (VS=10V,
RL=630Ω)
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12
Data Sheet
Mechanical Dimensions
SOIC-8 Package
Comlinear CLC2059 Dual, Low Noise, 4V to 36V Amplifier
Rev 1B
For additional information regarding our products, please visit CADEKA at: cadeka.com
CADEKA Headquarters Loveland, Colorado
T: 970.663.5452
T: 877.663.5452 (toll free)
CADEKA, the CADEKA logo design, COMLINEAR, the COMLINEAR logo design, and ARCTIC are trademarks or registered trademarks of
CADEKA Microcircuits LLC. All other brand and product names may be trademarks of their respective companies.
CADEKA reserves the right to make changes to any products and services herein at any time without notice. CADEKA does not assume any
responsibility or liability arising out of the application or use of any product or service described herein, except as expressly agreed to in
writing by CADEKA; nor does the purchase, lease, or use of a product or service from CADEKA convey a license under any patent rights,
copyrights, trademark rights, or any other of the intellectual property rights of CADEKA or of third parties.
Copyright ©2007-2009 by CADEKA Microcircuits LLC. All rights reserved. A m p l i fy t h e H u m a n E x p e r i e n c e