INA152 www.ti.com Single-Supply DIFFERENCE AMPLIFIER FEATURES APPLICATIONS ● SWING: to Within 200mV of Either Output Rail ● DIFFERENCE INPUT AMPLIFIER BUILDING BLOCK ● UNITY-GAIN INVERTING AMPLIFIER ● GAIN = 1/2 ● AMPLIFIER GAIN = 2 AMPLIFIER ● SUMMING AMPLIFIER ● SYNCHRONOUS DEMODULATOR ● CURRENT AND DIFFERENTIAL LINE RECEIVER ● VOLTAGE-CONTROLLED CURRENT SOURCE ● BATTERY-POWERED SYSTEMS ● LOW-COST AUTOMOTIVE INSTRUMENTATION ● LOW OFFSET DRIFT: ±3µV/°C ● LOW OFFSET VOLTAGE: ±250µV ● HIGH CMR: 94dB ● LOW GAIN ERROR: 0.01% ● LOW GAIN ERROR DRIFT: 1ppm/°C ● WIDE SUPPLY RANGE: Single: 2.7V to 20V Dual: ±1.35V to ±10V ● MSOP-8 PACKAGE DESCRIPTION negative rails and the output swings to within 50mV of either rail. The INA152 is a small (MSOP-8), low-power, unitygain difference amplifier consisting of a CMOS op amp and a precision resistor network. The on-chip resistors are laser trimmed for accurate gain and high common-mode rejection. Excellent TCR tracking of the resistor maintains gain accuracy and commonmode rejection over temperature. The input commonmode voltage range extends to above the positive and VIN– 2 40kΩ The difference amplifier is the foundation of many commonly used circuits. The INA152 provides precision circuit function without using an expensive precision network. The INA152 is specified for operation over the extended industrial temperature range, –40°C to +85°C. INA152 40kΩ 5 6 VIN+ 3 VO 40kΩ 40kΩ 7 V+ Copyright © 2001, Texas Instruments Incorporated Sense 4 V– SBOS184 1 Ref Printed in U.S.A. January, 2001 SPECIFICATIONS: VS = ±10V TA = +25°C, VS = ±10V, RL = 10kΩ connected to ground, and reference pin connected to ground, unless otherwise noted. INA152EA PARAMETER OFFSET VOLTAGE Input Offset Voltage vs Temperature vs Power Supply vs Time CONDITIONS MIN RTO(1) (2) VCM = 0V TA = –40°C to +85°C VS = ±1.35V to ±10V TYP MAX UNITS ±250 ±3 5 0.5 ±1500 ±15 30 µV µV/°C µV/V µV/mo 2(V+) – 2 94 V dB 80 80 kΩ kΩ 97 87 2.4 nV/√Hz nV/√Hz µVp-p INPUT VOLTAGE RANGE(3) Common-Mode Voltage Range VIN+ – VIN– = 0V Common-Mode Rejection 2(V–) 80 INPUT IMPEDANCE(4) Differential Common-Mode OUTPUT NOISE VOLTAGE(1) (5) fO = 10Hz fO = 1kHz fB = 0.1Hz to 10Hz GAIN Initial(6) Gain Error Gain Temperature Drift Coefficient Nonlinearity FREQUENCY RESPONSE Small Signal Slew Rate Settling Time, 0.1% , 0.01% Overload Recovery OUTPUT Voltage Load Capacitance Stability Short-Circuit Curent RTO (V–) + 0.3V < VO < (V+) – 0.350V 1 ±0.01 ±1 ±0.002 9V Step 9V Step 50% Overdrive 800 0.4 23 25 5 kHz V/µs µs µs µs (V+) – 0.02 (V–) + 0.15 500 +7, –12 V V pF mA RL = 10kΩ to GND Continuous to Common POWER SUPPLY Rated Voltage Voltage Range Current, Quiescent TEMPERATURE RANGE Specification Operating θJA, Junction to Ambient (V+) – 0.35 (V–) + 0.3 ±0.1 ±10 ±0.005 ±10 ±1.35 2.7 IO = 0mA 500 –40 –55 ±10 20 650 +85 +125 150 V/V % ppm/°C % of FS V V V µA °C °C °C/W NOTES: (1) Referred to output in unity-gain difference configuration. Note that this circuit has a gain of 2 for the op amp’s offset voltage and noise voltage. (2) Includes effects of amplifier’s input bias and offset currents. (3) Limit IIN through 40kΩ resistors to 1mA. (4) 40kΩ resistors are ratio matched but have ±20% absolute value. (5) Includes effects of amplifier’s input current noise and thermal noise contribution of resistor network. (6) Connected as difference amplifier. 2 INA152 SBOS184 SPECIFICATIONS: VS = +5V TA = +25°C, VS = +5V, Ref connected to VS/2, RL = 10kΩ connected to VS/2, unless otherwise noted. INA152EA PARAMETER CONDITIONS MIN RTO(1) (2) VCM = VOUT = 0V TA = –40°C ≤ TA ≤ 85°C OFFSET VOLTAGE Input Offset Voltage vs Temperature INPUT VOLTAGE RANGE(3) Voltage Range, Common-Mode Common-Mode Rejection VIN+ – VIN– = 0V 0V < VCM < +5V, RSRC = 0Ω OUTPUT Voltage –2.5 80 TYP MAX UNITS ±250 ±3 ±1500 ±15 µV µV/°C +5.5 94 V dB (V–) + 0.05 V V V (V+) – 0.2 (V–) + 0.2 RL = 10kΩ to GND NOTES: (1) Referred to output in unity-gain difference configuration. Note that this circuit has a gain of 2 for the op amp’s offset voltage and noise voltage. (2) Includes effects of amplifier’s input bias and offset currents. (3) Limit IIN through 40kΩ resistors to 1mA. ELECTROSTATIC DISCHARGE SENSITIVITY PIN CONFIGURATION Top View MSOP-8 Ref 1 VIN– 2 VIN+ V– This integrated circuit can be damaged by ESD. Burr-Brown recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. 8 NC 7 V+ 3 6 VO 4 5 Sense INA152 ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. NC = No Internal Connection ABSOLUTE MAXIMUM RATINGS(1) Supply Voltage, V+ to V– .................................................................. +22V Signal Input Terminals .................................................. +20V Continuous Output Short-Circuit to GND Duration .................................... Continuous Operating Temperature .................................................. –55°C to +125°C Storage Temperature ..................................................... –55°C to +125°C Junction Temperature .................................................................... +150°C Lead Temperature (soldering, 10s) ............................................... +300°C PACKAGE/ORDERING INFORMATION PRODUCT PACKAGE PACKAGE DRAWING NUMBER INA152EA " MSOP-8 " 337 " SPECIFIED TEMPERATURE RANGE PACKAGE MARKING ORDERING NUMBER(1) TRANSPORT MEDIA –40°C to +85°C " B52 " INA152EA/250 INA152EA/2K5 Tape and Reel Tape and Reel NOTE: (1) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /2K5 indicates 2500 devices per reel). Ordering 2500 pieces of “INA152EA/2K5” will get a single 2500-piece Tape and Reel. INA152 SBOS184 3 TYPICAL PERFORMANCE CURVES At TA = +25°C, VS = ±10V, RL = 10kΩ connected to GND, and Ref = GND, unless otherwise noted. GAIN vs FREQUENCY COMMON-MODE REJECTION vs FREQUENCY 100 Commom-Mode Rejection (dB) 20 Closed-Loop Gain (dB) CL = 500pF 0 –20 –40 –60 100k 1M 60 40 VS = ±10V or ±2.5V 20 100 –80 10k 80 10M 1k 10k Frequency (Hz) Peak-to-Peak Output Voltage (V) Power-Supply Rejection (dB) 25 100 –PSRR 80 60 +PSRR 40 20 0 10 100 1k 10k 100k 20 15 10 5 0 100 1M 1k 10k 100k 1M Frequency (Hz) Frequency (Hz) SHORT-CIRCUIT CURRENT vs TEMPERATURE QUIESCENT CURRENT vs TEMPERATURE 10 700 600 5 VS = ±10V Short-Circuit Current (mA) Quiescent Current (µA) 1M MAXIMUM OUTPUT VOLTAGE vs FREQUENCY POWER-SUPPLY REJECTION vs FREQUENCY 120 500 VS = ±2.5V 400 300 200 100 0 VS = ±2.5V VS = ±10V –5 –10 –15 –20 –25 0 –75 –50 –25 0 25 50 Temperature (°C) 4 100k Frequency (Hz) 75 100 125 –60 –40 –20 0 20 40 60 80 100 120 Temperature (°C) INA152 SBOS184 TYPICAL PERFORMANCE CURVES (Cont.) At TA = +25°C, VS = ±10V, RL = 10kΩ connected to GND, and Ref = GND, unless otherwise noted. OUTPUT VOLTAGE SWING vs OUTPUT CURRENT SLEW RATE vs TEMPERATURE 10 0.5 6 Output Voltage Swing (V) Slew Rate (V/µs) 0.45 0.4 0.35 0.3 VS = ±10V +25°C 8 –40°C +85°C 4 2 0 –2 –40°C +85°C –4 +25°C –6 –8 0.25 –10 –60 –40 –20 0 20 40 60 80 100 0 120 2.5 5 2 –40°C Output Voltage Swing (V) Output Voltage Swing (V) +85°C +25°C 0.5 +25°C –0.5 +85°C –1 15 VS = ±1.35V –40°C 1 0 12.5 1.5 VS = ±2.5V 1 10 OUTPUT VOLTAGE vs OUTPUT CURRENT OUTPUT VOLTAGE vs OUTPUT CURRENT 2.5 1.5 7.5 Output Current (mA) Temperature (°C) –1.5 –2 +25°C 0.5 +85°C 0 –0.5 +85°C +25°C –1 –40°C –40°C –1.5 –2.5 0 2 4 6 8 10 12 0 14 0.5 1 1.5 2 2.5 Output Current (mA) Output Current (mA) 0.1Hz TO 10Hz PEAK-TO-PEAK VOLTAGE NOISE NOISE SPECTRAL DENSITY 1µV/div Noise (nV/√Hz) 1k 100 10 0.1 1 10 100 1k 1s/div Frequency (Hz) INA152 SBOS184 5 TYPICAL PERFORMANCE CURVES (Cont.) At TA = +25°C, VS = ±10V, RL = 10kΩ connected to GND, and Ref = GND, unless otherwise noted. CL = 470pF LARGE-SIGNAL STEP RESPONSE 2V/div 50mV/div CL = 25 50mV/div SMALL-SIGNAL STEP RESPONSE 50ms/div 25µs/div SETTLING TIME vs LOAD CAPACITANCE INPUT COMMON-MODE VOLTAGE vs OUTPUT VOLTAGE 25 45 VS = ±10V 20 Common-Mode Voltage (V) Settling Time (µs) 40 0.01% 35 30 0.1% 25 15 10 VS = +5V 5 0 –5 VS = ±2.5V –10 –15 –20 20 –25 100 –10 1000 –7.5 –5 –2.5 OFFSET VOLTAGE PRODUCTION DISTRIBUTION 16 5 7.5 10 OFFSET VOLTAGE PRODUCTION DISTRIBUTION VS = ±10V VS = ±2.5V Offset Voltage (µV) 1000 800 600 400 1000 800 600 400 200 0 –200 –400 0 –600 2 0 –800 2 200 4 0 4 6 –200 6 8 –400 8 10 –600 10 12 –800 12 –1000 Percentage of Units (%) 14 –1000 Percentage of Units (%) 2.5 16 14 6 0 Output Voltage (V) Loading Capacitance (pF) Offset Voltage (µV) INA152 SBOS184 TYPICAL PERFORMANCE CURVES (Cont.) At TA = +25°C, VS = ±10V, RL = 10kΩ connected to GND, and Ref = GND, unless otherwise noted. OFFSET VOLTAGE DRIFT OFFSET VOLTAGE DRIFT 40 40 VS = ±10V Percentage of Units (%) Percentage of Units (%) 30 25 20 15 10 25 20 15 10 0 0 1 2 3 4 5 6 7 Offset Voltage Drift (µV/°C) SBOS184 30 5 5 INA152 VS = ±2.5V 35 35 8 9 10 1 2 3 4 5 6 7 8 9 10 Offset Voltage Drift (µV/°C) 7 APPLICATIONS INFORMATION The INA152 is a low-power difference amplifier suitable for a wide range of general-purpose applications. Figure 1 shows the basic connections required for operation of the INA152. Decoupling capacitors are strongly recommended in applications with noisy or high-impedance power supplies. The capacitors should be placed close to the device pins, as shown in Figure 1. As shown in Figure 1, the differential input signal is connected to pins 2 and 3. The source impedances connected to the inputs must be nearly equal to assure good commonmode rejection. An 8Ω mismatch in source impedance will degrade the common-mode rejection of a typical device to approximately 80dB (a 16Ω mismatch degrades CMR to 74dB). If the source has a known impedance mismatch, an additional resistor in series with the opposite input can be used to preserve good common-mode rejection. The INA152’s internal resistors are accurately ratio trimmed to match. That is, R1 is trimmed to match R2, and R3 is trimmed to match R4. However, the absolute values may not be equal (R1 + R2 may be slightly different than R3 + R4). Thus, large series resistors on the input (greater than 250Ω), even if well matched, will degrade common-mode rejection. Circuit-board layout constraints might suggest possible variations in connections of the internal resistors. It might appear that pins 1 and 3 could be interchanged, however, because of the ratio trimming technique used (see paragraph above) CMRR will be degraded. If pins 1 and 3 are interchanged, pins 2 and 5 must also be interchanged to maintain proper ratio matching. OPERATING VOLTAGE The INA152 operates from single (+2.7V to +20V) or dual (±1.35V to ±10V) supplies with excellent performance. Specifications are production tested with +5V and ±10V supplies. Most behavior remains unchanged throughout the full operating voltage range. Parameters that vary significantly with operating voltage are shown in the typical performance curves. INPUT VOLTAGE The INA152 can accurately measure differential signals that are above and below the supply rails. Linear common-mode range extends from 2 • [(V+) – 1V] to 2 • (V–) (nearly twice the supplies). See the typical performance curve, “Input Common-Mode Voltage vs Output Voltage”. OFFSET VOLTAGE TRIM The INA152 is laser trimmed for low offset voltage and drift. Most applications require no external offset adjustment. Figure 2 shows an optional circuit for trimming the output offset voltage. The output is referred to the output reference terminal (pin 1), which is normally grounded. A voltage applied to the Ref terminal will be summed with the output signal. This can be used to null offset voltage, as shown in Figure 2. The source impedance of a signal applied to the Ref terminal should be less than 10Ω to maintain good commonmode rejection. INA152 V+ V– 2 V2 R1 R2 5 1µF 1µF 7 4 6 VO INA152 V2 –In 2 R1 40kΩ R2 40kΩ 10Ω 5 V3 3 R3 R4 6 V3 +In 3 R3 40kΩ R4 40kΩ 1 VO = V 3 – V2 Gain Error = ±0.01% CMR = 94dB Nonlinearity = ±0.002% +V VO = V 3 – V2 Offset Adjustment Range = ±1mV 1 100kΩ 100kΩ 10Ω –V FIGURE 1. Precision Difference Amplifier (Basic Power Supply and Signal Connections). 8 FIGURE 2. Offset Adjustment. INA152 SBOS184 TYPICAL APPLICATIONS V1 –In INA152 A1 2 5 R2 V+ V+ 3 6 R1 INA152 VO 2 R2 5 1 3 7 A2 V2 +In 6 VO = (1 + 2R2/R1) (V2 – V1) The INA152 can be combined with op amps to form a complete Instrumentation Amplifier (IA) with specialized performance characteristics. Texas Instruments offers many complete high performance IAs. Products with related performances are shown at the right in the table below. FEATURE SIMILAR COMPLETE TEXAS INSTRUMENTS IA OPA2227 Low Noise INA163 OPA129 Ultra Low Bias Current (fA) INA116 OPA2277 Low Offset Drift, Low Noise INA114, INA128 OPA2130 Low Power, FET-Input (pA) INA121 OPA2234 Single Supply, Precision, Low Power INA122, INA118 A1, A2 1 Common VO = (V+)/2 4 Common FIGURE 5. Pseudoground Generator. FIGURE 3. Precision Instrumentation Amplifier. INA152 V2 INA152 2 2 5 5 6 100Ω(1) 1% 6 V– VO = –V2 V0 0 to 2V 100Ω(1) 1% 3 1 IIN 0 to 20mA 1 3 NOTE: (1) Input series resistors should be less than 250Ω (1% max mismatch) to maintain excellent CMR. With 100Ω resistors, gain error is increased to 0.5%. FIGURE 4. Current Receiver with Compliance to Rails. INA152 SBOS184 FIGURE 6. Precision Unity-Gain Inverting Amplifier. 9 INA152 INA152 5 2 2 6 6 VO = 2 • V1 1 5 VO = V1 + V 3 1 V1 V1 V3 3 FIGURE 7. Precision Gain = 2 Amplifier. 3 FIGURE 10. Precision Summing Amplifier. INA152 +10V 2 2 5 6 +5V Out REF02 6 VO = 3 V3 INA152 2 V3 5 2 4 –5V Out 6 1 3 1 FIGURE 11. ±5V Precision Voltage Reference. FIGURE 8. Precision Gain = 1/2 Amplifier. R1 R2 INA152 2 2 5 INA152 5 6 V1 V3 1 VO = 3 (V1 + V3) 2 6 V1 V3 1 3 ( VO = 1 + FIGURE 9. Precision Average Value Amplifier. 10 VO R2 R1 )( V +2 V ) 1 3 FIGURE 12. Precision Summing Amplifier with Gain. INA152 SBOS184 1 Noise (60Hz hum) INA115 4 A1 2 Transducer or Analog Signal 25kΩ 3 Feedback 12 25kΩ 25kΩ A3 RG Output 11 14 25kΩ 25kΩ G=1+ 50kΩ RG 15 Noise (60Hz hum) 25kΩ A2 5 100kΩ Shield 13 7 V+ 8 10 Ref V– 3 INA152 2 5 6 1 FIGURE 13. Instrumentation Amplifier Guard Drive Generator. INA152 2 INA152 V1 3 A V2 B VO = V3 + V4 – V1 – V2 V3 V4 FIGURE 14. Precision Summing Instrumentation Amplifier. INA152 SBOS184 11 INA152 INA152 5 2 V2 R 5 2 6 R V1 A V1 1 3 6 V01 1 3 IO = (V1 – V2) (1/40k + 1/R) Load IO V2 INA152 FIGURE 15. Precision Voltage-to-Current Converter with Differential Inputs. 2 5 INA152 V2 6 V02 B 5 2 1 3 6 R V3 3 V01 – V02 = 2 (V2 – V1) OPA130 1 FIGURE 18. Differential Output Difference Amplifier. IO = (V3 – V2)/R IO Load FIGURE 16. Differential Input Voltage-to-Current Converter for Low IOUT. V2 2 INA152 5 6 INA152 V2 R (R ≥ 200Ω) 5 2 V3 1 3 Gate can be +VCC –5V R 6 R < 200Ω R IO Gate can be +VS –5V 1 3 (V3 – V2) Load R V3 IO = IO = (V3 – V2) (1/40k + 1/R) Load IO FIGURE 19. Isolating Current Source with Buffering Amplifier for Greater Accuracy. FIGURE 17. Isolating Current Source. 12 INA152 SBOS184 +5V 7 VS INA152 2 5 Transducer or Analog Signal 6 0V-4V Input 1 3 12 Bits Out ADS7806 4 –5V Eliminates errors due to different grounds. FIGURE 20. Differential Input Data Acquisition. INA152 2 5 V1 DG188 6 3 VO 1 Logic In VO 0 –V1 1 +V1 1 Logic In FIGURE 21. Digitally Controlled Gain of ±1 Amplifier. INA152 2 D1 D2 V1 Input R2 –In 1 R3 SBOS184 2 5 6 6 V0 = |V1| BUF634 VO R4 R5 2kΩ FIGURE 22. Precision Absolute Value Buffer. INA152 BUF634 inside feedback loop contributes no error. INA152 5 10pF 3 OPA130 R1 +In 3 1 RL FIGURE 23. High Output Current Precision Difference Amplifier. 13 PACKAGE OPTION ADDENDUM www.ti.com 10-Jun-2014 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) INA152EA/250 ACTIVE VSSOP DGK 8 250 Green (RoHS & no Sb/Br) CU NIPDAU | CU NIPDAUAG Level-3-260C-168 HR -40 to 85 B52 INA152EA/250G4 ACTIVE VSSOP DGK 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -40 to 85 B52 INA152EA/2K5 ACTIVE VSSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU | CU NIPDAUAG Level-3-260C-168 HR -40 to 85 B52 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 10-Jun-2014 continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant INA152EA/250 VSSOP DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 INA152EA/2K5 VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) INA152EA/250 VSSOP DGK INA152EA/2K5 VSSOP DGK 8 250 210.0 185.0 35.0 8 2500 367.0 367.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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