MOSFET Small-Signal Model
■
Concept: Þnd an equivalent circuit which interrelates the incremental changes in
iD, vGS, vDS, etc. Since the changes are small, the small-signal equivalent circuit
has linear elements only (e.g., capacitors, resistors, controlled sources)
■
Derivation: consider for example the relationship of the increment in drain
current due to an increment in gate-source voltage when the MOSFET is
saturated-- with all other voltages held constant.
vGS = VGS + vgs , iD = ID + id -- we want to find id = (?) vgs
We have the functional dependence of the total drain current in saturation:
iD = µn Cox (W/2L) (vGS - VTn )2 (1 + λnvDS) = iD(vGS, vDS, vBS)
Do a Taylor expansion around the DC operating point (also called the quiescent
point or Q point) defined by the DC voltages Q(VGS, VDS, VBS):
2
∂i D
1∂ iD
( v gs ) + --iD = I D +
∂ v GS
2 ∂ v2
Q
GS
2
( v gs ) + …
Q
If the small-signal voltage is really Òsmall,Ó then we can neglect all everything past
the linear term -∂i D
iD = I D +
( v gs ) = I D + g m v gs
∂ v GS
Q
where the partial derivative is deÞned as the transconductance, gm.
EE 105 Spring 1997
Lecture 12
Transconductance
The small-signal drain current due to vgs is therefore given by
id = gm vgs.
iD = ID + id
D
G
+
+
B
vgs
_
+
_
VDS = 4 V
S
VGS = 3 V_
600
500
iD
id
400
vGS = VGS + vgs
Q
(µA) 300
vGS = VGS = 3 V
gm = id / vgs
200
100
1
2
3
4
5
6
VDS (V)
EE 105 Spring 1997
Lecture 12
Another View of gm
* Plot the drain current as a function of the gate-source voltage, so that
the slope can be identiÞed with the transconductance:
D
iD = ID + id
G
+
+
B
vgs
_
+
iD(vGS, VDS = 4 V)
600
iD
400
VDS = 4 V
S
VGS = 3 V_
500
_
id
Q
gm = id / vgs
(µA) 300
200
100
3
2
1
vGS = VGS = 3 V
6 vGS (V)
4
5
vGS = VGS + vgs
EE 105 Spring 1997
Lecture 12
Transconductance (cont.)
■
Evaluating the partial derivative:
W
g m = µ n C ox  ----- ( V GS Ð V Tn ) ( 1 + λ n V DS )
 L
Note that the transconductance is a function of the operating point, through its
dependence on VGS and VDS -- and also the dependence of the threshold voltage on
the backgate bias VBS.
■
In order to Þnd a simple expression that highlights the dependence of gm on the
DC drain current, we neglect the (usually) small error in writing:
gm =
2I D
W
2µ n C ox  ----- I D = ------------------------- L
V GS Ð V Tn
For typical values (W/L) = 10, ID = 100 µA, and µnCox = 50 µAV-2 we Þnd that
gm = 320 µAV-1 = 0.32 mS
■
How do we make a circuit which expresses id = gm vgs ? Since the current is not
across the controlling voltage, we need a voltage-controlled current source:
id
gate
+
vgs
drain
gmvgs
_ source
_
EE 105 Spring 1997
Lecture 12
Output Conductance
■
We can also Þnd the change in drain current due to an increment in the drainsource voltage:
∂i D
2
W
g o = ------------ = µ n C ox  ------ ( V GS Ð V Tn ) λ n ≅ λ n I D
 2L
∂v
DS
Q
The output resistance is the inverse of the output conductance
1
1
r o = ----- = -----------go
λn I D
The small-signal circuit model with ro added looks like:
id = gm vgs + (1/ro)vds
gate
drain
+
vgs
_ source
gmvgs
id
ro
+
vds
_
EE 105 Spring 1997
Lecture 12
Backgate Transconductance
■
We can Þnd the small-signal drain current due to a change in the backgate bias
by the same technique. The chain rule comes in handy to make use of our
previous result for gm:
∂i D
g mb = -----------∂v BS
∂V Tn
g mb = ( Ð g m ) -----------∂v BS
Q
Q
∂i D
= -----------∂V Tn
Q
∂V Tn
-----------∂v BS
Q
Ðγ n
γ n gm


= ( Ð g m )  ------------------------------------ = ------------------------------------ .
2 Ð 2 φ p Ð V BS
 2 Ð 2 φ p Ð V BS
The ratio of the Òfront-gateÓ transconductance gm to the backgate
transconductance gmb is:
2qε s N
qε s N a
C b(y=0)
g mb
1
a
--------- = ---------------------------------------------- = --------- ------------------------------------- = -------------------C ox 2 ( Ð 2 φ p Ð V BS )
gm
C ox
2C ox Ð 2 φ p Ð V BS
where Cb(y=0) is the depletion capacitance at the source end of the channel -gate
source
channel
Cb(0)
depletion
region
bulk
EE 105 Spring 1997
Lecture 12
,,
MOSFET Capacitances in Saturation
fringe electric
field lines
gate
drain
,,,
,
,,
,,,
source
n+
n+
Csb
qN (vGS)
overlap LD
overlap LD
Cdb
depletion
region
In saturation, the gate-source capacitance contains two terms, one due to the
channel chargeÕs dependence on vGS [(2/3)WLCox] and one due to the overlap of
gate and source (WCov, where Cov is the overlap capacitance in fF per µm of gate
width)
2
C gs = --- WLC ox + W C ov
3
In addition, there are depletion capacitances between the drain and bulk (Cdb) and
between source and bulk (Csb). Finally, the extension of the gate over the Þeld oxide
leads to a small gate-bulk capacitance Cgb.
EE 105 Spring 1997
Lecture 12
Complete Small-Signal Model
■
The capacitances are ÒpatchedÓ onto the small-signal circuit schematic
containing gm, gmb, and ro
Cgd
gate
id
+
drain
vgs
Cgs
gmvgs
Cgb
gmbvbs
ro
_ source
_
Csb
vbs
Cdb
+
bulk
■
p-channel MOSFET small-signal model
the source is the highest potential and is located at the top of the schematic
+
source
gmbvsb
Cgd
_ gate
vsb
gmvsg
Cgs
vsg
ro
−id
drain
Cgb
_
bulk
Csb
Cdb
EE 105 Spring 1997
Lecture 12
Circuit Simulation
■
Objectives:
¥ fabricating an IC costs $1000 ... $100,000 per run
---> nice to get it ÒrightÓ the Þrst time
¥ check results from hand-analysis
(e.g. validity of assumptions)
¥ evaluate functionality, speed, accuracy, ... of large circuit blocks or entire chips
■
Simulators:
¥ SPICE: invented at UC Berkeley circa 1970-1975
commercial versions: HSPICE, PSPICE, I-SPICE, ... (same core as Berkeley
SPICE, but add functionality, improved user interface, ...)
EE 105: student version of PSPICE on PC, limited to 10 transistors
¥ other simulators for higher speed, special needs (e.g. SPLICE,
■
RSIM)
Limitations:
¥ simulation results provide no insight (e.g. how to increase speed of circuit)
¥ results sometimes wrong (errors in input, effect not modeled in SPICE)
===> always do hand-analysis Þrst and COMPARE RESULTS
EE 105 Spring 1997
Lecture 12
MOSFET Geometry in SPICE
■
Statement for MOSFET ... D,G,S,B are node numbers for drain, gate, source,
and bulk terminals
,,
,
Mname D G S B MODname L= _ W=_ AD= _ AS=_ PD=_ PS=_
MODname speciÞes the model name for the MOSFET
NRS = N (source)
PS = 2 × Ldiff (source) = W
NRD = N (drain)
PD = 2 × Ldiff (drain) = W
L
Ldiff (source)
Ldiff (drain)
W
AS = W × Ldiff (source)
AD = W × Ldiff (drain)
EE 105 Spring 1997
Lecture 12
MOSFET Model Statement
.MODEL MODname NMOS/PMOS VTO=_ KP=_ GAMMA=_ PHI=_
LAMBDA=_ RD=_ RS=_ RSH=_ CBD=_ CBS=_CJ=_ MJ=_ CJSW=_
MJSW=_ PB=_ IS= _ CGDO=_ CGSO=_ CGBO=_ TOX=_ LD=_
Parameter name (SPICE /
this text)
SPICE symbol
Eqs. (4.93), (4.94)
Analytical symbol
Eqs. (4.59), (4.60)
Units
channel length
Leff
L
m
polysilicon gate length
L
Lgate
m
lateral diffusion/
gate-source overlap
LD
LD
m
transconductance parameter
KP
µnCox
A/V2
threshold voltage /
zero-bias threshold
VTO
VTnO
V
channel-length modulation
parameter
LAMBDA
λn
V-1
bulk threshold /
backgate effect parameter
GAMMA
γn
V1/2
surface potential /
depletion drop in inversion
PHI
- φp
V
DC Drain Current Equations:
( V GS ≤ Ð V TH )
I DS = 0
KP
I DS = -------- ( W ⁄ L eff )V DS [ 2 ( V GS Ð V TH ) Ð V DS ] ( 1 + LAMBDA ⋅ V DS )
2
2
KP
I DS = -------- ( W ⁄ L eff ) ( V GS Ð V TH ) ( 1 + LAMBDA ⋅ V DS )
2
( 0 ≤ V DS ≤ V GS Ð V TH )
( 0 ≤ V GS Ð V TH ≤ V DS )
V TH = V TO + GAMMA ( 2 ⋅ PHI Ð V BS Ð 2 ⋅ PHI )
EE 105 Spring 1997
Lecture 12
Capacitances
SPICE includes the ÒsidewallÓ capacitance due to the perimeter of the source and
drain junctions -n+ drain
(area)
(perimeter)
CJ ⋅ AD
CJSW ⋅ PD
C BD(V BD) = -------------------------------------------- + ---------------------------------------------------MJ
MJSW
( 1 Ð V BD ⁄ PB )
( 1 Ð V BD ⁄ PB )
Gate-source and gate-bulk overlap capacitance are speciÞed by CGDO and CGSO
(units: F/m).
Level 1 MOSFET model:
.MODEL MODN NMOS LEVEL=1 VTO=1 KP=50U LAMBDA=.033 GAMMA=.6
+ PHI=0.8 TOX=1.5E-10 CGDO=5E-10 CGSO= 5e-10 CJ=1E-4 CJSW=5E-10
+ MJ=0.5 PB=0.95
The Level 1 model is adequate for channel lengths longer than about 1.5 µm
For sub-µm MOSFETs, BSIM = ÒBerkeley Short-Channel IGFET ModelÓ is the
industry-standard SPICE model.
EE 105 Spring 1997
Lecture 12