Series/Parallel Resistor Reduction

advertisement
RESISTIVE CIRCUITS
• SERIES/PARALLEL RESISTOR COMBINATIONS - A TECHNIQUE
TO REDUCE THE COMPLEXITY OF SOME CIRCUITS
• LEARN TO ANALYZE THE SIMPLEST CIRCUITS
• THE VOLTAGE DIVIDER
• THE CURRENT DIVIDER
• WYE - DELTA TRANSFORMATION - A TECHNIQUE TO REDUCE
COMMON RESISTOR CONNECTIONS THAT ARE NEITHER SERIES NOR
PARALLEL
SERIES PARALLEL RESISTOR COMBINATIONS
UP TO NOW WE HAVE STUDIED CIRCUITS THAT
CAN BE ANALYZED WITH ONE APPLICATION OF
KVL(SINGLE LOOP) OR KCL(SINGLE NODE-PAIR)
WE HAVE ALSO SEEN THAT IN SOME SITUATIONS
IT IS ADVANTAGEOUS TO COMBINE RESISTORS
TO SIMPLIFY THE ANALYSIS OF A CIRCUIT
NOW WE EXAMINE SOME MORE COMPLEX CIRCUITS
WHERE WE CAN SIMPLIFY THE ANALYSIS USING
THE TECHNIQUE OF COMBINING RESISTORS…
… PLUS THE USE OF OHM’S LAW
SERIES COMBINATIONS
PARALLEL COMBINATION
G p = G1 + G2 + ... + G N
FIRST WE PRACTICE COMBINING RESISTORS
3k
SERIES
6k||3k
(10K,2K)SERIES
6k || 12k = 4k
5kΩ
3k
12k
EXAMPLES COMBINATION SERIES-PARALLEL
9k
If the drawing gets confusing…
Redraw the reduced circuit
and start again
18k || 9k = 6k
RESISTORS ARE IN SERIES IF THEY CARRY
EXACTLY THE SAME CURRENT
6k + 6k + 10k
RESISTORS ARE IN PARALLEL IF THEY ARE
CONNECTED EXACTLY BETWEEN THE SAME TWO
NODES
EFFECT OF RESISTOR TOLERANCE
NOMINAL RESISTOR VALUE : 2.7kΩ
RESISTOR TOLERANCE : 10%
RANGES FOR CURRENT AND POWER?
−
10
NOMINAL CURRENT : I =
= 3.704 mA
2.7
(10)
2.7
_
= 37.04 mW
10
= 3.367 mA
MINIMUM POWER(VImin ) : 33.67 mW
1.1× 2.7
10
=
= 4.115 mA MAXIMUM POWER : 41.15 mW
0.9 × 2.7
MINIMUM CURRENT : I min =
MAXIMUM CURRENT : I max
NOMINAL POWER : P =
2
CIRCUIT WITH SERIES-PARALLEL RESISTOR COMBINATIONS
THE COMBINATION OF COMPONENTS CAN REDUCE
THE COMPLEXITY OF A CIRCUIT AND RENDER IT
SUITABLE FOR ANALYSIS USING THE BASIC
TOOLS DEVELOPED SO FAR.
COMBINING RESISTORS IN SERIES ELIMINATES
ONE NODE FROM THE CIRCUIT.
COMBINING RESISTORS IN PARALLEL ELIMINATES
ONE LOOP FROM THE CIRCUIT
GENERAL STRATEGY:
•REDUCE COMPLEXITY UNTIL THE CIRCUIT
BECOMES SIMPLE ENOUGH TO ANALYZE.
•USE DATA FROM SIMPLIFIED CIRCUIT TO
COMPUTE DESIRED VARIABLES IN ORIGINAL
CIRCUIT - HENCE ONE MUST KEEP TRACK
OF ANY RELATIONSHIP BETWEEN VARIABLES
4k || 12k 12k
FIRST REDUCE IT TO A SINGLE LOOP CIRCUIT
SECOND: “BACKTRACK” USING KVL, KCL OHM’S
6k
I3
V
OHM' S : I 2 = a
6k
KCL : I1 − I 2 − I 3 = 0
OHM' S : Vb = 3k * I 3
…OTHER OPTIONS...
6k || 6k
KCL : I 5 + I 4 − I 3 = 0
OHM' S : VC = 3k * I 5
I1 =
12V
12k
Va =
3
(12)
3+9
12
I3
4 + 12
Vb = 4k * I 4
I4 =
2k || 2k = 1k
VOLTAGE DIVIDER : VO =
LEARNING
BY DOING
1k
(3V ) = 1V
1k + 2k
1k + 1k = 2k
CURRENT DIVIDER : I O =
1k
(3 A) = 1A
1k + 2k
Y − Δ TRANSFORMATIONS
THIS CIRCUIT HAS NO RESISTOR IN
SERIES OR PARALLEL
IF INSTEAD
OF THIS
WE COULD
HAVE THIS
THEN THE CIRCUIT WOULD
BECOME LIKE THIS AND
BE AMENABLE TO SERIES
PARALLEL TRANSFORMATIONS
Rab = R2 || ( R1 + R3 )
Δ →Y
Rab = Ra + Rb
Y →Δ
Ra R1
Rb R1
R2 ( R1 + R3 )
R1 R2
=
⇒
=
R
Ra + Rb =
3
Ra =
R
R
Ra
3
b
R1 + R2 + R3
R1 + R2 + R3
Rb R2
RR
=
⇒ R2 = b 1
Rc R1
Rc
REPLACE IN THE THIRD AND SOLVE FOR R1
R2 R3
R ( R + R2 ) Rb =
Ra Rb + Rb Rc + Rc Ra
Rb + Rc = 3 1
R1 + R2 + R3
=
R
1
R1 + R2 + R3
Rb
R3 R1
Rc =
R R + Rb Rc + Rc Ra
R1 + R2 + R3
R2 = a b
R1 ( R2 + R3 )
Rc
Rc + Ra =
Δ →Y
R1 + R2 + R3
R R + Rb Rc + Rc Ra
R3 = a b
Ra
SUBTRACT THE FIRST TWO THEN ADD
TO THE THIRD TO GET Ra
Y −Δ
LEARNING EXAMPLE: APPLICATION OF WYE-DELTA TRANSFORMATION
COMPUTE IS
c
R1
a
c
DELTA CONNECTION
=
R3
12k × 6k
12k + 6k + 18k
R2
R1 R2
Ra =
R1 + R2 + R3
Rb =
R2 R3
R1 + R2 + R3
Rc =
R3 R1
R1 + R2 + R3
Δ →Y
a
REQ = 6k + (3k + 9k ) || (2k + 4k ) = 10k
IS =
12V
= 1.2mA
10k
ONE COULD ALSO USE A
WYE - DELTA TRANSFORMATION ...
Download