Tail-Biting Convolutional Codes for the Secondary Fast Feedback Channel: Fading Channel Results Document Number: C802.16m-09/0910r1 Date Submitted: 2009-05-04 Source: Ericsson AB, Tsao-Tsen (Jason) Chen (jason.t.chen@ericsson.com) Kai Yu Sten Sjöberg Per-Erik Östling Re: Venue: Category: AWD comments / Area: Chapter 15.3.9 (UL-CTRL) “Comments on AWD 15.3.9 UL-CTRL” Base Contribution: Purpose: To be discussed and adopted by TGm for the 802.16m AWD. Notice: This document does not represent the agreed views of the IEEE 802.16 Working Group or any of its subgroups. It represents only the views of the participants listed in the “Source(s)” field above. It is offered as a basis for discussion. It is not binding on the contributor(s), who reserve(s) the right to add, amend or withdraw material contained herein. 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Tail-biting convolutional codes (TBCC) for Secondary Fast Feedback Channel (SFBCH) • Performances of Ericsson’s TBCC [1] over fading channels are better than or about the same as other linear block codes [2] for SFBCH for payload 7 to 24 bits – 13 to 24 bits: 0.4dB~3.3dB gain @ PER=10-1 ~10-3 – 7 to 12 bits: 0.3dB or much less loss (about the same performances) @ PER=10-1 ~10-3 • TBCC can be decoded efficiently by simple Wrap-Around Viterbi Algorithm (WAVA), with complexity much less than linear codes with MLD or trellis decoding for most payload cases [1] Ericsson’s TBCC vs Intel’s TBCC • Ericsson [1]: 128 state, Intel [3]: 64 states • Ericsson’s TBCC has larger minimum distances than Intel’s TBCC for most of the payload cases – for payload 12 bits: Ericsson d_min=24 > Intel d_min=20 – for payload 7 to 11 bits: Ericsson has much larger d_min – For payload 13 to 24 bits: Ericsson d_min ≥ Intel d_min Comparison of minimum distances (d_min) lower bound on d_min upper bound on d_min Intel TBCC Samsung 1st code Samsung 2nd code LGe 1st code LGe 2nd code Ericsson TBCC d_min of (60,k) codes 30 25 d_min 20 15 10 5 6 8 10 12 14 16 18 k: number of payload bits 20 22 24 Ericsson’s TBCC vs Intel’s TBCC: payload 12 bits, AWGN (60,12) TBCC, AWGN 0 10 Intel TBCC Ericsson TBCC -1 10 -2 10 -3 PER 10 -4 10 -5 10 -6 10 -7 10 -6 -4 -2 0 2 EbN0 (dB) 4 6 8 Ericsson’s TBCC w 1 Encoding: one 20-bit payload Linear Code w 2 Encodings: two 10-bit payloads payload 20 bits, 1Tx2Rx, VehA 120Km/hr 0 10 Samsung (30,10) LGe (30,10) Ericsson TBCC (60,20) -1 PER 10 -2 10 -3 10 -4 10 -6 -4 -2 0 2 4 6 EsN0 (dB) 8 10 12 14 Ericsson TBCC gain over the best of 2 proposed linear codes: payload >12 bits (0.4dB~3.3dB) Channel Model Channel Estimation Target PER Payload 14 bits Payload 16 bitd Payload 18 bits Payload 20 bits Payload 22 bits Payload 24 bits PedB-3 pilot avg 10% 0.61 0.61 0.60 0.61 0.56 0.47 VehA-120 pilot avg 10% 0.79 0.86 0.84 0.82 0.77 0.78 VehA-350 Perfect 10% 1.44 1.51 1.37 1.32 1.34 1.22 PedB-3 pilot avg 1% 0.71 0.69 0.62 0.61 0.60 0.53 VehA-120 pilot avg 1% 1.25 1.32 1.29 1.37 1.40 1.47 VehA-350 Perfect 1% 1.95 1.95 1.84 1.81 1.68 1.55 PedB-3 pilot avg 0.1% 0.54 0.62 0.62 0.59 0.45 NA VehA-120 pilot avg 0.1% 2.21 2.65 2.86 3.29 NA NA VehA-350 Perfect 0.1% 2.32 2.31 2.17 2.13 2.00 1.85 Ericsson TBCC loss over the best of 2 proposed linear codes: payload ≤ 12 bits (0.3dB or about the same performances) Channel Model Channel Estimation Target PER Payload 7 bits Payload 8 bits Payload 9 bits Payload 10 bits Payload 11 bits Payload 12 bits PedB-3 pilot avg 10% 0.17 0.13 0.09 0.07 0.06 0.06 VehA-120 pilot avg 10% 0.17 0.15 0.09 0.08 0.09 0.08 PedB-3 pilot avg 1% 0.17 0.14 0.11 0.08 0.07 0.07 VehA-120 pilot avg 1% 0.19 0.17 0.10 0.08 0.07 0.07 VehA-350 Perfect 1% NA 0.19 0.12 0.09 0.10 0.08 PedB-3 pilot avg 0.1% 0.12 0.12 0.09 0.09 0.11 0.07 VehA-120 pilot avg 0.1% 0.21 0.22 0.15 0.11 0.10 0.10 VehA-350 Perfect 0.1% 0.36 0.22 0.14 0.10 0.09 0.08 Conclusions • We recommend that Ericsson’s TBCC [1] be used to encode the SFBCH with payload sizes from 7 to 24 bits, with one encoding [1] for all payload cases. References • [1] IEEE C80216m-09_0506r3, “Tail-Biting Convolutional Codes with Expurgation and Rate-Compatible Puncturing for the Secondary Fast Feedback Channel”. • [2] IEEE C80216m-09_0387, “Proposed Text for the Draft P802.16m Amendment on the PHY structure for UL control – merged version”. • [3] IEEE C80216m-09_0875, “Proposed Tailed Biting Convolutional Codes for SFBCH”. • [4] IEEE C80216m-09_1012, “Performance comparison on SFBCH coding schemes”. Backup Slides Simulation Assumptions Channel Bandwidth 10MHz FFT Size 1024 Cyclic Prefix Ratio 1/8 Channel Model PedB-3Km/hr, VehA-120Km/hr, VehA-350Km/hr Antenna Scheme 1Tx2Rx Modulation QPSK Channel Estimation Perfect channel estimation, or pilot averaging with 3dB pilot power boosting Tile Structure 3 distributed 2x6 tiles, 2 pilots per tile with pilot shifting De-mapping Log-MAP Decoder TBCC: Wrap-around Viterbi algorithm with simple termination condition and maximum 4 iterations Linear codes: bit-level MLD Error Statistics For linear codes with 2 smaller encoded packets per payload (13 bits to 24 bits), the overall packet is declared erroneous if either one of the 2 smaller encoded packets is in error