ESE370:
Circuit-Level
Modeling, Design, and Optimization
for Digital Systems
Day 5: September 8, 2014
Transistor Introduction
(first order)
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Penn ESE370 Fall2014 -- DeHon
Today
• First order model
• There are always Rs and Cs
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Penn ESE370 Fall2014 -- DeHon
Previously
• Quasi-Static – inputs transition, circuit
responds, and settles
– Dynamic transition to roughly static states
• DC/Steady-State
– Ignore the capacitors
• Zeroth-order allows us to reason
(mostly) at logic level about steady-state
functionality of typical gate circuits
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Penn ESE370 Fall2014 -- DeHon
Zero-th Order MOSFET
• Ideal Switch
Vgs > Vth  conducts
Vgs < Vth  does not conduct
Vth – threshold voltage
• Gate draws no current from input
– Loads input capacitively
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Penn ESE370 Fall2014 -- DeHon
Zero-th Order MOSFET
IDS
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Penn ESE370 Fall2014 -- DeHon
First Order Model
• Switch
– Loads gate input capacitively
• Cg
– Has finite drive strength
• Ron
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Penn ESE370 Fall2014 -- DeHon
Gate Output
• Assume this is equivalent circuit for
gate output state
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Penn ESE370 Fall2014 -- DeHon
Gate Output Load
• What is Vout if gate is unloaded?
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Penn ESE370 Fall2014 -- DeHon
Gate Output Load
• What happens to Vout when add a load?
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Penn ESE370 Fall2014 -- DeHon
Resistive Load
• What happens when load is resistance?
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Penn ESE370 Fall2014 -- DeHon
Resistive Load
• If loaded resistively,
and resistive load is too strong
(resistance too low)
• Cause output voltage to drop
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Penn ESE370 Fall2014 -- DeHon
Capacitive Load
• What happens when load is capacitance?
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Penn ESE370 Fall2014 -- DeHon
Capacitive Load
• Capacitive load does not change the
steady-state output voltage
• Will effect the delay (settling time)
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Penn ESE370 Fall2014 -- DeHon
First Order Model
• Switch
– Loads gate input capacitively
• Draw no steady-state current
• Does not impact steady-state
voltage
• Impacts Delay
– Has finite drive strength
• Could form voltage divider with
resistive load
• Impacts Delay
Penn ESE370 Fall2014 -- DeHon
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First Order Model (vs. Vds)
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Penn ESE370 Fall2014 -- DeHon
First Order Model (vs. Vgs)
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Penn ESE370 Fall2014 -- DeHon
Refine to First Order
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Penn ESE370 Fall2014 -- DeHon
Zero-th Order Tells us how
switches set (Vin=0)
How are switches set
in this case?
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Penn ESE370 Fall2014 -- DeHon
Zero-th Order Tells us how
switches set (Vin=0)
V2=Vdd
Vout=0
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Penn ESE370 Fall2014 -- DeHon
Zero-th Order Tells us how
switches set (Vin=0)
V2=Vdd
Vout=0
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Penn ESE370 Fall2014 -- DeHon
Zero-th Order Tells us how
switches set (Vin=0)
• Leaves an RC Circuit we can analyze
ESE215 problem
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Penn ESE370 Fall2014 -- DeHon
Zero-th Order Tells us how
switches set (Vin=0)
• Look at middle stage (V2)
What is equivalent
circuit of load at V2?
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Penn ESE370 Fall2014 -- DeHon
Zero-th Order Tells us how
switches set (Vin=0)
• Look at middle stage (V2)
What is equivalent
output circuit for
first pair of transistors
driving V2?
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Penn ESE370 Fall2014 -- DeHon
Zero-th Order Tells us how
switches set (Vin=0)
• Look at middle stage (V2)
What is relevant circuit?
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Penn ESE370 Fall2014 -- DeHon
Zero-th Order Tells us how
switches set (Vin=0)
• Look at middle stage (V2)
Vdd
Gnd
Penn ESE370 Fall2014 -- DeHon
What is relevant circuit?
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Zero-th Order Tells us how
switches set (Vin=0)
• Look at middle stage (V2)
What is delay of this stage?
(charging V2 when Vin
switch Vdd0)
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Penn ESE370 Fall2014 -- DeHon
What more does
first-order model tell us?
• Delay
• Quasistatic behavior
• Voltage settling with resistive loads
– At least some basis for reasoning
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Penn ESE370 Fall2014 -- DeHon
What is this leaving out?
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Penn ESE370 Fall2014 -- DeHon
What is this leaving out?
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Penn ESE370 Fall2014 -- DeHon
What leaving out?
• What happens at intermediate voltages
– Not rail-to-rail (not just gnd or Vdd input)
• Details of dynamics, including…
– Input not transition as step
– Intermediate drive strengths change with
Vgs
• Isn’t really 0 current below threshold
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Penn ESE370 Fall2014 -- DeHon
Engineering Control
• Vth – process engineer
• Drive strength (Ron)– circuit engineer
control with sizing transistors
• Supply voltages (Vdd)
– range set by process
– detail use by circuit design
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Penn ESE370 Fall2014 -- DeHon
Engineering Control:
Threshold
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Penn ESE370 Fall2014 -- DeHon
Engineering Control:
Drive Strength
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Penn ESE370 Fall2014 -- DeHon
Rs and Cs
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Penn ESE370 Fall2014 -- DeHon
Wire Capacitance
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Penn ESE370 Fall2014 -- DeHon
Wire Capacitance
A
Cr0
d
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Wire Resistance
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Wire Resistance
R
Penn ESE370 Fall2014 -- DeHon
L
A
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Wire Resistance
• Sanity check
– Wire twice as long = resistors in series
– Wire twice as wide = resistors in parallel
R
Penn ESE370 Fall2014 -- DeHon
L
A
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There are always Rs and Cs
•
•
•
•
•
Every wire (connection) has resistance
Every wire has capacitance
(Every wire has inductance)
Modeling vs. discrete components
Dominant effects
– Rbig + Rsmall ≈ Rbig (Rwire << Ron)?
– Cbig || Csmall ≈ Cbig (Cwire<<Cg) ?
• Today more likely (Cwire>>Cg)
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Penn ESE370 Fall2014 -- DeHon
Big Ideas
• MOSFET Transistor as switch
• Purpose-driven simplified modeling
– Aid reasoning, sanity check, simplify design
• Analysis methodology
– zero-th order to understand switch state (logic)
– First-order to get equivalent RC circuit (delay)
• New perspective on Rs and Cs
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Penn ESE370 Fall2014 -- DeHon
MOSFET
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Penn ESE370 Fall2014 -- DeHon
Admin
• Normal Office Hours this week
– Ron on Monday 7pm (Detkin)
– Andre on Tuesday 4:15—5:30pm
– Ron on Wednesday 7pm (Detkin)
• Lecture on Wed.
• Homework on Thursday
• Lab on Friday (Ketterer)
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Penn ESE370 Fall2014 -- DeHon