ESE535: Electronic Design Automation Day 23: April 22, 2009

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ESE535:
Electronic Design Automation
Day 23: April 22, 2009
Statistical Static Timing Analysis
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Penn ESE535 Spring 2009 -- DeHon
Today
•
•
•
•
Sources of Variation
Limits of Worst Case
Optimization for Parametric Yield
Statistical Analysis
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Penn ESE535 Spring 2009 -- DeHon
Central Problem
Mean Number of Dopant Atoms
• As our devices approach the atomic scale,
we must deal with statistical effects
governing the placement and behavior of
individual atoms and electrons.
10000
1000
100
10
1000
500
250
130
65
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Technology Node (nm)
Penn ESE535 Spring 2009 -- DeHon
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•Transistor critical dimensions
•Atomic discreteness
•Subwavelength litho
•Etch/polish rates
•Focus
•Number of dopants
3
•Dopant Placement
Oxide Thickness
[Asenov et al. TRED 2002]
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Penn ESE535 Spring 2009 -- DeHon
Line Edge Roughness
• 1.2mm and
2.4mm lines
From:
http://www.microtechweb.com/2d/lw_pict.htm
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Penn ESE535 Spring 2009 -- DeHon
Phase Shift Masking
Source
http://www.synopsys.com/Tools/Manufacturing/MaskSynthesis/PSMCreate/Pages/default.aspx
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Penn ESE535 Spring 2009 -- DeHon
Line Edges (PSM)
Source:
http://www.solid-state.com/display_article/122066/5/none/none/Feat/Developments-in-materials-for-157nm-photoresists
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Penn ESE535 Spring 2009 -- DeHon
Intel 65nm SRAM (PSM)
Source:
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http://www.intel.com/technology/itj/2008/v12i2/5-design/figures/Figure_5_lg.gif
Penn ESE535 Spring 2009 -- DeHon
Statistical
Dopant
Placement
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Penn ESE535 Spring 2009 -- DeHon
[Bernstein et al, IBM JRD 2006]
Vth Variability @ 65nm
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Penn ESE535 Spring 2009 -- DeHon
[Bernstein et al, IBM JRD 2006]
Parameter Variation
 mCOX  W 
2
I ds  
 Vgs  Vth 
 2  L 
• Parameters will vary
from device-todevice on the die
– Include transistor
threshold (Vth)
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Penn ESE535 Spring 2009 -- DeHon
Sverdlov et al. TRED v50n9p1926 2003
ITRS 2005 Variation
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Penn ESE535 Spring 2009 -- DeHon
Source: Noel Menezes, Intel ISPD2007
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Penn ESE535 Spring 2009 -- DeHon
Source: Noel Menezes, Intel ISPD2007
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Penn ESE535 Spring 2009 -- DeHon
Old Way
• Characterize gates by corner cases
– Fast, nominal, slow
• Add up corners to estimate range
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Penn ESE535 Spring 2009 -- DeHon
Corners Misleading
Penn ESE535 Spring 2009 -- DeHon
[Orshansky+Keutzer DAC 2002]
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Probability Distribution
Parameteric Yield
Sell
Premium
Sell
Sell
nominal cheap
Discard
Delay
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Penn ESE535 Spring 2009 -- DeHon
Phenomena 1: Path Averaging
• Tpath = t0+t1+t2+t3+…t(d-1)
• Ti – iid random variables
– Mean t
– Variance s
• Tpath
– Mean d×t
– Variance  d × s
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Penn ESE535 Spring 2009 -- DeHon
Sequential Paths
• Tpath = t0+t1+t2+t3+…t(d-1)
• Tpath
– Mean d×t
– Variance  d × s
• 3 sigma delay on path: d×t + 3d × s
– Worst case per component would be:
d×(t+3 s
– Overestimate d vs. d
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Penn ESE535 Spring 2009 -- DeHon
SSTA vs. Corner Models
• STA with corners
predicts 225ps
• SSTA predicts
162ps at 3s
• SSTA reduces
pessimism by 28%
[Slide composed
by Nikil Mehta]
Penn ESE535 Spring 2009 -- DeHon
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Source: IBM, TRCAD 2006
Phenomena 2: Parallel Paths
•
•
•
•
•
•
Cycle time limited by slowest path
Tcycle = max(Tp0,Tp1,Tp2,…Tp(n-1))
P(Tcycle<T0) = P(Tp0<T0)×P(Tp1<T0)…
= [P(Tp<T0)]n
0.5 = [P(Tp<T50)]n
P(Tp<T50) = (0.5)(1/n)
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Penn ESE535 Spring 2009 -- DeHon
• P(Tp<T50) = (0.5)(1/n)
Probability Distribution
System Delay
Delay
– N=108  0.999999993
• 1-7×10-9
– N=1010  0.99999999993
• 1-7×10-11
• For 50% yield want
– 6 to 7 s
– T50=Tmean+7spath
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Penn ESE535 Spring 2009 -- DeHon
System Delay
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Penn ESE535 Spring 2009 -- DeHon
System Delay
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Penn ESE535 Spring 2009 -- DeHon
Corners Misleading
Phenomena 2
Phenomena 1
Penn ESE535 Spring 2009 -- DeHon
[Orshansky+Keutzer DAC 2002]
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Source: Noel Menezes, Intel ISPD2007
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Penn ESE535 Spring 2009 -- DeHon
But does worst-case mislead?
• STA with worst-case says these are
equivalent:
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Penn ESE535 Spring 2009 -- DeHon
What do we need to do?
• Ideal:
– Compute PDF for delay at each gate
– Compute delay of a gate as a PDF from:
• PDF of inputs
• PDF of gate delay
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Penn ESE535 Spring 2009 -- DeHon
Delay Calculation
Day 15
AND rules
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Penn ESE535 Spring 2009 -- DeHon
What do we need to do?
• Ideal:
– compute PDF for delay at each gate
– Compute delay of a gate as a PDF from:
• PDF of inputs
• PDF of gate delay
– Need to compute for distributions
• SUM
• MAX (maybe min)
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Penn ESE535 Spring 2009 -- DeHon
Dealing with PDFs
• Simple model assume all PDFs
are Gaussian
– Model with mean, s
– Imperfect
• Not all phenomena are Gaussian
• Sum of Gaussians is Gaussian
• Max of Gaussians is not a Gaussian
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Penn ESE535 Spring 2009 -- DeHon
Sum of Gaussians
• Two Guassians
– A,sA and B, sB
– SUM = (A+B),
s A2 + s B2
– If identical
• SUM = 2A, sA2
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Penn ESE535 Spring 2009 -- DeHon
Tightness Probability
(toward max)
Gaussian PDF with zero mean
and unit variance
Prob(X<y)
Standard deviation of SUM(A,B)
(if A & B uncorrelated)
Prob(X<(Anom – Bnom)/mA+B))
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Penn ESE535 Spring 2009 -- DeHon
[Source: Nikil Mehta]
MAX of Two Gaussians
•
Expected value
– Weighted sum of means
– Additional term which adds fraction of s of SUM(A,B)
•
Variance
– Weighted sum of variance
– Some other terms?
Penn ESE535 Spring 2009 -- DeHon
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[Source: Nikil Mehta]
MAX of Two Identical Gaussians
• Given two identical
Gaussians A and B with m
and s
• Plug into equations
• E[MAX(A,B)] = m + s/()1/2
• VAR[MAX(A,B)] = s2 – s/
[Source: Nikil Mehta]
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Penn ESE535 Spring 2009 -- DeHon
[Source: Nikil Mehta]
STA Example
• Example circuit
– Each component has a delay
– Nets are numbered
3
1
6
2
2
3
4
4
1
3
6
5
12
5
3
2
7
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Penn ESE535 Spring 2009 -- DeHon
[Source: Nikil Mehta]
STA Example
• Transform into a timing graph
– Nodes = nets
– Edges = gates (many edges can correspond to the same
gate)
3
1
2
2
4
3
1
4
6
3
6
12
0
6
5
12
5
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Penn ESE535 Spring 2009 -- DeHon
S
3
2
7
0
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[Source: Nikil Mehta]
STA Example
• Goal is to compute arrival time on output
t=0
3
1
t=0
2
2
t=0
4
3
t=0
1
4
6
3
6
12
0
6
5
12
5
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Penn ESE535 Spring 2009 -- DeHon
S
3
2
7
0
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[Source: Nikil Mehta]
STA Example
3
1
t=3
2
2
12
t=2
t=14
4
12
3
t=16
t=4
12
1
t=13
4
t=1 2009 -- DeHon
Penn ESE535 Spring
6
3
6
t=9
0
6
5
5
S
3
2
7
0
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[Source: Nikil Mehta]
STA Example
– For nodes with multiple inputs
• Arrival time = MAX(input arrival times)
3
1
t=3
2
2
12
t=2
t=14
4
12
3
t=16
t=4
12
1
t=13
4
t=1 2009 -- DeHon
Penn ESE535 Spring
6
3
6
t=9
0
6
5
5
t=21
S
3
2
7
0
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[Source: Nikil Mehta]
STA Example
3
1
t=3
2
2
12
t=2
t=14
4
12
3
t=16
t=4
12
1
t=13
4
t=1 2009 -- DeHon
Penn ESE535 Spring
6
3
6
t=9
0
6
5
t=27
5
t=21
S
3
t=24
2
7
0
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[Source: Nikil Mehta]
STA Example
3
1
t=3
2
2
12
t=2
t=14
4
12
3
t=16
t=4
12
1
t=13
4
t=1 2009 -- DeHon
Penn ESE535 Spring
6
3
6
t=9
6
5
t=30
0
t=30
t=27
5
t=21
3
t=24
2
7
t=26
0
S
t=30
t=26
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[Source: Nikil Mehta]
SSTA Example
• Represent delay and arrival time statistically (m,s)
• Picking large variance (10) for all delays
(3,10)
1
t=(3,10)
(2,10)
2
(12,10)
t=(2,10)
(4,10)
(12,10)
3
t=(4,10)
(1,10) (12,10)
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Penn ESE535t=(1,10)
Spring 2009 -- DeHon
(6,10)
(3,10)
6
(6,10)
(0,0)
(5,10)
5
(0,0)
(3,10)
S
(2,10)
7
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[Source: Nikil Mehta]
SSTA Example
• Perform statistical SUM’s
• Once we get to node 5, calculate tightness probabilities of input
edges
– Will allow us to perform statistical MAX
– MAX is computed pairwise
(3,10)
1
(6,10)
(3,10)
t=(3,10)
t=(9,14)
6
(2,10)
(6,10)
2
(12,10)
t=(2,10) t=(14,14)
0.35 (5,10)
(4,10)
(12,10)
0.43
3
5
t=(16,14)
t=(4,10)
0.22 t=(32,14) (3,10)
(2,10)
(1,10) (12,10)
t=(13,14)
4
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Penn ESE535t=(1,10)
Spring 2009 -- DeHon
(0,0)
(0,0)
S
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[Source: Nikil Mehta]
SSTA Example
• Finish forward pass
– Now, have statistical delay pdf of circuit
– Normal distribution with m=51 and s=15
(3,10)
1
t=(3,10)
(6,10)
0.03 (3,10)
t=(9,14)
6
(6,10) 0.97 t=(44,17)
(2,10)
(0,0)
2
(12,10)
t=(2,10) t=(14,14)
0.64
0.35 (5,10)
t=(44,17)
t=(38,17)
(4,10)
(12,10)
0.43
3
5
S
t=(16,14)
(0,0)
t=(4,10)
t=(51,15)
0.22 t=(32,14) (3,10)
0.36
(2,10)
(1,10) (12,10)
t=(35,17)
t=(13,14)
t=(37,20)
4
1.00 7
45
t=(1,10)
Penn ESE535 Spring 2009 -- DeHon
t=(37,20)
[Source: Nikil Mehta]
SSTA Example
• Also have statistical criticality of all paths
– Criticality ´ Product of tightness probabilities along path
– SSTA outputs list of paths in order of criticality
• On backward pass can calculate
– Statistical slack
– Statistical node/edge criticality
1
0.03
6
2
0.97
0.35
3
0.43
Printing critical paths (7/7) …
[crit=0.27](node3->sink)
[crit=0.21](node2->sink)
[crit=0.15](node3->sink)
[crit=0.13](node4->sink)
[crit=0.12](node2->sink)
[crit=0.07](node4->sink)
[crit=0.02](node1->sink)
0.64
5
S
0.22
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Penn ESE535 Spring 2009 -- DeHon
0.36
1.00 7
46
Probability of Path Being Critical
[Source: Intel DAC 2005]
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Penn ESE535 Spring 2009 -- DeHon
More Technicalities
• Correlation
– Physical on die
– In path (reconvergent fanout)
• Makes result conservative
– Gives upper bound
– Can compute lower
2
1
4
3
Graphics from: Noel Menezes (top) and Nikil Mehta (bottom)
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Penn ESE535 Spring 2009 -- DeHon
SSTA vs. Monte Carlo Verification
Time
Source: IBM, TRCAD 2006
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Penn ESE535 Spring 2009 -- DeHon
Using SSTA in FPGA CAD
[Slide composed
by Nikil Mehta]
• Le Hei
– FPGA2007
– SSTA Synthesis,
Place, Route
• Kia
– FPGA2007
– Route with
SSTA
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Penn ESE535 Spring 2009 -- DeHon
Summary
• Nanoscale fabrication is a statistical process
• Delays are PDFs
• Assuming each device is worst-case delay is
too pessimistic
– Wrong prediction about timing
– Leads optimization in wrong direction
• Reformulate timing analysis as statistical
calculation
• Estimate the PDF of circuit delays
• Use this to drive optimizations
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Penn ESE535 Spring 2009 -- DeHon
Admin
• Reading for Monday online
• Online Course Evaluations
– http://www.upenn.edu/eval
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Penn ESE535 Spring 2009 -- DeHon
Big Ideas:
• Coping with uncertainty
• Statistical Reasoning and Calculation
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Penn ESE535 Spring 2009 -- DeHon
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