DISTRIBUTED GENERATION EFFECTS ON VOLTAGE PROFILE OF
DISTRIBUTION GRID WITH SVC AND SMART INVERTER
A Project
Presented to the faculty of the Department of Electrical and Electronic Engineering
California State University, Sacramento
Submitted in partial satisfaction of
the requirements for the degree of
MASTER OF SCIENCE
in
Electrical and Electronic Engineering
by
Muhammad Arslan Tayyab
SPRING
2014
© 2014
Muhammad Arslan Tayyab
ALL RIGHTS RESERVED
ii
DISTRIBUTED GENERATION EFFECTS ON VOLTAGE PROFILE OF
DISTRIBUTION GRID WITH SVC AND SMART INVERTER
A Project
by
Muhammad Arslan Tayyab
Approved by:
__________________________________, Committee Chair
Mohammad Vaziri
__________________________________, Second Reader
Mahyar Zarghami
____________________________
Date
iii
Student: Muhammad Arslan Tayyab
I certify that this student has met the requirements for format contained in the University format
manual, and that this project is suitable for shelving in the Library and credit is to be awarded for
the project.
__________________________, Graduate Coordinator
Preetham B. Kumar
Department of Electrical and Electronic Engineering
iv
___________________
Date
Abstract
of
DISTRIBUTED GENERATION EFFECTS ON VOLTAGE PROFILE OF
DISTRIBUTION GRID WITH SVC AND SMART INVERTER
by
Muhammad Arslan Tayyab
A properly planned interconnection of Distributed Generation (DG) to the grid can
help minimize system loses, and defers system upgrades. Higher penetration level of DG
has been known to negatively affect the steady state voltage profile, intermittent voltage
fluctuations, and possible line overloads. Static VAr Compensators (SVC) and Smart
Inverters (SI) are considered as viable equipment for mitigating the voltage effects caused
by DG. This project aims to investigate and verify the overvoltage and overloading issues
caused by DG at high penetration levels. A real distribution feeder from a local utility
was selected using cluster analysis for simulations. A commercial software was used for
all simulations. DG at various penetration levels was interconnected at 4 different
locations on the feeder. Summer Peak (SP), Partial Peak (PP) and Winter Peak (WP)
loading conditions have been studied. Solar Photo-Voltaic (PV) is used as a DG for
simulations. SVC and SI were proposed as possible solutions and their mitigating effects
v
have been reported. Acceptable penetration levels of DG have been proposed depending
on location of DG and associated voltage or overloading issues. Overloading of cables
and lines is indicated in terms of percentages. Two special cases, one involving
simultaneous high and low voltage conditions and the other related to high voltages at
multiple locations, have also been studied. Proposed solutions for both cases have been
reported.
_______________________, Committee Chair
Mohammad Vaziri
_______________________
Date
vi
TABLE OF CONTENTS
Page
List of Tables ......................................................................................................................... viii
List of Figures ...........................................................................................................................ix
Chapter
1. INTRODUCTION ............................................................................................................... 1
2. DG RELATED VOLTAGE ISSUES ON DISTRIBUTED NETWORK............................ 5
2.1 Voltage Control..................................................................................................... 5
2.2 Voltage Flicker ..................................................................................................... 7
3. SIMULATIONS AND RESULTS....................................................................................... 9
4. PROPOSED SOLUTIONS FOR VOLTAGE ISSUES ..................................................... 14
4.1 Static VAr Compensator (SVC).......................................................................... 14
4.2 Smart Inverter (SI) .............................................................................................. 15
5. SIMULATION RESULTS FOR PROPOSED SOLUTIONS ........................................... 16
5.1 Solution with Static VAr Compensator (SVC) ................................................... 16
5.2 Solution with Smart Inverter (SI) ....................................................................... 18
6. SPECIAL CASES .............................................................................................................. 21
6.1 Simultaneous Over and Under Voltage Issue ..................................................... 21
6.2 Scattered DG Overvoltage Issue ......................................................................... 24
7. CONCLUDING REMARKS ............................................................................................. 27
References ................................................................................................................................ 29
vii
LIST OF TABLES
Tables
Page
1.
Feeder voltage at summer, partial and winter peak with DG ...................................... 12
2.
Places and percentages of overloaded sections ............................................................ 13
3.
Simulation results with SVC and SI ........................................................................... 18
viii
LIST OF FIGURES
Figures
Page
1.
Comparison of voltage profile, with and without DG .................................................. 7
2.
Simplified schematic diagram of the test feeder .......................................................... 10
3.
Voltage profile at WP with 30% penetration of DG, and SVC .................................. 17
4.
Voltage profile showing simultaneous over and under voltage issue ...................... 21
5.
Schematic showing simultaneous over and under voltage sections ............................. 23
6.
Corrected voltage profile after SVC and shunt capacitors .......................................... 24
7.
Overvoltage in multiple sections of feeder with DG at LC4 ...................................... 25
8.
Corrected voltage profile for scattered DG with three SVCs ..................................... 26
ix
1
CHAPTER 1: INTRODUCTION
In recent years, the interconnection of Distributed Generation (DG) as a viable
and alternative electric power supply has been significantly increasing. Any type of
electric power generation resource including solar Photo-Voltaic (PV), small gas
turbines, fuel cells, and/or wind turbines, interconnected to distribution system is referred
to as DG. DG is perceived to provide voltage support to the grid and lower system losses.
Interconnection of DG can also significantly affect the flow of power and voltage level in
distribution system [1], [2]. Lately, installation of solar PV as a clean DG source has been
exponentially increasing in many countries. However, solar PV still represents only a
fraction of total available generation sources.
Interconnection of PV or any other type of DG to distribution system at high
penetration levels can bring challenges to the operation of the system. Distribution
systems have been historically designed and expanded in what is known as “radial”
structure having unidirectional power flow direction from substation to customer loads
[1]-[3]. As penetration level of DG increases, changes in line flows and net reactive
powers in the system can result in reversal of power flow direction causing voltage rise
conditions with possibilities of unacceptable high voltages at some customer service
points [1], [2]. A “zero point” or “null point” exists in the system when loading is
balanced or lower than power output of DG [1]. The reversal of power flow occurs
beyond the “zero point” causing a voltage rise from “zero point” towards DG [1]. In
addition to high voltages during steady state operations, interconnection of DG can also
introduce intermittent and transient challenges including; voltage flicker, power quality,
2
system reliability, protection and harmonic distortion issues [1], [2]. DG can introduce
unacceptable level of total harmonic distortion (THD) in the feeder which could result in
protection issues and could also have an effect on true Power Factor (PF) of the system
[1]. The harmonic distortion effects of DG on voltage or current profiles have not been
investigated or discussed in this project.
A sudden change in voltage magnitude at customer level is known as voltage
flicker and it may be operationally unacceptable depending on its magnitude and
frequency of occurrence [4], [5]. Any type of DG can cause voltage flicker when
suddenly disconnected. However, solar PV and wind energy are considered more severe
sources of voltage flicker as compared to conventional DG. Conventional DG units are
more steady sources of generation, as they do not trip frequently. But, generation output
of solar PV and wind energy can decrease significantly due to sudden clouds and changes
in wind speed, respectively. As a result, planning for proper voltage control at high PV
penetrations is a required task before massive installation of PV systems. The system
needs to be studied and analyzed for prospective penetration levels of DG to ensure
acceptability of voltage profile and voltage flickers during worst case conditions.
Voltage control is implemented to maintain system voltage within acceptable
limits. Historically, voltage regulation in Distribution Network (DN) is based on a
unidirectional flow of power from the substation towards the loads. The power flow in
one direction results in voltage drop along the feeder from the substation towards the end
of line. This voltage drop increases as distance from the substation increases due to
increase in line impedance and connected load [1], [2]. The voltage drop is also
3
influenced by the values of real and reactive power flows along the line. The voltage at
the end of line could drop lower than the acceptable limit if the feeder is really long and
there is lack of proper voltage control within the feeder [2]. At distribution level, most
common methods used for voltage control include Load Tap Changing Transformers
(LTC) and Voltage Regulators (VR) having Line Drop Compensator (LDC) units, and as
well as shunt capacitors [2], [3]. DG at higher penetration levels deteriorates accuracy of
LDC units [6], can cause unnecessary operation of LTCs and regulators (known as
“hunting”), and interferes with proper operation of switched capacitors [1], [2]. DG can
also impact the control of Conversation Voltage Reduction (CVR), which is used for
reducing energy demand by keeping the load voltage within acceptable limits [2].
The distribution feeder used for this research is a typical distribution feeder,
selected from a number of utility feeders based on K-mean cluster analysis. K-mean
cluster analysis is based on finding a centrally located sample from different groups of
complete data, where each group has data samples which are similar within the group, but
different from other groups [7]. It is considered as one of the simpler algorithms to
categorize a data set in a number of clusters based on patterns, structures and/or attributes
of data. The method is used to select adequate number of samples that reasonably
represent the overall system. The utility had around three thousand medium voltage
distribution feeders in its service territory, ten of which were selected based on cluster
analysis. Total length of feeder, length of overhead lines, number of regulators, number
of switched capacitors, and primary voltage on feeder were the attributes considered for
the cluster analysis. Two more feeders were selected based on some historic challenges.
4
The feeder selected for this project was a relatively long feeder selected out of those
twelve feeders having maximum number of all attributes mentioned.
In the rest of the project report, a brief explanation of voltage issues is presented
in section II, then simulations for Summer Peak (SP), Partial Peak (PP), and Winter Peak
(WP) loading conditions at different penetration levels representing voltage issues are
presented in section III. A brief explanation of proposed solutions and associated
simulation results are demonstrated in sections IV and V, respectively. In the end, special
cases and concluding remarks are presented in sections VI and VII respectively.
5
CHAPTER 2: DG RELATED VOLTAGE ISSUES ON DISTRIBUTED NETWORK
2.1
Voltage Control
The American National Standard Institute (ANSI) defines acceptable standard
voltage range to be 114V–126V on 120V base in standard ANSI-C84.1 [2], [8]. Voltage
regulation in distribution system is usually achieved by automatically switching taps on a
transformer winding, or by reactive power injection. System voltage is controlled by
Volt-VAr equipment including LTC, VR, fixed and/or switched Capacitors and/or
Reactors, and other electronically controlled equipment such as; Static VAr
Compensators (SVCs). LTCs and VRs are the most commonly used equipment for DN,
which control the voltage by estimating the distribution line voltage drop caused by the
current flow in the line and then adjusting the voltage to compensate for the estimated
voltage drop. This control action is performed by the LDC unit of the LTCs and VRs. [2],
[3], [8]. LDC takes the line current as the input variable, along with line impedance and
base voltage as the settings to estimate the voltage drop [2], [3], [8]. An alternative
method to the normal LDC setting would be to set the sending voltage at tap changer
output to a fixed predetermined value. The value is usually set in a way that the worst
case voltage drop along the line would not cause violation of voltage limit in the
distribution feeder. Variations in the reverse power flow caused by fluctuations in DG
output makes it complex to adjust sending end voltage of tap changer to keep voltage in
limits [3], [8]. Reactive power injection/absorption is another effective way to
increase/decrease voltage at points of concern. The VAr injection/absorption to regulate
voltage can be controlled based on feedback voltage control or by scheduling fixed value
6
based on typical load profile [6]. Shunt capacitors are most common VAr injecting
equipment used in DN to correct PF and improve system voltage profile. LTC at
substation and shunt capacitors on distribution feeder are considered as most economical
voltage control equipment [8]. For VAr absorption, shunt reactors, SI, SVCs,
synchronous condensers, or machine based DG may be used.
LTCs, VRs, and SVCs can raise or lower the voltage as needed, but shunt
capacitors can only raise the voltage when inserted. Increased DG penetration level
initiates abnormally high and low voltage conditions on DN. Interconnection of DG at
higher penetration levels alters the performance of Volt-VAr equipment and overall DN.
Automatic Voltage Control (AVC) relay used in On-Load Tap Changing (OLTC)
transformer estimates the voltage drop to the end of line by measuring the voltage and the
current flow at the OLTC location and the value of impedance settings given by its Line
Drop Compensator (LDC) [6]. DG can cause errors in voltage drop measurement of AVC
relay depending on the PF of DG and the magnitude and direction of the current flow
through OLTC [6], [8]. These inaccuracies in voltage drop estimation of AVC relay
would result in erroneous voltage control initiated by OLTC on the feeder. Higher
penetration of DG also has undesirable effects on efficiency of shunt capacitors. The
fixed shunt capacitors keep injecting reactive power even if the voltage at point of
interest is higher than acceptable limit [8]. This causes the feeder voltage to exceed the
acceptable operational limit. A comparison of voltage profiles with DG at LC3 and
without DG from ‘substation’ to point ‘E’ indicating a very high voltage at DG location
is shown in Fig. 1.
7
165
163.8 V
160
155
Voltage Profile with
15% Penetration of
DG at LC3
Voltage (V)
150
145
Point E
End of Line
140
135
LC1
Voltage
Regulator
130
Voltage
Regulator
LC2
Voltage
Booster
125
120
115
Voltage Profile
without DG PV
Substation
0 5000
15000
25000
LC3
115.7 V
35000
45000
55000
65000
75000
85000
95000 105000 115000 125000 135000 145000 155000
Figure 1 : Comparison of voltage profile, with and without DG
The local voltage control attempts provided by some DGs can have negative
effect on utility regulation equipment, and cause undesirable “cycling” also known as
“hunting” of regulation devices [1], [8], [10]. The excessive operation of traditional
voltage control equipment could result in additional maintenance and operational cost,
and can also shorten the operational life of equipment [10]. LTCs, VRs, and shunt
capacitors are not sufficient to control unacceptable high/low voltages due to limited
buck/boost and/or functional capabilities. Additional line equipment such as SVCs as
well as Smart Inverters (SI) may be needed for better control of the DN voltage.
2.2
Voltage Flicker
Voltage flicker can be caused by sudden addition or removal of generation units
and/or loads. The unacceptable voltage rise due to DG could result in abrupt tripping of
conventional DG which would cause a sudden drop in voltage of feeder. Voltage
regulators cannot respond immediately and can take anywhere from several seconds to a
8
few minutes to properly regulate the voltage depending on the conditions. Therefore the
resulting voltage flicker may be outside of the acceptable limit [1]. Loss of generation
plant is a major source of voltage flicker depending on the size of generation. Residential
loads that can cause voltage flicker include heat pumps, air conditioners, small welders,
ovens and hair dryers [5]. Industrial loads that draw fluctuating power such as large
electric arc furnaces, induction motors and welding plants are major sources of voltage
flicker [5]. Instantaneous flicker level (Ifl), percentile short-term flicker (Pst), and
percentile long-term flicker (Plt) are among the most common types of voltage flicker
[5]. Ifl quantifies voltage flicker at any given instant occurred due to low impendence
load being connected. Pst is usually associated with short term fluctuation in intensity of
incandescent light, while Plt is used to determine average flicker effects of several
operating loads [5]. International Electrotechnical Commission (IEC) had developed
standards for measuring voltage flicker and provides limits for Pst and Plt [6]. Voltage
flicker value can be measured and maintained at Point of Common Coupling (PCC) and
should not affect customers [6]. For this paper, flicker of voltage is calculated by using
(1)
𝑉𝐹𝐿𝐼𝐶𝐾𝐸𝑅 = 𝑉𝑀𝑎𝑥 − 𝑉𝑀𝑖𝑛 + 𝑉𝑅𝑒𝑔
(1)
where VMax is the maximum voltage at Point of Common Coupling (PCC) with DG, VMin
is the minimum voltage at PCC without DG, and VReg is voltage regulation implemented
by voltage regulator [2].
9
CHAPTER 3: SIMULATIONS AND RESULTS
The simulated DN was a 21kV feeder with sections operated at 12kV and the
main line length of 152,350 feet as shown in Fig. 1. The maximum SP load of 14.63 MW
was comprised of 3.4 MW agricultural, 7.04 MW residential, 1.25 MW commercial, 2
MW industrial and 0.94 MW of other spot loads. There were 3 VRs in the feeder. The
control mode used for VRs in simulations was to set the base voltage at 125.5 V without
any R and/or X values to disable LDC capability of VR due to limitations in the software
package. There were also 3 fixed voltage boosters and 3 auto transformers rated at 21/12
kV in the feeder. The feeder had 5 fixed and 12 switched capacitors. The switched
capacitors were set to voltage control settings at 114 V to energize and at 126 V to
disconnect the unit, respectively. Real and reactive allocation of load was based on
conversion of energy (kWh) consumption records and the conversion factors used by the
commercial grade software package. All loads were considered balanced in voltage drop
calculations in simulations. Number of iterations in load flow analysis was limited to 100
with 1% tolerance level. A simplified schematic diagram of the test feeder is shown in
Fig. 2.
10
Substation
21KV
LC1
902 ft
Legend
End of Line
A
DG
Location
12891 ft
Voltage
Regulator
F
B
28673 ft
35697 ft
Booster
G
In Line
Transformer
21/12 kV
LC2
61559 ft
21/12 kV
21/12 kV
G
62006 ft
H
58378 ft
C
DG
G
Overloaded in
some cases
67602 ft
J
D
84691 ft
I
84749 ft
100810 ft
LC3
149570 ft
E
152350 ft
Figure 2 : Simplified schematic diagram of the test feeder
Three different DG Penetration percentage levels (DG P%) of 15%, 30% and 50%
were used for simulations. Penetration levels of DG were referenced with respect to
maximum load of feeder, which occurred during SP. Simulations for each penetration
level were performed for each of the three Different Peak Loading Conditions (DPLC) of
SP, PP, and WP, respectively. The simulations were performed at four different DG Load
Center (LC) locations (shown as DG LC in tables). The DG load center locations used for
11
DG interconnection were near substation referred as LC1, around middle of the feeder
referred as LC2, near end of the line referred as LC3 and scattered locations referred as
LC4. The Over Loads (OL) that occurred in line sections in percent (%) and places (Pl)
have also been shown in Table 2.
SP load used in the simulations was 14,630 kW at 0.99 PF. Simulations were
performed at base case, and with total PV penetrations at LC1, LC2, LC3 and LC4
locations. The 15%, 30% and 50% penetration levels of DG with respect to SP were
calculated to be 2194.5 kW, 4389 kW, and 7315 kW respectively. During the simulations
at SP, it was found that DG had least effect on voltage rise at LC1 and most severe effect
on voltage rise at LC3. There were no overvoltage issues for up to 50% DG penetration
for SP at LC1 as shown in Table 1. At LC2, there were no voltage issues up to 30%
penetration. There was a minor voltage rise at voltage regulator before point ‘C’ with
15% penetration as shown in Table 1. Overvoltage was only at the VR location and
nowhere else. The minor voltage rise at 15% penetration was due to the fact that at 15%
penetration, 3 switched capacitors were turned on. However, at 30% penetration level,
only 1 switched capacitor was turned on. There were overvoltages with 50% penetration
level at LC2 and severely high voltage conditions with DG interconnected at LC3 as
shown in Table 1. Also, many lines were overloaded with 30% and 50% penetration
levels at LC3 between points ‘C’ and ‘E’ as shown in Table 2. The overloading issue
made it unacceptable to implement 30% and 50% penetration levels at LC3 without
proper upgrade of lines. At LC4, voltages remained within limits up to 30% penetration
level, but there were overvoltage issues for 50% penetration level as shown in Table 1.
12
Table 1 : Feeder voltage at summer, partial and winter peak with DG
SP - Volts (V)
PP - Volts (V)
Vmax
Vmax
WP - Volts (V)
DG
LC
DG
P%
n/a
0
125.89 115.72 125.94 120.45 125.98 120.01
LC1
15
125.94 115.71 125.98 120.46 125.97 120.02
LC1
30
125.95 115.73 125.98 120.47 125.98 120.08
LC1
50
125.96 115.78 125.99 120.51 125.99 120.11
LC2
15
126.09 115.98 125.98 119.54 125.95 119.06
LC2
30
125.97 115.25 127.44 119.73 127.44 119.23
LC2
50
128.65 115.67
LC3
15
163.8
LC3
30
193.78 117.48 196.73 119.54 197.71 119.03
LC3
50
224.66 116.92 226.49 119.41 227.27 118.88
LC4
15
125.95 116.98 126.44 121.28 126.28 120.79
LC4
30
125.96 117.89 127.01 121.33 127.24 120.77
LC4
50
127.1
Vmin
129.9
Vmin
119.62
Vmax
129.8
Vmin
119.36
118.08 167.41 119.52 168.01 119.03
119.28 128.00 122.45 127.92 121.81
Similar results were found for PP and WP loading conditions showing minimal
voltage effects for DG installations at LC1 and severe high voltage effects for DG
interconnections at LC3. PP load used in the simulations was 7030 kW at 0.96 PF, and
WP load used was 4950 kW at 0.81 PF. Both PP and WP showed no overvoltage issues
up to 50% DG penetration at LC1. At LC2, there were high voltage issues at 30% and
50% DG penetration for PP and WP, which required further voltage regulation equipment
to implement DG at LC2. Voltages were severely high even with 15% penetration at
LC3. The lines were also overloaded with 30% and 50% penetration levels at LC3 as
shown in Table 2. So it was unacceptable to implement 30% and 50% penetration levels
at LC3 for PP and WP loading condition. Overloading occurred between points ‘C’ and
13
‘E’ for 30% and 50% penetration levels for both PP and WP simulations as shown in
Table 2.
Table 2 : Places and percentages of overloaded sections
SP OL
%
Pl
PP OL
%
Pl
WP OL
%
Pl
DG
LC
DG SVC/
P%
SI
LC3
30
N/A
111.8 C - E
LC3
LC4
50
50
N/A
N/A
162.8 C - E 173.4 C - E 176.5 C - E
--124.1 F - H 127.6 F - H
LC2
50
SVC
LC3
15
SVC
LC2
50
SI
--
116
C - E 119.2 C - E
--
123.2 A - B 139.9 C - E
A-B
124.2 C - E 139.5 C - E 147.1
C–E
--109 A - B 126 A - B
--. No overloading occurred.
At LC4, there were overvoltage issues starting with 15% and 30% penetrations as
shown in Table 1 for PP and WP. 50% penetration at LC4 also showed overloading
issues at some places between points ‘F’ and ‘H’. In short, DG at LC1 had no overvoltage
issue for SP, PP, and WP. DG at LC2 and LC4 needed more voltage regulation, and DG
at LC3 showed severe high voltages for SP, PP and WP. The over voltages caused by DG
at WP loading condition were more severe than over voltages caused by DG at SP
loading conditions for the same penetration level. This shows DG penetration levels will
highly depend on the locations of interconnection and proximity to the substation as well
as the loading conditions, the capability of the feeder lines, and the type/number of the
voltage regulating equipment.
14
CHAPTER 4: PROPOSED SOLUTIONS FOR VOLTAGE ISSUES
For mitigation of voltage related DG effects, various Volt-VAr controlling
equipment including VRs, SVCs, Capacitors, Reactors, and Smart Inverter (SI) may be
used. In this project, SVCs and SI were proposed and investigated as solution to over
voltages that occurred due to DG as shown in Table I in section III. SVCs and SIs were
investigated through computer simulations and the results have been reported in the next
sections.
4.1
Static VAr Compensator (SVC)
SVC is a fast acting power electronic device that can provide or absorb reactive
power to control voltage [2], [9]. It is a shunt connected device compensating reactive
power to maintain a stable system voltage. Major components which make up SVC
include Thyristor Controlled Switched Reactors and Capacitors. SVC is known to also
reduce the voltage flicker issues caused by sudden variations in DG output [2]. Major
advantages of SVC in distribution system include; system voltage stabilization, decrease
in consumption of reactive power, mitigation of voltage fluctuations and harmonic
distortion [9]. The corrective measures of SVCs are relatively smooth and nearly
continuous as compared to abrupt and stepwise changes provided by devices such as VRs
and switched Capacitors. SVC reacts quickly to any voltage change and brings the
voltage back to desired set point almost instantaneously as compared to VR which acts
much slower than SVC [2]. Historically, SVCs were implemented on transmission lines
due to their high cost and large size. The compact version of SVC referred as
15
Distribution-SVC is used in distribution systems [2]. Simulation results showed that
SVCs can be effective for a wide range of DG penetration levels.
4.2
Smart Inverter (SI)
Currently and by the existing standards, simple inverters that convert direct
current to alternating current at unity or 100% PF produce only active power at their
outputs [10]. SI is a relatively newer inverter technology capable of producing and/or
absorbing reactive power [10]. Since the output power of PV at interconnection point can
change dramatically due to clouds, fog or storm, there is a need to control reactive power
near PV interconnection point to keep the system voltage stable. The required voltage
stability of system can be achieved by SI. As the voltage can go higher with increased
penetration of PV, SI adjusts its PF to absorb reactive power at PV interconnection point
to bring the high voltage down within standard limits. For this paper, PV with fixed 90%
leading PF was simulated to test the effectiveness of SI in mitigation of high voltage
effects of DG. SI models for variable PF were unavailable in the software package used
for simulations.
16
CHAPTER 5: SIMULATION RESULTS FOR PROPOSED SOLUTIONS
Overvoltage caused by higher levels of PV penetration was identified by
simulations. The proposed solutions to bring the voltages back within standard values
were the use of SVC and SI. The solutions were implemented only for the cases with no
overloading issues, as overloaded lines would require upgrading. That is; for the test
feeder, 30% and 50% penetration levels of DG at LC3, and 50% penetration level at LC4
caused overloads, and hence were not considered for solutions.
5.1
Solution with Static VAr Compensator (SVC)
For overvoltage cases without overloading issues, SVC was installed near the DG
interconnection and it helped bring the voltages down within standard limits. DG at LC1
did not cause any overvoltages even at 50% penetration. As a result, no SVC was needed
at LC1. For LC2, up to 30% penetration level could be implemented along with the SVC
without any overvoltage or overloading issues as shown in Table 2 and Table 3. For 50%
penetration level at LC2, SVC helped to bring the voltage down within acceptable limits
as shown in Table 3, but it had overloading issues as shown in Table 2. Voltage profile of
the entire feeder with 30% penetration level at LC2 was corrected by SVC at WP loading
as shown in Fig. 3. Voltage profiles showed that the overall feeder voltage at all points
remained within standard limits. Voltage profile of the entire feeder in Fig. 3 shows
voltages across three-phase balanced loads connected along the main line in blue color.
The voltages across the loads between two-phases along laterals have been shown in
green. The voltages across single phase loads along single phase lateral have been shown
in red color.
17
128
127 125.93 V
125.93 V
126
LC2with
withSVC
SVC
DGDGatatLC2
Voltage (V)
125
Endof
ofLine
Line
End
124
123
123.24 V
123.24
122
121
121.76 VV
121.76
120
119
118
Substation
Substation
117
0 5000
15000 25000 35000
118.23
118.23 VV
45000 55000 65000 75000
85000 95000 105000 115000 125000 135000 145000 155000
Figure 3 : Voltage profile at WP with 30% penetration of DG, and SVC
At LC3, there were no overvoltage issues at 15% penetration level with SVC as
shown in Table 3, but there were overloading issues as shown in Table 2. SVC near DG
at LC3 helped bring the voltage within limits but caused overloading issues. So, SVC at
LC3 was infeasible with the present ratings of lines. At LC4, scattered DG caused
overvoltages in different parts of the feeder requiring additional SVCs at different parts
of the feeder. The SVC solution at LC4 was not used for overvoltage issues. However, a
special case in section VI for scattered DG overvoltage issue at LC4 is presented for
illustration purposes. To summarize, for the test feeder, DG could be implemented up to
50% penetration level at LC1, and up to 30% at LC2 with SVC without any overvoltage
or overloading issues.
18
Table 3 : Simulation results with SVC and SI
SVC
SI
DP
LC
DG
LC
DG
P%
SP
LC2
50
125.96 115.56 -3998 125.93 115.41
PP
LC2
30
125.94 118.78 -2201 125.94 118.86
PP
LC2
50
125.94 117.86 -4300 125.95 118.35
WP LC2
30
125.93 118.23 -2201 125.94
WP LC2
50
125.97 117.26 -4500 125.95 117.85
SP
LC3
15
125.92 114.17 -2130 151.47
PP
LC3
15
125.92 114.79 -2289 154.97 119.47
WP LC3
15
125.92 114.36 -2284 156.12 119.03
SP
LC4
50
*
*
*
125.95
118
PP
LC4
15
*
*
*
126.11
120.5
PP
LC4
30
*
*
*
126.22 120.15
WP LC4
15
*
*
*
126.66 119.99
WP LC4
30
**
**
**
126.67 119.79
Vmax
Vmin
kVAr
Vmax
Vmin
118.4
117.5
*. Simulations performed only for smart inverter.
**. See special case of scattered DG overvoltage issue in section VI - B.
5.2
Solution with Smart Inverter (SI)
SI at LC1 was not required, as DG at LC1 did not cause any overvoltages even at
50% penetration level. SI absorbed VArs at LC2, LC3, and LC4 to correct the high
voltage caused by DG. SI solved high voltage issues at LC2 for up to 30% penetration
level without causing any overloads as shown in Tables 2 and 3. SI at LC2 brought the
voltages within limits for 50% penetration level. However, it was still infeasible to
implement SI due to overloading issues as shown in Table 2. SI at LC3 helped bring the
voltage down by approximately 12 V without any overloading, but voltage still remained
well above the limits as shown in Table 3, rendering the solution unacceptable to
19
implement. SI at LC4 did not cause overloading issues, but it clearly did not bring the
voltage within acceptable range as shown in Table 3. Thus, SI at LC4 was not a viable
option to implement without additional voltage regulation. In summary, DG could be
penetrated up to 50% level at LC1, and up to 30% at LC2 with SI without any
overvoltage or overloading issues.
For calculation of flicker, only the worst case related to the 30% penetration level
at LC2 was used. LC1 had no overvoltage issues, so the voltage flicker at LC1 would be
lower than at LC2. Voltage flickers for other acceptable cases were found to be within
standards. Here, voltage flicker was calculated as 8.55 V using (1), due to loss of DG at
LC2 at WP loading:
VFlicker = 127.44 – 123.63 + (0.7 + 4.04) = 8.55 V
(2)
The voltage at the interconnection point before DG installation was 123.63 V. After
adding DG at LC2 with 30% penetration level at WP loading, the maximum voltage at
PCC raised up to 127.44 V. There were 2 VRs regulating the line voltage between
substation and end of line with DG interconnected. The change in voltage regulation due
to DG by VR installed between points A and B was 0.7 V. The VR was boosting voltage
in both cases, before and after interconnection of DG to the feeder. The second VR
installed between points B and C was boosting the voltage before DG, but bucking after
DG interconnection, causing more change in voltage regulation. The change in voltage
regulation by the second VR was 4.04 V. So the total voltage flicker due to DG was
calculated to be 8.55 V as shown in (2). SVC and/or SI helped lower the maximum
voltage at point of DG interconnection. The maximum voltage at PCC after utilization of
20
SVC and SI were 124.27 V and 124.46 V respectively. Both regulators kept boosting
voltage before and after DG interconnection when SVC and/or SI were in place. This was
unlike the previous case without SVC or SI where one regulator was bucking voltage.
This caused a decrease in required change in voltage regulation. SVC and SI reduced
voltage flicker by implementing the needed change in voltage regulation. In the test
feeder, for the same transient conditions, voltage flicker was calculated as 0.64 V and
0.85 V with SVC and SI, respectively, which are within acceptable range. It can be
concluded that, SVC and/or SI not only correct the high voltage caused by DG, but also
can help reduce magnitude of voltage flickers caused by loss of DG.
21
CHAPTER 6: SPECIAL CASES
Two special cases have been considered. The first case involves simultaneous
high and low voltage conditions and second is about overvoltage issues related to
scattered DG.
6.1
Simultaneous Over and Under Voltage Issue
A sample case was simulated for 400% load growth in a high growth area of the
feeder between points ‘F’ and ‘G’ indicated in Fig. 2. Simulations were performed for
WP loading condition for proposed 30% penetration level of DG at LC2. The case
showed simultaneous high and low voltages, with high voltage of 126.87 V between
points ‘B’ and ‘C’, and low voltage of 112.8 V between points ‘F’ and ‘G’ as shown in
Fig. 4 and Fig. 5. Section of the feeder near DG interconnection showed over voltage and
section of the feeder with load growth showed under voltage issue.
Figure 4 : Voltage Profile showing simultaneous over and under voltage issue
22
SVC at LC2 between points ‘B’ and ‘C’ was used to lower the overvoltage issue
down to the acceptable value of 125.68 V. However, the undervoltage issue between
points ‘F’ and ‘G’ remained unsolved with the SVC. The voltage between ‘F’ and ‘G’
dropped further down as SVC between ‘B’ and ‘C’ absorbed reactive power to bring the
voltage down within limits. The minimum voltage between points ‘F’ and ‘G’ for
proposed load growth after DG and SVC was 111.77 V. Shunt capacitors were proposed
as a solution to handle under voltage issue raised due to load growth. Shunt capacitors
were proposed as a solution to correct the undervoltage issue. Three voltage controlled
shunt capacitors were installed between points ‘F’ and ‘G’ at 54,518 feet, 55,734 feet,
and 57,394 feet from substation, respectively as shown in Fig. 5.
23
Substation
21KV
LC1
902 ft
Legend
End of Line
A
DG
Location
12891 ft
F
B
28673 ft
35697 ft
G
LC2
61559 ft
G
62006 ft
C
67602 ft
Voltage
Regulator
Booster
54518 ft
In Line
Transformer
55734 ft
57394 ft
DG
G
Undervoltage
Section
Over voltage
Section
D
100810 ft
LC3
149570 ft
E
SVC
Shunt
Capacitor
152350 ft
Figure 5 : Schematic showing simultaneous over and under voltage sections
Switched shunt capacitors injected reactive power as the voltage fell below 114
V. The VAr injection by switched capacitors helped bring the voltage between points ‘F’
and ‘G’ to 114.13 V, which was within acceptable limits. The voltage between points ‘B’
and ‘C’ was 125.93 V after insertion of shunt capacitors which was also within limits.
The voltage at all other points on the feeder remained within acceptable limits after
24
connecting shunt capacitors. The corrected voltage profile after SVC and shunt capacitors
is shown as shown in Fig. 6.
127
126
125.92 V
125.93 V
125
123.02 V
124
123
End of Line
122
Voltage (V)
121
121.61 V
120
119
118
117
116
115
114
113
Substation
0 5000
114.13 V
15000 25000 35000 45000 55000 65000 75000 85000 95000 105000 115000 125000 135000 145000 155000
Figure 6 : Corrected voltage profile after SVC and shunt capacitors
So for simultaneous high and low voltage issue, SVCs along with voltage
controlled switched capacitors maybe used as corrective measures. The solution maybe
applied for different parts of the feeder where additional load growth beyond the normal
rate is expected in future. Proper numbers, sizes and locations of capacitors for particular
cases will be determined by criteria and verified by simulations.
6.2
Scattered DG Overvoltage Issue
Interconnection of DG at scattered locations (LC4), at various loading conditions
showed overvoltages at different parts of the feeder. Thus a number of SVCs would be
required to handle voltage issues. Only one case, WP with 30% penetration at LC4 was
studied. The highest voltage for this case was 127.24 V, which occurred between points
25
‘C’ and ‘E'. Two other overvoltage conditions occurred between points ‘H’ and ‘J’ for
126.67 V, and between points ‘C’ and ‘D’ for 126.12 V, respectively as shown in Fig. 7.
End of line voltage was 126.06 V which was between points ‘C’ and ‘E’.
130
129
126.67 V
128
127
Voltage (V)
126
125.94 V
126.12 V
127.24 V
End of Line
126.06 V
125
124
123
122
121
120
119
Substation
120.77 V
0 5000 15000 25000 35000 45000 55000 65000 75000 85000 95000 105000 115000 125000 135000 145000 155000 165000
Figure 7 : Overvoltage in multiple sections of feeder with DG at LC4
In cases where concentrated DG is connected at a particular location such as LC1,
LC2 or LC3; SVC is installed close to the DG location. Installation of a single SVC in the
vicinity of DG interconnection point which is usually the location of highest voltage, can
correct the high voltage issue without causing low voltages elsewhere. However,
scattered DG at LC4 causes over voltage conditions at multiple locations. Installation of
one SVC with high capacity at one location would not solve the problem and would
cause low voltage conditions in other parts of the feeder. After analyzing the feeder, 3
SVCs had to be installed on the feeder. One SVC with the output of 1802 kVAr was
installed between points ‘H’ and ‘J’ at 70,708 feet from substation. Another with the
26
setting of 1200 kVAr was installed between points ‘C’ and ‘D’ at 86,906 feet from the
substation. The 3rd SVC was set to -1500 kVAr and was installed between points ‘C’ and
‘E’ at 91,624 feet from substation. SVCs helped bring the maximum voltage down to
125.08 V between points ‘H’ and ‘J’, 125.47 V between points ‘C’ and ‘D’, and 124.7 V
between points ‘C’ and ‘E’, respectively. The voltage at all other locations on the feeder
was within acceptable limits after adding 3 SVCs, with maximum voltage of 125.91 at
the substation and minimum voltage of 117 V between points ‘C’ and ‘E’. The corrected
voltage profile after utilization of three SVCs is shown in Fig. 8. It can be concluded that,
installation of SVCs at various locations would be able to solve high voltage issues in
different parts of the feeder. However, the high cost of SVCs can affect the viability of
this solution.
127
126
125.91 V
125.47 V
125
124
Voltage (V)
123
122
121
120
119.62 V
119
118
117
116
End of Line
117 V
Substation
0 5000 15000 25000 35000 45000 55000 65000
75000 85000 95000 105000 115000 125000 135000 145000 155000
Figure 8 : Corrected voltage profile for scattered DG with three SVCs
27
CHAPTER 7: CONCLUDING REMARKS
Proper interconnection of DG on DN requires careful analyses, and acceptable
penetration levels depend on the topology of the existing system. DG is beneficial in term
of voltage support and lowering line losses but it has some negative effects on voltage
control of DN. DN no longer remains radial in structure after addition of DG at high
penetration level due to reverse and bidirectional power flow. The increases in
penetration level can cause high voltages that violate standard limits. It was observed
that, DG penetrations concentrated at locations distant from the substation can cause
severe high voltage conditions. It was also noticed that, DG had relatively severe voltage
effects at WP loading condition which had lower peak value as compared to SP loading
condition. The reverse power flow on laterals and main feeder sections could cause
inaccuracies in voltage control and protection equipment, and proper control of CVR.
Determination of optimal locations for highest DG penetration levels with least adverse
effects on DN voltage profile can be a challenge depending on the DN topology. A
relatively long feeder with high impedance line sections was selected from a number of
utility feeders using K-means cluster analysis. The feeder was analyzed to identify severe
cases of voltage effects. Simulation results showed overvoltage and overloading issues in
many cases. SVC and SI were proposed and studied as solution for overvoltage issue. SI
is a relatively new technology, and enhanced version of simple inverters with reactive
power capability to lower the voltage at the PCC. It was concluded that up to 50% DG
penetration could be installed at LC1 near substation without a need for SVC or SI.
Higher penetration of DG than the tested 50% could be added in the vicinity of the
28
substation, LC1. Resulting overvoltage issues for this case, if any, maybe solved by
installation of SVC and/or SI. Up to 30% penetration can be installed at LC2 around
middle of feeder with the help of SVC or SI to mitigate voltage related issues. End of
line, LC3, was concluded as worst location to add DG for overvoltage as well as
overloading issues that may only be solved by upgrading the DN at significant costs.
High/low voltage issues of scattered DG at LC4 required a number of SVCs to solve
overvoltage issues. The proposed penetration level would vary for different feeders
depending on the feeder’s primary voltage, length, number of transformers, and other
attributes, which were not considered in this project. It was shown that SVC and/or SI
can be used to mitigate voltage flickers caused by sudden loss of DG. Enhanced
functional capability of simple inverter to make it smart inverter may require additional
manufacturing costs, but can benefit the system for mitigation of high voltage issues and
voltage variations due to climate changes. A special case involving both over and under
voltage conditions at different locations caused by DG and load growth respectively was
considered and analyzed. It was observed that the overvoltage issue can be solved by
SVC and the under voltage issue can be solved by switched capacitors simultaneously
keeping voltage within limits at all other points of the feeder. Upgrade of existing lines
and other possible solutions for mitigation of voltage effects, such as synchronous
condenser, reactor and STATCOM are beyond the scope of this study and have not been
considered.
29
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