Automatic Linearity (IP3) Test with Built-in
Pattern Generator and Analyzer
Foster Dai, Charles Stroud, Dayu Yang
Dept. of Electrical and Computer Engineering
Auburn University
Oct. 7, 04
ELEC5970-003/6970-003 (Guest Lecture)
1
Purpose
• Develop Built-In Self-Test (BIST) approach
using direct digital synthesizer (DDS) for
functionality testing of analog circuitry in
mixed-signal systems
• Provides BIST-based measurement of
– Amplifier linearity (IP3)
– Gain and frequency response
• Implemented in hardware
– IP3, gain, and freq. response measured
Oct. 7, 04
ELEC5970-003/6970-003 (Guest Lecture)
2
Outline
• Overview of direct digital synthesizer (DDS)
• 3rd order inter-modulation product (IP3)
• BIST architecture
– Test pattern generator
– Output response analyzer
• Experimental results
– Implementation in hardware
– IP3 Measurements
Oct. 7, 04
ELEC5970-003/6970-003 (Guest Lecture)
3
Linear vs. Nonlinear Systems
• A system is linear if for any inputs x (t) and x (t),
1
2
x1(t)  y2(t), x2(t)  y2(t) and for all values of
constants a and b, it satisfies
a x1(t)+bx2(t)  ay1(t)+by2(t)
• A system is nonlinear if it does not satisfy the
superposition law.
Oct. 7, 04
ELEC5970-003/6970-003 (Guest Lecture)
4
Time Invariant vs. Time Variant
Systems
• A system is time invariant if a time shift in input
results in the same time shift in output, namely,
if x(t)  y(t), then x(t-t)  y(t-t), for all value of t
• A system is time variant if it does not satisfy the condition.
Oct. 7, 04
ELEC5970-003/6970-003 (Guest Lecture)
5
Memoryless Systems
• A system is memoryless if its output does not depend on
the past value of its input.
• For a memoryless linear system, y(t) = αx(t)
where is a function of time if the system is time variant.
• For a memoryless nonlinear system,
y(t) = α + α x(t) + α x²(t)+ α x³(t) + ······
where aj are in general function of time if the system is
time variant.
0
Oct. 7, 04
1
2
3
ELEC5970-003/6970-003 (Guest Lecture)
6
Dynamic Systems
• A system is dynamic if its output depends on the past values of its
input(s) or output(s).
• For a linear, time-invariant, dynamic system,
y(t) = h(t) * x(t),
where h(t) denotes the impulse response.
• If a dynamic system is linear but time variant, its impulse response
depends on the time origins, namely,
 (t )  h(t ),
Then (t  t )  h(t  t ).Thus
v(t )  h(t ,t )  x(t )
Oct. 7, 04
ELEC5970-003/6970-003 (Guest Lecture)
7
Effects of Nonlinearity
• Harmonic Distortion
• Gain Compression
• Desensitization
• Intermodulation
• For simplicity, we limit our analysis to memoryless,
time variant system. Thus,
y (t )  a1 x(t )  a 2 x 2 (t )  a 3 x 3 (t )  ...
Oct. 7, 04
ELEC5970-003/6970-003 (Guest Lecture)
(3.1)
8
Effects of Nonlinearity -- Harmonics
If a single tone signal is applied to a nonlinear system, the
output generally exhibits fundamental and harmonic
frequencies with respect to the input frequency. In Eq. (3.1), if
x(t) = Acosωt, then
y(t )  a 1 A cos t  a 2 A cos 2 t  a 3 A cos 3 t
a 3 A3
a 2 A2
 a 1 A cos t 
(1  cos 2t ) 
(3 cos t  cos 3t )
2
4
3a 3 A3
a 3 A3
a 2 A2
a 2 A2

 (a 1 A 
) cos t 
cos 2t 
cos 3t
2
4
2
4
Observations:
1. even order harmonics result from αj with even j and vanish if the system
has odd symmetry, i.e., differential circuits.
2. For large A, the nth harmonic grows approximately in proportion to An.
Oct. 7, 04
ELEC5970-003/6970-003 (Guest Lecture)
9
Output Voltage (dBV)
Effects of Nonlinearity – 1dB Compression Point
20 log
a 1 A1 dB
a 1 A1 dB
1dB
3
3
 a 3 A1 dB
4
A1 dB  0.145
A1dB
 1dB
a1
a1
 0.3808
a3
a3
2
20logAin
dBm  10 log
V pp / 8
50  1mW
• 1-dB compression point is defined as the input signal level that causes
small-signal gain to drop 1 dB. It’s a measure of the maximum input
range.
•1-dB compression point occurs around -20 to -25 dBm (63.2 to
35.6mVpp in a 50-Ω system) in typical frond-end RF amplifiers.
Oct. 7, 04
ELEC5970-003/6970-003 (Guest Lecture)
10
Effects of Nonlinearity – Intermodulation
• Harmonic distortion is due to self-mixing of a singletone signal. It can be suppressed by low-pass filtering
the higher order harmonics.
• However, there is another type of nonlinearity -intermodulation (IM) distortion, which is normally
determined by a “two tone test”.
• When two signals with different frequencies applied to
a nonlinear system, the output in general exhibits some
components that are not harmonics of the input
frequencies. This phenomenon arises from crossmixing (multiplication) of the two signals.
Oct. 7, 04
ELEC5970-003/6970-003 (Guest Lecture)
11
Effects of Nonlinearity – Intermodulation
•
assume x(t) = A1cosω1t+ A2cosω2t  two tone test
y (t )  a 1 ( A1 cos 1t  A2 cos  2 t )  a 2 ( A1 cos 1t  A2 cos  2 t ) 2
 a 3 ( A1 cos 1t  A2 cos  2 t ) 3
•
Expanding the right side and disregarding dc terms and harmonics, we obtain the
following intermodulation products:
  1  2 : a2 A1 A2 cos(1  2 )t  a2 A1 A2 cos(1  2 )t
3a3 A12 A2
3a3 A12 A2
 21  2 :
cos(21  2 )t 
cos(21  2 )t
4
4
3a3 A22 A1
3a3 A22 A1
 22  1 :
cos(22  1 )t 
cos(22  1 )t
4
4
•
And these fundamental components:


3
4
3
2




3
4
3
2


  1 , 2 : a1 A1  a 3 A13  a 3 A1 A22  cos 1t  a1 A2  a 3 A23  a 3 A2 A12  cos 2t
Oct. 7, 04
ELEC5970-003/6970-003 (Guest Lecture)
12
Effects of Nonlinearity – Intermodulation
x(t )  A1 cos 1t  A2 cos  2
1
2
2
y (t )  a 2 ( A1  A2 ) 
2
3

2 
2
) cos 1t 
A
2

A
(
A
a

A
a
2
1
1
3
1
1

4


3

2 
2
A

A
2
(
A
a

A
a
2 )  cos  2 t 
1
 1 2 4 3 2


1
a 2 A12 cos 21t  A2 2 cos 2 2 t 
2
a 2 A1 A2 cos(1   2 )t  cos(1   2 )t  




1
a 3 A13 cos 31t  A2 3 cos 3 2 t 
4
2
3  A1 A2 cos(21   2 )t  cos(21   2 )t   
a3 

4  A1 A2 2 cos(2 2  1 )t  cos(2 2  1 )t  
Oct. 7, 04
ELEC5970-003/6970-003 (Guest Lecture)
DC Term
1st Order
Terms
2nd Order
Terms
3rd Order
terms
13
Effects of Nonlinearity – Intermodulation
ω1 ω2
ω1 ω2
ω
2ω1-ω2
•
ω
2ω2-ω1
Of particular interest are the third-order IM products at 2ω1-ω2 and 2 ω2ω1. The key point here is that if the difference between ω1and ω2 is small,
the 2 ω1-ω2 and 2 ω2-ω1 appear in the vicinity of ω1 and ω2.
Oct. 7, 04
ELEC5970-003/6970-003 (Guest Lecture)
14
Intermodulation -- Third Order Intercept Point (IP3)
•
Two-tune test: A1=A2=A and A is sufficiently small so that higher-order
nonlinear terms are negligible and the gain is relatively constant and equal
to α1.
•
As A increases, the fundamentals increases in proportion to A, whereas IM3
products increases in proportion to A³.
x(t )  A cos 1t  A cos  2
y (t )  a 2 A 2 
9
4
a1  a 3 A 2  IIP3 
4 a1
and OIP3  a1 IIP3
3 a3
A1dB
0.145
9
9


2
2

 9.6dB
Aa 1  a 3 A  cos 1t  Aa 1  a 3 A  cos  2 t 
AIP 3
4/3
4
4




1
a 2 A 2 cos 21t  cos 2 2 t   a 2 A 2 cos(1   2 )t  cos(1   2 )t  
2
cos(21   2 )t  cos(21   2 )t  
1
3
3
3
a 3 A cos 31t  cos 3 2 t   a 3 A 



cos(
2



)
t

cos(
2



)
t
4
4
1
2
1
2


Oct. 7, 04
ELEC5970-003/6970-003 (Guest Lecture)
15
Intermodulation -- Third Order Intercept Point (IP3)
•
Plotted on a log scale, the intersection of the two lines is defined as
the third order intercept point. The horizontal coordinate of this point is
called the input referred IP3(IIP3), and the vertical coordinate is called
the output referred IP3(OIP3).
20 log( a1 A)
α1A
OIP3
3
a 3 A3
4
4 a1
3 a3
3

20 log  a 3 A 3 
4

A
Oct. 7, 04
AIP 3 
ELEC5970-003/6970-003 (Guest Lecture)
IIP3
20logA
16
Calculate IIP3 without Extrapolation
20 log(a 1 A)
OIP3
a1 A
a1 A
P
P
3
a 3 A2
4
3

20 log a 3 A3 
4

3
a 3 A2
4
20logAin
IIP3
21  2 1
 2 22  1
Freq
 P/2
P[dB]
IIP3 [dBm ] 
 Pin [dBm ]
2
Oct. 7, 04
ELEC5970-003/6970-003 (Guest Lecture)
17
Direct Digital Synthesis (DDS)
• DDS  generating deterministic communication
carrier/reference signals in discrete time using
digital hardware
– converted into analog signals using a DAC
• Advantages
– Capable of generating a variety of waveforms
– High precision  sub Hz
– Digital circuitry
• Small size  fraction of analog synthesizer size
• Low cost
• Easy implementation
Oct. 7, 04
ELEC5970-003/6970-003 (Guest Lecture)
18
Typical DDS Architecture
Digital Circuits
Frequency
Word
N Accum
Fr
-ulator
W
Sine
R D-to-A
Lookup
Conv.
Table
Low
Pass
Filter
fclkFr
fout= N
2
Sine
Wave
clk
1/fout
1/fclk
Oct. 7, 04
1/fout
1/fclk
1/fout
1/fout
1/fclk
ELEC5970-003/6970-003 (Guest Lecture)
19
Intermodulation
f1 f2
f1 f2
f2- f1
2f1- f2
7 8 freq
2f2- f1
f1+f2
2f1 2f2
3f1
3f2
0 2 4 6 8 10 12 14 16 18 20 22 24 freq
IM3
• Two signals with different frequencies are
applied to a nonlinear system
– Output exhibits components that are not
harmonics of input fundamental frequencies
• Third-order intermodulation (IM3) is critical
– Very close to fundamental frequencies
Oct. 7, 04
ELEC5970-003/6970-003 (Guest Lecture)
20
Mathematical Foundation
• Input 2-tone:
x(t)=A1cos 1t + A2 cos 2t
• Output of non-linear device:
y(t)=α0+α1x(t)+α2x2(t)+α3x3(t)+
• Substituting x(t) into y(t):
y(t) = ½α2(A12+A22)
+ [α1A1+¾α3A1(A12+2A22)]cos1t + [α1A2+¾α3A2(2A12+A22)]cos2t
+ ½α2(A12cos21t+A22cos22t )
a1A
+ α2A1A2[cos(1+2)t+cos(1-2)t]
P
+ ¼α3[A13cos31t+A22cos32t]
2
¾
a
A
3
+ ¾α3{A12A2[cos(21+2)t+cos(21-2)t]
+A1A22[cos(22+1)t+cos(22-1)t]}
freq
Oct. 7, 04
2 - 1 2 22-211
ELEC5970-003/6970-003 (Guest Lecture)
1
2
3rd-order Intercept Point (IP3)
• IP3 is theoretical input power point where 3rd-order
Output Power
(OIP3)
distortion and fundamental output lines intercept
P[dB]
• IIP3[dBm]=
+Pin[dBm]
2
Practical measurement
with spectrum analyzer
IM3 20log(¾a A3)
a1A
3
IP3
20log(a1A)
P
fundamental
¾ a3A2
P
freq
Oct. 7, 04
P/2
Input Power
(IIP3)
21-2 1 2 22-1
ELEC5970-003/6970-003 (Guest Lecture)
22
2-Tone Test Pattern Generator
• Two DDS circuits generate two fundamental tones
– Fr1 & Fr2 control frequencies tones
• DDS outputs are superimposed using adder to
generate 2-tone waveform for IP3 measurement
Fr1 Accum
-ulator
#1
Sine
Lookup
Table 1

Fr2 Accum
-ulator
#2
Oct. 7, 04
D-to-A
Conv.
Sine
Lookup
Table
2
ELEC5970-003/6970-003 (Guest Lecture)
Low
Pass
Filter
2-tone
Waveform
23
Actual 2-Tone IP3 Measurement
• Outputs of DAC and DUT taken with scope from
our experimental hardware implementation
• Typical P measurement requires expensive,
external spectrum analyzer
– For BIST we need an efficient output response analyzer
DAC output x(t):
P
DUT output y(t):
Oct. 7, 04
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24
Output Response Analyzer
Multiplier/accumulator-based ORA
• Multiply the output response by a frequency
– N-bit multiplier, N = number of ADC bits
• Accumulate the multiplication result
– N+M-bit accumulator for < 2M clock cycle samples
• Average by # of clock cycles of accumulation
– Gives DC value proportional to power of signal at freq
• Advantages
multiplier
y(t)
– Easy to implement

X
DC
– Low area overhead
fx
accumulator
– Exact frequency control
efficient
than FFT
Oct.–7, More
04
ELEC5970-003/6970-003
(Guest Lecture)
25
y(t)
DC1 Accumulator
f2
• Ripple in slope due to low
frequency components
P
– Longer accumulation reduces
effect of ripple
Millions
MATLAB Simulation Results

X
• y(t) x f2  DC1 ½A22a1
140
DC1
a1A
¾ a3A2
f2 2f2-f1
freq
Actual Hardware Results
120
100
80
60
40
Oct. 7, 04
slope = DC1
 ½A22a1
20
0
ELEC5970-003/6970-003 (Guest
1 21 Lecture)
41 61 81
26241 261
101 121 141 161 181 201 221
Clock cycles (x50)
y(t)
DC2 Accumulator
• y(t) x 2f2-f1  DC2
3/
2A 2a
A
8 1
2 3
• Ripple is bigger for DC2

X
2f2-f1
P
– Signal is smaller
– Test controller needs to obtain
DC2 at integral multiple of 2f2-f1
Millions
MATLAB Simulation Results
20
DC2
a1A
¾ a3A2
freq
f2 2f2-f1
Actual Hardware Results
15
10
5
Oct. 7, 04
slope = DC2
 3/8A12A22a3
0
1
21
41
61
81 101 121 141 161 181 201 221 241 261
ELEC5970-003/6970-003
-5 (Guest Lecture)
27
Clock cycles (x50)
BIST-based P Measruement
• DC1 & DC2 are proportional to power at f2 & 2f2-f1
• Only need DC1 & DC2 from accumulators to calculate
P = 20 log (DC1) – 20 log (DC2)
MATLAB Simulation Results
Actual Hardware Results
60
50
40
30
20
10
0
Oct. 7, 04
1
21
41
61
81 101 121 141 161 181 201 221 241 261
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28
Clock cycles (x50)
BIST Architecture
• BIST-based IP3 measurement
– Reduce circuit by repeating test sequence for DC2
• BIST-based Gain & Frequency Response is subset
x(t)=cos(f
x(t)=cos(f
1)+cos(f2)
f1
Accum
LUT1
Test Pattern Generator
f2
2f2-f1
Oct. 7, 04

DAC
DUT
ADC
y(t)
Output Response
Analyzer
Gain
DC1
Accum
Freq
DC2
Resp
Accum
LUT2
X
Accum
LUT3
X
ELEC5970-003/6970-003 (Guest Lecture)
Accum
DC2
29
Experimental Implementation of BIST
• TPG, ORA, test controller, & PC interface circuits
– Three 8-bit DDSs and two 17-bit ORA accumulators
– Implementation in Verilog
– Synthesized into Xilinx Spartan 2S50 FPGA
• Amplifier device under test implemented in FPAA
• DAC-ADC PCB
1600
1400
PC
FPGA
TPG/ORA
1200
Total in FPGA
Double ORA
Single ORA
1000
800
600
FPAA
DUT
Oct. 7, 04
DAC &
ADC
400
200
0
ELEC5970-003/6970-003
(Guest Lecture)
Slices
30
LUTs
FFs
Hardware Results
Spectrum analyzer
25
P14
20
15
10
5
1
201
401
601
801 1001 1201
Clock Cycles (x100)
P distribution for 1000
BIST measurements
mean=13.97 dB,  =0.082
Oct. 7, 04
Percentage(%)
Delta_P(dB)
30
BIST measures P  14
2
1.5
1
0.5
0
13.68 13.77 13.87 13.96 14.05 14.14 14.24
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31
Measured Delta_P(dB)
More Hardware Results
BIST measures P  22
50
P22
40
30
20
10
0
1
501
1001
1501
2001
2501
Clock Cycles (x50)
P distribution for 1000
BIST measurements
mean=21.7 dB,  =2.2
Oct. 7, 04
Percentage(%)
Delta P (dB)
60
Spectrum analyzer
2
1.5
1
0.5
0
16.30 18.94
ELEC5970-003/6970-003 (Guest Lecture)
21.58
24.23
26.87
32
Measured Delta_P (dB)
29.51
Measurements in Noisy Environment
40
35
30
14 dB P BIST
measurement in
noisy environment
25
20
15
10
5
40
0
1
21
41
61
81 101 121 141 161 181 201 221 241 261
35
30
17 dB P BIST
measurement in
less noisy
environment
Oct. 7, 04
25
20
15
10
5
0
ELEC5970-003/6970-003
(Guest Lecture)
1
21
41
61
33
81 101 121 141 161 181 201 221 241 261
BIST IP3 Measurement Results
• Good agreement with actual values for P < 30dB
• For measured P > 30dB, the actual P is greater
BIST measured delta P (dB)
– Good threshold since P < 30dB is of most interest
50
45
40
35
30
25
20
15
10
5
0
0
Oct. 7, 04
5
10
15
20
25
30
35
ELEC5970-003/6970-003 (Guest Lecture)
actual delta P (dB)
40
45
50
34
Conclusion
• BIST-based approach for analog circuit
functional testing
– DDS-based TPG
– Multiplier/accumulator-based ORA
• Good for manufacturing or in-system circuit
characterization and on-chip compensation
– Amplifier linearity (IP3)
– Gain and frequency response
• Measurements with hardware implementation
– Accurately measures IP3 < 30dB
– Measurements of IP3 > 30dB imply higher values
Oct. 7, 04
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35