North Seattle Community College
NANO 230
Lecture outlines
Lecture 1 Sensors and actuators
MEMS – Mircoelectromechanical systems. Originally meant Si mechanical devices but
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now means sub-minature device with at least one dimension in the micron range
including: chemical and biological sensors and actuators devices of all materials
COTS-MEMS – commercial off-the-shelf
MST – Microsystems technology –european, “A microsystem is an intelligent miniaturized
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system comprising sensing, processing and/or actuating functions… integrated onto a
single mulit-chip hybrid.”
Micro total analytical system (μ-TAS) – microsystem technology with an analytical
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function. Nanogen’s NanoChip $ 15K – 15M, exceptions of Spreeta and i-STAT $200 –
500, $30 disposable for Spreeta SPR bio film provides specificity byTI
Mechatronics – “Micromachines are composed of functional elements only a few mm in
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size and are capable of performing complex microscopic tasks.” CD players, autofocus
Sensor – converts one form of energy to another and provides the user with a useable
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energy output in response to a measurable input.
Motion sensors for physical rehab or ergonomics and pressure sensors shown
Aka transducer or detector
Students list some examples, pressure, acceleration, temp, gyro, chemical
Sensor die – chip with basic package with or without electronic circuitry
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Integrated sensor – includes electronics to condition the output signal
Smart sensor – has integrated packaging, more complex electronics to do things such as
auto calibrate, self test or temp compensation
Actuator – converts one form of energy to another and creates a desired action or effect.
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Similar to a sensor – if measuring it’s a sensor if doing its an actuator – the use not
physics determines what it is.
Play Zygo video in MEMS folder
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Energy forms
Mechanical, electrical, magnetic, thermal, radiant (photonic), chemical
Draw matrix on board (table 10.1 in text)
S10 Examples electrical in mech out,
Electrostatic attraction –always attractive draw +/- sign
Draw two plates attracted – the comb drive makes the attractive force linear with voltage
Capacitance changes linearly. The comb drive can be hooked to a ratchet gear etc.
How can this be used as a sensor? Mech in gives electrical out.
Comb drive, microvision mirror
S11 Example electro-magnetic in mechanical out
Scanning mirrors
Explain torque generated by F=iLXB,
Show Nippon video in MEMS folder.
S12 Example mechanical in electrical out
Accelerometer with PZT (lead zirconate titanate) material on flexures.
Doped silicon is piezoresistive – MVIS mirror sensors within an actuator on flexures
S13 Thermal in – electrical out – Seebeck effect – thermocouple – used to power a watch
because skin side is warmer
Electrical in – thermal out Peltier effect – thermo electric heater/cooler.
North Seattle Community College
NANO 230
Week1 Lecture 2
Bulk MEMS
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Handout: Homework 1.
Example mechanical in electrical out
Accelerometer with PZT (lead zirconate titanate) material on flexures.
Doped silicon is piezoresistive – MVIS mirror sensors within an actuator on flexures
Thermal in – electrical out – Seebeck effect – thermocouple – used to power a watch
because skin side is warmer
Electrical in – thermal out Peltier effect – thermo electric heater/cooler.
Review directions and planes – (100), (110), (111)
Calculate KOH angle width – Derive z, tan 54.7 = z/w, w=z/tan54.7
Calc to show tan 54.7~root2 Wm = 2w + wo = wo + root2 z or wo= wm – root2 z
Etch stop – positive biased Si will not etch. For alkaline KOH etching.
Review there are electrons and holes that can carry charge in Si. When etching in acids
(HF) holes are required to allow etching. These holes can be supplied electrically or
through illumination.
Porous Si – made with HF etch solution. Chemically the same as bulk Si but more
reactive because of high surface area
Shows porous Si etch cell
Carrier type, electrical bias and illumination all affect etching
Mechanisms are different for macro and micro pore size generation
Macro pore size – holes are generated at etch tip by light or E-field this causes etching in
a straight vertical well. Can be coated with catalyst.
Application membrane reactor – porous silicon coated with palladium catalyst to convert
CO to CO2
Process sequence for Pressure sensor (very simple device)
1) Clean and oxidize n-type Si, 525 um thick
2) Photo Mask1 PZR openings
3) Etch oxide in BOE, strip PR
4) Spin on Boron dopant and diffuse in
5) Etch all borosilicate glass and oxide from the wafer in BOE.
6) Grow 500 A oxide on wafers.
7) Grow 1200 A nitride on wafers.
8) Photo Backside alignment Mask2 diaphragm
9) Etch nitride film in RIE stop on oxide.
10) Etch oxide in BOE to bare Si, strip PR
11) KOH Silicon to make 50 um thick diaphragm
12) Photo front, Mask3 PZR contact openings
13) Etch nitride in RIE stop on silicon
14) Etch oxide in BOE to bare Si, strip PR
15) Evaporate Al on frontside, 1um.
16) Photo, Mask4 Metal traces
17) Etch Al in Phosphoric / Nitric acid mixture, strip PR
18) Anneal in N2 450C for 30 min.
North Seattle Community College
NANO 230
Week 2 Lecture 1
Bulk machining (continued – surface)
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Handout: Small Times monolithic MEMS
Pressure sensor review
DRIE process – He backside cooling essential
DRIE and cut arbitrary shaped features in the front side pressure sensor diaphragm
Problem of break through – 2 solutions bond to backing wafer and put metal on back
Can go back to scanning mirror
Electrochemical sensor. fits in a 750um dia catheter, 250um thick wafer
KOH oxide selectivity 100 – 150 :1
KOH etch, oxidize how much needed? 30umX30um window
Oxidize more – does not grow in window area, metal and etch oxide
Also talks about using this structure to release drugs applying voltage causes metal
electrode to dissolve
Packaging for electrochemical sensor- High impedance makes close IC a must
Screen printed hydrogel – polyvinyl alcohol (PVA)
Dip coated polycarbonate solution
Solder bump bonded to IC chip “Si integrated sensor” level
Pictures of finished device.
END switch to Madou ppt
Surface in Si layers of poly and oxide or psg – poly layers typically not more than 3 um
But there are many variations and exceptions.
Basic surface ground plane and first dielectric
Phosphosilicate glass – doped oxide, etches out more easily than ox – can also be used
to dope subsequent poly.
Release step – Undercut etch rate must be greater than rate of attack of passivation or
structural material.
Poly silicon tube for surface MEMS
Stiction and release of surface structures
North Seattle Community College
NANO 230
Week 2, Lecture 2 – surface MEMS
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Handouts: Homework 3 due 4/20
MEMSCAP MUMPS levels and layers
Micro shell making a sealed cavity – end of day Madou ppt continued
MEMS wobble motor
Multi User MEMS Process (MUMPs) can buy a few die on a mask run.
Switch to “PolyMUMPS.flow.show.ppt” to cover material.
Dimples – small shallow features on the bottom of the lower polysilicon layer used to
minimize stiction.
15 slides with animation.
Goes through 7 Layers (materials) and 8 LEVELS (MASKS) of the poly MUMPS process.
Shows cross section of the wobble motor
Sandia Summit - even more complex has 5 layers of poly
Difficult to keep structure planar with so may layers – uses chemical mechanical polishing
(CMP)
Look at some pictures and videos at http://mems.sandia.gov/tech-info/summit-v.html
(movie or image gallery)
MEMS vs CMOS challenge of making both on a single wafer.
Discuss challenges of MEMS first vs CMOS first. One problem for MEMS first, MEMS is
non planar makes CMOS process a challenge.
Sandias answer – put MEMS in a pit passivate and planarize do CMOS process and
release MEMS at the end.
Hinge structure made from poly
Pictures of MEMS pop up optical bench
HEXSIL – cover briefly
HEXSIL2 – cover briefly
Three kinds of SOI
Define buried oxide layer as BOX
Simox – implanted oxygen forms oxide layer. Limited to very thin top silicon but epi can
be grown on top.
Bonded and etched back (BESOI) – used silicon fusion bonding oxide coated wafers are
pulled together by surface forces – heating the wafers to 1100 C fuses the surfaces
together –labor intensive.
One advantage of bonding – can pattern oxide on one wafer thus making cavities – pre
machined in the SOI wafer. This is another MEMS fabrication trick.
One wafer must then be ground or etched back
North Seattle Community College
NANO 230
Week 3, Lecture 1/2 – MEMS packaging
HW#2 presentation due Wed
Ask Sergei about getting Si nanowire process.
Exam and HW#3 due Fr i
S17 Three kinds of SOI
Define buried oxide layer as BOX
Simox – implanted oxygen forms oxide layer. Limited to very thin top silicon but epi can
be grown on top.
Bonded and etched back (BESOI) – used silicon fusion bonding oxide coated wafers are
pulled together by surface forces – heating the wafers to 1100 C fuses the surfaces
together –labor intensive.
One advantage of bonding – can pattern oxide on one wafer thus making cavities – pre
machined in the SOI wafer. This is another MEMS fabrication trick.
One wafer must then be ground or etched back
S29 Back to Nano230_MEMS PPT
Texas Instruments DMD another approach to surface – uses metal
S30 Freeing mirrors after dicing protects them but more expensive
Dicing or separating the die is many times a problems for MEMS – discuss dicing –
sawing also the newer laser dicing
After removing sacrificial layer and anti stiction layer is applied
S31 IC packaging - Functions of IC package – signal redistribution, mechanical support, power
distribution, thermal management – discuss what these mean.
In traditional packaging electrical connections are made by wire bonding from the edge of
the die – draw a picture of a ball and wedge bond.
S32 IC packaging – flip chip – the IC chip is covered with bumps and turned upside down for
direct mounting to the PCB or other – usually a non conducting adhesive, called underfill,
is applied to help hold the parts together.
In ACF the adhesive is already present in the form of a tape, although bumping the die
may still be required it is more compatible with high speed pick and place manufacturing.
S33 Packaging Levels 0-5 MEMS differs from ICs because dicing as we discussed is
problematic and technologies like wafer bonding may be needed at Level 1 for a
pressure sensor etc. One goal is to move Level 1 to wafer level to avoid costly die
level assembly. Summary L0 = within device, L1=die, L2=can –ended lecture 1 here
S34 Physical sensors and actuators are typically sensitive to other energy inputs than the
primary intended one – the package plays a major role in this sensitivity – example
thermal stresses will directly couple into the output of a pressure sensor or accelerometer.
Hybrid approach is better for chemical sensors so that electronics can be away from the
exposure needed at the sense element.
Fabry-Perot interferometer (FPI) device. FPI is an electrically controlled optical bandpass
filter that is widely used in spectroscopy. – shows additional concerns for MEMS
packaging.
S35 Wafer bonding moves MEMS die to level1 status.
Monolithic vs hybrid MEMS – for hybrid wafer level bond helps cut costs – electronics pic
Pressure sensor – bond needed for reference pressure
Chemical sensor – blood sensor example – transfer “can” function to wafer bond
Microvision mirror – vacuum seal from bonding removes need for vacuum can – very
expensive cost $100s for can
S36 Fusion bonding – pictures show a bonding wave (p487) propagating between two wafers.
Bonding takes place between surface OH groups, surface treatment in H2SO4-H2O2 etc,
bonds fuse >800C
Steps, acid treat, plasma treat, DI rinse, join (shown), bond
In joining the wafers pull together spontaneously after initial contact
Correct plasma treatment may lower bond temp to 300C (ref)
Wafer Bonding Enables New Technologies and Applications
Laura Peters, Senior Editor -- Semiconductor International, 11/1/2003
S37 Fusion Bonding – pristine surface requirement limits application – can’t cover electrical
traces etc.
North Seattle Community College
NANO 230
Week 3, Lecture 1/2 – MEMS packaging
S38 Anodic bonding – Negative charge at glass Si interface creates strong electrostatic
attraction and promotes surface bonding at elevated temperature.
Easy to do on hot plate – can see bond spread through glass
S39 Anodic - Several glasses can be bonded but only Pyrex has a TCE that will give
reasonable stress state.
Advantages – strong and low temp, tolerates moderate (1um) surface roughness
Disadvantages – TCE mismatch causes stress, different processes need to developed for
glass, no good anisotropic etch
S40 Glass frit – difficult but possible to find TCE match to Si and <450C bond temp
Glass softens and flows under temperature and high pressure (force applied to wafers)
S41 Glass frit S42 Glass intermediate bonding layers can also be sputtered or spun on.
Sputtering can be difficult., spinning will not be smooth over wafers with rough topology
S43 Organics – many options
Picture yellow bands are screen printed epoxy
S44 Organics advantages and disadvantages
Contamination severity depends on application
S45 Split field microscope is similar to mask aligner – but since wafers are not transparent a
technique such as image capture is needed – positions first wafer and takes pic aligns 2 nd
wafer to video captured picture.
Many but not all bonders have separate alignment and bond fixtures
Mechanical disadvantage – must typically modify process to make tooling alignments
KOH – draw groove with fibers – fig 8.32, KOH mesa and pit as alignment keys
Week 3 lecture 2, cover packaging and types of wafer bonding.
North Seattle Community College
NANO 230
Week 4, Lecture 1
Hand back and review exams
Show Silicon Run 1 video
MOSFET – by far the most prevalent and useful electronic component,
List of many things MOS transistors do
Image capture charge coupled device (CCD) are MOS based.
Transceiver = transmitter/receiver a key TCOM component
Point out Gate, Source and Drain – this is n-channel (conducting channel) device G and D
are also n-type. This is called n-MOS
MOSFETs can also be made with p+ G and D called p-channel or pMOS
Circuits with both are CMOS
Positive voltage turns nMOS on and pMOS off
Because of opposite voltage effects more compact logic circuits such as the NAND gate
shown can be fabricated w/ CMOS. This also means logic and memory can be designed
that only use power when switching CMOS is dominant because of low power and size
pMOS has circle in symbol
CMOSens is a basic technology for high-precision MEMS sensor systems. Combined
CMOS w/ MEMS
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Integrated circuits
The fabrication sequence for making a CMOS FET will be taught. The sequence used will be
based on that in the Silicon Run I video (available in the library or on-line at
http://www.multimedia.vt.edu/ee5545/ )
1.
2.
3.
4.
5.
6.
7.
8.
9.
Clean wafers (p-type substrate)
Grow SiO2
Photo Mask 1, n-well implant (22:30)
RIE SiO2
Phosphorus implant
Drive in
Grow SiO2
Deposit LPCVD Si3N4 (25:31)
Photo Mask 2, leaves nitride on the body (gate, source and drain regions) of the
transistor
10. RIE Si3N4
11. Grow thick SiO2 field oxide everywhere except over transistor body
12. Etch Si3N4 combination of RIE and wet etch 27:23
13. Implant Boron, only in transistor body area
p-channels are p+, n-channels are still n because level is less – controls properties
14. Etch SiO2 from transistor body
15. Grow thermal SiO2 gate oxide (critical step sensitive to contaminates and defects)
16. Deposit phosphorus doped LPCVD polysilicon (28:13)
17. Photo Mask 3, gate electrode
18. RIE polysilicon
19. Photo Mask 4, exposes n-channel source and drain for phosphorus implant
20. Implant phosphorus
Note self aligned gate process – poly sci gate is mask for implant
21. Photo Mask 5, exposes p-channel source and drain for boron implant
22. Implant boron
23. Anneal wafers to activate implants
24. Grow thick LPCVD SiO2
25. Chemical mechanical polishing (CMP)
26. Photo Mask 6, opens contact areas to source and drain regions
27. RIE SiO2
28. Deposit LPCVP tungsten metal for plug
North Seattle Community College
NANO 230
29. RIE tungsten back from wafer surface
30. Deposit Al/Si alloy
31. Photo Mask 7, defines Al metal traces
32. RIE aluminum traces
Repeat steps 24 – 31 for additional metal layers
33. Deposit Si3N4 passivation layer
34. Photo Mask 12 (for three layers of metal), opens holes to Al metal bonding pads
35. RIE Si3N4
North Seattle Community College
NANO 230
Week 4, Lecture 2
Sergei on Si nano wires
Handout Homework #5 Silicon Run II
Reading assignment on testing from
Microchip Fabrication pp 457 – 466
Finish CMOS process list on power point
Play Silicon Run II video
Probe machines probe cards
Curve tracer – voltage on horizontal axis current on vertical
I-V plot – R would be slope if straight line for diodes and transistors not a straight line – curve
gives valuable information. Show dI/dV=1/R=Conductance
Diode curves – ideal and real (draw of I-V curves discuss open, short and R lines)
Definitions – forward voltage – turn on voltage of diode specified. (voltage
Leakage or reverse current – current flow under reverse bias reasonably constant until
breakdown (typ 30 uAmp)
Breakdown voltage – where current flows rapidly (nearly vertical line)
MOS transistor (draw on board – p-channel)
Threshold voltage – turns on transistor when this happens an inversion layer forms that is the
“channel” changes type
In the MOS structure the gate is a capacitor
Parallel plate capacitor
Review parallel plate capacitor – C = k*ε0A/d
ε0=8.854E-12 F/m [F] = [coulomb/volt] is permittivity, k is relative permittivity
in series caps add as 1/Ctotal = 1/C1 + 1/C2 + …
When the transistor turns on the channel creates another capacitor in series thus total
capacitance drops.
CV test
This phenomonen leads to the CV test a plot is made with C on the y axis and V on the x axis
when C drops the underlying doped area has gone into inversion.
Draw CV plot pic – test voltage is from Al dot to chuck for n doped layer
CV plotting is done on a test wafer with only doped layer, oxide and Al dot (annealed) this tests
for mobile ions (like Na or K) which will ruin the capacitor (why MOS can’t be done at WTC)
anecdote about tweezer cleaning at Standford
For an n-type doped layer a neg voltage is applied to create the positive inversion layer (p
channel)
Next the structure is heated to 200 – 300 C and + 50 V is applied this forces here positive ions to
move to the oxide-Si interface and stay there. The wafer is cooled and the test is repeated the
trapped +ions require a greater neg voltage to drive the doped layer into inversion – the C drop
shifts to the right – for a transistor this would change the threshold voltage a 0.1 to 0.5 volt shift is
acceptable.
North Seattle Community College
NANO 230
Week 5, Lecture 1
Homework 5 due
Sergei on Si nano wire
Review VC test and do problem
Example problem for calculating gate capacitance
L = gate length
W = gate width
Cd = channel depth
ε0=8.854E-12 F/m, koxide = 3.9
for L=100nm, W=2um, gate oxide = 200A
C = 3.9(8.85E-12F/m)(1E-7m)(2E-6m)/2E-8m = 3.45E-16F or 0.345fF or 345AF
If channel depth is 10nm kSi=11.68
Cchannel = 11.68(8.85E-12F/m)(1E-7m)(2E-6m)/1E-8m =2.067E-15
1/Ctot = 1/3.45E-16 + 1/2.067E-15 = 3.38E15 -> Ctot = 2.96E-16F
IC Packaging
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Backside preparation
Inspection
Plating
Die separation
Bonding (to elec pads) Lead trim
Die pick and place
Pre-seal inspection
Marking
Die attach
Package sealing
Final tests
Backside preparation – thinning wafers to make separation easier. 200 – 500 um
Protecting the front and warping are problems.
Backside Au for eutectic sealing
Scribe and break scratch are roll over die oldest method – good for wafers < 250 um thick
Sawing we have discussed before
Laser – IR laser focuses inside wafer thickness melts area and it is resolidified but
cracked die can easily be separated – good for MEMS but expensive machine
Pick and place – for advanced solutions like chip on board (COB) could place die directly
on board. – picture shows pick and place machine
Inspection for cracks and chips – picture shows cracks/chips caused by dicing with a saw
black line is saw cut or kerf
Die attach- eutectic used for high end/high power applications, has good thermal and
electrical conductance
Picture shows proper lamellar structure of Au-Si eutectic (covered in materials science)
Gold film can be evaporated on back of die or plated in package scrubbing breaks oxide if
film is not deposited on the back of the wafer.
Epoxy can be dispensed with nozzle (shown in picture), screen printed, preformed
Low temperature, good for most consumer applications
Bonding wire bonding, wire bonding = ball and wedge bond, bump bonding stud bump
are wire bond ball end, bumps can also be plated or screen printed
Inspect again optically for bond placement, quality of bond and scratches, chips,
contamination etc.
Package sealing – welding for metal cans such as T08, solder, solder for ceramic dual inline package (CERDIP), glass sealing as frit or anodic bonding, plastic encapsulation as in
video.
Plating of package leads – gold or solder prepares package for through hole or surface
mount attach to PCB
Lead trim – leads are held into a frame by a tie bar these must be cut away and the leads
bent into the appropriate shape. Straight for through-hole, bent flat for surface mount
technology
Tests – Temp cycle -25 – 124 C for high rel parts, acceleration test to 30,000 g, leak
check using liquid or gas.
Burn-in temp cycle and electrical test at the same time.
North Seattle Community College
NANO 230
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Package types, DIP, SOP, QFP, BGA
Pictures of plated bump bond with underfill for chip on flex packaging.
Anisotropic conductive film with ball making contact between bumped pad and package
Epoxy is used to hold the die in place in conjunction with bump bonding.
CNT are among the few materials that could exceed the 1x107A/cm2 current
density that the ITRS says will be needed at the 32nm generation
Fujitsu reported selective growth of vertical CNT bundles in 40nm via holes
uniformly across 300mm wafers at temperatures of ~450°C, moving closer to
matching the resistance of copper at CMOS-compatible growth temperatures of
400°C
Die attachment is the step during the integrated circuit packaging phase of semiconductor device
fabrication during which a die is mounted and fixed to the package or support structure.
For high-powered applications, the die is usually eutectic bonded onto the package (for good heat
conduction). For low-cost, low-powered applications, the die is often glued directly onto a
substrate (such as a printed wiring board) using an epoxy adhesive.
http://en.wikipedia.org/wiki/Die_attaching
Week 5 lecture 2 and 3 and Week 6 lecture 1
Guest lectures by Vinny Casasanta on bio-nanotechnology genomics, proteiomics and bio
sensors
North Seattle Community College
NANO 230
Week 7 lecture 1
Reading from Polymer Nanocomposites, Processing, Characterization and Applications by Peter
H. Koo. Pp 9 – 43
Handout Homework #8 due 5/21
Homework #9 – Presentation on a product made with a nanomaterial covered in class.
5/23 – Matt MMT clay, Sergei - POSS
Nanomaterials
Outline ask students to list types of properties – thermal, TCE, conductivity, Tg, melting
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point Mechanical, E, tensile strength, yield, Barrier – diffusion, optical – transpency,
polarization, absorb, transmit, electrical – conductivity, k, charge capacity
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Novel properties – properties on last slide begin to change on this scale.
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Quantum effects, melting point – discuss how fewer bonds on surface atoms lower
melting point.
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Q-rod is quantum rod – optical properties similar to QD
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Nano materials have high interfacial area/volume – for nanomaterials the interface width
is as big as the particle – this area has unique molecular force characteristics that can be
modified by size, functionalization etc.
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Novamet 60 is 60% Ni, Ni coated graphite powder that may be added to silicones or
plastics to make them electrically conductive
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4 key steps – make particles, dispersion, characterization of particles in matrix, testing
macro properties
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Will talk more about synthesis methods later. Review crystallinity, and molecular weight
for polymers S10
Many properties can be affected – however all of these may not get better and there are
still trade offs – Cost is also a driving factor.
Viscosity increase makes it difficult to mix product material
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Nanomaterials – can be nanoscale in one, two or three dimensions – we will have
examples of each. Adding nano materials to polymers (typically <5wt%) makes polymer
nanocomposites (PNCs)
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Examples of 1, 2 and 3 D nano materials. – could add Buckyball as particle
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Lists nanomaterials we will discuss
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MMT clay structure – widely used and investigated nanomaterial – inexpensive ~$3.5/lb
Layer thickness 0.96nm
The clays come from volcanic eruptions. White atoms are H making hydroxyl (OH)
groups mostly Al and Si oxides. With tetrahedral and octahedral shapes as discussed in
MSC 101. (draw SiO4 4- tetrahedron – will come back to it in POSS)
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The challenge is breaking MMT clay with a typical 8um particle size into > 1M pieces and
dispersing them. (homework problem)
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Key terms –unmixed (least desirable), Intercalated, Exfoliated (most desirable)
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Solution blending – clay is 1st intercalated in a solvent that also solvates the plolymer,
particles are intercalated or exfoliated within the molten polymer, insitu polymerization –
particles mixed in with monomers – reaction polymerization occurs within sheets.
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Dispersion methods; chemistry, processing, chemistry+processing (best) – tactoids are
naturally occurring stacks of platelets (not as large as original particle size). This is all
about chemistry – cations and anions must balance and clay is usually rendered
hydrophobic to mix with polymers by functionalization. Ammouium salts added. US
producers Southern Clay Products and NanoCor.
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Large particles shear apart (draw) at a finer level the platelets peel apart.
North Seattle Community College
NANO 230
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VGCF=vapor grown carbon fibers
Polyacrylonitrile (PAN) is used as the precursor polymer fiber to make traditional carbon
fibers. Pitch= thick, dark, sticky substances obtained from the distillation residue of coal
tar or petroleum. Conventional carbon fibers
ASI=Applied Sciences Inc. – note cost difference - $227,000/lb SWNT D=1nm, $95/lb
Pyrograf III D=100nm, $10.lb carbon fibers D=10um
Tensile strength VGCF=2.7 GPa, heat treat at 3000C then 7 GPa, 64 GPa for SWNT –
steel <1 GPa.
CNF made by pyrolysis of methane with Fe based catalyst particles above 900C.
One improvement for adding CNF in small amounts is to increase interlaminar shear
strength between the macro fiber and matrix – thus as a matrix improvement – typical use
in sports equipment.
Comparison chart of nano materials– note it is put together by CNF manufacturer –
emphasizes problems with competing technologies – e.g. nano clay <$4/lb – note high
carbon black production –
Comparison chart of nano materials– note shows SWNT degrades plastics??
Pyrograf III SEM CNF picture, ASI – sold in 3 grades As grown, pyrolitically stripped
(purified) and heat treated,
CNF TEM showing hollow core OD typical 100nm – 100um long 1000:1 aspect ratio
Single wall and MWNT pictures
SWNT – 64Gpa tensile strength – but how measured? Text hypes Carbon
Nanotechnologies Inc (CNI) Smalley founder, but can they produce. Raymor has goals
of producing 10 Kg/day last fall brining on-line target cost of $20 – 50/g – 9000 – 23000
$/lb
MWNT SEM
MWNT CVD synthesis
MWNT TEM
MWNT characteristics – produced by Hyperion Catalysis for some time – called carbon
fibrils earlier – used in auto fuel lines and plastic panels.
Polyhedral Oligomeric Sil Sesquioxane (POSS) – hybrid chem. Composition called
hybrids because they are a combination of organic and inorganic chemistry
Ratio of O to Si is 2 for Si (actually SiO4 4- tetrahedron), next slide shows silicones Si:O
1:1 with 2 R (organic) groups
Draw picture of “cube” with Si at each corner O on each edge.
Discuss silicone structure (technically polysiloxanes) – has Si based mer with two
organic side groups (R) Si:O 1:1
Many different silicones just as there are many different C based polymers
POSS cube also draw on board 12:8 is 1.5:1 O:Si R groups are organic group or polymer
chain groups can be chosen to make molecule soluable or campatable with organic
material
SiO2 is ceramic POSS combines properties of ceramics with polmers – what are typical
ceramic properties? Heat resistant, thermal and electrical insulators, hard but brittle.
Thus POSS systems have increased Tg (what is it?), flame resistance, increased
modulus (what is it?) and hardness. The POSS molecule is about the same size as the
polymer chain thus it interacts uniquely and alters mechanical properties.
Review of how polymer chains deform in stress – strain test. 8 clicks to plastic failure.
Markets POSS can address. Boeing is targeting multifunctionality in materials eg less
dense and more flame resistant. Note that just because a technology can do many
things it can probably not do them all at once this is a danger of hype (MVIS example)
Using POSS structures can get around or add onto competitors patents.
TEM pictures of POSS molecules blended with Poly styrene.
Nanosilica process patented in 1941 by Degussa large scale production in the 1950s
Siloxanes are a class of organosilicon compounds with the empirical formula
North Seattle Community College
NANO 230
R2SiO
silanol hydroxly (OH) bonded to Si – makes silica hydrophilic
A silazane is any hydride of silicon and nitrogen, silane SiH4
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One problem is that at 5-7wt% the AEROSIL added to polymers increases viscosity
making them difficult to mold. Solution “macrosurfaced silica” process
SNC silica nano composite can silica up to 60 wt%
TEM of 60% silica dispersed in polymer by Hanse
Graph showing Hanse method of dispersing nanosilica in acrylate ester up to 50% with
little viscosity increase. Can be used in epoxies and molded plastic parts
Comparison of prices for nanomaterials – note Raymor has a plan to reduce SWNT costs
by 10X
Interfacial interaction may require functionalization of nanoparticle. Will return to discuss
processing techniques later.
Treatment of MMT clay to make it hydrophobic – Na+ cation is replaced with for example
(Cloisite 15A SCP draw Lewis structure ammonium salt cation N+-CH3-CH3-HT-HT
where HT is hydrogenated tallow an animal fat – anion is Cl- this makes clay platelets
stick to polymer chains as shown
Property improvement – thermal, mechanical, chemical
HDT=heat deflection temperature - is the temperature at which a polymer or plastic
sample deforms under a specified load. Toughness how much energy the material can
absord before failing (area under stress-strain curve).
Property improvement – electrical, barrier, optical, other
Electrical – Boeing interested in low resistivity for lightening strike, ESD, auto fuel lines,
and plastic panels for painting
Plastic types
Differences between thermoset and thermoplastic resins
Processing options (for solid polymer with solid nanoparticles note the solids are melted
during processing)
*Solvent blending (solution intercalation) – a solvent is used to break apart or separate
the platelet layers – the polymer chain then interacts with the ions on the platelet
reassembling the plates with chains between as the solvent is evaporated
*Melt compounding (intercalation) – nanoparticles with for example a substituted
ammonium N+ cation containing organic chains – attract poymer chains between the
platelets. Substitution makes particle hydrophobic.
*Roll milling – three roll milling material is shaped by rollers while the nanoparticles are
incorporated.
(for liquid resin with solid nanoparticles)
*In-situ polymerization – monomers intercalate between the platelets and then the
polymerization reaction is initiated by catalyst or heat – both thermoplastics and
thermoset have been made this way.
*Emulsion polymerization – emulsion is a suspension of two things that would normally
not mix using an additive – suspension allows water based (hydrophilic) particles to be
used, polymerization can then occur.
*High-shear mixing – high shear is obtained using a mixer like a boat propeller – it breaks
apart aggregates of nanoparticles and aids in the intercalation process.
Analysis techniques – WAXD, TEM, SEM, SAXS, TGA analytical technique that
measures the weight loss (or weight gain) of a material as a function of temperature.
Cone calorimeter measures the amount of O2 consumed in burning the sample.
WAXD – used for MMT clay can increase, decrease or disappear for exfoliated
Review of x-ray diffraction n – lambda=2dsin theta
What affects WAXD measurements
On the good side, non-destructive and easy to prepare samples.
The fact that no peaks appear for 2theta = 2.5 means possibly exfoliated
TEM - capabilities
North Seattle Community College
NANO 230
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TEM - limitations
From another source TEM samples prepared by suspending particles in IPA then placing
a drop on a Cu grid with carbon film and evaporating IPA.
Cloisite 30B is SCP’s MMT particles
POSS in IPA TEMs
SC-1008 is Phenolic (phenol-formaldehyde) resin
Nylon – Toyota made in PNC in ’86 with MMT
HDT=heat deflection temperature – notice % elongation at break with MMT goes down –
what does this mean – material is more hard and brittle – FR fire retardant
Does the picture show unmixed, intercalated or exfoliated clay?
Study from D. Paul – melt blending and all processes are very equipment dependent.
Twin screw extruder – residence time, temp, pressure etc important
ANSYS models for single and twin screw extruders
M=molecular weight, MFI = melt flow index how much mass in grams that flows out of a
fixed die orifice under a given pressure and temp.
The fact that there is no peak in the MMW and HMW plastic WAXD shows that the
samples are exfoliated. Note the is a slight peak in the LMW plastic showing some
intercalation.
Note the LMW shows a tactiod – modulus is slightly higher for HMW but not much
different –need error bars, - H and MMW have significantly higher yield strength.
% elongation at break goes down with clay -> more brittle – note graph of izod impact –
toughenss is relatively constant. However as Mech E properties better because they are
more stable. Note how particles shear apart – why shear rate is important.
This table also has in-situ method – what is it?
Carbon
Process for making carbon nano fibers to SWNT
Pyrolysis is the chemical decomposition of organic materials by heating in the absence of oxygen
or any other reagents, except possibly steam.
Extreme pyrolysis, that leaves only carbon as the residue, is called carbonization.
http://en.wikipedia.org/wiki/Pyrolysis
PAN (Polyacrylonitrile fibers)
North Seattle Community College
NANO 230
Week 8 lecture 2
Homework #9 due student presentations
On POSS and MMT products
No class next Wed but there is class on Fri – Vinny on nano-optical materials.
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Water Borne Fire Retardant Nanocomposite Coating – (PVA) polyvinyl acrylic is a
common component of water based house paint (called latex). FR=fire retardant
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Pictures of Douglas Fir plywood plates after flammability testing at 50KW/m2 heat load
for 15min. note that 50 and 60% loaded samples never ignited
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HRR = heat release rate graphs for test boards – tests were done with a cone calirometer
– recall that it measures how much O2 is absorbed during test and relates that to how
many calories/mole O2 are released (note in the future homework problems could be
generated on this). HRR of building materials is critical to how fast a fire spreads, at
some point it will likely be introduced to building codes.
Top graph show control PVA coated board – not on same graph so the scale won’t be
swamped. Note that the 10% clay sample has the same heat release signature as the
control (but at a lower lever). Note that > loading sample have different shape and the
spike of energy release is delayed or nonexistent. The nonexistent peaks for 50 and 60%
make sense in that they didn’t burn.
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PHRR = peak heat release rate – taken from highest peak points on other graphs . It
would also be interesting to have time of peak on this graph.
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Shows further tests with 30% clay for some samples with industry standard intumescent
(An intumescent is a substance which swells as a result of heat exposure, thus
increasing in volume, and decreasing in density.) FR material. Note that a new high
shear mix process was also developed that improved performance.
Note big peak up front for 10% intumescent – there was a burst of flame that self
extinguished speculated that rapid expansion of intum ruptured protective ceramic
coating.
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SEMS show that nano clay forms a ceramic barrier.
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Not on this slide – Ford Taurus, Toyota Camry and Honda Civic/Del Sol have nano top
coats for wear and scratch resistance.
TPO=thermoplastic polyolefin (TPO- mix of PP, PE and other stuff) clay –
There is also interest in under the hood plastic parts with temperature resistance
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Good properties vs PP but what is the cost? Automotive is brutal for cost…
casualties include an automotive timing-belt cover based on a nylon 6
nanocomposite from Japan's Unitika and an automotive mirror housing of
conductive PPO/nylon alloy from GE Plastics.
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Some nano products
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GM TPO step assist
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Permeability is produced by tortous path PU = poly urethane,
PDMS=Polydimethylsiloxane
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Wilson butyl rubber with vermiculite clay developed by InMat Inc – possibly extendable to
bicycle and auto tires.
ORMLAS(tm)(Organically Modified Layered Alumino Silicate – for containing He in pouch
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Very light weight shoe – still in production? Couldn’t find it on-line
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ATH aluminum trihydrate Al(OH)3 with organo-clay addition
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Nylon 12 filled with nano particles
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Carbon nano composites can be made hydrophobic to prevent ice build up, CNT are very
thermally conductive for cooling.
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CNF Improves shear strength – can injection mold vs layup
North Seattle Community College
NANO 230
Weeks 9 & 10
In weeks 9&10 Vinny Casasanta gave three guest lectures on photonics and nano-photonics.
Unfortunately, I don’t have any electronic notes from these lectures. Vinny did put together a
Power Point which is in the optics folder.
Review – Week 11
MEMS
<Nano230_MEMS.ppt>
Definitions, MEMS, MST, micro-TAS, Mechatronics
Transducers – convert one form of energy to another
Actuators
Bulk micromachining
How to calculate KOH mask sizes
Pressure sensor process + DRIE
<Madou MEMS Surface Micro_Mach.ppt>
Surface machining – poly silicon
Can be cheaper because they are smaller, difficult to have good mechanical properties
Know stack up of poly and sacrificial layers
Holy grail – process integrated with IC
Problems temp steps ruin ICs, non-planarity or MEMS make IC after difficult
IC fab
<Nano230_IC_fab .ppt>
Know MOSFET structure – gate, source, drain – applications
Types, nMOS, pMOS, CMOS
Know basic process steps
Know field ox, gate ox – which is critical?
What material is gate electrode?
What material are source and drain electrodes?
Packaging
Dicing, wire bond, lead frame, molded package, can
Through-hole / surface mount
Packages - DIP, SOP, QFP, BGA
COF, COB, chip scale package, ACF, bump bonding,
Difference between MEMS and IC packaging – for sensors package regulates contact
between sensor and medium
How to calculate capacitance, and add capacitances
Nano tech and bio science
<NANO 230 BioNano 1 (05-02-07).ppt>
DNA
<NANO 230 BioNano 2 (05-04-07).ppt>
Proteins
<NANO 230 BioNano 3 (05-09-07).ppt>
Photo tagging
Lipid self assembly
DNA assembly (NANO 101 bio2)
North Seattle Community College
NANO 230
Nano composite materials
<Nano230_nano_materials .ppt>
4 key steps – synthesize particles, process combine with matrix, characterize particles,
test macro properties
1-D, 2-D, 3-D nano particles
MMT clay
Exfoliated, intercalated, immiscible
Solution blending, melt blending, in-situ polymerization
Carbon fibers
VGCF, MWNT, SWNT,
POSS
Silicones – polysiloxane
Molecule structure
Nano silica
Problems with viscosity increase – Hansie sol process avoids
Particle dispersion tests
SEM, TEM, WAXD
Macro tests
TGA, cone caloriometer, modulus, strength, toughness
Applications
Nano tech and photonics
<NANO 230 Nano-Optics 1 (06-01-07).ppt>