Lab Experiment 8

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ECE 3235 Electronics II
Experiment # 8
Understanding pole compensation
Note: (1) You need to use the lab material and circuit from lab 7.
(2) Some Important Background Information is attached at the end of the lab.
3. Dominant Pole Compensation
Next, you will compensate the amplifier as shown in Figure 3.
Figure 3. Dominant Pole Compensated Feedback Amplifier
First, using your measured component values, derive an expression for A(s), which is the
open-loop transfer function for your based amplifier in Figure 3 from Lab7. Then
determine the feedback coefficient β for the feedback amplifier in Figure 3 (you may
need to check Lab7 as well for that purpose and you should get β=0.1). Subsequently,
based on the measured magnitude plot and phase plot from Lab 7 for the base amplifier,
determine the dominant pole frequency so that a 45 degree phase margin is achieved
(Note that if your phase measurement starts from 180 degrees at DC, then subtract the
phases by 180 degrees to make sure it starts from 0 degrees at DC).
After you obtain the dominant pole frequency, compute the value of Cx Measure the
value of Cx and wire it (using the closest available standard value) into the circuit
between terminals x and y, as shown in Figure 3.
Now apply a square wave to the input at a level low enough to prevent distortion on the
output. Sketch Vout(t), and record the input level(s) as well as the steady state value of
output voltage and the first and second (+ and -) peaks. Also, measure the ringing period
and the time from the point at which the output begins to change to the first peak.
Now, check the sensitivity of the amplifier closed loop gain to the open loop gain by
temporarily changing R2 in Figure 1 to 20 K (a 100% change) and measuring the closed
loop gain.
4. Dominant Pole Compensation with Zero Cancellation
A slightly more complex compensation scheme is illustrated in Figure 4. As detailed in
the background material for this experiment, compute the required values of Rx and Cx.
Using the nearest available standard values (measure them!), wire the circuit of Figure 4,
and repeat the measurements outline in Section 3.
Figure 4. Zero Cancellation Compensation
Change the fixed resistor Rx to a variable one (with a potentiometer or decade box) and
repeat the above measurement after adjusting Rx for optimum performance, that is
minimum overshoot consistent with smallest ringing and fastest rise time. Now make Cx
variable (use a decade capacitance box) and simultaneously adjust Rx and Cx for
optimum performance.
5. Cadence simulation
Simulate your circuit in Figure 3 and 4 in Cadence. Compare with your measure results.
Note that now you need to do also transient analysis in addition to AC analysis. Also, for
transient analysis, as discussed in class, it is preferred to give a pulse with a time-duration
of 50 to 100 times of 0.35/B, where B denotes the bandwidth (the closed-loop
bandwidth). What is the bandwidth B for the closed-loop amplifier? (B is the dominant
pole frequency you derived before, why?).
Cadence tips
(1) Use VSIN from AnalogLib for AC/frequency analysis (note that AC amplitude is
set to 1 V)
(2) Use VSOURCE from AanlogLib for transient analysis (select PULSE for type
and set the pulse properly).
(3) Use dB20( ) calculator statement if you want to convert the gain into dB format
(to do that click Output in the analog design window, select setup, give a name for
gain, type in dB20(VF(“/Vout”) supposing you denoted your output voltage by
Vout, and finally click ok). Note the simulation results will give you the gain in
terms of dB instead of the numerical value.
(4) Similarly, use phase( ) calculator statement if you want to find phase of the
output, note that you need to subtract 180 to get the actual phase.
Feedback Amplifier Compensation: Background Material
Dominant Pole Compensation with Pole/Zero Cancellation
Let the uncompensated base amplifier gain function A(s) be as given in equation (1)
of this experiment. In that equation, the third OpAmp stage has the frequency
independent gain – R0/R6 (assuming that its input voltage is the voltage across C3).
Add-on of the compensation circuit of Figure 4 results in the third stage circuit
shown in Figure 5. You should analyze this circuit and convince yourself that its
transfer function is
A0
A(s) 
(1)
s
s
s
(1  )(1 
)(1  )
1
R 0 (1 
H(s) 
R 6 (1 
2
s
z
s
0
3
)
)
Where
0 
1
( R X  R 0 )C X
and
Z 
1
RX C X
RX
CX
R0 = 200K
x
y
R6 = 10K
Vin
2
_
741
3
6
Vout
+
Figure 5. Third Stage Circuit with Zero-Canceling Compensation Network.
The overall base amplifier gain function which results is:
s
A 0 (1 
)
z
A' (s)  s
s
s
s
(1 
)(1  )(1 
)(1  )
0
1
2
3
Where Ao, 1, 2, and w3 are the same parameters as those in equation (1). The
procedure now is to adjust Rx and Cx such that z = 1. This removes the pole at
1, and the remaining gain function can be compensated by using 0 as a dominant
pole relative to 2, which is larger than 1. Therefore, 0 can be larger than is the
case with simple dominant pole compensation. You can estimate the Rx and Cx
using the following two equations:
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