On-chip inductance and coupling Zeynep Dilli, Neil Goldsman Thanks to Todd Firestone and John Rodgers for providing the laboratory equipment and expertise for measurements. EM-sensitive components on semiconductor chips Modern RF circuits often feature on-chip inductors required by circuit design Operating frequencies are high enough to make this feasible Increasing circuit complexity also creates other inductive components Long transmission (bus) lines; signal/clock distribution networks… Motivation for modeling Investigating parasitic effects Vulnerability to external EM interference Potential to create on-chip interference Radiation Substrate current System-on-a-chip RF circuits require onchip inductors with high L, small area and high Q Automated design and speedy evaluation of geometrical tradeoffs. Issues in modeling Semiconductor substrates are conductive unable to treat system as metal/dielectric/ground plane New processes feature higher doping, higher conductivity Device circuits underneath metal structures display variable doping Non-uniform substrate: n+ and p+ active regions, n-wells, p-wells, lightly doped chip substrate… Inductor modeling---theory Modeling Approach: Divide a spiral inductor into segments and treat each current segment separately. V1 L11 Lm,12 V L L22 2 m,21 VN Lm, N 1 Lm, N 2 Lm,1N I Lm,1N I s LNN I Lkk=self-inductance (external+internal) of segment k Sources: Frequency-dependent current distribution within the segment and the magnetic flux linkage to the loop formed by the segment and its return current. Lkl=mutual inductance between segments k and l Sources: Magnetic flux linkage of the current in the first segment to the loop formed by the second segment and its return current. Lossy substrate effect: The return current has an effective distance into the substrate; this is frequency-dependent and can be modeled as a complex distance to account for the losses. Other frequency dependency: Skin effect in the metal; current crowding in the metal Internal self-inductance Frequency-dependent current distribution creates an internal self-impedance Solve Helmholtz Eqn. for current distribution: 2 J j 2 J Obtain resistance and inductance from J: Z E0 J ds cond . R ( ) Lint,self ( ) Internal self-inductance Physical current in cylindrical conductor, f=5GHz center J r edge External self-inductance Flux of magnetic field linked to surface between interconnect and its return current Lext ,self ; I B ds Need to define the return current path to determine the flux linkage area. If the frequency is low enough or substrate has low conductivity, the physical ground plane below the substrate is used for this purpose. But silicon substrates are not dielectric: With higher doping levels in modern process technologies to optimize the active devices on chips, the substrate conductivities rise. And our operating frequencies of interest are high. Skin depth of semiconductor substrate Within our frequency range the skin depth will fall below our substrate thickness (around 5 GHz for p-type sub., around 2 GHz for n-well, lower for active regions) External self-inductance Weisshaar et.al. showed in 2002 that an image current with a complex distance can be defined for the metal-oxide-lossy substrate system. Signal Current ; hox hsub Insulator D Substrate 1 j hsub heff hox 1 j tanh Metal Plate Effective virtual ground plane distance from the signal current Image Current Return current depth Mutual inductance Mutual inductance: The magnetic flux created by the current on one loop linking to the area of other loop Lij 1 Calculate from the magnetic vector potential and I from the 4 ai current distribution; the mutual Lm ,ij inductance between two current segments is then ij Ij ci ai bi aj J j d li d l j dai da j Rij cj bj J j da j aj p Frequency dependency: The signal current of a current segment and its image current both induce voltages on the “target” current segment; the distribution of the image current varies with frequency on a semiconductor substrate. ẑ ŷ q J xq y p2 Virtual Ground Plane yq 2 h pq y p1 hqq ' yq1 Wp x p Wp 2 2 Wq xq Wq 2 2 x̂ J xq q' (image) Inductor modeling---Design issues Variations in layout: Metal layer Length Number of turns Metal trace width Metal trace spacing Substrate doping Shape … Some Results Length Variation Increasing the length of the inductor increases inductance, but leads to a decline in Q due to increasing serial resistance as well, this effect worsening at higher frequencies as skin effect increases the resistance faster than linearly with length. Some Results Number of Turns Variation An inductor with the same length but with more turns has higher inductance, but the resistance does not rise quite so high so the detrimental effect to Q is less: Increasing the number of turns is a better way to increase inductance. Some Results Trace Spacing Variation Narrower spacing yields a higher inductance, but will probably increase capacitive coupling between turns. Some Results Substrate Doping Variation Overall, higher doping reduces inductance (closer return current, smaller loops) and makes it more freq-dependent (low enough doping pushes all current to bottom). Relationship between resistance and doping is not straightforward, since conductivity of substrate affects return current distribution, composition, and its frequency dependence all at the same time and these effects interact. Inductors--- Test Chip Designed for RF-probe station measurements Manufactured through MOSIS AMIS 0.5 μm 3 Metal layers Inductors--- Test Chip Planar inductor on substrate Planar inductor on grounded poly Stacked inductor on substrate Planar inductor on n-well Transformer RF probe tip Inductors--- Test Chip, measurements Cascade probes used with Hewlett-Packard Network Analysis Measured: S22 S 22 Z L Z0 1 S 22 Z L Z0 Z L Z0 1 S 22 Inductors--- Test Chip, measurements Inductors--- Test Chip, measurements EM Coupling Test Chip 2 For RF-probe station measurements Manufactured through MOSIS AMIS 0.5 μm 3 Metal layers EM Coupling Test Chip 2 NMOS 3 inverter NMOS 1 Planar inductor N-wells NMOS 2 On-Chip EM Coupling • Coupling between On-chip Inductors Left: Results from literature and circuit model for coupled onchip inductors Right: Our test structure for measuring coupling between inductors on different metal layers On-Chip EM Coupling: Inductor to inductor On-Chip EM Coupling: N-well to n-well Metal Contact Port 1 Port 2 Oxide N Well N Well P-Type Silicon Substrate 28.8m 102.45m 28.8m Need substrate current analysis….