Solid State Amplifier
At microwave frequencies, the scattering parameters are used
In the design of microwave amplifiers.
Design Goals:
1. Maximum power gain
2. Minimum noise figure.
3. Stable gain (no oscillation)
4. Input and output VSWR as close to unity as possible
5. Adequate gain and uniformity of gain over a specified
frequency band
6. Phase response that is a linear function of frequency
7. Insensitivity to nominal variations in the scattering parameters.
Amplifier Power Gain
Zs
V+
Zin
Amplifier 2
Amplifier 1
50 Ohms MN1
Ms
Z
Gp1
Ms
MN3
MN2
M
50 Ohms
Gp2
M
ML
ML
A two-stage amplifier with matching networks
power delivered to load
input power to amplifier
power delivered to load
Transducer gain G 
available input power from source
available load power
Available power gain Ga 
available input power from source
Power gain G p 
If the device is uncodition ally stable, the conjugate matching can be
used at both input and output. Then
G p  G  Ga  Gmax  maximum gain
1 2
Pinc  V Yc
2
Yc is the characteri stic admittance of the input line
Pin : input power  (1 -  ) Pinc
2
 is the input reflection coefficien t.
The power p L delivered to the 50  line is G p1G p 2 Pin .
PL
Gain G p 
 G p1G p 2
Pin
G
PL
2
 (1   G p1G p 2
Pinc
For lossless matching networks the impedance mismatch is the
same on the input side as on the output side
If M s is the impedance mismatch between
the first amplifier and its source impedance Zs , then :
Ms 
4 Rs Rin
Zs  Z
2
where Z in  Rin  jX in : amplifier input impedance
on the input line :
M
4Zc R
Zc  Z
1 
Z
1 
2

4R
1 Z
2
M  1    1    M s
*
2
*
1


1


2R  Z  Z * 
1   1  *
2
1 Z 
1 
1  1 1 M 1 1 M s
VSWR1 


1  1 1 M 1 1 M s
Derivation of Expression of Gain
Ms
Mij
Zin
Zs
Zout
+
Sij
V1
ZL
V2 +
-
V1
V2-
in
out
s
A basic amplifier circuit
L
Z L 1
L 
and
ZL 1
Zs 1
s 
Zs 1
V1  S11V1  S12V2
V2  S 21V1  S 22V2
V2  LV2 , V2  S 21V1  S 22LV2

S
V
21 1
V2 
(1  S 22L )

S12 S 21L 


V  V  S11 
(1  S 22L ) 

V1
S11  L
 in 

V1
1  S 22L

1

1
  S11S 22  S12 S 21
out 
S 22  s
1  S11s
The input power to the amplifier is :
Pin 
Vs
2
2
Ms 
8 Rs
where
Vs
Vs Rin
2 Z s  Z in
2
2
8 Rs
is the available power from the source.
1  s
Zs 
1  s
2 Rs  Z s  Z s
2 Rin 
*

2 1  in
1  in

2 1  s
1  s 1  s



*
1  s 1  s
1  s
*
2
2

2
2

Ms 
4 Rin Rs
Z s  Z in
2

2 1  in

1  in

1   1   

2
2
in
s
1  s in
2
Similarly, at the output :

1   1   

2
ML
2
out
1  L out
L
2
VL  V2  V2  V2 (1  L )
I L  Yc (V2  V2 )
2
 21   
2
s
2
1  s
2
1
1  s 1  in

1  s 1  in
2
The power delivered to the load is :
1
1
*
*
 2
PL  Re VL I L  Yc V2 (1  L )(1  L )
2
2
1
 Yc V
2
 2
2
1   
2
L

1
 Yc 1  L
2


2
V
1
2
The input power is Yc 1  in V1
2




1  L
S 21
PL
Gp 

Pin 1  in 2 1  S 22L
2
The transduce r gain is :
PL
PL
G

Pava Vs 2 / 8 Rs
2
2

1
S 21
2
1  S 22L
2
Pin  MPava  M s Pava
PL
G
Ms
Pin

1   1    S

1     1  S
2
2
L
s
21
2
in
Eliminate in 
s
2
G
1  
L
2
21
2
2
22
2
L
2
s
21
1  S 22 L  S11s  s L
1   1   S
L
22
2
2

L
2
L
1  S11  L
22
2
1    S
 S    2 Re  (S
1   S
2
Gp 
2
2
2
s
2
21
(1  S 22 L ) (1   S11s )  S12 S 21s L
2
 S11* )
Choose Zs  Z in
*
ZL  Z out*
and
s  in*
and
*
L  out
M s  M L  1  Gp  G
S11  L
S 
*
and out
 L  22 * *L
1  S 22L
1  S11s
*
s*  in 
Substitute for L 

s  sM
1 
2

A1  A12  4 B1
2 B1 
L  LM
1

2 B2


1/ 2
 A  A2  4 B 2
2
2
 2



1/ 2


*
*
A1  1  S11  S 22  
2
A2  1  S 22  S11  
2
*
B1  S11  S 22
B2  S 22  S11*
2
2
2
2
,
sM  1 and LM  1
For absolutely stable device A1  0 and A 2  0,
the minus sign is used.
when A 22  4 B2 , the solution for LM is equal to 1.
2
For an absolutely stable transisto r we must have
A 2  2 B2
The device is absolutely stable if the stability parameter K  1
1 - S11  S 22  
2
K
2
2 S12 S 21
2
1


S 21
G p  G p,max  G  Gmax 
K  K 2 1
S12
S
The parmaeter 21 is called the " Figure of Merit : for the transisto r
S12
When K  1 , it gives the maximum stable gain G MSG
S21

S12
The expression for an amplifier with conjugate impedance matching is :
Gp 
S 21
2
S12 S 21 ( K  K 2  1)

S 21
( K  K 2  1)
S12