Multiple Descriptor-Queues
We discover the role played by
the MULR-bit (bit #18) in the
Transmit Control Register
Our ‘igbe.c’ tool
• We wrote this module as an aid for doing
‘debugging’ of our device-driver routines
• It creates a pseudo-file that will show us
the current values in significant registers
• Already it has disclosed a ‘problem’ with
our previous ‘txburst.c’ demonstation
• Driver wrote 0x0103F0F8 into TCTL, but
‘/proc/igbe’ shows 0x1103F0F8 in TCTL
Screenshot
Transmit Control (0x0400)
31
R
=0
30
R
=0
29
R
28
MULR
27
26
TXCSCMT
=0
15
14
13
12
25
UNO
RTX
11
COLD (lower 4-bits)
(COLLISION DISTANCE)
EN = Transmit Enable
PSP = Pad Short Packets
CT = Collision Threshold (=0xF)
COLD = Collision Distance (=0x3F)
24
RTLC
23
R
=0
10
0
9
22
21
20
18
17
16
COLD (upper 6-bits)
SW
XOFF
8
19
(COLLISION DISTANCE)
7
6
5
I
S
CT
L
TBI
(COLLISION
ASDV THRESHOLD)
SPEED
L
O
mode
S
U
4
3
P
S
P
2
1
0
R0
=0
0N
E
R
=0
SWXOFF = Software XOFF Transmission
RLTC = Retransmit on Late Collision
UNORTX = Underrun No Re-Transmit
TXCSCMT = TxDescriptor Minimum Threshold
MULR = Multiple Request Support
We used 0x0103F0F8 in TCTL to setup the ‘transmit engine’ before enabling it
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Twin Descriptor Queues
TDBA0
Tx Desc Queue0
TDBA1
Tx Desc Queue1
TDH1
TDH0
TDT0
TDT1
= descriptor is ‘owned’ by device-driver
= descriptor is ‘owned’ by network-controller
Tx Arbitration Count (0x3840)
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
RESERVED
=0
15
14
13
RESERVED
=0
12
11
10
E
N
A
B
L
E
0
9
RATIO
8
7
I
L
R
O
=0
S
6
S
L
U
5
TBI
mode
4
3
2
COUNT 0
(must not be 0)
1
0
0
ENABLE = Descriptor Enable
(Always set to1)
RATIO = Compensation Ratio
(00=1/1, 01=1/2, 10=1/4, 11=1/8)
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