Characteristics of Submicron HBTs in the 140-220 GHz Band

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Characteristics of Submicron HBTs
in the 140-220 GHz Band
M. Urteaga, S. Krishnan, D. Scott, T. Mathew, Y.
Wei, M. Dahlstrom, S. Lee, M. Rodwell.
Department of Electrical and Computer Engineering,
University of California, Santa Barbara
urteaga@ece.ucsb.edu 1-805-893-8044
Urteaga et al, 2001 Device Research Conference, June, Notre Dame, Illinois
DRC, June 2001, South Bend, IN
Ultra-high fmax Transferred-Substrate HBTs
• Substrate transfer provides access to
both sides of device epitaxy
• Permits simultaneous scaling of
emitter and collector widths
• Maximum frequency of oscillation
 f max 
ft / 8RbbCcb
• Sub-micron scaling of emitter and
collector widths has resulted in record
values of extrapolated fmax
• New 140-220 GHz Vector Network
Analyzer (VNA) extends device
measurement range
Mason's
gain, U
3000 Å collector
400 Å base with 52 meV
grading
AlInAs / GaInAs / GaInAs
HBT
25
Gains, dB
• Extrapolation begins where
measurements end
30
20
MSG
15
H21
10
5
Emitter, 0.4 x 6 mm2
Collector, 0.7 x 6 mm2
fmax
= 1.1 THz ??
ft = 204 GHz
Ic = 6 mA, Vce = 1.2 V
0
10
100
Frequency, GHz
Urteaga et al, 2001 Device Research Conference, June, Notre Dame, Illinois
1000
High Frequency Device Characterization
Motivation
Characterize transistors to highest measurable frequency
Develop an accurate methodology
for ultra-high frequency transistor measurements
Results
Measured submicron transistors
DC-45 GHz, 75-110 GHz, 140-220 GHz bands
Observed singularity in Unilateral Power Gain
Submicron HBTs have very high power gain,
but fmax can’t be determined
Urteaga et al, 2001 Device Research Conference, June, Notre Dame, Illinois
InGaAs/InAlAs HBT Material System
Layer Structure
InGaAs 1E19 Si 1000 Å
Band diagram at Vbe = 0.7 V, Vce = 0.9 V
Grade 1E19 Si 200 Å
InAlAs 1E19 Si 700 Å
InAlAs 8E17 Si 500 Å
Grade 8E17 Si 233 Å
Grade 2E18 Be 67 Å
InGaAs 4E19 Be 400 Å
2kT base bandgap grading
InGaAs 1E16 Si 400 Å
InGaAs 1E18 Si 50 Å
InGaAs 1E16 Si 2550 Å
InAlAs UID 2500 Å
400 A base, 4* 1019/cm3
3000 A collector
S.I. InP
Urteaga et al, 2001 Device Research Conference, June, Notre Dame, Illinois
Transferred-Substrate Process Flow
• Emitter metal
• Emitter etch
• Self-aligned base
• Mesa isolation
• Polyimide planarization
• Interconnect metal
• Silicon nitride insulation
• Benzocyclobutene, etch vias
• Electroplate gold
• Bond to carrier wafer with solder
• Remove InP substrate
• Collector metal
• Collector recess etch
Urteaga et al, 2001 Device Research Conference, June, Notre Dame, Illinois
Ultra-high fmax Submicron HBTs
• Electron beam lithography used to define
submicron emitters and collectors
• Minimum feature sizes
 0.2 mm emitter stripe widths
 0.3 mm collector stripe widths
• Improved collector-to-emitter alignment
using local alignment marks
0.3 mm Emitter before polyimide planarization
• Aggressive scaling of transistor
dimensions predicts progressive
improvement of fmax
As we scale HBT to <0.4 um,
fmax keeps increasing,
measurements become very difficult
Submicron Collector Stripes
(typical: 0.7 um collector)
Urteaga et al, 2001 Device Research Conference, June, Notre Dame, Illinois
How do we measure fmax?
Maximum Available Gain
Simultaneously match input and
output of device
MAG 
S21
S12
K 
K 2 1
g e ne ra tor
loa d
R ge n

Vg e n
los s le s s
m a tc hin g
n e two rk
los s le s s
ma tc h in g
ne two rk
RL
K = Rollet stability factor
Transistor must be unconditionally stable or MAG does not exist
Maximum Stable Gain
Stabilize transistor and simultaneously
match input and output of device
g e ne ra tor
R ge n
Vg e n
MSG 
S21
S12

Y21
Y12

1
loa d
los s le s s
m a tc hin g
n e two rk
re s is tive
los s
(s ta b iliz a tio n)
los s le s s
ma tc h in g
ne two rk
ωCcb  R ex  kT 
qI c 

Approximate value for hybrid- model
To first order MSG does not
depend on ft or Rbb
For Hybrid-  model, MSG rolls off at
10 dB/decade, MAG has no fixed slope
CANNOT be used to accurately
extrapolate fmax
Urteaga et al, 2001 Device Research Conference, June, Notre Dame, Illinois
RL
Unilateral Power Gain
Mason’s Unilateral Power Gain
Use lossless reactive feedback to cancel
device feedback and stabilize the device,
then match input/output.
U
Y21  Y12
s h un t
fe e d b a c k
g e n e ra to r
R ge n
2
lo a d
lo s s le s s
m a tc h in g
n e tw o rk
Vge n
4G11G 22  G 21G12 
lo s s le s s
m a tc h in g
n e tw o rk
s e rie s
fe e d b a c k
U is not changed by pad reactances
40
ALL Power Gains must be unity at fmax
30
Gains, dB
For Hybrid-  model,
U rolls off at 20 dB/decade
U: all 3
35
25
MAG/MSG
common emitter
20
15
MAG/MSG
common base
10
5
MAG/MSG
common collector
0
1
Urteaga et al, 2001 Device Research Conference, June, Notre Dame, Illinois
10
Frequency, GHz
100
RL
Negative Unilateral Power Gain ???
Can U be Negative?
YES, if denominator is negative
This may occur for device with a negative output
conductance (G22) or some positive feedback (G12)
U
Y21  Y12
2
4G11G 22  G 21G12 
What Does Negative U Mean?
Device with negative U will have infinite Unilateral
Power Gain with the addition of a proper source or load
impedance
2-port
Network
AFTER Unilateralization
• Network would have negative output resistance
• Can support one-port oscillation
• Can provide infinite two-port power gain
U
Y21  Y12
GL
2
4G11 G 22  G L   G 21G12 
Select GL such that denominator is zero:
U
Simple Hybrid-  HBT model will NOT show negative U
Urteaga et al, 2001 Device Research Conference, June, Notre Dame, Illinois
Accurate Transistor Measurements Are Not Easy
• Submicron HBTs have very low Ccb (< 5 fF)
• Characterization requires accurate measure of
very small S12
230 mm
230 mm
• Standard 12-term VNA calibrations do not
correct S12 background error due to
probe-to-probe coupling
Solution
Transistor in Embedded in LRL Test Structure
Embed transistors in sufficient length of
transmission line to reduce coupling
Place calibration reference planes at transistor
terminals
Line-Reflect-Line Calibration
Standards easily realized on-wafer
Does not require accurate characterization of
reflect standards
Characteristics of Line Standards are well
controlled in transferred-substrate microstrip
wiring environment
Corrupted 75-110 GHz measurements due to
excessive probe-to-probe coupling
Urteaga et al, 2001 Device Research Conference, June, Notre Dame, Illinois
140-220 GHz On-Wafer Network Analysis
• HP8510C VNA used with Oleson
Microwave Lab mmwave Extenders
• Extenders connected to GGB
Industries coplanar wafer probes via
short length of WR-5 waveguide
• Internal bias Tee’s in probes for
biasing active devices
• Full-two port T/R measurement
capability
• 75-110 GHz measurement set-up uses
same waveguide-to-probe configuration
with internal HP test set
UCSB 140-220 GHz VNA Measurement Set-up
Urteaga et al, 2001 Device Research Conference, June, Notre Dame, Illinois
Can we trust the calibration ?
75-110 GHz calibration looks Great
140-220 GHz calibration looks OK
S11 of open
About 0.1 dB / 3o error
S11 of through
About –40 dB
S11 of short
S11 of through
S11 of open
freq (75.00GHz to 110.0GHz)
freq (140.0GHz to 220.0GHz)
0.30
Probe-Probe coupling
is better than –45 dB
-40
-45
0.25
S21 of through line is
off by less than 0.05 dB
0.20
0.15
0.10
-50
0.05
-55
0.00
-60
-0.05
-0.10
-65
-0.15
-70
140
75
80
85
90
95
100
105
150
160
170
180
110
freq, GHz
Urteaga et al, 2001 Device Research Conference, June, Notre Dame, Illinois
freq, GHz
190
200
210
220
0.3 mm Emitter / 0.7 mm Collector HBTs: Negative U
40
35
30
Negative U
U
RF Gains
25
20
15
MAG/MSG
S11
h21
10
5
S22
0
-5
1E10
1E11
1E12
Freq.
S21
Emitter: 0.3 x 18 mm2,
Collector: 0.7 x 18.6 mm2
Ic = 5 mA, Vce = 1.1 V
S12*20
-6
-4
-2
0
2
Gains are high at 200 GHz
but fmax can’t be determined
Urteaga et al, 2001 Device Research Conference, June, Notre Dame, Illinois
freq (6.000GHz to 45.00GHz)
4
6
0.3 mm Emitter / 0.7 mm Collector HBTs:
Negative Output Conductance
Real (Y11)
Real (Y12)
0.08
0.0005
0.07
0.0000
0.06
-0.0005
0.05
-0.0010
0.04
-0.0015
0.03
-0.0020
0.02
-0.0025
0.01
-0.0030
0.00
-0.0035
0
20 40 60 80 100 120 140 160 180 200 220
0
20 40 60 80 100 120 140 160 180 200 220
Freq. GHz
Freq. GHz
Real (Y21)
0.10
Real (Y22)
0.0005
Emitter: 0.3 x 18 mm2,
Collector: 0.7 x 18.6 mm2
Ic = 5 mA, Vce = 1.1 V
0.08
Negative Y22
0.0000
0.06
-0.0005
0.04
-0.0010
0.02
0.00
0
20 40 60 80 100 120 140 160 180 200 220
-0.0015
0
20 40 60 80 100 120 140 160 180 200 220
Freq. GHz
Urteaga et al, 2001 Device Research Conference, June, Notre Dame, Illinois
Freq. GHz
0.4 mm Emitter / 1.0 mm Collector HBTs
25
20
RF Gains
15
10
U
MAG/MSG
S11
h21
S22
5
0
-5
1E10
1E11
S21
1E12
S12*20
Freq.
Emitter: 0.4 x 6 mm2, Collector: 1.0 x 6.6 mm2
Ic = 3 mA, Vce = 1.1 V
Urteaga et al, 2001 Device Research Conference, June, Notre Dame, Illinois
-4
-3
-2
-1
0
1
2
freq (6.000GHz to 45.00GHz)
3
4
0.4 mm Emitter / 1.0 mm Collector HBTs
Real (Y11)
0.030
Real (Y12)
0.0000
-0.0002
0.025
-0.0004
0.020
-0.0006
0.015
-0.0008
0.010
-0.0010
0.005
-0.0012
0.000
0
20 40 60 80 100 120 140 160 180 200 220
-0.0014
0
Freq. GHz
20 40 60 80 100 120 140 160 180 200 220
Freq. GHz
Real (Y22)
Real (Y21)
0.0004
0.040
0.035
Negative Y22
0.0002
0.030
0.025
0.0000
0.020
-0.0002
0.015
0.010
-0.0004
0.005
-0.0006
0.000
0
20 40 60 80 100 120 140 160 180 200 220
0
Freq. GHz
Urteaga et al, 2001 Device Research Conference, June, Notre Dame, Illinois
20 40 60 80 100 120 140 160 180 200 220
Freq. GHz
Less scaled devices show expected power gain rolloff
25
U
20
RF Gains
15
10
MAG/MSG
h21
S11
S22
5
0
-5
1E10
1E11
1E12
S21
Freq.
mm2,
Emitter: 0.5 x 8.0
Collector: 1.2 x 8.6
Ic = 4 mA, Vce = 1.8 V
InP/InGaAs/InP DHBT
S12*30
mm2
Urteaga et al, 2001 Device Research Conference, June, Notre Dame, Illinois
-10
-8
-6
-4
-2
0
2
4
freq (6.000GHz to 45.00GHz)
6
8
10
Conclusions
Submicron HBTs have Extremely Low Parasitics
Extremely High Power Gains
High fmax HBTs are hard to measure
Probe-to-Probe coupling can cause errors in S21
Highly scaled transistors show a negative unilateral power gain
coinciding with a negative output conductance
Cannot extrapolate fmax from measurements of U but…
Device has ~ 8 dB MAG at 200 GHz
Single-stage amplifiers with 6.3 dB gain at 175 GHz have been fabricated
(To be presented 2001 GaAs IC Conference Baltimore, MD)
Possible sources of Negative Output Conductance
Dynamics of capacitance cancellation
Dynamics of base-collector avalanche breakdown
Measurement Errors (We hope we’ve convinced you otherwise)
Urteaga et al, 2001 Device Research Conference, June, Notre Dame, Illinois
Acknowledgements
This work was supported by the ONR under grant N0014-99-1-0041
And the AFOSR under grant F49620-99-1-0079
Urteaga et al, 2001 Device Research Conference, June, Notre Dame, Illinois
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