DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING
ECE 201
CIRCUIT THEORY I
OP AMP RELAXATION OSCILLATOR
INTRODUCTION
A “relaxation oscillator” is constructed by using some type of device that will act as a switc h when a certain voltage is applied to one of its terminals. The “switching voltage” is usually the voltage across a capacitor that is being charged or discharged accordingly. In this experiment, you will design and build a relaxation oscillator using an OP AMP.
The configuration that we will study is actually an OP AMP “comparator” (the switching device). Basically, an OP AMP comparator is an OP AMP that is running ‘OPEN LOOP”, meaning that no feedback is being applied. A typical OP AMP comparator is shown below in
Figure 1.
VCC
15 V
Vplus
12 V
Vm inus
12 V
3
2
7 1 5 U1
6
4
741
VEE
15 V
Vout
Figure 1. An OP AMP configured as a Comparator

The operation of the circuit can be studied by applying the following condition. Let’s consider that the voltage V plus
is larger than voltage V minus
. The voltage on the non-inverting input of the OP
AMP is larger than the voltage on the inverting input. The OP AMP will try to amplify the difference between the input voltages with a very large non-inverting voltage gain, causing the
OP AMP output voltage to saturate at the positive supply voltage V
CC
(+ 15 Volts).
When the situation is reversed and voltage V minus
is larger than voltage V plus
, the voltage on the inverting input of the OP AMP is larger than the voltage on the non-inverting input. The
OP AMP will try to amplify the difference between the input voltages but now with a very large inverting voltage gain, and the OP AMP output voltage saturates at the negative power supply voltage V
EE
(-15 Volts).
Let’s add some more components to the circuit and see what happens. Consider the circuit shown in Figure 2.
XSC1
A B
G
T
VEE
15V
2
3
R
10kohm
U1
6
741
R2
1kohm
C
0.1uF
VCC
15V
R1
1kohm
Figure 2. An OP AMP Relaxation Oscillator

In order to analyze this circuit, we must begin somewhere, so let’s assume that the
OP AMP output voltage is saturated at +V
CC
volts. The voltages at the OP AMP inputs are
V
3
(non-inverting input) = V
CC
R
1
/(R
1
+R
2
) =

V
CC where

= R
1
/(R
1
+R
2
)
V
2
(inverting input) = voltage across the Capacitor C
The capacitor C will charge towards voltage V
CC
via the resistor R. When the capacitor voltage reaches a value just slightly greater than the voltage

V
CC
the OP AMP switches and the output voltage now saturates at –V
EE
volts. This causes the voltage V
3
to switch to -

V
EE
and the capacitor C to charge towards voltage –V
EE
via the resistor R. When the capacitor voltage reaches a value just slightly less than -

V
EE
the OP AMP output voltage switches back to
+V
CC
volts. The process repeats.
Typical waveforms for the OP AMP output voltage and the voltage across the capacitor C are shown in Figure 3.
Figure 3. Voltages for the OP AMP Relaxation Oscillator
The period of oscillation is given by the expression
T = 2RC ln {(1+

)/ (1-

)} seconds where

= R
1
/ (R
1
+R
2
)

PRELIMINARY WORK / DESIGN
Design an OP AMP Relaxation Oscillator having a frequency in Hz equal to the last 3 non-zero digits of your Student ID Number (such as 274). Choose convenient values for the capacitor C and

. Determine the value of R using the formula for the period T.
Test your design using MultiSim and the model for the 741 OP AMP. Have a copy of your simulation ready to hand in when you come to the lab.
LABORATORY PROCEDURE / RESULTS
Each group member will construct the circuit that they designed and simulated. For each circuit, measure the OP AMP output voltage and the voltage across the capacitor using the oscilloscope. Record a rough sketch of the voltages in your laboratory notebook. Use the storage option to save a copy of your results for publishing in your lab report.
Your lab report should include all design calculations and any necessary modifications.
Be sure to comment on how well your results agreed with the theoretical calculations. If things didn’t go as they should have, explain what may have gone wrong.