CALIFORNIA STATE UNIVERSITY, NORTHRIDGE A STUDY OF A DATAFLOW COMPUTER A graduate project submitted in partial satisfaction of the requirements for the degree of Master of Science in Engineering By Shi-Chung Liu May, 1988 The Graduate Project of Shi-Chung Liu is approved: California State University, Northridge ii ~l ACKNOWLEDGEMENTS I would like to thank Dr. John Robert Burger, Dr. David Salomon, Burgess for their Dr. John Adams and Gary assistance and advice throughout this project. grateful to my wife Teresa understanding. iii for her I am patience also and ' TABLE OF CONTENTS List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vi Abstract . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vii Chapter 1 Introduction 1.1 Project Description •••.•••.....•... 1 1.2 DFM/CSUN Architecture & Operation .• 3 1.2.1 Switch . . . . . . . . . . . . . . . . . . . . . . . 7 1.2.2 Token Queue •.........•...•.•• 8 1.2.3 Matching Store ..•••.•.•.•.•.• 8 1.2.4 Instruction Store .••..•••••.• 10 1.2.5 Processing Element (PE} Queue 12 1.2.6 Processing Elements •...•.•... 12 1 . 2 • 7 Hast . . . . . . . . . • . . . . . . . . . . . . . . . 12 1.3 DFM/CSUN Computer Operation ...•...• 14 1. 4 Token Format ..••••••••..••..•••••.. 15 1.5 Instruction Format •.......••...•... 18 Chapter 2 DFM/CSUN Instruction Set 2.1 Functional Summary ......•.......... 22 2.2 Instruction Description •.••••...•.• 22 Chapter 3 DFM/CSUN Assembly Language ............... 3.1 Assembler Statements 3.1.1 Name Field 3.1.2 Operation Field 3.1.3 Output/Input Field 3.1.4 Comment Field 3 .1. 5 Statement Examples ................... .............. ........... ................ ........... iv 61 61 62 62 63 63 3.2 Comment Statement •......••.••.•...• 3.3 Program Structuring Statements ••... 3.3.1 Procedure Declaration •••••... 3.3.2 CYCLE statement ••.•..•...••.. 3. 4 Assembler Directives ••.•••.•.••••.• Chapter 4 Assembler Listing Format 4.1 Assembler Operation ...•..•..•..••.. 4.2 Assembler Listing Format •...•.••••• 4.3 Sample Program Listing ••.•.•.•••••. 4.3.1 A Single Assignment .•...••... 4.3.2 A Series of Assignments .•••.. 4.3.3 The Absolute Function •••••••• 4.3.4 The Factorial Function •..••••• Chapter 5 64 64 65 66 67 69 70 71 71 71 76 76 Conclusion 5.1 Future development ...••....•.•.•.•. 82 References • • • . . • . . • . • . . . . • • . • • . . . • . . . . • • • • • • • • • • . . . • 84 Appendix A Semester Project: A Data Flow Computer . 85 Appendix B Reserved Words And Special Characters .• 95 Appendix C Source Listing ..•••••...•.•••.••....... 97 v .& TABLE OF FIGURES Figure 1.1 The Scope of DFM Assembler •••••..•••••• 2 Figure 1. 2 The SQUARE Function •.•.•••.•••.••...••• 5 Figure 1.3 DFM/CSUN Computer Architecture •..••..•• 6 Figure 1.4 Block Diagram of Token Queue •..•••...•• 9 Figure 1.5 Block Diagram of Matching Store ..•..••• 11 Figure 1.6 Block Diagram of PEs •••.••••••••.•.•••• 13 Figure 1.7 The Token Format •.•...•.••..•••..••••.• 16 Figure 1.8 The Instruction Format ..•.•.••••.••.••• 19 Figure 2.1 Summary of DFM/CSUN Instruction •••.•••• 23 Figure 4.1 A := W Figure 4.2 A Series of Assignments .....••.•..•.••• 7 4 Figure 4.3 The ABS Function .•.......••..•••..•••.• 77 Figure 4.4 The Factorial Function .......••..•...•• 79 * X + Y * vi Z ••••••••••••••••••••• 72 ABSTRACT A STUDY OF A DATAFLOW COMPUTER by Shi-Chung Liu Master of Science in Engineering This project presents computer. The a tagged of the dataflow first part contains a detailed description of the architecture, and the dataflow model computer. In computer the second operation part, computer assembler with limited assembler a of the dataflow directives and program structuring statements is written to conclude this project. vii Chapter 1 Introduction 1.1 Project Description This project contains: (1) a proposed description of the dataflow machine for California State University, Northridge (hereinafter referred to as DFM/CSUN) (2) an assembler. The first part can be used as a prototype specification for a hardware implementation and will be described in the rest of this chapter and chapter 2. be with The second part will described in chapters 3 and 4. It can be used together a project Dataflow Computer Simulator proposed term for the course "CS 222 Computer Organization") to perform computer simulation. diagram (a which Figure 1.1 is a context shows the scope of the DFM/CSUN Assembler. An assembling listing and object code are generated by the DFM/CSUN Assembler from the dataflow program source code. The assembling listing can be used correcting their dataflow program. to assist students The object code can be used as an input file for the student's project- Dataflow Computer Simulator. 1 2 Object Code DFM/CSUN Assembler Source Code Figure 1.1 Data flo ... Computer Simulator Student The Scope of DFM Assembler 3 The design objectives for the DFM/CSUN Assembler on the IBM/AT are the following: . Portability • Less than 30 seconds assembling time per module • Easy maintenance The C language objectives, is since chosen to it faster is achieve transfered to another machine. A and the first can be modularize two easily design is operational at adapted to assure the last objective. 1.2 DFM/CSUN Architecture & Operation The first dataflow computer (ref. 1) Manchester behind University, the dataflow computation. In was England, in 1976. machines contrast is to The basic idea the the data sequential, ·instruction at a time, memory cell semantics Neumann driven of the one von model, the dataflow model of computation is based on the following two principles (ref. 3): (1) An instruction executes when and only when all the operands required are available. (2) Instructions are purely functional and produce no side-effects. The first principle implies an asynchronous execution ,, ' 4 mechanism in which an operation is triggered whenever all input data are available. that The second principle implies any two enabled operations can be executed in either order or concurrently. Since an instruction operands are can executed as soon as its available, asynchronous concurrency must be easily represented in graph Several be the dataflow models of translation into programming language (ref. computations, languages, and are 4). their appropriate for that purpose. A graph is similar to Neumann (ref. machine, 2). function. Figure The the program which is 1.2 shows token concept of the von used to present an algorithm a concept graph in for the SQUARE a dataflow machine is I similar to the familar concept of operand in a von Neumann machine. A token moves along the arcs to the nodes of the graph, a node performs its execution when all of its input arcs are filled with tokens. The DFM/CSUN is a six-station (i.e., 6 Manchester-type dataflow conventional host computer. shown in Figure 1.3. machine The major components) linked DFM/CSUN with a structure is There are two types of parallelism 5 X Figure 1.2 The SQUARE Function 6 Instruction Store Matching Store PE Queue v Token PEs Queue S~o~itch Bost Figure 1.3 DFM/CSUN Computer Architecture 7 in the DFM/CSUN structure: (1) Pipelined Parallelism The DFM/CSUN's pipelined ring provides structure parallelism, i.e., the the operation of each station can be overlapped. (2) Multiple Processing The multiple units of processing elements augment the computer performance. The rest of this section will discuss the hardware implementation and operation of the following stations: 1. Switch 2. Token Queue 3. Matching Store 4. Instruction Store 5. Processing Element (PE) Queue 6. Processing Elements 7. Host 1.2.1 Switch The Switch receives tokens from either processing elements, the host or the and routes the tokens to either the Token Queue, the Instruction Store or the Host Computer. 8 1.2.2 Token Queue The token queue is a circular FIFO (First In First Out) buffer implemented using static RAM with two pointers, one to its front and one to its back. The proposed structure has 32K x 96 bits of Random Access Memory with two 15 bits address register, and high speed read/write operation. input An buffer (96 bits long) and an output buffer (96 bits long) serve to smooth the irregular output rates of two other stations in the dataflow machine: the Matching Store and the Switch. Figure 1.4 shows the structure write of pointer, then increases Similarily,_ a read operation ·location where was pointed pointed the Queue. pointer. When a by queue fetches A a 1.2.3 Matching Store queue back pointer. token pointer then from the increases the reaches the top of the queue, an increase to the pointer will reset to the bottom of the queue. the by the queue front pointer, puts the token to the output buffer, front Token operation takes a token from input buffer, puts the token into the location where was back the the pointer .. ..... - .. . ' Gl ... C) from Switc h ..... ::1 a! ... 32K X 96 bit ~ / ::1 0. ... Gl ..... ..... ... ::1 a! ..) ...... RAM ;:l 0. c ;:l 0 ..... ,.... I 1 to N ching Store or I ruction Store ~- I Queue Back Pointer I Queue Front Pointer write read - Figure 1.4 --------- Block diagram of Token Queue 1.0 10 The address of a token consists of the and destination field the label field, which has a total length of 54 bits. In DFM/CSUN, a hardware hashing technique is proposed to solve the large address space problem. The structure of the Matching Store 1.5. A 16-bit hash address is is shown in generated token. of 16 memory banks (each memory slots the the label the of from destination field and the Then field Figure incoming bank is 64K x 96 bits) pointed to by the hash address checked in parallel incoming token. unless all to are find the matched partner of the If the match fails, the token slots are already occupied. token and the hash address are diverted is stored In that case the to the overflow memory, and wait for an available slot. 1.2.4 Instruction Store The instruction store is 256K x 71 bits RAM (Random Access Memory): each 71-bit 18-bit address. proposed to instruction can be accessed by an An address buffer and a data provide a Processing Element Queue. faster buffer are instruction fetch to the 11 64K x 96 ) rY .....- . ......• ..i:. ci ... c: => Ra•h Add res• Generator A ~ Jlr/ bit• Memory BAnk r--- u .. 6411: " 96 d bit a Me110ry BAnk - .......• .."" lG ...."" 6 '\ ~ -y L--- ll '---' ) ['Y 6411: " 96 bit• Keaoory BAnk 1...--1 ~ / A UK x 112 blt• over nov f - K•110ry l "" Figure 1.5 Block Diagram of Matching Store I-' I-' 12 1.2.5 Processing Element (PE) Queue The Processing Element Queue is a 16K long queue with pointers to its front and end (similar to the structure of Token Queue). Each cell in the queue is and one contains instruction 209 bits wide, (71 bits) and at most two tokens (96 x 2- 18- 36 bits). 1.2.6 Processing Elements This station consists of a processing elements pre-processor (Figure handles label operations and 1.6). routes available Processing Element. microprogrammed arithemetic and bit-slice logical just like the Arithmetic and The the a set of pre-processor package to an The Processing Elements are processors operation Logic which handle of tokens. Units (ALUs) the They are in a von used to Neumann computer. 1.2.7 Host The host computer can be any computer, and is _... ~ I ) Ill .... :::> 0. ....c:: - r-- I ... ........ ::1 Processing Element .) r-- J>.. ) Processor: j I ~ _.... Pre- ..) ... .... ..... Processing Element "' I ) , :::> Ill .u ::1 0. .u 6 ••• I ~ ••• J\.. " "" ---- _... ) ... buay busy Processing Element .J J busy --- Figure 1.6 - Block Diagram of PEs 1-' w 14 provide the dataflow machine with some essential services such as input/output, assembly and interrupt handling. 1.3 DFM/CSUN Computer Operation The token movement through the DFM/CSUN computer (refer to Figure 1.3) works in the following manner: A token produced Processing by a node exits from the Elements where the execution of several node operations may be processing concurrently. The tokens provides arrive at the Token Queue, which temporary storage for tokens lying on the arcs of a graph. The Matching Store gathers pairs of tokens with the same destination node address matching function of this store either and is label. associative the first token matches the second token or the second token matches the first token. cases, The a token In most arriving at the store looks for a partner with matching fields. If no partner is found, the token is written to the store and awaits 15 a partner. A pair of matched tokens exiting the Matching Store addresses the node operation and the subsequent destination of its output. The paired tokens find their instruction to form a packet. This packet (tokens and instruction) is then passed to the Processing Elements Queue waiting for execution, and the circuit is complete. 1.4 Token Format The format of a token is shown in Figure 1.7, its fields are described as the following: FIELD value DESCRIPTION Can be of different data types. value of It is the the operand that will eventually be operated on by the instruction. destination The destination address of the token. It 16 value 32 aaaaaabbcd 10 Figure 1.7 destination 18 The Token Format label 36 17 is either the address of an instruction in the Instruction Store or an address in host's memory, depending the on the value of flag c. label Used to match tokens in the MS. control Contains 4 subfields: (1) data type The code of the data type of the token (e.g. integer, real, .•. ) (2) MS operation 2-bit flag to indicate the proper operation of this token in Matching Store. 00 Bypass MS and go directly to the Instruction Store 01 --- Look for a match in Matching if found, both together to the If no match, matching tokens go Instruction Store. wait in the Matching Store for a matching token. (3) destination of token Store; i' . 18 1 bit flag to indicate whether the destination is the Instruction Store or the Host Computer. 0 --- Instruction Store 1 --- Host Computer (4) handedness at IS 1 bit flag to indicate the position of this token in an instruction. 0 --- token is the left input of the input of the 1.8, its instruction or N/A 1 --- token is the right instruction 1.5 Instruction Format The format of an instruction is shown in Figure fields are described as follows: FIELD OpCode DESCRIPTION the code of the instruction. 19 OpCode Destination xbbcdbbcd dest or literal 12 18 9 32 Figure 1.8 The Instruction Format 20 destination the destination address of the first result token. It is either the address of an instruction in the Instruction Store or an address in the Host Computer memory. control contain 3 subfields: (1) literal indicator 1 bit flag to indicate whether the 2nd dest field contains a token or a literal. (2) bbcd of lst token to indicate the MS and handedness operation, destination at IS for the first token. See the description of the control field in Section 1.4. (3) bbcd of 2nd token to indicate the MS and operation, destination handedness at IS for the second token. See the description of the control field in Section 1.4. However, this field unused, if the literal indicator is 1. is 21 2nd dest Same as However, for if there is only field the the result literal one contains second input a token. indicator is 1, token literal used and this by instruction (as the right hand operand). the Chapter 2 DFM/CSUN Instruction Set This chapter describes the instruction set of the DFM/CSUN computer. An overview of the instruction set is presented first, in which the functional instructions groups. are divided into six Following the functional summary of the instruction set is a DFM/CSUN listed instruction, detailed in description alphabetical of each order by mnemonic. 2.1 Functional Summary This section presents an overview of the DFM/CSUN instruction. The total of 18 instructions are divided into six groups by their function. Figure 2.1 shows these groups of instructions. 2.2 Instruction Description This section instruction contains in the detailed DFM/CSUN information instruction set. arranged in alphabetical order of the mnemonic. 22 about each They are 23 Function Mnemonic OpCode Instruction Data Movement DUP 001 Duplicate MPY ADD DIV SUB NEG OOa 008 OOb 009 OOd Multiply Add Divide Subtraction 2's Complement AND OR XOR COM 010 011 012 013 And Or Exclusive Or l's Complement IN OUT 040 041 Input Output INCL BRA EQ 002 003 004 GT 005 GE 006 SYNC 007 Increment Label Branch Compare and Relation is Equal Compare and Relation is Greater Than Compare and Relation is Greater Than or Equal Synchronize Arithmetic Logical Input/Output Program Control Figure 2.1 Summary of DFM/CSUN Instructions 24 INSTRUCTION: ADD OPERATION: Addition ASSEMBLER SYNTAX: 1. two input tokens ADD destination 2. one input token ADD destination,data DESCRIPTION: 1. two input tokens Add two input tokens, put the result to the destination token. 2. one input token Add the input token and the literal data, put the result to the destination token. INSTRUCTION FORMAT: 1. two input tokens +-----------------------------------------------------------------------+ 11 6 5 4 3 2 1 . I 1098765432109876543210987654321098765432109876543210987654321098765432101 I 1oooooooo1oooyyyyyyyyyyyyyyyyyyObbcd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I I +-----------------------------------------------------------------------+ where: yyyyyyyyyyyyyyyyyy - contains the address of the instruction for the output token. bbcd 0100 -destination ends with 'L'. 25 0101 - destination ends with 'R'. 0010 -destination ends with 'H'. 0000 -destination doesn't end with either 'L', 'R' or 'H'. 2. one input token +-----------------------------------------------------------------------+ 11 6 s 4 3 2 1 1 1098765432109876543210987654321098765432109876543210987654321098765432101 I I I000000001000yyyyyyyyyyyyyyyyyy1bbcd .... ttttttttttttttttttttttttttttttttl +-----------------------------------------------------------------------+ where: YYYYYYYYYYYYYYYYYY - contains the address of the instruction for the output token. bbcd L 0100 - destination ends with I 0101 - destination ends with 'R I . 0010 - destination ends with I HI. 0000 - destination doesn't end with either 'R' or I HI. tttttttttttttttttttttttttttttttt - contains a literal. I. I L I I 26 INSTRUCTION: AND OPERATION: Logical AND ASSEMBLER SYNTAX: 1. two input tokens AND destination 2. one input token AND destination,data DESCRIPTION: 1. two input tokens AND two input tokens, put the result to the destination token. 2. one input token AND the input token and the literal data, put the result to the destination token. INSTRUCTION FORMAT: 1. two input tokens +-----------------------------------------------------------------------+ 17 e 5 4 3 2 1 I 1098765432109876543210987654321098765432109876543210987654321098765432101 I I 1ooooooo1ooooyyyyyyyyyyyyyyyyyyObbcd . . . . . . . . . . . . . . . . . . • . . . . . . . . . . . . . . . . . 1 +-----------------------------------------------------------------------+ where: YYYYYYYYYYYYYYYYYY - contains the address of the instruction for the output token. bbcd 0100 -destination ends with 'L'. 27 0101 -destination ends with 'R'. 0010 -destination ends with 'H'. 0000 -destination doesn't end 1 R 1 or 'H 1 with either 'L', • 2. one input token +-----------------------------------------------------------------------+ 11 6 5 4 3 2 1 I 1098765432109876543210987654321098765432109876543210987654321098765432101 I I I000000010000yyyyyyyyyyyyyyyyyy1bbcd .... ttttttttttttttttttttttttttttttttl +-----------------------------------------------------------------------+ where: yyyyyyyyyyyyyyyyyy - contains the address of the instruction for the output token. bbcd 0100 - destination ends with I L I. 0101 - destination ends with I 0010 - destination ends with I HI. 0000 - destination doesn't end with either IRI or IH I . tttttttttttttttttttttttttttttttt - contains a literal. R I. IL I' 28 INSTRUCTION: BRA OPERATION: Branch ASSEMBLER SYNTAX: 1. two input tokens, two output tokens BRA destinationl,destination2 2. two input tokens, one output token (first only) BRA destinationl 3. two input tokens, one output token (second only) BRA ,destination2 DESCRIPTION: l. two input tokens, two output tokens If the second input token is the first input output token. token FALSE, copy into the first Otherwise, copy the first input token into the second output token. 2. two input tokens, one output token (first only) If the second input token is the first input token into FALSE, the copy first output token. 3. two input tokens, one output token (second only) If the second input token the first input token output token. INSTRUCTION FORMAT: l. two input tokens, two output tokens is into TRUE, copy the second 29 +-----------------------------------------------------------------------+ 11 6 5 4 32 1 1 1098765432109876543210987654321098765432109876543210987654321098765432101 I I I000000000011yyyyyyyyyyyyyyyyyy0bbcdpprq . . . . . . . . . . . . . . zzzzzzzzzzzzzzzzzzl +-----------------------------------------------------------------------+ where: yyyyyyyyyyyyyyyyyy - contains the address of the instruction for the output token. bbcd 0100 - 0101 - destination 0010 - destination 0000 - destination 1 doesn't end I L 1 ends with I R I. 1 ends with I HI. destination 1 ends with 'R' or I. with either I L I, I L I, I H'. pprq 0100 - destination 2 ends with I L 0101 - destination I R I. 0010 - destination 2 ends with 0000 - destination 2 doesn't end 'R' or 2 ends with I. 'HI. with either I HI. zzzzzzzzzzzzzzzzzz - contains the address of the instruction for the second output token. 2. two input tokens, one output token (first only) +-----------------------------------------------------------------------+ 11 6 5 4 3 2 1 I 1098765432109876543210987654~21098765432109876543210987654321098765432101 I I ID00000000011yyyyyyyyyyyyyyyyyy0bbcd1111 . . . . . . . . . . . . . . . . . . . . . . . . . . . . • . . . I +-------------------------------------~---------------------------------+ 30 where: YYYYYYYYYYYYYYYYYY - contains the address of the instruction for the output token. bbcd 0100 - destination 1 ends with I L I. 0101 - destination 1 ends with 'R I. 0010 - destination 1 ends with I HI. 0000 - destination 'R' or 1 doesn't end with either I L I, I HI. 3. two input tokens, one output token (second only) +-----------------------------------------------------------------------+ 11 6 s 4 3 2 1 I 1098765432109876543210987654321098765432109876543210987654321098765432101 I I 1000000000011 . . . . . . . . . . . . . . . . . . 01111pprq . . . . . . . . . . . . . . zzzzzzzzzzzzzzzzzzl +-----------------------------------------------------------------------+ where: pprq 0100 - 0101 - destination 2 ends with I R I. 0010 - destination 2 ends with IH I. 0000 - destination 2 doesn't end destination 2 ends with 'RI or I L I. with either I HI. zzzzzzzzzzzzzzzzzz - contains the address of the instruction for the second output token. I L I, 31 INSTRUCTION: COM OPERATION: l's Complement ASSEMBLER SYNTAX: 1. one input token COM destination DESCRIPTION: 1. one input token Determine the l's complement of the token, put input the result to the destination token. INSTRUCTION FORMAT: 1. one input token +-----------------------------------------------------------------------+ 11 6 s 4 3 2 1 I 1098765432109876543210987654321098765432109876543210987654321098765432101 I 1ooooooo1oo11yyyyyyyyyyyyyyyyyyObbcd . . . . . . . . . . . . . . . . . . . . . . . . . • . . . . . . . . . . I I +-----------------------------------------------------------------------+ where: YYYYYYYYYYYYYYYYYY - contains the address of the instruction for the output token. bbcd I L I. 0100 - destination ends with 0101 - destination ends with R I. 0010 - destination ends with 0000 - destination doesn't end with either I 'R' or I HI. 'HI. I L', 32 INSTRUCTION: DIV OPERATION: Divide ASSEMBLER SYNTAX: 1. two input tokens DIV destination 2. one input token DIV destination,data DESCRIPTION: 1. two input tokens Divide the first input token by the input token, put the result ~econd to the destination token. 2. one input token Divide the input data, the put token by the literal result to the destination token. INSTRUCTION FORMAT: 1. two input tokens +-----------------------------------------------------------------------+ 11 6 s 4 3 2 1 1 1098765432109876543210987654321098765432109876543210987654321098765432101 I I 1oooooooo1011yyyyyyyyyyyyyyyyyyObbcd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 +-----------------------------------------------------------------------+ where: yyyyyyyyyyyyyyyyyy - contains the address of the instruction for the output token. 33 bbcd 0100 - destination ends with I L 0101 - I RI. 0010 - destination ends with 0000 - destination doesn't end destination ends with 'R' or I. I HI. with either I L I I I H'. 2. one input token +-----------------------------------------------------------------------+ 17 6 s 4 3 2 1 I 1098765432109876543210987654321098765432109876543210987554321098765432101 I . I I000000001011yyyyyyyyyyyyyyyyyy1bbcd .... ttttttttttttttttttttttttttttttttl +-----------------------------------------------------------------------+ where: yyyyyyyyyyyyyyyyyy - contains the address of the instruction for the output token. bbcd 0100 - destination ends with I L 0101 - destination ends with I R I. 0010 - destination ends with 'H' • 0000 - destination doesn't end 'R' or 'HI. tttttttttttttttttttttttttttttttt - contains a literal. I. with either I L I I 34 INSTRUCTION: DUP OPERATION: Duplicate ASSEMBLER SYNTAX: 1. one input token DUP destination1,destination2 DESCRIPTION: 1. one input token Generate 2 output tokens identical to the input token. INSTRUCTION FORMAT: 1. one input token +-----------------------------------------------------------------------+ 11 6 5 4 3 2 1 I 1098765432109876543210987654321098765432109876543210987654321098765432101 I I I000000000001yyyyyyyyyyyyyyyyyy0bbcdpprq . . . . . . . . . . . . . . zzzzzzzzzzzzzzzzzzl +-----------------------------------------------------------------------+ where: yyyyyyyyyyyyyyyyyy - contains the address of the instruction for the output token. bbcd 0100 - destination 1 ends with I L I. 0101 - destination 1 ends with I RI. 0010 - destination 1 ends with I H'. 0000 - destination 1 doesn't end 'R' or pprq I HI. with either I LI I 35 0100 - destination 2 ends with I L 0101 destination 2 ends with I R I. 0010 - destination 2 ends with I HI. 0000 - destination 2 doesn't end 'R' or I. with either 'HI. zzzzzzzzzzzzzzzzzz - contains the address of the instruction for the second output token. I L I' 36 INSTRUCTION: EQ OPERATION: Compare for Equality ASSEMBLER SYNTAX: 1. two input tokens EQ destination 2. one input token EQ destination,data DESCRIPTION: 1. two input tokens Compare two input tokens, if they are equal, put a TRUE token with zero label to the destination token. FALSE token with Otherwise, zero label put to a the destination token. 2. one input token Compare the input token with data, the literal if they are equal, put a TRUE token with zero label to the destination Otherwise, put a FALSE token. token with zero label to the destination token. INSTRUCTION FORMAT: 1. two input tokens where: yyyyyyyyyyyyyyyyyy +-----------------------------------------------------------------------+ 17 s s 4 3 2 1 I losa7654321098765432109876543210987654321098765432109B765432109B7654321ol I I IOOOG00000100yyyyyyyyyyyyyyyyyy0bbcd . • . . . . . . . . . . . . . . . . . . . . • . . . . . . . . . . . . . I +-----------------------------------------------------------------------+ ,, . 37 - contains the address of the instruction for the output token. bbcd 0100 0101 0010 0000 - destination ends with I L I. destination ends with IR I. destination ends with IH I. destination doesn't end IRI or with either I L I' IH I. 2. one input token +-----------------------------------------------------------------------+ 11 6 _ 5 4 3 2 1 I 1098765432109876543210987654321098765432109876543210987654321098765432101 I I I000000000100yyyyyyyyyyyyyyyyyy1bbcd .... ttttttttttttttttttttttttttttttttl +-----------------------------------------------------------------------+ where: yyyyyyyyyyyyyyyyyy - contains the address of the instruction for the output token. bbcd 0100 - destination ends with I L I. 0101 - destination ends with I R I. 0010 - IH I. 0000 destination ends with destination doesn't end 'R' or I HI. tttttttttttttttttttttttttttttttt - contains a literal. with either 'LI' 38 INSTRUCTION: GT OPERATION: Compare for Greater Than ASSEMBLER SYNTAX: 1. two input tokens GT destination 2. one input token GT destination,data DESCRIPTION: 1. two input tokens Compare two input token is greater tokens, if first than the second token, put a TRUE token with zero destination token. the label to the Otherwise, put a FALSE token with zero label to the destination token. 2. one input token Compare the input token with data, if the token the literal is greater than the data, put a TRUE token with zero label the FALSE destination token with token. zero to Otherwise, put a label to the destination token. INSTRUCTION FORMAT: 1. two input tokens +-----------------------------------------------------------------------+ 17 e s 4 3 2 1 I 1098765432109876543210987654321098765432109876543210987654321098765432101 I I 1ooooooooo1o1yyyyyyyyyyyyyyyyyyObbcd . . . . . . . . . . . • • . . . . . . . . . . . . . . • . . . . . . . . 1 +-----------------------------------------------------------------------+ 39 where: yyyyyyyyyyyyyyyyyy - contains the address of the instruction for the output token. bbcd 0100 - destination ends with I L 0101 - destination ends with I R I. 0010 - destination ends with I HI. 0000 - destination doesn't end 'R' or I. with either I L I' 'H' • 2. one input token +-----------------------------------------------------------------------+ 11 6 s 4 3 2 1 1 1098765432109876543210987654321098765432109876543210987654321098765432101 I I I000000000101yyyyyyyyyyyyyyyyyy1bbcd .... ttttttttttttttttttttttttttttttttl +-----------------------------------------------------------------------+ where: YYYYYYYYYYYYYYYYYY - contains the address of the instruction for the output token. bbcd 0100 - destination ends with I L 0101 - destination ends with I R I. 0010 destination ends with 0000 - destination doesn't end 'R' or I HI. I. I HI. with either I L I' 40 tttttttttttttttttttttttttttttttt - contains a literal. 41 INSTRUCTION: GE OPERATION: Compare for Greater Than Or Equal ASSEMBLER SYNTAX: 1. two input tokens GE destination 2. one input token GE destination,data DESCRIPTION: 1. two input tokens Compare two equal input tokens, if they are or the first token greater than the second token, put a TRUE token label to the Otherwise, put a with destination FALSE token zero token. with zero label to the destination token. 2. one input token Compare the input token with data, if they literal are equal or the token is greater than the data, put with the a TRUE token zero label to the destination token. Otherwise, put a FALSE token with zero label to the destination token. INSTRUCTION FORMAT: 1. two input tokens +-----------------------------------------------------------------------+ 11 s s 4 3 2 1 I 1098765432109876543210987654321098765432109876543210987654321098765432101 I tooooooooo110yyyyyyyyyyyyyyyyyyObbcd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I I +-----------------------------------------------------------------------+ 42 where: YYYYYYYYYYYYYYYYYY - contains the address of the instruction for the output token. bbcd 0100 - destination ends with I L 0101 - I R I. 0010 - destination ends with 0000 - destination ends with 'HI. destination doesn't end 'R' or I. with either I L I I I H'. 2. one input token +-----------------------------------------------------------------------+ 17 6 s 4 3 2 1 I 1098765432109876543210987654321098765432109876543210987654321098765432101 I I I000000000110yyyyyyyyyyyyyyyyyy1bbcd .... ttttttttttttttttttttttttttttttttl +-----------------------------------------------------------------------+ where: YYYYYYYYYYYYYYYYYY - contains the address of the instruction for the output token. bbcd I 0100 - destination ends /'with I 0101 - destination ends with 'R I . 0010 - destination ends with 'HI. 0000 - destination doesn't end with either 'R' or I HI. L I. I L I I ,, . 43 tttttttttttttttttttttttttttttttt - contains a literal. 44 INSTRUCTION: IN OPERATION: Input ASSEMBLER SYNTAX: 1. one input token IN destination DESCRIPTION: 1. one input token Copy the input token to the destination token. INSTRUCTION FORMAT: 1. one input token +-----------------------------------------------------------------------+ 11 6 5 · 4 3 2 1 I 1098765432109876543210987654321098765432109876543210987654321098765432101 I 1ooooo1ooooooyyyyyyyyyyyyyyyyyyObbcd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . • . . . I I +-----------------------------------------------------------------------+ where: yyyyyyyyyyyyyyyyyy - contains the address of the instruction for the output token. bbcd 0100 - destination ends with I L 0101 - destination ends with I R I. 0010 - destination ends with 'HI. 0000 - destination doesn't end 'R' or I H'. I. with either I L I' 45 INSTRUCTION: INCL OPERATION: Increment Label ASSEMBLER SYNTAX: 1. one output token INCL destination! 2. two output tokens INCL destinationl,destination2 DESCRIPTION: 1. one output token Generate an output token identical to input token except its label the is incremented by 1. 2. two output tokens Generate two output the input token tokens identical to except their labels are incremented by 1. INSTRUCTION FORMAT: 1. one output token +--------~--------------------------------------------------------------+ 11 s s 4 3 2 1 1 lo9876543210987654321098765432109876543210987654321098765432109876543210I I I I000000000010yyyyyyyyyyyyyyyyyy0bbcd1111 . . . . . . . . . . . . . . . . . . • . . . . . . . . . . . . . 1 +-----------------------------------------------------------------------+ where: yyyyyyyyyyyyyyyyyy - contains the address of the instruction for the output token. 46 bbcd 0100 - destination 1 ends with I L 0101 - destination 1 ends with I R I. 0010 - destination 1 ends with I HI. 0000 - destination 1 doesn't end 'R' or I. with either I L I, 'HI. 2. two output tokens +-----------------------------------------------------------------------+ 17 6 5 4 3 2 1 I 1098765432109876543210987654321098765432109876543210987654321098765432101 I I I000000000010yyyyyyyyyyyyyyyyyy0bbcdpprq . . . . . . . . . . . . . . zzzzzzzzzzzzzzzzzzl +-----------------------------------------------------------------------+ where: YYYYYYYYYYYYYYYYYY - contains the address of the instruction for the output token. bbcd 0100 - destination 1 ends with I L 0101 - destination 1 ends with I R I. 0010 - destination 'HI. 0000 - destination 1 doesn't end 'R' or 1 ends with I. with either I L I' I L I, I H'. pprq 0100 - destination ends with I L 0101 - destination 2 ends with I R I. 0010 - destination 2 ends with I HI. 0000 - destination 'R' or I HI. 2 2 doesn't end I. with either 47 zzzzzzzzzzzzzzzzzz - contains the address of the instruction for the second output token. 48 INSTRUCTION: MPY OPERATION: Multiply ASSEMBLER SYNTAX: 1. two input tokens MPY destination 2. one input token MPY destination,data DESCRIPTION: 1. two input tokens Multiply two input tokens, put the result to the destination token. 2. one input token Multiply the input token and data, put the the literal result to the destination token. INSTRUCTION FORMAT: 1. two input tokens +-----------------------------------------------------------------------+ 11 s s 4 3 2 1 I ID987654321098765432109876543210987654321098765432109876543210987654321DI I I ID00000001010yyyyyyyyyyyyyyyyyy0bbcd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 +-----------------------------------------------------------------------+ where: YYYYYYYYYYYYYYYYYY - contains the address of the instruction for the output token. bbcd 49 0100 - destination ends with I L 0101 - destination ends with I RI. 0010 - destination ends with I H'. 0000 - destination doesn't end 'R' or I. with either I L I I I HI. I I 2. one input token +-----------------------------------------------------------------------+ 11 6 5 4 3 2 1 I 1098765432109876543210987654321098765432109876543210987654321098765432101 I I I000000001010yyyyyyyyyyyyyyyyyy1bbcd .... ttttttttttttttttttttttttttttttttl +-----------------------------------------------------------------------+ where: YYYYYYYYYYYYYYYYYY - contains the address of the instruction for the output token. bbcd 0100 - destination ends with I L 0101 - destination ends with I R I. 0010 - destination ends with I HI. 0000 - destination doesn't end 'R' or I HI. tttttttttttttttttttttttttttttttt - contains a literal. I. with either I L I I 50 INSTRUCTION: NEG OPERATION: 2's Complement ASSEMBLER SYNTAX: 1. one input token NEG destination DESCRIPTION: 1. one input token Determine the 2's complement of the token, put input the result to the destination token. INSTRUCTION FORMAT: 1. one input token +-----------------------------------------------------------------------+ 11 6 5 4 3 2 1 I 1098765432109876543210987654321098765432109876543210987654321098765432101 I I 1oooooooo1101yyyyyyyyyyyyyyyyyyObbcd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I +-----------------------------------------------------------------------+ where: YYYYYYYYYYYYYYYYYY - contains the address of the instruction for the output token. bbcd 0100 - destination ends with I L 0101 - destination ends with I R I. 0010 - destination ends with I H'. 0000 - destination doesn't end with either IRI or I HI. I. 'LI' 51 INSTRUCTION: OR OPERATION: Logical OR ASSEMBLER SYNTAX: 1. two input tokens OR destination 2. one input token OR destination,data DESCRIPTION: 1. two input tokens Inclusive OR two input tokens, put the token and the result to the result to the destination token. 2. one input token Inclusive literal OR data, the put input the destination token. INSTRUCTION FORMAT: 1. two input tokens +-----------------------------------------------------------------------+ 17 s 5 4 3 2 1 I 1098765432109876543210987654321098765432109876543210987654321098765432101 I I I000000010001yyyyyyyyyyyyyyyyyy0bbcd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 +-----------------------------------------------------------------------+ where: yyyyyyyyyyyyyyyyyy - contains the address of the instruction for the output token. bbcd 52 0100 - destination ends with I L 0101 - destination ends with I R I. 0010 - destination ends with I HI. 0000 - destination doesn't end 'R' or I. with either I L I' I HI. 2. one input token +-----------------------------------------------------------------------+ 11 6 5 4 3 2 1 I 1098765432109876543210987654321098765432109876543210987654321098765432101 I I I000000010001yyyyyyyyyyyyyyyyyy1bbcd .... ttttttttttttttttttttttttttttttttl +-----------------------------------------------------------------------+ where: yyyyyyyyyyyyyyyyyy - contains the address of the instruction for the output token. bbcd 0100 - destination ends with I L 0101 - destination ends with I R I. 0010 - destination ends with - destination doesn't end with either 0000 I. I HI. 'R' or I HI. tttttttttttttttttttttttttttttttt - contains a literal. I L I' 53 INSTRUCTION: OUT OPERATION: Output ASSEMBLER SYNTAX: 1. one input token OUT modu1e_name(destination) DESCRIPTION: 1. one input token Copy the input token to the destination token. INSTRUCTION FORMAT: 1. one input token +-----------------------------------------------------------------------+ 11 6 5 4 3 2 1 I 1098765432109876543210987654321098765432109876543210987654321098765432101 I I I000001000001yyyyyyyyyyyyyyyyyy0bbcd . . • . . . . . . . . . . . . . • . . . . . . . . . . . . . . . . . . . 1 +-----------------------------------------------------------------------+ where: yyyyyyyyyyyyyyyyyy - contains the address of the instruction for the output token. bbcd 0100 - destination ends with I L I. 0101 - destination ends with IR I. 0010 - destination ends with IH I. 0000 - destination doesn t end with either I L I 1 IRI or IHI. I -.- 54 INSTRUCTION: SUB OPERATION: substraction ASSEMBLER SYNTAX: 1. two input tokens SUB destination 2. one input token SUB destination,data DESCRIPTION: 1. two input tokens Subtract the second input token first input from the token, put the result to the destination token. 2. one input token Subtract the literal data from token, put the input the result to the destination token. INSTRUCTION FORMAT: 1. two input tokens +-----------------------------------------------------------------------+ 17 6 5 4 3 2 1 I 1098765432109876543210987654321098765432109876543210987654321098765432101 I I 1oooooooo1o01yyyyyyyyyyyyyyyyyyObbcd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I +-----------------------------------------------------------------------+ where: YYYYYYYYYYYYYYYYYY - contains the address of the instruction for the output token. 55 bbcd 0100 - destination ends with I L 0101 - destination ends with I R I. 0010 - destination ends with I H'. 0000 - destination doesn't end 'R' or I. with either I L I I I HI. 2. one input token +-----------------------------------------------------------------------+ 11 s 5 4 3 2 1 1 1098765432109876543210987654321098765432109876543210987654321098765432101 I I I000000001001yyyyyyyyyyyyyyyyyy1bbcd .... ttttttttttttttttttttttttttttttttl +-----------------------------------------------------------------------+ where: YYYYYYYYYYYYYYYYYY - contains the address of the instruction for the output token. bbcd 0100 - destination ends with I 0101 - destination ends with 'R I . 0010 - I HI. 0000 - destination doesn't end with either destination ends with 'R' or L I. I L I I 'HI. tttttttttttttttttttttttttttttttt - contains a literal. I I ,, 56 INSTRUCTION: SYNC OPERATION: Synchronize ASSEMBLER SYNTAX: 1. two input tokens, two output tokens SYNC destination1,destination2 DESCRIPTION: 1. two input tokens, two output tokens Copy the first input token output token, and to the first copy the second input token to the second output token with a same label of the first input token. INSTRUCTION FORMAT: 1. two input tokens, two output tokens +-----------------------------------------------------------------------+ 11 s . 5 4 3 2 1 1 1098765432109876543210987654321098765432109876543210987654321098765432101 I I I000000000111yyyyyyyyyyyyyyyyyy0bbcdpprq . . . . . . . . . . • . . . zzzzzzzzzzzzzzzzzzl +-----------------------------------------------------------------------+ where: yyyyyyyyyyyyyyyyyy - contains the address of the instruction for the output token. bbcd 0100 -destination 1 ends with 'L'. 0101 -destination 1 ends with 'R'. 0010 -destination 1 ends with 'H'. 0000 -destination 1 doesn't end with either 'L', ' 57 IRI or I HI. pprq L 0100 - destination 2 ends with I 0101 - destination 2 ends with 'R I . 0010 - destination 2 ends with 'HI. 0000 - destination 2 doesn't end IR' or I H' I. with either 0 zzzzzzzzzzzzzzzzzz - contains the address of the instruction for the second output token. I L I, 58 INSTRUCTION: XOR OPERATION: Logical Exclusive OR ASSEMBLER SYNTAX: 1. two input tokens 'XOR destination 2. one input token XOR destination,data DESCRIPTION: 1. two input tokens Exclusive OR two input tokens, put the and the to the result to the destination token. 2. one input token Exclusive literal OR data, the put input the token result destination token. INSTRUCTION FORMAT: 1. two input tokens +-----------------------------------------------------------------------+ 11 6 s 4 3 2 1 I 1098765432109876543210987654321098765432109876543210987654321098765432101 I I I000000010010yyyyyyyyyyyyyyyyyy0bbcd . . . . . • . • . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 +-----------------------------------------------------------------------+ where: YYYYYYYYYYYYYYYYYY - contains the address of the instruction for the output token. bbcd 59 I L I. 0100 - destination ends with 0101 - destination ends with 'R I. 0010 - destination ends with 0000 - destination doesn't end with either I HI. I L', 'R' or I H'. 2. one input token +-----------------------------------------------------------------------+ 11 6 5 4 3 2 1 I 1098765432109876543210987654321098765432109876543210987654321098765432101 I I I000000010010yyyyyyyyyyyyyyyyyy1bbcd .... ttttttttttttttttttttttttttttttttl +-----------------------------------------------------------------------+ where: yyyyyyyyyyyyyyyyyy - contains the address of the instruction for the output token. bbcd 0100 - destination ends with I L'. 0101 - destination ends with I R I. 0010 - destination ends with I H'. 0000 - destination doesn't end 'R' or I H'. tttttttttttttttttttttttttttttttt - contains a literal. with either I L I, Chapter 3 Assembly Language A DFM/CSUN executable program consists of a set of 71 bits binary numbers contained in memory. These numbers represent DFM/CSUN instructions, instruction address, data. and It is possible to program the DFM/CSUN by manually calculating dataflow and encoding machine to the perform numbers the that cause desired the functions. However, this method is very slow and tedious. An assembler provides an easier method of writing programsby allowing machine instructions to be encoded symbolically through the use of easy to remember English- like mnemonics and symbols. The majority of code in a DFM/CSUN program will normally be the assembly language instructions described in Chapter 3. However, the source program will also include some program structuring statements and assembler directives. Program structuring statements structures. Assembler introduces directives control the program the mode of assembly, specify the form of assembler output. 60 61 This chapter comment describes the assembler statements, the statements, the program structuring statement and assembler directives for DFM/CSUN assembler. 3.1 Assembler Statements An assembly language program is written in expressed symbolic by statement, a A language. symbolic an comprised statements statement instruction, assembler of a directive, may high or a be level comment. Statements are always written in the following format: NAME The OPERATION various separaated cases, a OUTPUT/INPUT fields by colon one or that or comprise more semicolon. COMMENT a statement are blanks or tabs, and in some Statements may have a maximum length of 80 characters long. 3.1.1 Name Field The name field assigns a memory address name contained in the field. to the symbolic The name field may begin in any column if it terminated by a colon, or it must begin 62 in column one when the colon is omitted. only be lower case letters or numerical. Name field can The following are the valid name: 1 absolute funl23 2nd 3.1.2 Operation Field The operation field specifies a symbolic operation code, a program structuring statement, or an assembler directive. If present, this field must either begin after column one or be separated from the name field by one or more blanks, tabs, or a colon. 3.1.3 Output/Input Field The output/input field is used to enter arguments for the operation the code, if present, is separated operation field by one or more blamks or tabs. from p ' 63 3.1.4 Comment Field The comment field provides the assembly place language user a to put a message stating the purpose of a statement or group of optional, statements. and if The present, one preceding field by or comment must more field be is always separated from the blanks, tabs, and an exclamation point or a semicolon. 3.1.5 Statement Examples The following shows an example of the DFM/CSUN assembler symbolic statement: Syntax: 3 ADD lOOH W * X + Y * Z Description: 3 is a symbol representing the name of the the bit instruction. ADD is a symbolic opcode representing pattern of the add instruction. 64 lOOH is a symbol representing memory address of the host computer. ; W * X + Y * Z is the comment for this statement. 3.2 Comment Statement A comment statement is program. Instead, not it is listing and may be used to language statement. processed by reproduced document on the assembler the assembly of assembly groups A comment statement is indicated by encoding an exclamation point or a semicolon as the nonblank cha.racter on a line. first For example: THIS IS A COMMENT STATEMENT ; THIS IS ALSO A COMMENT STATEMENT Blank lines are also treated as comment statements. 3.3 Program Structuring Statements Two program DFM/CSUM statement. structuring assembler statements procedure are introduced declaration and in CYCLE 65 3.3.1 Procedure Declaration A procedure declaration defines an executable program and associates part of a an identifier with it so that it can be activated by the OUTPUT assembler statement. The procedure heading specifies the identifier that the The procedure. format of the procedure declaration is: PROCEDURE procedure_identifier [action_statement]* END procedure_identifier The following shows an example: PROCEDURE names abs 1: DUP branchL,compareL compare: GE branchR,#O branch: BRA nagative,lOOH nagative: NEG lOOH 66 END abs 3.3.2 CYCLE statement CYCLE statement provide a framework for performing actions repetitively. The statements between the CYCLE and END keywords are those nodes of a graph (the dataflow program) which form a cycle. The format of the CYCLE loop is: CYCLE action statement* END The following shows an example: CYCLE 4 BRA 100H,7L 7 MPY 4 END 67 3.4 Assembler Directives The following directives is used a summary of some of the asembler to control the operation of the DFM/CSUN assembler. These directives are embedded in the source program, but must Comments are appear optional. alone on a single line. Directives always start with a dollar sign ($), immediately followed by the directive and its operand. The assembler directives are: $PAGE Cause the listing top-of-page. to space to the next The directive itself does not appear in the listing. $ADDRESS [loc] Specifies that the address. $LISTON Turn the listing on. $LISTOFF Turn the listing off. object code start 68 $TITLE Includes the title on the heading listing page. of each Chapter 4 DFM/CSUN Assembler 4.1 Assembler Operation The DFM/CSUN assembler is a two-passassembler. first pass, names are examined and placed into the symbol table, opcodes and assembler directives are statement lengths are determined. output information about file the is decoded decoded, and The pass one routine inputs the source files and forms the intermediate During the symbol formed table. which instruction contains and special processing information for the second pass program. codes detected in pass one are stored in an An Error intermediate file for inclusion in the output listing. During the second pass, symbolic addresses the are object resolved, code and module are produced. The pass two routine source input in available from Errors generated, a listing output uses the same file as the pass one routine and reads the data in exactly the same manner. for is detected The intermediate file is the pass two routine. the first during pass the 69 to opened The symbol table is resolve assembly addressing. process will be 70 displayed on the output listing with a cumulative error count also given. 4.2 Assembler Listing Format During pass two of the assembly process, a program listing is produced. The listing displays all information pertaining to the assembled program - both assembled data and the user's original source statements. The listing including may be used as a documentation tool by comments and remarks that describe the function of the particular program segment. The main purpose of the listing is to convey all pertinent information about the assembled program, the memory addresses, and their values. A sample listing is provided at the end of Use the following points this chapter. to examine and understand the listing: • The page heading on this sample, generated on AT personal computer, an IBM show the time and the date of 71 assembling • • When the assembler detects error conditions during the assembly process, the column titled contain error code(s) describing associated line of source the "ERROR" errors code. A will in summary the of assembler errors is given in Appendix E • . The column titled "LINE" contains decimal numbers that are associated with the listing source lines. 4.3 Sample Program Listing 4.3.1 A Single Assignment Figure 4.1 assignment. shows The the dataflow program graph listing is for a single shown on the next page. 4.3.2 A Series of Assignments Figure 4.2 shows the dataflow graph for a series of 72 w z A Figure 4.1 A := W * X + Y * Z DFM/CSUN ASSEMBLER •Hl.l LOC V•rion 1.0 OBJECT CODE 2r18 pm. Tu••d•Y• March 29 9 ERROR LINE pag• 1988 1 SOURCE STATEMENT 00001 00002 00003 00004 oooos 00000 00001 00002 OOa 00002 04~ OOa 00002 OS~ 008 00100 02f ~~~~~~~f ~~~~f~~~ ~~~~,,~~ 0(1006 EHampl• 1. 00007 00008 00009 00010 00011 ; 00012 PROCEDURE program 00013 00014 1 MPV 00015 2 MPY 00016 3 ADD 00017 00018 END prograM 00019 A •ingl• aasignm•nt. A a• W * X 3L 3R lOOH + V * Z W* X y* z W* X + Y * Z ~ w 74 1 x Figure 4.2 r A Series of Assignments DFMICSUN ASSEMBLER •1(2.1 LOC 00000 00001 00002 00003 00004 00005 00006 00007 00008 00009 oooo. V•rion 1.0 OBJECT CODE 001 001 008 008 oo. oo. OOa 008 001 OOb 009 00003 00005 00006 00009 00007 00007 0000• 00008 00009 00100 00101 0:54 054 1:5f 04f 04f 05f 0:5f 04f 0:54 02f 02f 2~19 ERROR fffc0004 fffc0006 00000001 ffffffff ffffffff ffffffff ffffffff ffffffff fffcOOOa ffffffff ffffffff LINE pM, Tuesday, March 29, 1988 peg• 1 SOURCE STATEMENT 00001 ·' 00002 00003 00004 0000:5 EMampl• 2. 00006 00007 00008 00009 00010 00011 00012 ' 00013' ' 00014 ; 0001:5 00016 00017 PROCEDURE t•st 00018 00019 OUP 1 00020 DUP 2 00021 3 ADO ADD 00022 4 00023 MPV :5 MPV 00024 6 MPV 0002:5 7 ADO 8 00026 00027 9 DUP DIV 00028 10 00029 11 SUB 00030 00031 END t•st 00032 A ••ri•• of •••ignm•nts. I a• A a• X a• J a• .I + B * A K + v I ·- J 1' C + D E * I I C1 AI not••• 4R,5L 6R,7L 7R, tH 10L 8L 8R llR 9 lOR,11L 100H 101H * I, A, E1 J •r• int•rnal variabl•• I • I + 1 ; K ··K + C v B * C I D * E 1 E * I ; A • B * C + D * 1 J I A OUTPUT 1 A - E * I OUTPUT ; E -...] U"1 76 assignment statements. The program listing is shown on the next page. 4.3.3 The Absolute Function Figure 4.3 shows the dataflow graph for the absolute (ABS) function. The program listing is shown on the next page. 4.3.4 The Factorial Function Figure 4.4 shows the function. dataflow graph for the factorial The program listing is shown on the next page. 77 A 0 Figure 4.3 Tpe ABS Function DFM/CSUN ASSEMBLER el<3.1 LOC 00000 00001 00002 00003 OBJECT CODE 001 006 003 OOd 00002 00002 00003 00100 2r00 V•rion 1.0 044 fffc0001 1:5f 00000000 042·fffc0100 02f ffffffff ERROR LINE ~m, W•dnead~y, J~nuary 2, 1980 page •SOURCE STATEMENT 00001 00002 00003 00004 El<ample 3. 00005 00006 00007 00008 00009 00010 00011 00012 00013 00014 00015 PROCEDURE 123456:5 00016 1 OUP 00017 2 GE branch 9RA 00018 00019 out NEG 00020 END 1234565 The ABS fu~ctio~• >• 0 then return A if A el~& return <- Al bl"~ll''tChL, 2L brar.chR, #0 out, 100H 1(t0H A >= 0 ? YES, OUTPUT A NO, OUTPUT -A / -...] (X) 79 y N l Nl Figure 4.4 The Factorial Function DFM/CSUN ASSEMBLER .,..If.. 1 LOC 00000 00001 00002 00003 00004 0000:5 00006 00007 00008 00009 Vel"ion 1.0 OBJECT CODE 001 003 001 003 003 001 OOA 009 002 002 00001 00002 00003 00100 3ffff 00006 00008 00009 00003 00000 044 ff'f'c:0004 141' 00000000 o:s:s ff'f'c:0004 024 f'f'f'c:OOOG 01'4 ff'f'c:OOOS 0:54 ff'f'c:0007 04f' ff'f'ff'f'ff' 14f' 00000001 041' ffffffff 04f' ff'ff'ff'f'f' 2121 PM, .Tueaday, Marc:h 2'9, 1'988 ERROR LINE page 1 SOURCE STATEMENT 00001.' 00002 00003 00004 00003 00006 1 EMample 4. Calculate N! 00007 Two token• X and Y Are initialized to N and 1 reapec:tively. 00008 00009 00010 00011 ; 00012 ' 00013 PROCEDURE fac:tol"iAl 00014 DUP 2L,:5L 0001:5 2 GT 3, .. 0 ·1 X > 0 ? 3 DUP 4R,:5R 00016 00017 4 BRA 100H,7L NO. OUTPUT Y YES. :5 BRA ,G 00018 00019 6 DUP 7R,8L 7 MPY 9 y • y * X 00020 00021 8 SUB 10, .. 1 X • X - 1 00022 9 INCL 4L 00023 10 INCL 1L 00024 END factorial 00023 co 0 DFM/CSUN ASSEMBLER R>c6. 1 LOC 2•23 pM, Tue•day, March 29, 1988 Verion 1.0 OB.JECT CODE ERROR LINE ooooe. , 00000 00001 001 00002 0:5:5 fffc0006 001 00003 0:54 fffc0007 00002 00003 003 00100 024 fffc0003 OOa 00007 04f ffffffff 00004 0000:5 00006 00007 001 005 003 009 0000:5 00000 3ffff 0000:5 044 14f Of4 14f fffc0006 00000000 fffcOOOl 00000001 1 SOURCE STATEMENT 00001 ' ' 00002 ' 00003 ' 00004 ' 0000:5 ' 00007 00008 00009 00010 00011 00012 00013• 00014 0001:5 00016 00017 00018 00019 00020 00021 00022 00023 00024 00025 00026 00027 00028 page E>cample 4. ' ' ' Calculat• N! Two tok•n• X and V are initializ•d to N and 1 re•pectiv•ly. PROCEDURE factorial DUP 3 DUP e. 4 7 1 2 s 8 4R, :5R 7R,8L LOOP BRA MPV END 100H,7L 9 LOOP DUP GT BRA SUB END 2L,5L 3,tt0 ,6 lO,ttl END factorial CXl 1-' Chapter 5 Conclusion 5.1 Future development The construction of a practical large project. dataflow computer tested picture of structure, independently. a a However, due to the asynchronous behavior of the dataflow computer, each component can be and is dataflow operation and developed This report gives a complete computer. It describes the programming of DFM/CSUN. This project can be followed by the following graduate projects (or senior projects): ( 1) a design of the DFM/CSUN Switch (2) a design of the DFM/CSUN Token Queue (3) a design of the DFM/CSUN Matching Store (4) a design of the DFM/CSUN Instruction Store (5) a design of the DFM/CSUN PE Queue (6) a design of the DFM/CSUN PEs (7) an implementation of the DFM/CSUN Switch ( 8) an implementation of the DFM/CSUN Token Queue ( 9) an implementation of the DFM/CSUN Matching Store (10) an implementation of the DFM/CSUN Instruction Store (11) an implementation of the DFM/CSUN PE Queue 82 83 (12) an implementation of the DFM/CSUN PEs (13) a DFM/CSUN dataflow computer simulator (14) a high level dataflow computer language compiler (15) the utility programs of the DFM/CSUN computer The first 12 projects are suitable for those students who major in Computer Engineering, and the last 3 projects are suitable for the Computer Science majors. funding With the proper and scheduling, we expect the DFM/CSUN to operate in the near future. REFERENCES 1. Arthur H. Veen, 'Dataflow Machine Architecture' ACM Computing Surveys, Vol. 18, No. 4, December 1986. 2. David Salomon, 'Semester Project: A Data Computer', lecture notes, California University, Northridge, Spring 1987. Flow State 3. Ian Watson, John Gurd, 'A Practical Data Computer', IEEE Computer, February, 1982. Flow 4. D. D. Gajski, D. A. Padua, D. J. Kuck, R. H. Kuhn, 'A Second Opinion on Data Flow Machines and Languages' IEEE Computer, February, 1982. 5. Jean-Loup Baer, Computer Systems Computer Science Press, N. Y., 1980. 84 Architecture, Appendix A Semester Project: A Data Flow Computer (ref. 2) 85 86 Semester Project COMP222 . Spring 1987 A Data Flow Computer On a computer and in a language of your choice, design and implement a simulator for the data flow computer describW below. Note that the description is not complete. Some items are left out, such as the input to the simulator, and the output that it generates; those are left for you to specify. The 0\·erall Architecture The machine is designed as a ring with stations embedded in it. It can'also be visualized as a graph with nodes connected by arcs. The concept of a token is central to data flow architectures. A token is similar to the familiar concept of instruction operand in a von-Neumann machine . I .............. --·----- ·········... ... .,.. Fig. 1 Ring Diagram Since the data flow machine is experimental, it uses a host computer to provide essential services. The host does things such as Input/Output, compilation, and interrupt handling. The host can be any computer and the only host operation that needs to be simulated is the initialization described below. A good way of understanding the operation of the data flow machine is to visualize the tokens flowing along the arcs from node to node, triggering (or flring) instructions. The process starts when a token (or several tokens) are sent by the host, through the switch, to the token queue. The queue is FIFO and the oldest token in it is sent to the Matching Store (MS) every machine cycle. The token can stay in the MS-waiting for a matching token, it can match itself to another, waiting, token in the MS. or it can completely bypass the MS (by going directly from TQ to the IS on the dashed arc above). Matching is done by the destination and label fields (see below). The token (or pair of matching tokens) coming out of the MS arrives at the Instruction Store (IS) and attaches itself to a particular instruction. The result, token(s) plus instruction, is called a packet and is routed to the Processing Elements (PEs) which are like ALUs in a conventional computer. The packet may have to wait in the packet queue until aPE becomes available. Evetually, an available PE is assigned to the packet and it executes it, generating a result. The result is I or 2 tokens which either go back to the host-through the switch-or go to the queue, to start another round through the ring. The process continues until there are no more tokens in the ring. The Software A program consists of a graph, tokens, and instructions. The graph is used by the programmer or by the compiler to generate the instructions, which are then stored in the IS, and the-tokens, which are stored in the host's memory. dau no"' project 87 The format of a token is Tokens value aaaaaabbcd destination label 32 10 18 36 Fig. 2 Token fonnat There are 4 fields: Value: Can be of different data types. It is the value of the operand that will eventually be operated on by the instruction. Destination: The destination address of the token. It is either the address of an instruction in the IS or an address in the host's memory, depending on c below. Label: Used to match tokens in the MS. Type & Control: Contains 4 subfields: aaaaaa- the code of the data type of the token (integer, real, ... ). bb - MS function. 00 =bypass MS and go directly to the IS. 01 = look for a match in MS; if found, both matching tokens go together to the IS. If no match, wait in the MS for a matching token. c -destination of token. 0 =IS 1 = Host memory. d- 'handedness' at IS. 0 = token is left input of instruction or N/A. 1 = token is right input of instruction. Details of Operation There is an initialization phase in which an ordinary program, running in the host, prepares the initial tokens. The program is a compiler that reads a source flle and prepares the initial tokens and the instructions. The last two steps in this phase are: 1. To store the instructions in the IS (the date path for this is not shown in the diagram). 2. To start the data flow machine by injecting the initial tokens from the host memory to the ring (through the switch). When a token arrives at the MS it performs one of the three operations above (fmd a match, wait for a match, or bypass), depending on the value of its bb field. From the MS, the 2 matching tokens (or just 1 token) continue to the IS and attach themselves to the instruction at the address specified by their desri!Ultion fields. One token becomes the left operand of the instruction and the other, the right one, according to their d fields. Notice that the d fields of a matched pair must be different. The simulator should check this as well as other possible errors. From the IS, an instruction plus token (or 2 tokens) continues, as a packet, to the packet queue. That queue is also FIFO and, when aPE becomes available, the oldest packet in the queue is sent to it for execution. The execution results in 1 or 2 new tokens being generated and sent to the switch. Each new token goes either to the host memory (If it carries a fmal result) or to the MS (to continue the loop), depending on its c field. Instructions The fonnat of an instruction is OpCode 12 Destination 18 xbbcdbbcd dest or literal 9 32 Fig. 3. Instruction fonnat There are 4 fields: OpCode: The different opcodes are listed below. · Destination: The destination address of the first result token. It is either the address of an instruction in the IS or an address in the host's memory, depending on c. Des! or literal: Same for the second result token. However, if x below is 1, there is only one data flow project 2 88 result token and this field contains a literal used by the instruction (as a right hand operand). Control: Contains 3 subfields: x - the desr or literal field is either a second token (x=O) or is a literal used by the instruction (x=] ). bbcdbbcd- those become the bbcd fields of the two output tokens. However, if x= l (no second output token) the second bbcd is unused. lnst ruction Set Mne- OpCode IDQ!1k #of II of i.mrnls 1 1 ID!!m11.S 2 1 or 2 1 of 2 DUP INCL 0001 0002 BRA 0003 2 EQ 0004 2 GT GE MPY 0005 0006 0012 2 2 2 ADD DIY SUB NEG 0010 0013 0011 0014 2 2 2 1 Description generates 2 outputs, identical to the input token label of input token is incremented by 1 and sent to outputs which are otherwise identical to input. the I st input is copied into either the I st output or the 2nd one, according to the 2nd input, which should be boolean. if left_input:::right_input, output has value =true (it is boolean), and label=O. if left_input>right_input, output is as above. if left_input.aight_input, output is as above. the output token is identical to the 2 input tokens, except its value field is the product of the values of the inputs. same as above only adds divides subtracts output is the 2's complement of the input Note: The first input operand is always a token. The second one may be a token, a literal, or may not exist. Timing time Cns) Operation Switch-> queue queue-> IS (bypass MS) queue->MS access MS: extract matched token store token to wait for match MS->IS access IS (time it takes to generate packet) IS -> PE queue PE queue-> PE DUP 1NCL BRA, EQ, GT, GE 200 210 220 230 320 240 250 . 0 300 1500 1000 2500 8000 9500 2200 190 MPY DIY ADD, SUB, NEG PE-> switch Implementing the Data Flow Simulator Timing is the key to a successful implementation. The entire project, in fact, is an example of a event driven simulation. A clock with the current time should be maintained by the simulator and each operation carried out when its time has come. As an example we will follow part of the life dat.a flow projeca 3 89 of a token from the moment it enters a PE. Suppose the current time is 2000 and the simulator has started a DUP instruction (with our token as input) at this point. The DUP instruction takes I 500n5 so, in the real machine, its outputs would be put on the proper arc at time 3500. The simulator generates the outputs immediately and insens them into a list, each with a time value of 3500 attached. The list contains future tasks, each a token with a ty{Je and a time value attached. The time values are the maturity (or firing) times of the tasks. The type -tells where the task currently is in the ring. Next the simuJator looks for more tasks, on the list, to be executed at the present time (=2000). If there are any, they are executed and their outputs put on the list with their maturity times. If there are no more tasks to be executed at time 2000, the list is searched for the task with me smallest maturity time. The clock is then reset to that time and the task executed. If the list is empty, the simulation terminates normally. At time 3500 our tasks would be extracted and handled by the simulator. Handling, in this case, involves sending them from the PE to the switch (190ns) and changing the PE status to ready. They are not actually senL Rather, they are put back on the list with time values of 3690 and the appropriate type. At time 3690 they would be discovered again on the list, extracted and handled according to their new types. This time the types say that the tasks are at the switch. They should be sent either to the host memory or to the token queue. A token sent to the host memory is actually stored in that (simulated) memory and is taken off the list. Such a token represents a final result and will not be sent back to the main loop. A token sent to the token queue is put back in the list with a time value of 3690+200=3890 and the appropriate type. At time 3890 such a token should be entered into the token queue (a FIFO queue, independent of the main list and implemented as a circular array or some other appropriate data strUcture). After passing through the token queue, the token emerges on its way to the MS or straight to the IS. It is put back on the list, with a time value 2 I 0 or 220ns in the future. · The function of the token queue (TQ) is to regulate the flow of tokens to the MS. The }.1S can only do one thing at a time, so tokens should be sent from the TQ to the MS one at a time, each one sent when the MS has finished with its predecessor. The MS should thus have a status bit with busy/ready states such that the simulator will only send TQ->MS when status is ready. We thus arrive at the following set of rules for the simulator. 1. Find a task, on the list, with the smallest time value and reset the clock to that value. 2. Extract and execute all tasks on the list with time values=current time (if any). Notice that executing certain tasks means sending them MS->IS which should change MS status to ready. 3. Examine TQ. If it is empty, go to step I. If oldest token in TQ should go to the IS (bits bb=OO) then send it there (by storing it in the list with time value 21 Ons in the future). If the oldest token should go to the MS (bb=01) then send it there only if MS status=ready. This involves storing the token in the list with a time value 220ns in the future and setting MS status to busy. If anything has been sent out of the TQ, increment the clock by one and go to step 2. As a further example lets say that the current time is 4500 and the simulator is at step 3 above. It examines the oldest token in TQ and fmds that it should go to the IS (i.e. put back on the list with time value 4500+210=4710). The clock is then incremented to 4501 and, now in step 2, any tasks for time 4501 are executed. Proceeding to step 3, say the oldest token in the TQ should now go to the MS. If MS status=bu.sy, the simulator should go to step 1 -.vithout extracting that token from the TQ. If, however, MS status=ready, the token is read from the TQ at time 4501 and put back in the list with time value 4501+220=4721. The token is now on its way to the MS and will arrive at time 4721. MS status, however, is set to busy now, at time 4501. At time 4721 the token is picked up from the list with a type that means: just arrived at MS. The simulator then searches the MS for a match. If a match is found, both matching tokens are put, as a pair, in the list with time value 4721+230=4951. They will emerge, at time 4951, on their way to the IS (MS status should be changed, at time 4951, to ready) and will arrive there at time 4951+240=5191. If no match is found, the token goes back to the list with time value 4721+320=5041. When it emerges, at time 5041, it will be stored in MS, waiting for a match. At that time, the sirnuJator should change MS status to ready. This process is executed by the main loop of the simulator and is driven by the types of the tasks and by the current time. Each time a task is executed, an output token or two are put on the list. Each output is put on the list once. Searching the list, however, is done several-perhaps many-times after each task, to dot.a flow proje<:l 4 90 make sure that no tasks remain to be executed at the present time. This suggests ku:ping the list sorted by the time values. lnscning a new task into such a list requires searching and takes an average of N!l steps (however, if you use an array to implement this list, you might be able to use a binary search which takes, on the average, log 2N steps). Finding a task with the smallest time value, however, takes a single step. The list, in fact, becomes a priority queue; a data structure that can be implemented in a number of ways (soncd list, unsoned list, panially ordered tree). Another important feature of our list is the nature of its elements. Each element stored in the list is a task. A task is usually a token but it can also be a pair of tokens or a packet. A packet is an instruction plus its input token (or two input tokens). In addition the task contains a time value and a type. We are thus dealing with a list whose elements have·'bifferent lengths. One possible implementation is variant records. Another is a list (or an array) where each component contains the time value and a pointer to where ther rest (the variant pan) is stored. The rest can be stored in variant records or in 4 arrays, one for tokens, one for pairs of tokens, a third one for packets with one input token, and a fourth one for packets with two. If a task if found on the list with a time value less than the current time, the simulator should print an appropriate error message, skip the task, and continue. Initially, the list is empty. To stan the simulation, the earliest tasks must be insened into the list, each with a time value of 200. This is done by an initialization routine which also sets the clock to 0, sets the status of all PEs to ready (see below) and stans the main loop. The earliest tasks concern the tokens sent from the host's memory. They should be sent to the MS (through the token queue) and those that do not have to wait, to the IS and on (as packets), to the PE queue, on their way to the PEs. The simulator contains an array PE where each element contains the status of a PE, namely busy/ready. The PEs are checked each time a decision is made to update the clock, just before it is incremented. When a PE becomes available, the simul:!tor changes the PE's status to busy, generates the output tokens and puts them on the list as tasks, each with the correct time value as mentioned above and with the right type (plus, of course, the usual fields of value, destination, label, etc.). When one of those tasks matures, the simulator extracts it from the list and handles it by routing it to the switch. At that point, the simulator should also change the status of the PE back to ready. A word regarding the IS. We assume that the IS is parallel. Input tokens can be sent to it at any time and when such a tokeri (or a matched pair) arrives, it takes exactly 250ns to prepare a packet, regardless of how many packets are currently in preparation. This simplifies the simulator as there is no need to keep track of an IS status bit. Examples The examples range from trivial to simple. Each example contains: a sequential algorithm, a data flow graph, a listing of the instructions, and a listing of the tokens. Example 1. A single assignment w X y z A:=W*X+Y*Z Graph 1 The instructions are: addr operation first output host Md!:UR 1 2 3 MPY MPY ADD 3 3 100 L R second output 1i! addr LLR none yes dala no•• project s 91 And the tokens: ~ Addr lJR llilm".t ~ X l R wait 0 W l L " 0 'i 2 L " 0 Z 2 R Example 2. Several assignments 0 c K B D E I:=l+l; A:=B*C+D*E; X:=A-E*l; I:=K+C; 'i:=I/A; Graph 2 y X The dashed line means the assignment I =K+C should wait until E *I is executed. This introduces an unnecessary complication which is best removed by using unique variables. We therefore change the program to c B D E I K I:=I+l; A:=B*C+D*E; X:=A-E*l; J:=K+C; Y:=J/A; Graph 3 y X and this version is easy to implement . The instructions are: addr operation 1 DUP first output host .a.d.Qr !dR 4 R second output or literal lit .iilldr !dR 5 L dau flow projecl 6 92 DUP ADD ADD MPY MPY MPY ADD DUP DIV SUB 2 3 4 5 6 7 8 9 10 11 6 7 10 8 8 11 9 10 100 101 7 R R L yes + 1 a literal L L R R L 11 R L yes yes And the tokens: m L.!B K 4 c 1 5 6 2 3 L L value B D E I R L L L ~ ~. wait bypass wait bypass 0 0 0 0 0 0 Example 3: Decisions. We first introduce the conditional branch instruction BRA. It is an imponant instruction, used for both decisions and loops, and it has a simple syntax (graph 4). The input on the right must be boolean. If it is true, the main input X (can be of any type) is passed through to the T output, otherwise X is sent to the F output. The example itself is the ABS funtion (graph 5), defined by ABS:=if A~ then A else -A; A X boolean Graph 4 Graph 5 The instructions are: addr operation 1 2 3 4 DUP GE BRA NEG first output host mLLR 3 3 4 100 second output or literal lit m 2 yes 0 100 L R L LlR.. hQSl L yes yes And the single token: value .add!: UR ~ Label A 1 L bypass 0 dAta flow project 7 93 Example 4: Loops. The example calculates N! by repeatedly multiplying values from N down to 1. Two tokens X, '! are initialized toN and 1 respectively. Y=l X=N F Graph 6 There are two loops, the first g6es through nodes 1,2,3,5,6,8 and generates new values of X (N 1 N-1 1 • • • 1 2 1 1) . The second goes through nodes 4,7 and generates new values of Y ( N1 N (N-1) 1 • • • 1 N!) . The second loop contains a MPY instruction and is therefore slower; the MPY instruction always has to wait for its left input. However the first, faster, loop does not have to wait for the second one. It can race ahead and generate tokens that accumulate and wait in the matching store. The boolean tokens sent on arc Q, from instr. 3 to instr. 4, accumulate and wait for a matching value of Y to arrive together at instr. 4. Also the tokens racing on arc z (from 6 to 7) accumulate and wait in the MS for a matching Y value to arrive at 7 together. The two initial tokens are: value addr UB_ Mns!ore N 1 L 1 4 L ~ bypass 0 wait 0 And the instructions: addr operation 1 2 3 4 5 6 7 8 9 10 DUP GT DUP BRA BRA DUP MPY SUB INCL INCL ftrst output host addr UR 3 L 3 L 4 R 100 yes 7 4 R L 1 L second output or literal li1. addr L1R host 2 L yes 0 5 R 7 R 6 8 L L yes +1 d&t.a flow project 8 94 At the final loop. the >0 instruction at 2 generates an F output token. 1t is sent to the BRAs at 4 and 5. Since the BRA at 5 is pan of the faster loop. it executes first and, because of the w;~y we wrote it, generates on output. The program, however, does not terminate at that point. The sluw loop is still running and the F going to the BRA at 4 has to wait in the matching store. When it is finaly matched, the pair goes to 4 and then to 7 for the last execution of the loop. The most imponant feature of this example is the use of the labels. The labels are used to distinguish between the tokens generated by the successive iterations of the loops. The two INCL instructions at 9 and 10 increment the labels of the new tokens right after they are generated. Those new tokens then go back, to be used in the next iteration. Since some of them have to wait in the MS, matching must be done both by address and label. It is no longer enough to match by address alone. If a token-going to the MPY instruction at 7-<:omes to the MS, it should match itself to another token going to 7. At any time, however, there may be many tokens with destination 7 waiting in the MS (that's because the MPY instruction is slow). Our token has to match itself to that token going to 7 that has the same label, which means, corresponds to the same iteration. Tests The simulator should be tested extensively. There should be several test programs (could be the ones above with at least one non-trivial written by you) and all the error messages should be tested. Grades The results should be turned in in two phases. The first phase (wonh 15 points) should include the complete simulator written but not tested; the second phase (wonh 20 points) is the final one, including all test runs. The due dates are: 151_ _ _ _ _ _ _ ; 2nd _ _ _ _ _ _ __ data now prOJeCI 9 Appendix B Reserved Words And Special Characters Certain words and special characters are reserved for DFM/CSUN assembler, and can not be use as the symbols. The following is a list of DFM/CSUN reserved words: ADD ADDRESS AND BRA COM COPY CYCLE DIV DUP END EQ GE GT IN INCL LISTON LISTOFF MPY NEG OR OUT PAGE 95 96 PROCEDURE SUB SYNC TITLE XOR Appendix C Source Listing 97 98 #include <stdio.h> #define #define #define #define #define MAXLINE 160 YES 1 NO 0 TRUE l FALSE 0 char buffer{S][MAXLINE]; char line[MAXLINE], linel [MAXLINE], date[MAXLINE], line3[MAXLINE], line2[MAXLINE]; char element[7][30]; char cycle[30]; char proc[ 30]: int total ele; char program[20], object f[20], listing_f [ 20]: char object, listing; char in_proc, cycle name, in cycle; long adaress; int page; int line_count; FILE *fp obj, *fp-lst, *fp-sym, *intp, *fp_passl, *fp_pass2, *fp_tmpl, *fp tmp2, *fp-tmp3, *fopen(); I* temperary buffer I* temperary string I* temperary string I* date I* temperary string I* temparary string I* parsed elements I* cycle name I* procedure name I* total number of parsed elements I* input program file name I* output object file name I* output listing file name I* 1: need object file I* 1: need listing file I* 1: in a.procedure I* 1: cycle name latched I* l: in a cycle statement I* RAM location counter I* page number I* line counter I* file pointer of output object file I* file pointer of output listing file I* file pointer of symbol table file I* file pointer of input file I* file pointer of pass I scratch I* file pointer of pass II scratch I* file pointer of temporary scratch I I* file pointer of temporary scratch II I* file pointer of temporary scratch III I* pointer of fopen() function static char res table[24][32]1* reserved words - Function I* Mnemonic OpCode Name of Instruction Data Movement DUP 001 Duplicate MPY ADD DIV ooa 008 OOb Multiply Add Divide Arithmetic *I *I *I *I *I *I *I *I *I *I *I *I *I *I *I *I *I *I *I *I *I *I *I *I *I *I *I *I *I *I *I *I 99 Logical Input/Output SUB NEG 009 OOd Substraction 2's Complement AND OR XOR COM 010 011 012 013 And Or Exclusive Or l's Complement IN OUT 040 041 Input Output INCL BRA EQ 002 .003 004 GT 005 GE 006 SYNC 007 Increment Label Branch Compare and Relation is Equal Compare and Relation is Greater Than Compare and Relation is Greater Than or Equal Synchronize Program Control { "A "B "C "a } PROCEDURE \0", END \0", CYCLE \0", 001\0", DUP "c "d "e "f MPY ADD DIV SUB OOa\0", 008\0", OOb\0", 009\0", "g "h "i "j NEG AND OR XOR OOd\0", 010\0", 011 \0", 012\0", "k COM "1 IN "m OUT "n INCL 013\0", 040\0", 041\0", 002\0", "o "p "q "r 003\0", 004\0", 005\0", 006\0", BRA EQ GT GE "s SYNC "* ; 007\0", \0" *I 100 /************************************************************************ * * • * module name: main description: main routine input: argc argv output: none • • globals referenced: none * globals modified: none • • •* • • * * • number of arguments - arguments • • •* • • • • • • • * * *************************************************************************/* * main(argc, argv) int argc; char *argv[]; { Initialization(); ReadOption(argc, argv); OpenFiles(); Passl(); Pass2(); Pass3(); } CloseFiles (); 101 /************************************************************************ ** ** module name: BlankLine description: Initialize a line to blank and end with a car rage return * * ** * * * * * ** input: str size output: none globals referenced: none ** * * * * * * * * * * * * * * * ************************************************************************/* globals modified: none BlankLine(str, size) char str(]1 int size1 { int iJ ) for ( i=01 i <=size-21 i++) str[i] = I I ,• str[size-1] = 1 \n 1 1 str[size] = 1 \0 1 1 * ". 102 /************************************************************************ • * • * module name: CloseFiles * description: Close all the files opened during the assembling* * input: none output: none t •* * * * * * globals referenced: • infp object fp obj fp-lst fp:::sym listing * * * * * * * * * * * * * * * globals * * none • modified: * * * ************************************************************************/ * * * CloseFiles () { fclose(infp); if (object == YES) fclose ( fp_obj); if (listing == YES) fclose(fp_lst); } fclose(fp_sym); 103 /************************************************************************ * * * * ** * * * * * * * * module name: EnterNewSymbol description: Enter a symbol into the symbol table input: none output: none globals referenced: * * * * * * * • linel total_ele proc element address fp_sym * * * * * * * * * * * * globals * * linel modified: * * line2 * * address * * * * ************************************************************************/ EnterNewSymbol() { int i,j,k: char offset: long addr: offset= '1'7 if (linel[60] == '1'){ for (k=2: k<total ele: k++) { i = 3 + k j = 627 * 141 while ( (linel{i] -- linel[j]) && (i <= 14 + k * 14) if (linel[i] == ' '){ offset += 17 i = 15 }else{ ) + k i++: j++: ) ) if (offset != '1') linel[60] = 'i' 7 BlankLine (line2,60)7 * 14 7 104 StripStr (1ine2, 1, proc); StripStr (1ine2, 15, e1ement(O]); 1ine2[30] = offset; ToHex (address, 1ine2, 36, 40); address= address+ offset- 'O'; } fputs (1ine2,fp_sym); 105 /************************************************************************ • * * * module name: EnterSymbolRef • • • description: Enter symbols into the symbol reference file input: seq output: none • •* • • • • • • •* • •* global a referenced: * •* • • * • • total ele element linel proc line2 fp_pass2 globals modified: • * * * * * * * * line2 *************************************************************************/* EnterSymbolRef (seq) int seq; { int i, j, k; for (i=O; i<total ele; i++) if ( (element[I][O) 1= 'I') && ·(element[i][O) 1= '\0') && (element[i)[O) 1= 1 ' ) && (linel[(i+l)*l4+1) 1= 'B') ){ BlankLine (line2,44); StripStr (line2, 1, proc); j = 17; while (linel[j+l4*(i-l)] 1= 1 ' ) { line2[j-2] = linel[j+l4*(i-l)]; j++; ) ToAscii (seq, line2, 36); line2[41] = '. '; line2[42) = i + '0'; fputs (line2,fp_pass2); if (i==O) i++; ) ) 106 /************************************************************************ * • •* • • * • module name: GetDecimal description: Get a decimal value from the input string str input: str start delimiter * * • output: an integer • globals referenced: none globals modified: • • • •* none • * • • * * * * * * * * * • •*********************************************************•***•**********/• * int GetDecimal (str, start, delimiter) char str[]: int start: char delimiter: { int i, result: result = O: for (i=start; str[i]!=delimiter: i++) 0 result = result * 10 + str[i] return (result); - ) . I I; 107 /************************************************************************ ** * * * * * module name: HostAddress de script ion: Move a host address to string s input: m m_start s start * * * •* •* * - output: s globals referenced: none ** * * * * * * * • • • • • • globals modified: none * * *************************************************************************/* HostAddress (m, m start, s, s_start) char m[ ] , s [ J; int m start, s start; { - - int i, j, k; for (j=s start; j<=s_start+4; j++) S [ j J -;; - I 0 I J i = m start; while-(m[i] I= i++; 1 1 ) i--; j = s start +4; for (k=i; k>=m start; k--){ s[j] = m[kJT j--; } } 108 /********************************************************************•••· ** * * * * * * ** * * * module name: Initialization() description: Initialize the assembler input: none output: none globals referenced: fp_tmpl ** * * * * * * * * * * * * * * * globals modified: fp tmpl * in::Jnoc * in cycle * adaress * page * * line_count * * date * * * * ************************************************************************/ Initialization() { in_proc = N01 in cycle = N01 adaress = 01 page = 01 line count = 55; system ("as2/l > xxxxxxxx.tim")1 if( (fp tmpl = fopen("xxxxxxxx.tim", "r")) printf("\nCan't open time file"); exit()1 } fgets (date, MAXLINE, fp_tmpl)1 fclose(fp_tmp1}1 } NULL} { 109 /************************************************************************ * * * * * * * * * ** input: none output: YES or NO * globals referenced: * * module name: LineNotComment description: Return 0 if one of the following conditions: 1. contains only spaces and tabs 2. the first nonblank character is a exclamation point or a semicolon ** * * * * * * * * * * * * line * ** globals * none modified: * * * * ************************************************************************/ int LineNotComment() { int i: for (i=O: line[i]l= 1\0 1; i++) i f ( (line[i] I= 1 1) && (line[i] I= 1\t 1) ) break; (line [ i] == I \0 I ) 1\n I ) (line[i] (line[ i] == I I I ) (line[ i] == I ; I ) return (FALSE); else return (TRUE); if ) ( :II ) 110 /************************************************************************ • • Match • module name: • • description: • whether input Determine two strings are matched * • or not • • • • input: s • • m • • • • a char 0: not match • output: 1: match • •* • • • globals • none • referenced: • • globals • • none • modified: •* • • ************************************************************************/ char Match(s,m) chars[], m[]; { int i; } i = 0; while (s[i] == m[i+2]) if ( (s[++i] == '\0') (m[i+2] == ' ') return(YES); return(NO); && 111 /************************************************************************ * * * module name: MoveAddress * Copy an address from string s to string m * ** description: * * input: m s ** output: m * globals referenced: none globals modified: none * * * * * * * * * * * * * * * ** * * * ************************************************************************/ MoveAddress (m, s). charm[], s[]; { int i, j; i f (s[42]== 1 0 1 j = 0; ) else if (s[42]=='2') j = 12; else if (s[42]== 1 3 1 j = 25; ) for (i=O; i<=4; i++) m[j+i] = s[30+i]; } i f ( 5 [ 4 2] : : I 3 I ) m[25] = m[25] + 'c 1 - 1 0 1 ; 112 I************************************************************************ * .. •* •* • • • • • module name: OpenFiles description: Open files for the assembler input: none * * output: none •* • * •* • globals referenced: fp obj inlp listing object_f program • * * * * * * * * • • * * globals • modified: * infp * * object f • * fp obr • * listing_f * * * * *************************************************************************I* OpenFiles() { int i; I* index for do loop if( (infp = fopen(program, "r")) ==NULL){ printf("\nCan't open \s as the input",program); exit(); ) i = strlen(programl - 1; if (object == YES){ strcpy(object f, program); object f[i) =-'o'; if( (fp obj = fopen(object f, "w")) == NULL){ printf("\nCan't open \s-as the object file", object_f); fclose(infp); exit(); } ) if (listing == YES){ strcpy(listing f, program); listing f[i] =-'1'; if( (fp-lst = fopen(listing f, "w")) ==NULL){ printf( "\nCan It open \s as the object file", listing_ f); fclose(infp); if (object == YES) fclose(fp obj); exit ( ) ; } } *I 113 if( (fp sym = fopen("xxxxxxxx.sym", ~w")) ==NULL){ printf ( "\nCan' t open symbol table file"); exit(); } printf ("\nprogram name } /* \s \s \s",program, Test OpenFiles(); */ listing_f); object_~, 114 /************************************************************************ * • • • • • • • • •* • • • • • module name: ParseLine description: parse an input line into recognizable tokens input: none output: none globals referenced: line globals modified: total ele element • • • • • • • • • • • • • •************************************************************************/• * ParseLine() { int i, j, k; for (i=O; line[i]l='\0'; i++) i f ( (line[i] I= ' ') && (line[i] I= '\t') ) break; for (k=O; k<=3; k++) element[k][O] = '\0'; total ele = 0; j = oT k = 0; for (; ((line[i]l='\0') && jline[i]l='\n')) ; i++){ i f ( (line[i] == ';') I (line[i] == 'I')) break; else i f ( (line[i] -(line[i] == I \t I) (line[i] == I I I ) (line [ i J == I while ( (line[i+l] ' ') II (line[i+l] == I \t i++; j++; I I ) I I II ) ) { k = 0; }else{ element[j)[k++] = line [ i]; element[j][k] = '\0 I; total_ele = j + 1; } } for (i=O; i<total ele; i++) printf("\ntoken-1 \d = \s",i,element[i]); } printf("\n"); I) ) 115 ..•• /************************************************************************ • • • • • •* * * • * * • * * • modu:).e name: Passl description: Pass I of the assembler input: none output: none globals referenced: globals . modified: • • •* * * * fp_passl fp_pass2 •* fp_passl fp_pass2 * * * • •************************************************************************/* Passl() { int i, char key; if( (fp_passl = fopen("xxxxxxxx.pal", "w")) == NULL){ printf("\nCan't open symbol table file"); exit(); ) if( (fp_pass2 fopen("xxxxxxxx.pa2", "w")) == NULL){ printf("\nCan't open symbol table file"); exit(); ) i = 0; while ( ReadStatement() I= NULL ){ i++; if ( LineNotComment() ){ ParseLine(); printf(" Value= \c",key=SearchResWord()); Passl body ( SearchResWord(), i ); }else fputs ("XO comment line\n\O",fp_passl}; ) } fclose(fp_passl); fclose(fp_pass2); {1 116 /************************************************************************ * * * * * •• •* • • • module name: Passl_body description: Body of the Assembly pass I process input: key seq output: none globals referenced: * * • * * * * globals modified: •* * * * * * * * * * * element in_proc in cycle cycle_name * * * * * * * * * * linel cycle in_proc proc in cycle. cycle_name· * * * * * * * ************************************************************************/ Passl_body(key,seq) char key; int seq; { . int i, j, k; BlankLine (linel,79); linel[O] = key; linel[l] = total_ele + 1 0 1 ; for (i=O; i<total ele; i++) StripStr (linei, (3 + 14 * i), element[i]); if ((key >= I I aI ) && (key <: 9 I )) { if (in cycle == YESj{ if (cycle name == NO){ strcpy(cycle,element[O]); cycle_name = YES; } linel[60] = } 1 1 1 ; StripStr (line, 62, cycle); RefineOperand (linel, 31); RefineOperand (linel, 45); EnterNewSymbol(); /* indicate is in a cycle */ • 117 EnterSymbolRef (seq); )else switch (key) { case 'A I: I* I* I* I* I* I* I* I* I* I* I* I* I* I* I* I* I* I* I* a DUP b COPY c MPY d ADD e DIV f SUB 9 NEG h AND l OR j XOR k COM 1 IN m OUT n INCL oBRA p EO q GT r GE s SYNC I* A PROCEDURE NO){ in_proc = YES; strcpy (proc,element[l]); )else{ I* error i f ( in_proc == ) break; case 'B': I* BEND if ( in cycle == YES){ I* Add a new entry in symbol table in cycle = NO; )else-if ( in_proc == YES){ in_proc NO; }else{ I* error } break; I* C CYCLE case • c•: i f ( in cycle == NO) { in cycle = YES; No, cyCle name }else{ I* error } break; case -1: I* error break; case -2: I* error break; default: I* error break; } ) fputs (linel,fp_passl); *I *I *I *I *I *I *I *I *I *I *I *I *I *I *I *I *I *I *I *I *I *I *I *I *I *I *I *I *I 118 /************************************************************************ * * ** ** ** ** * * * * * ** * . module name: Pass2 description: Pass 2 of the assembler input: none output: none globals referenced: globals modified: * * •* * * * * * * * * * •* • fp sym line fp tmpl fp-tmp2 fp:tmp3 • • * * * * line linel fp tmpl fp-tmp2 fp:tmp3 •* * * • * ************************************************************************/ Pass2() { int i; char same; fclose ( fp sym); system ("sort < xxxxxxxx.sym > xxxxxxxx.syl")l system ("sort < xxxxxxxx.pa2 > xxxxxxxx.pa3")l if( (fp tmpl = fopen("xxxxxxxx.syl", prinff("\nCan't open symbol table exit() 1 } if( (fp tmp2 = fopen("xxxxxxxx.pa3", prinff("\nCan't open symbol table exit(); } if( (fp tmp3 = fopen("xxxxxxxx.pa4·", prinff("\nCan't open symbol table exit(); } "r")) ==NULL){ file"); "r")) ==NULL){ file"); "w")) ==NULL){ file"); strcpy(linel, "xxxxxxxxxxxxxx\n\O")l while ( fgets (line, MAXLINE, fp tmp2) I= NULL){ same = YES; for (i=l; i<=27; i++) if (line[i] != linel[i]){ same = NO; i = 28; } 119 /************************************************************************ * * * * * * * * * * * * * * * * * * * * * * * * * * * * * description: Pass 3 of the assembler * * input: none * * output: none * * globals * infp referenced: * res table * line * line2 * fp tmpl * fp-tmp2 * fp::::lst * * globals * modified: infp * line * linel * line2 * line3 * fp tmpl * fp::::tmp2 * *************************************************************************/* module name: Pass3 Pass3() { . int i, jJ char its matchJ int count; long literalJ fclose(infp)J if( (infp = fopen(program, "r")) ==NULL){ printf("\nCan't open \s as the input",program)J exit()J } if{ (fp tmpl = fopen{"xxxxxxxx.pal", "r"jj =:::.: NULLj{ printf("\nCan't open symbol table file") J exit()J } if( (fp tmp2 fopen("xxxxxxxx.paS", "r")) ==NULL){ printf("\nCan't open symbol table file")J exit()J } i = OJ fgets (line3, MAXLINE, fp tmp2)J count GetDecimal (line3~ 36, '.')J while ( fgets (line, MAXLINE, fp_tmpl) != NULL){ i++; if (line_count >= 54) 120 Top(); BlankLine (line1,48); linel[47) = ' '; if ((line[O) >= 'a') && (line[O) <= 's') ){ strcpy(linel, "fffff fff 3ffff lff ffffffff\0"); linel[30) = 1 'J ·,_ its match = NO; j --o, while ( (its match == NO) && (res-table[j)[O) J:o 1 *') l if (line[i] == res table[j)[O)){ its match YEST linel[ 8) =res table(j](l2); linel[ 9) res-table[j)[13); linel[lO) res-table[j][14]; }else j++; while (i == count){ MoveAddress (line1, line3); fgets (line3, MAXLINE, fp tmp2); count= GetDecimal (line3; 36, '.'); } if (line[43] == 1 H1 ) { HostAddress (line, 31, linel, 12); line1[19) = '2'; )else if (line[43) == 'R'){ line1[19] = '5'; }else if ( (line[43] == 'L') II ((line[43] == 1 ' ) && (line[31) != ' ')) ){ line1[19) = '4'; ) if (line[45] == 'I'){ literal= GetDecirnal (line, 46, ' '); ToRex (literal, linel, 22, 29); line1(18] = '1'; )else{ line1[18] = '0'; if (line[ 57] == 'H' ){ RostAddress (line, 45, linel, 25); line1[25) += 'c'; line1[20) = '2'; }else if (line[57) == 'R'){ line1 [ 20) = '5' ; }else i f ( (line[57] == 'L') ((line[57) ==' ') && (line[45) I=' ')) ){ line1(20) = '4'; } } ) ToAscii (i, line1, 41); fgets (line2, MAXLINE, infp); concat (line1,line2); II 121 fputs (linel,fp 1st); line_count++; } if (line count >= 51){ Top( >T fputs ("\n\n\nAssembly complete\n\O",fp_lst); } } fclose(fp tmpl); fclose(fp=tmp2); 122 ReadOption(argc, argv) int argc; . char *argv[]; { I* int i; index for do loop program {0] = 'I'; for (i=l; i<argc; i++){ if (argv[i){O] == '-') switch (argv[i]{l]L{ case 'o': object = YES; break; I* ReadOption(); *I *I case '1': listing = YES; break; } else if (program [0] == 'I') strcpy(program, argv{i]); } if (program[O] == 'I'){ printf ("\nno input program,.assembler abort"); exit(); " } i f (object==YES) printf ("\nobject else printf ("\nobject I* YES"); NO "); if (listing==YES) printf ("\nlisting --YES"); else printf ("\nlisting ==NO"); if (program[O] == 'I') printf ("\nno program name"); else printf ("\nprogram name= \s",program); } Test ReadOption(); *I Q 123 ReadStatement() { /* ReadStatement (linel)J *I fgets (line, MAXLINE, infp)J ) ·- • 124 RefineOperand (str, start) char str(]; int start; { int i; . } i = start; while ( (str(i] I= 'L') (!itr(i] I= 'H') (str[i] I= 'R') (i <= start+ll) . i++; str[start+l2] = str[i]; str(i] = ' '; && && && 125 I************************************************************************ * . * module name: SearchResWord * * * * description: Search the corresponding key from the reserved * * word table * * ... * * input: none * * * * none output: * * * * globals * * total ele referenced: * * table res * * element * * * * globals * * none modified: * * *************************************************************************I* char SearchResWord() { int i, j, k, total; char its_match, result; total = 0; for (i=O; i<total ele; i++){ its match = NOT j =-0; while ( (its match == NO) && (res table[j][O] 1= ·~·> if ( Match(element[i], res table[j]) ){ its match = res table[jJ[O]; result = res=table[j}[O}; total++; }else j++; ){ } } i f (total == 0) } return('x'); else if (total > 1) return('$' j; else return(result); I* no reserved word /* more than one reserved words *I *I 126 StripStr(l,start,str) char 1[], str[]; int start; { int k; k = 0; while ((str[k] 1= (str(k] 1= (s t r ( k ] I= ) && \0 1 ) 1 \n 1 ) && && 1 1 1 ( k <= 12) } } l[k+start] = str[k]; k++; ){ 127 ToAscii (count, str, start) int count, start: char str []: { int j, k: j = count: for (k=start+4; k>=start; k--){ ~tr[k] = '0' + j \ 10; } j = j I 10; } • 128 ToHex (count, str, start, end) long countJ int start, endJ char str[]J { int i, kJ for (i=endJ i>=startJ i--){ k = count & OxOOOOOOOfLJ if (k > 9) str[i] k + 'a' - 10; else str[i] = k + '0'; } } count = count >> 4; 129 Top() { char temp[MAXLINE]; int i; } line count = 0; fputi (" \n\O",fp 1st); fputs ("DFM/CSUN ASSEMBLER Verion 1.0 fputs (date,fp 1st); BlankLine(temp; 7); ToAscii (++page, temp, 0); for (i=O; i<=4; i++) if (temp[i] == 1 0 1 ) temp[i) = 1 1 ; else break; fputs (" page ",fp_lst); fputs (temp,fp 1st); fputs (listing-f,fp 1st); fputs ( "\n\0" 'rp 1st); fputs ("\n\O",fp-lst); fputs (" LOC -OBJECT CODE ERROR fputs (" SOURCE STATEMENT\n\O",fp 1st); fputs ("\n\O",fp_lst); - ",fp_lst); LINE",fp_lst);