Telecommunication Engineering M.S.RAMAIAH INSTITUTE OF TECHNOLOGY Department

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M.S.RAMAIAH INSTITUTE OF TECHNOLOGY
BANGALORE-54
(Autonomous Institute Affiliated to VTU)
III - IV SEMESTER B.E
Department
of
Telecommunication Engineering
1
Department of Telecommunication Engineering
Department of Telecommunication Engineering was established in the year 1996,
offering B.E.Course, with an annual sanctioned in-take of sixty students.
Department has a team consisting of
Professor & Head, two professors, five
associate professors and eight Assistant Professors and four supporting staff for the
Lab.
In the year 2004, department started the M.Tech course in Digital
Communication Engineering with sanctioned in-take of 18 students. Experienced
and well qualified faculties are recruited through stringent selection process.
Department is accredited by the National Board of Accreditation under AICTE and
is certified by the Bureau Veritas Certification (India) Pvt. Ltd. For ISO 9001-2008,
for strict conformance to the ISO Quality Standards
Academic Excellence : Students of the department have secured 22 Ranks in B.E.
and 3 ranks in M.Tech courses under Visvesvaraya Technological University, and
also about ~85%
of the final year students of the department
prestigious companies and ~15% pursue
are placed in
higher studies in India and abroad.
Students of the department are also encouraged to take part in sports, technical and
cultural activities and have received several accolades.
For achieving overall excellence and quality delivery consistency, department has set
the vision, mission, short term and long term goals
Vision: To provide highly conducive ambience for the students to achieve all round
growth and excel in studies and research to become the most successful engineers
Mission: Telecommunication Engineering Department endeavour upon providing
high quality technical education to meet the ever growing challenges in the emerging
industry and social needs and provide all round personality development with social
responsibility emphasizing on quality, standards, research and innovation for
students and faculty
2
SHORT-TEM GOALS:
Emphasis on pragmatics and practical knowledge
Achieve distinguished academic results
Work in close cooperation and collaboration with industry and professional bodies
Providing high quality in teaching standards
Emphasis on Awareness of Entrepreneurship development skills
Establish Research and Consultancy Centre
LONG-TERM GOALS:
Industrial Training Center for students and Faculty
Start graduate/post-graduate course in the emerging technologies
Establish Research and Consultancy Center
Establish Innovation Center
Establish Center for Training Rural Youth in IT
To start Technical NGO under MSRIT TEC for the goodness and welfare of society
3
Program Educational Objectives (B.E)
PEO1 Graduates will excel in professional careers in Industry, Academic, Research and
Development that meet the needs of Organizations.
PEO2 Graduates will be able to analyze real life problems and be able to suggest solutions to
design complex engineering systems that are technically sound, economically feasible
and socially acceptable.
PEO3 Graduates will exhibit all round education that includes communication skills, the ability
to function well in a team, an appreciation for ethical behavior, and the ability to engage
in lifelong learning.
Program Outcomes (B.E)
At the end of the course students will develop
PO1
An ability to apply knowledge of mathematics, science and engineering fundamentals
appropriate to telecommunication Engineering.
PO2
An ability to identify, formulate, research literature and analyze a complex electronic and
telecommunication engineering problem.
PO3
An ability to design a system, component, or process to meet specified needs with
societal, environmental, public health, safety and cultural considerations.
PO4
An Ability to analyze, interprets, design and synthesize complex engineering problems to
provide valid conclusions.
PO5
An Ability to use current technology and modern tools for solving complex engineering
problems with an understanding of its limitations.
PO6
An ability to apply reasoning based on contextual knowledge to access societal, health,
safety, legal and cultural issues and responsibilities relevant to professional engineering.
PO7
An Ability to understand the impact of telecommunication engineering solutions in
societal and environmental contexts and demonstrate the need of sustainable
development.
PO8
An understanding of ethical principles and commit to professional ethics, responsibilities
and norms of engineering practice.
PO9
An ability to function effectively as an individual and as a member or leader in diverse
and multi-disciplinary teams.
4
PO10 An ability to communicate effectively on complex engineering activities with engineering
community and with society at large through skills to comprehend and write effective
reports and design documents, making effective presentations and deliver /receiver
instructions.
PO11 Recognition of the need for and an ability to engage in independent and life-long
learning.
PO12 An Ability to demonstrate Knowledge and understanding of engineering and
management principles and apply these to one’s own work, as a member and leader in a
team, to manage projects in multidisciplinary environments.
5
M.S.RAMAIAH INSTITUTE OF TECHNOLOGY
(Autonomous Institute, Affiliated to VTU)
Dr.S.Y.Kulkarni
Principal
Dr.N.V.R.Naidu
Vice Principal
Dr.T.V.Suresh Kumar
Registrar (Academic)
Sri. Ramesh Naik S
Registrar ( Administration)
Sl
No
1
2
3
4
5
6
7
Name
Qualification
Designation
Dr. K.NATARAJAN
Dr. B.K. SUJATHA
N.SHIVASHANKARAPPA
SATISH TUNGA
SHOBHA K.R
S.J.KRISHNA PRASAD
Dr. VISHWANATH TALASILA
Professor and Head
Professor
Associate Professor
Associate Professor
Associate Professor
Associate Professor
Associate Professor
8
9
10
11
12
13
14
15
PARIMALA P
VENU K.N
H.R.RAMYA
UMESHARADDY
NISHA S.L
S.G.SHIVA PRASAD YADAV
SWETHA AMIT
KUSUMA VIJAY
M.TECH, Ph.D
M.E, Ph.D
M.E.(Ph.D)
M.E.(Ph.D)
M.E.(Ph.D)
M.TECH (Ph.D)
Ph.D (Netherland), Post
Doc (UK)
M.E.(Ph.D)
M.TECH.(Ph.D)
M.TECH.(Ph.D)
M.TECH.(Ph.D)
M.TECH
M.TECH.(Ph.D)
M.TECH.(Ph.D)
M.TECH.
6
Assistant Professor
Assistant Professor
Assistant Professor
Assistant Professor
Assistant Professor
Assistant Professor
Assistant Professor
Assistant Professor
M S RAMAIAH INSTITUTE OF TECHNOLOGY, BANGALORE – 560 054
(Autonomous Institute Affiliated to VTU)
SCHEME OF TEACHING FOR THE ACADEMIC YEAR 2013-2014
III semester B.E., Telecommunication Engineering
Sl.No
1
2
3
4
5
6
7
8
9
Subject code
TCMAT301
TC302
TC303
TC304
TC305
TC306
TCL307
TCL308
TCL309
Subject
Engineering Mathematics III
Analog Electronic Circuits
Logic Design
Network Analysis
Engineering Electromagnetics
Data structure Using C
Analog Electronics Lab
Logic Design Lab
Data structure using C Lab
Teaching Department
Mathematics
Telecommunication Engg
Telecommunication Engg
Telecommunication Engg
Telecommunication Engg
Telecommunication Engg
Telecommunication Engg
Telecommunication Engg
Telecommunication Engg
TOTAL
4
4
4
3
4
3
0
0
0
22
Credits
0
0
0
1
0
0
0
0
0
1
0
0
0
0
0
0
1
1
1
3
Total
4
4
4
4
4
3
1
1
1
26
L=Lecture T=Tutorial P=Practical
IV semester B.E., Telecommunication Engineering
Sl.No
1
2
3
4
5
6
7
8
Subject code
TCMAT401
TC402
TC403
TC404
TC405
TC406
TCL407
TCL408
Subject
Engineering Mathematics IV
Micro Controller
Fundamentals of Verilog
Control Systems
Signals & Systems
Microelectronics
Microcontroller Lab
Fundamentals of Verilog Lab
Teaching Department
Mathematics
Telecommunication Engg
Telecommunication Engg
Telecommunication Engg
Telecommunication Engg
Telecommunication Engg
Telecommunication Engg
Telecommunication Engg
TOTAL
7
4
4
4
3
3
4
0
0
22
Credits
0
0
0
1
1
0
0
0
2
0
0
0
0
0
0
1
1
2
Total
4
4
4
4
4
4
1
1
26
3rd Semester B.E
Subject Code: TCMAT301
Subject Name: Engineering Mathematics-III
Credits: 4:0:0
Prerequisites: Integration of different types of functions, complex plans.
Course Objectives:
1. Learn to represent a periodic function in terms of sines and cosines.
2. Learn the concepts of a continuous and discrete integral transform in the form of Fourier and Ztransforms.
3. Learn the concepts of analicity functions and also transformation of a complex variables.
4. Learn the concepts of integration of a complex function over a given complex geometric region.
5. Learn the concept of special functions.
Course contents:
UNIT 1
Fourier series: Convergence and divergence of infinite series of positive terms, Periodic function,
Dirichlet’s conditions, Fourier series of periodic functions of period 2 and arbitrary period, Half range
series, Fourier series and Half Range Fourier series of Periodic square wave, Half wave rectifier, Full
wave rectifier, Saw-tooth wave with graphical representation, Practical harmonic analysis.
UNIT 2
Fourier Transforms: Infinite Fourier transform, Infinite Fourier sine and cosine transforms, properties,
Inverse transform, Convolution theorem, Parseval’s identity(statements only). Fourier transform of
rectangular pulse with graphical representation and its output discussion, Continuous Fourier spectraExample and physical interpretation.
Z-Transforms: Definition, standard Z-transforms, Single sided and double sided, Linearity property,
Damping rule, Shifting property, Initial and final value theorem, Inverse Z-transform, Application of Ztransform to solve difference equations.
UNIT 3
Complex Variables-I: Functions of complex variables, Analytic function, Cauchy-Riemann
equations in cartesian and polar coordinates, Consequences of Cauchy-Riemann equations,
Construction of analytic functions. Application to flow problems, Complex potential, Velocity
potential, Equipotential lines, Stream functions, Stream lines. Discussion of the transformations 2
z
w=z , w=e , and w
z
a2
(z
z
0), Bilinear transformations.
UNIT 4
Complex Variables-II: Complex integration, Cauchy’s theorem, Cauchy’s integral formula.
Taylor’s & Laurent’s series (statements only). Singularities, Poles and residues, Cauchy’s
residue theorem (statement only)
UNIT 5
Series Solution of ODEs and Special Functions: Series solution, Frobenius method, Series solution of
Bessel’s differential equation leading to Bessel’s function of first kind, Series solution of Legendre’s
differential equation leading to Legendre polynomials, Rodrigue’s formula.
TEXT BOOKS:
1. Erwin Kreyszig – Advanced Engineering Mathematics – Wiley publication – 9th edition – 2006.
2. B. S. Grewal – Higher Engineering Mathematics – Khanna Publishers – 42nd edition – 2012.
8
REFERENCE BOOKS:
1. Glyn James – Advanced Modern Engineering Mathematics – Pearson Education – 4th edition –
2010.
2. Dennis G. Zill, Michael R. Cullen - Advanced Engineering Mathematics, Jones and
Barlett Publishers Inc. – 3rd edition – 2009.
3. Dennis G. Zill and Patric D. Shanahan- A first course in complex analysis with applicationsJones and Bartlett publishers-second edition-2009.
Course Delivery:
The Course will be delivered through lectures, class room interaction, group discussion and exercises and
self-study cases.
Course Assessment and Evaluation:
Indirect
Assessment
Methods
Direct Assessment Methods
What
To whom
Internal
assessment
tests
CIE
SEE
Class-room
open book
assignment
When/ Where
(Frequency in
the course)
Thrice
(Average of the
best two will be
computed)
Max
marks
Evidence
collected
Contributing
to Course
Outcomes
30
Blue books
C01-C05
Twice
10
Assignment
reports
C01-C05
C01-C05
C01-C05
Students
quiz
Viva-Voce
Twice
10
Quiz
answers
Viva-Voce
Report
Standard
examination
End of course
(Answering 5 of
10 questions)
100
Answer
scripts
Middle of the
course
-
Feedback
forms
End of course
-
Questionnaire
Students feedback
Students
End of course survey
PO1,PO2,PO3,
PO4, PO11,
PO12
PO1,PO2,PO3,
PO4, PO11,
PO12
Questions for CIE and SEE will be designed to evaluate the various educational components
taxonomy) such as:
CIE and SEE evaluation:
Sl.No
Bloom’s Category
Test 1
Test 2
Test 3
Semester-End Examination
1
Remember
05
05
05
10
2
Understand
10
10
10
20
9
(Bloom’s
3
Apply
10
10
10
50
4
Analyze
05
05
05
20
5
Evaluate
0
10
0
0
6
Create
0
0
0
0
Course Outcomes:
1. Finding the expansion of function as a Fourier series / half-range Fourier series in a given range
of values of the variable. Obtaining the various harmonics of the Fourier series expansion for the
given numerical data.
2. To find Fourier transforms, Fourier sine and Fourier cosine transforms of functions and also
solving difference equations using Z-transforms.
3. Apply Cauchy-Riemann equations and harmonic functions to problems of Fluid Mechanics,
Thermo Dynamics and Electromagnetic fields.
4. Find singularities of complex functions and determine the values of integrals using residues and
also discuss conformal mappings
5. Obtaining the series solution of ordinary differential equations.
Mapping of course outcomes with Programme outcomes:
Course
Outcomes
Programme Outcomes
1
2
3
4
5 6 7 8 9 10 11 12
CO1
X X
X
CO2
X X X X
X
X
CO3
X X X X
X
X
CO4
X X
CO5
X X
X
10
Subject Code: TC302
Subject Name: Analog Electronic Circuits
Credits: 4:0:0
Prerequisites: Basic Electronics.
Course Objectives:
1. To use a variety of analog electronic components and circuits
2. Extend knowledge of the theory and applications of transistors and transistor amplifier design.
3. Provide sufficient knowledge and experience to make meaningful design choices of amplifier to
meet design specifications.
4. Introduce the concepts and use of feedback and feedback amplifier design
5. To teach the theory and design of Bistable, Schmitt trigger, monostable and Astable
multivibrators using transistors.
Course contents:
UNIT 1
Diode circuits: Diode as a circuit element, load line concept, clipping circuits, clamping
circuits, voltage multipliers, rectifiers with C filter.
Transistor Biasing, Thermal Stabilization: Operating point, Bias stability, Self or emitter Bias,
Stabilization against ICO, VBE & β, Bias compensation, Biasing techniques for linear integrated circuits.
UNIT 2
Transistor model at low frequencies and high frequencies: Two port devices and Hybrid model,
Transistor Hybrid model, h Parameter, Analysis of Transistor amplifier circuit using h parameters, The
emitter follower, Miller theorem and its Dual.
Transistor model at high frequencies: Hybrid-π common emitter transistor model, Hybrid-π
conductance, Hybrid-π capacitance, CE short circuit current gain.
UNIT 3
Field effect transistor: Junction Field effect transistor, JFET V-I characteristics, The FET small-signal
model, MOSFET, Common source and Common drain amplifiers at low Frequency, Common source
amplifier at high Frequency.
Power Amplifiers: Class A large signal amplifiers, second harmonic distortion, high order
harmonics generation, Transformer coupled audio power amplifier, Class B push pull amplifiers.
UNIT 4
Multistage amplifiers: Classification of amplifiers, Distortion in amplifiers, Frequency response of an
amplifier, RC-coupled amplifier, Frequency response of RC-coupled amplifier,
Feedback Amplifiers: Concept of feedback, Transfer gain with feedback, General characteristics of
negative feedback amplifiers, Input and Output impedance.
11
UNIT 5
Bistable And Schmitt Trigger Circuits: Fixed and self bias bistable circuits – Loading –Commutating
capacitors – Triggering methods – Design of bistable circuits – Schmitt Trigger circuit, critical voltages,
Design example Monostable And Astable Circuits: Collector and emitter coupled monostable circuits –
Waveforms – equation for delay – collector coupled, emitter coupled astable circuits – VCO – Design
examples for monostable and astable circuits.
TEXT BOOKS:
1. Jacob Millman and Christos C. Halkias, “Integrated Electronics”, , Tata-McGraw Hill, 2008
edition.
2. Millman J. and Taub H., Pulse Digital and Switching Waveforms, TMH, 2009
REFERENCE BOOKS:
1. Robert L.Boylestad and Louis Nashlsky “Electronic Devices and Circuit theory”, PHI/Pearson
Education, 9th Edition.
2. David A. Bell, Solid State Pulse Circuits, Prentice Hall of India, 2011.
Course Delivery:
The Course will be delivered through lectures, class room interaction, group discussion and exercises and
self-study.
Course Assessment and Evaluation:
Direct Assessment Methods
What
CIE
Indirect
Assessment
Methods
SEE
To
whom
When/ Where
(Frequency in
the course)
Max
marks
Evidence
collected
Contributing to
Course
Outcomes
Internal
assessment
tests
Thrice (Average
of the best two
will be
computed)
30
Blue books
C01-C05
Class-room
open book
assignment
Twice( Average
of the two will be
computed)
10
Assignment
reports
C01-C05
Surprise quiz
Twice(Average
of two will be
computed)
10
Quiz
answers
C01-C05
Standard
examination
End of course
(Answering 5 of
10 questions)
100
Answer
scripts
C01-C05
Middle of the
course
-
Feedback
forms
PO1,PO2,PO3,
PO4.PO11.PO12
End of course
-
Questionnaire
Students
Students feedback
End of course
survey
Students
12
PO1,PO2,PO3,
PO4.PO11.PO12
Questions for CIE and SEE will be designed to evaluate the various educational components (Bloom’s
taxonomy) such as:
CIE and SEE evaluation :
Sl.No
Bloom’s Category
Test 1
Test 2
Test 3
Semester-End Examination
1
Remember
05
05
05
20
2
Understand
05
05
05
10
3
Apply
05
05
05
10
4
Analyze
05
05
05
20
5
Evaluate
05
05
05
20
6
Create
05
05
05
20
Course Outcomes:
1. Analyze and design of variety of electronic circuits including clipping, clamping, rectifiers and
biasing circuits.
2. Design and analyze amplifiers using h parameter and hybrid parameters.. Concept of FET,
MOSFET and design of power amplifiers
3. Formulate the calculation of cutoff frequencies and to determine bandwidth
4. Analyze of feedback amplifiers.
5. Analyze and design of multivibrator circuits using transistors.
Mapping Course Outcomes with Program Outcomes:
Course Outcomes
Programme Outcomes
1
2
3
4
5 6 7 8 9 10 11 12
CO1
CO2
X X
X
X X X
X
X
CO3
CO4
X X X X
X X X
X
X
CO5
X X X
13
X
X
Subject Code: TC303
Subject Name: Logic Design
Credits: 4:0:0
Prerequisites: Basic Electronics.
Course Objectives:
1. To design Combinational circuits using basic gates.
2. To realize and implement combinational logic circuits using TTL, ECL and CMOS technology.
3. To design complex logic circuits using decoder, multiplexer, etc.
4. To design sequential circuits using latches and flip-flops.
5. To realize complex combinational and sequential circuits using PLD’s.
Course contents:
UNIT 1
PRINCIPLES OF COMBINATIONAL LOGIC: Definition of combinational logic, Canonical forms,
Generation of switching equations from truth tables, Karnaugh maps-3, 4 and 5 variables, Incompletely
specified functions (Don’t Care terms), Simplifying Max term equations. Quine-McCluskey minimization
technique- Quine-McCluskey using don’t care terms, Map entered variables.
UNIT 2
LOGIC LEVELS AND FAMILIES: Logic Levels, Integration Levels, Output switching Times, The
Propagation Delay, Fan-out and Fan-in, Extension to other Logic Gates, Logic Cascades. TransistorTransistor Logic: Wired Logic, TTL with Totem-Pole Output, Three-state output TTL, Schottky TTL;
MOSFET: Operation of n-channel, Enhancement -Type MOSFET, The P-Channel MOSFETs, Circuit
Symbols, The MOSFET as a Resistor; NMOS and PMOS Logic: The NMOS Invertor, NMOS NORGate, NMOS NAND-Gate, PMOS Logic, Performance: The CMOS Invertor, CMOS NOR-Gate, CMOS
NAND-Gate, performance, Comparison of the above Logic Families.
UNIT 3
ANALYSIS AND DESIGN OF COMBINATIONAL LOGIC: General approach, Decoders-BCD
decoders, Encoders, Digital multiplexers- Using multiplexers as Boolean function generators. Adders and
subtractors - Cascading full adders, Look ahead carry, Binary comparators, Single digit BCD adder.
UNIT 4
SEQUENTIAL CIRCUITS: Basic Bistable Element, Latches, SR Latch, Application of SR Latch, A
Switch De-bouncer, The R S Latch, The gated SR Latch, The gated D Latch, The Master-Slave Flip-Flops
(Pulse-Triggered Flip-Flops): The Master-Slave SR Flip-Flops, The Master-Slave JK Flip- Flop, Edge
Triggered Flip-Flop: The Positive Edge-Triggered D Flip-Flop, Negative-Edge Triggered D Flip-Flop.
Characteristic Equations, Registers, Counters - Binary Ripple Counters, Synchronous Binary counters,
Counters based on Shift Registers, Design of a Synchronous counters, Design of a Synchronous Mod-6
Counter using clocked JK Flip-Flops Design of a Synchronous Mod-6 Counter using clocked D, T, or SR
Flip-Flops, Mealy and Moore sequential networks.
14
UNIT 5
PROGRAMMABLE LOGIC DEVICES AND MEMORY: Introduction, Memory, Common Memory
Types-ROM: Mask-Programmed ROM, PROM, OTPROM, EPROM (UVROM), EEPROM, FLASH,
RAM: SRAM, DRAM, PSRAM, NVRAM, Programmable Logic Devices: PROM, PLA, PAL, GAL,
Realization of combinational circuit using PLDs, Architecture of Complex Programmable Logic Devices
(CPLD) and Field Programmable Gate Arrays (FPGA).
TEXT BOOKS:
1. John M Yarbrough, “Digital Logic Applications and Design”, Thomson Learning, 2001.
2. Donald D Givone, “Digital Principles and Design “, Tata McGraw Hill Edition, 2002.
REFERENCE BOOKS:
1. Charles H Roth, Jr; “Fundamentals of logic design”, Thomson Learning, 2004.
2. R D Sudhaker Samuel, “Logic Design – A simplified approach” , Sanguine Technical Publishers,
2004.
Course Delivery:
The Course will be delivered through lectures, class room interaction, group discussion and exercises and
self-study cases.
Course Assessment and Evaluation:
Indirect
Assessmen
t Methods
Direct Assessment Methods
What
CIE
SEE
Internal
assessment
tests
Class-room
open book
assignment
Surprise quiz
To
whom
Students
Standard
examination
Students feedback
End of course survey
Students
When/ Where
(Frequency in the
course)
Thrice(Average of
the best two will
be computed)
Twice( Average of
the two will be
computed)
Twice(Average of
two will be
computed)
End of course
(Answering 5 of
10 questions)
Middle of the
course
End of course
15
Max
marks
Evidence
collected
30
Blue books
10
Assignment
reports
C01-C05
10
Quiz
answers
C01-C05
100
Answer
scripts
C01-C05
-
Feedback
forms
Questionnaire
PO1,PO2,PO3,
PO4, PO11
PO1,PO2,PO3,
PO4, PO11
-
Contributing to
Course
Outcomes
C01-C05
Questions for CIE and SEE will be designed to evaluate the various educational components (Bloom’s
taxonomy) such as:
CIE and SEE evaluation:
Sl.No
Bloom’s Category
Test 1
Test 2
Test 3
Semester-End Examination
1
Remember
05
05
05
10
2
Understand
05
05
05
10
3
Apply
10
10
10
50
4
Analyze
05
05
05
20
5
Evaluate
0
0
0
0
6
Create
05
05
05
10
Course Outcomes:
1. Design of combinational logic circuit using basic gates and universal gates.
2. Design and realization of combinational circuit using TTL, ECL and CMOS technology.
3. Design of complex combinational logic circuit using multiplexers, decoders etc.
4. Design and realization of sequential networks using latches and flip-flops.
5. Design of combinational logic circuit using PROM, PLAs and PALs.
Mapping of course outcome with program outcome:
Program Outcomes
Course
Outcomes
CO1
CO2
CO3
CO4
CO5
PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO112
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
16
Subject code: TC 304
Subject Name: Network Analysis
Credits: 3:1:0
Prerequisites : Engineering Mathematics II and Basic Electrical Engineering.
Course Objectives:
1. To understand the need and importance of network analysis in engineering
2. To understand how to perform critical analyses of a physical system – which will be useful for
projects and for their eventual industry or higher education progress.
3. To understand the behavior of circuit elements under switching conditions
4. To understand through the use of Laplace transforms the important of frequency domain
approaches in solving electric circuits.
Course Contents:
UNIT 1
Basic Concepts:
Practical sources, source transformations, network reduction using star-delta transformation, loop and
nodal analysis, super node and super mesh
Tutorial: Various problems to help students develop an understanding of how to analyze any linear
electric circuit: 10 examples
UNIT 2
Network Theorems
Superposition, reciprocity and Millmans theorem, Thevenin’s, Norton’s, Maximum power transfer
theorem.
Tutorial: Problems to help students understand unifying concepts and theorems in the solutions of electric
circuits: 10 examples
UNIT 3
Resonant Circuits
Series and Parallel resonance, frequency response of series and parallel resonance circuits, Q-factor,
Bandwidth.
Tutorial: Problems to demonstrate resonance in electric circuits, how to achieve maximum voltage or
current: 5 examples
UNIT 4
Transient Behaviour, Initial conditions and Laplace Transforms with Applications
Behavior of circuit elements under switching conditions and their representation, initial and final
conditions in various circuits, Solutions of networks using Laplace transforms, step and ramp responses
Tutorial: Problems to demonstrate effect of switching in electric circuits for various types. Demonstrate
use of Laplace transformation to analyze circuits in frequency domain.: 10 examples
UNIT 5
Two Port Network Parameters
Definition of z,y,h and transmission parameters, Modeling with these parameters, relationship between
the parameters.
Tutorial: Various problems to enable students to model various electric circuits in the two port
formulation, and demonstrate the usefulness of this approach: 10 examples
TEXT BOOKS:
1. Hayt, “Engineering Circuit Analysis”, Kemmerly and Durbin, 6th Edition, 2002
2. “Analysis of Linear Systems”, David K Cheng, Narosa Publishing House, 11th reprint,
17
REFERENCE BOOKS:
1. ME Van Valkenburg, “Network Analysis”, PHI/Pearson, 3rd Edition, 2002
2. Bruce Carlson, “Circuits”, Thomson Learning, 2002
Course Delivery:
The Course will be delivered through lectures, class room interaction, group discussion and exercises and
self-study cases.
Course Assessment and Evaluation:
Indirect
Assessment
Methods
Direct Assessment
Methods
What
CIE
When/ Where
(Frequency in the
course)
Internal
assessment
tests
Open book
assignment
SEE
To
whom
Evidence
collected
Contributing
to Course
Outcomes
Thrice(Average of
the best two will
be computed)
30
Blue books
C01-C05
Twice
20
Assignment
reports
C01-C05
End of course
(Answering 5 of
10 questions)
100
Answer
scripts
C01-C05
Middle of the
course
-
Feedback
forms
PO1,PO2,PO4,
PO7, P09,PO12
End of course
-
Questionnaire
Students
Standard
examination
Students feedback
End of course
survey
Max
marks
Students
PO1,PO2,PO4,
PO7, P09,PO12
Questions for CIE and SEE will be designed to evaluate the various educational components (Bloom’s
taxonomy) such as:
CIE and SEE evaluation
S.No
Bloom’s Category
Test 1
Test 2
Test 3
Semester-End Examination
1
Remember
10
05
05
10
2
Understand
0
05
05
20
3
Apply
10
10
10
30
4
Analyze
05
05
05
20
5
Evaluate
0
05
05
10
6
Create
05
00
00
10
18
Course Outcomes:
1. Understand concepts such as interconnection of simple networks to form complex ones.
2. Understand and apply the concept of Laplace transforms, which will be useful for system
modeling in various engineering domains.
3. Evaluate circuit theorems in the analysis of circuits.
4. Demonstrate the importance of resonance and classify types of resonant circuits
5. Understand and apply the distinction between time and frequency domain approaches and their
use in circuit analysis
Mapping Course Outcomes with Program Outcomes:
Course Outcomes
Programme Outcomes
1
2
CO1
CO2
X X
X
CO3
CO4
X
X
CO5
3
4
5 6
7
8
9
10 11 12
X
X
X
X
X
X
X
19
Subject Code: TC305
Subject Name: Engineering Electromagnetics
Credits: 4:0:0
Prerequisites: Engineering Mathematics II and Engineering Physics.
Course Objectives:
1. To learn the effects of electrostatic force near the boundary of different media.
2. To learn the use of gauss law, Laplace equations, poisons equation in obtaining electric field and
scalar potentials.
3. To understand the application based on amperes law. Skills to use Maxwell’s equation in
waveguide.
4. To learn the wave propagation in conductor, good conductor and die-electric media.
5. To learn the importance of uniform plane waves and pointing theorem.
Course contents:
UNIT 1
Coulomb’s Law and electric field intensity: Experimental law of Coulomb, Electric field intensity,
Field due to continuous volume charge distribution, Field of a line charge. Electric flux density, Gauss’
law and divergence: Electric flux density, Gauss’ law, Divergence, Maxwell’s First equation
(Electrostatics), vector operator and divergence theorem.
Energy and potential : Energy expended in moving a point charge in an electric field, The line integral,
Definition of potential difference and Potential, The potential field of a point charge and system of
charges, Potential gradient , Energy density in an electrostatic field. Conductors, dielectrics and
capacitance: Current and current density, Continuity of current, metallic conductors, Conductor properties
and boundary conditions, boundary conditions for perfect Dielectrics, capacitance and examples.
UNIT 2
Poisson’s and Laplace’s equations: Derivations of Poisson’s and Laplace’s Equations, Uniqueness
theorem, Examples of the solutions of Laplace’s and Poisson’s equations.
UNIT 3
The steady magnetic field: Biot-Savart law, Ampere’s circuital law, Curl, Stokes’ theorem, magnetic
flux and flux density, scalar and Vector magnetic potentials.
UNIT 4
Time varying fields and Maxwell’s equations: Faraday’s law, displacement current, Maxwell’s
equation in point and Integral form, retarded potentials
UNIT 5
Uniform plane wave: Wave propagation in free space and dielectrics, Poynting’s theorem and wave
power, propagation in good conductors (skin effect).
TEXT BOOKS:
1. William H Hayt Jr. and John A Buck, “Engineering Electromagnetics”,Tata McGraw-Hill, 7th
edition, 2006
20
REFERENCE BOOKS:
1. Edward C. Jordan and Keith G Balmain, “Electromagnetic Waves And Radiating
Systems,”
nd
Prentice – Hall of India / Pearson Education, 2 edition, 1968.Reprint 2002.
2. David K Cheng, “Field and Wave Electromagnetics” Pearson Education Asia, 2nd edition, 1989, Indian Reprint – 2001.
Course Delivery:
The Course will be delivered through lectures, class room interaction, group discussion and
exercises and self-study.
Course Assessment and Evaluation:
Indirect
Assessmen
t Methods
Direct Assessment Methods
What
To
whom
Internal
assessment
tests
CIE
Class-room
open book
assignment
Students
Surprise
quiz
SE
E
Standard
examinatio
n
Students feedback
End of course
survey
When/ Where
(Frequency in
the course)
Thrice(Average
of the best two
will be
computed)
Twice( Average
of the two will be
computed)
Twice(Average
of two will be
computed)
End of course
(Answering 5 of
10 questions)
Middle of the
course
Max
mark
s
Evidence
collected
Contributing to
Course Outcomes
30
Blue books
C01-C05
10
Assignment
reports
C01-C05
10
Quiz answers
C01-C05
100
Answer scripts
C01-C05
-
Feedback
forms
PO1,PO2,PO7,
PO9
End of course
-
Question-naire
PO1,PO2,PO7,
PO9
Students
Questions for CIE and SEE will be designed to evaluate the various educational components (Bloom’s
taxonomy) such as:
CIE and SEE evaluation:
Sl.No
Bloom’s Category
Test 1
Test 2
Test 3
Semester-End Examination
1
Remember
05
05
05
30
2
Understand
05
05
05
20
3
Apply
05
05
05
20
4
Analyze
10
10
10
20
21
5
Evaluate
05
05
05
10
6
Create
0
0
0
00
Course outcomes:
1. Demonstrate the effects of electrostatic force near the boundary of different media.
2. Discuss the use of gauss law, Laplace equations, poisons equation in obtaining electric field and
scalar potentials
3. To develop the application based on amperes law. Skills to use Maxwell’s equation in waveguide
4. Classifying the wave propagation in conductor, good conductor and die-electric media.
5. Discuss uniform plane waves and poynting theorem.
Mapping Course Outcomes with Program Outcomes:
Programme Outcomes
Course Outcomes
1
2
3
4
CO1
X X
X
CO2
X X
X
CO3
X X
X
CO4
X X
X
CO5
X
X
22
5 6
7
8 9 10 11 12
X
X
Subject code: TC 306
Subject Name: Data Structure Using C
Credits: 3:0:0
Prerequisites : Fundamentals of Computing
Course Objectives:
1. To teach the basics of creating Linear data base and design different applications.
2. To teach the basics of creating Nonlinear data base and design different applications
3. To give a knowhow on different algorithms for sorting and searching
4. To impart programming, analytical and logical skill sets with data structures concepts.
5. To train them to write programs on the various concepts of data structures.
Course contents:
UNIT 1
Linked List: Dynamic memory allocation & de allocation functions, Introduction to Linked List, Types
of linked list, Basic operations (Insert, Delete, Traverse, Search, and Display), and Algorithms &
Programs using Singly, Doubly & Circular linked list.
Linked List Applications: Addition of two long positive integers, Addition of two polynomials, and
Evaluation of a polynomial.
UNIT 2
Stacks & Queues: Basic stack operations, Stack applications-Conversion & Evaluation of expressions,
other applications on stack.
Queues: Introduction to queues: Basic operations, Different types of queues, Queue linked list
implementation.
UNIT 3
Trees: Introduction to trees: Basic tree concepts, Binary tree properties, Binary tree traversal, Expression
tree. Operations, Algorithms & programs on Binary search tree (BST), equivalence between binary search
algorithm and BST.
Basic concepts of AVL trees and B Trees
UNIT 4
Searching & Sorting: Sorting: sort concepts-sort order, sort stability, sort efficiency. Types of sorting:
Selection sort- Heap sort. Insertion sort-Simple insertion sort, Shell sort, Address calculation sort.
Exchange sort-Quick sort, Bubble sort. External sort - Merge sort.
Searching: List searches: Binary search & sequential search. Hashed list searches: Basic concepts,
Hashing Methods, Collision Resolution Methods: Open Addressing, Linked list.
UNIT 5
Graphs: Introduction & Basic concepts, Graph operations, Graph traversal-Depth first & Breadth first
traversal. Graph storage structure: Adjacency matrix & Adjacency list. Graph Algorithms: Insert, Delete
and Append Vertices & Edges. Application of Graph Operations: Web Graph.
Networks: Minimum spanning Tree & Shortest path Algorithms.
23
TEXT BOOKS:
1. Tanenbaum, “Data Structures with C”, Prentice Hall 2000
2. Richard Gilberg and Behrouz Forouzan,”Data Structures: A Pseudo code approach with C”,2nd
edition, Thomson publishing, 2007.
REFERENCE BOOKS:
1. Robert L Kruse, “Data Structures and Program Design”, Prentice Hall 1994.
2. Ullman & Hopcroft,” Data Structures and Algorithms”,Addison-Wesley,2006.
3. Thomas Corman, Howowitz and Sartaj Sahni,”Introduction to Algorithms”,2 nd edition,PHI,
2006.
4. E.Balagurusamy, “Programming in ANSI C”, Tata McGraw Hill,2002.
Course Delivery:
The Course will be delivered through lectures, class room interaction, group discussion and exercises and
self-study.
Course Assessment and Evaluation:
Indirect
Assessmen
t Methods
Direct Assessment Methods
What
CIE
Internal
assessment
tests
Class-room
open book
assignment
To
whom
Students
Surprise quiz
SEE
Standard
examination
Students feedback
When/ Where
(Frequency in the
course)
Thrice(Average of
the best two will
be computed)
Twice( Average of
the two will be
computed)
Twice(Average of
two will be
computed)
End of course
(Answering 5 of
10 questions)
Middle of the
course
Max
marks
Evidence
collected
Contributing
to Course
Outcomes
30
Blue books
C01-C05
10
Assignment
reports
C01-C05
10
Quiz
answers
C01-C05
100
Answer
scripts
C01-C05
-
Feedback
forms
PO1,PO2,PO3,
PO4,PO11.
End of course
-
Questionnaire
PO1,PO2,PO3,
PO4, PO11.
Students
End of course survey
Questions for CIE and SEE will be designed to evaluate the various educational components (Bloom’s
taxonomy) such as:
CIE and SEE evaluation:
Sl.No
Bloom’s Category
Test 1
Test 2
Test 3
Semester-End Examination
1
Remember
02
02
02
10
2
Understand
03
03
03
10
24
3
Apply
05
05
05
10
4
Analyze
00
00
00
00
5
Evaluate
00
00
00
00
6
Create
20
20
20
70
Course Outcomes:
1. Describe, illustrate, analyze and design a linear database in the form of linked list and perform
required operations on database.
2. Discuss, employ, inspect and design Stacks and Queues for different applications.
3. Explain, use, examine and design a nonlinear database and perform required operations on
database.
4. Choose and design sorting and searching techniques on different types of database.
5. Explain, apply, analyze and design graph for different applications.
Mapping Course Outcomes with Program Outcomes:
Course
Outcomes
CO1
CO2
CO3
CO4
CO5
Programme Outcomes
1 2 3 4 5 6 7 8 9 10 11 12
X X X X
X
X X X X
X
X X X X
X
X
X
X X X X
X
25
Subject Code: TCL307
Subject Name: Analog Electronics Lab
Credits: 0:0:1
Prerequisites: Basic Electronics
Course Objectives:
1. Design, analyze, and test diode clipping and clamping circuits.
2. Design, analyze, and test basic amplifiers, power amplifiers and oscillators.
3. Design, analyze, and test Voltage regulators using 723IC.
4. Design, analyze, and test the input and output characteristics of BJT CE configuration and
determine the h-parameters.
5. Design, analyze, and test Drain and transfer characteristics of n-channel MOSFET
Course contents:
LIST OF EXPERIMENTS:
1. Design and Testing of diode clipping (single and double ended) and clamping circuits.
2. Design of RC coupled single stage BJT amplifier and determination of operating point, gain,
frequency response, input and output impedances.
3. Design of BJT emitter follower with and without bootstrapping and determination of the gain
input and output impedances.
4. Design of BJT RC phase shift oscillator for the given audio frequency.
5. Design of BJT Hartley and Colpitts oscillators for the given radio frequency
6. Design and testing of half wave, full wave and bridge wave rectifier with and without C filter,
determination of ripple factor, regulation and efficiency
7. Design of low and high voltage regulators using 723 IC
8. Design and testing the input and output characteristics of BJT CE configuration and determine the
h-parameters.
9. Design and testing of transformer coupled audio power amplifier.
10. Design and testing of Class B push pull and class AB power amplifier.
11. Design and testing the drain and transfer characteristics of n-channel MOSFET.
REFERENCE BOOKS:
1. Jacob Millman and Christos C. Halkias, “Integrated Electronics”, Tata-McGraw Hill, 1991
edition.
2. D. Roy Choudhury and Shail B Jain, “Linear Integrated Circuits”, 2nd edition reprint 2006, New
Age International.
3. Robert L.Boylestad and Louis Nashlsky, “Electronic Devices and Circuit theory”, TPHI/Pearson
Education, 9th Edition.
26
Course Delivery:
The Course will be delivered through black board teaching, exercises and self-study.
Course Assessment and Evaluation:
Direct Assessment Methods
What
When/ Where
(Frequency in
the course)
Max
marks
Evidence
collected
Contributing to
Course
Outcomes
Internal
assessment
test
once(at the end
of the course)
30
Blue books
C01-C05
Observation
book
Every lab
session
( Average of the
all experiment
marks)
05
Observation
book
C01-C05
Record
Every lab
session
( Average of the
all experiment
marks)
10
Record
C01-C05
Viva
once(at the end
of the course)
05
Blue books
C01-C05
Standard
examination
End of course
(Answering 1
Lab program )
50
Answer
scripts
C01-C05
Students feedback
Middle of the
course
-
Feedback
forms
PO1,PO2,PO3,
PO9,PO12.
-
Questionnaire
PO1,PO2,PO3,
PO9,PO12.
CIE
Students
SEE
Indirect
Assessment
Methods
To
whom
End of course
survey
Students
End of course
Course Outcomes:
1. Test and evaluate Clipping and clamping circuits.
2. Design, test and evaluate Basic amplifiers and oscillators.
3. Design, test and evaluate Voltage regulators using 723IC.
4. Design, test and evaluate BJT CE configuration.
5. Design, test and evaluate N-channel MOSFET.
27
.
Mapping Course Outcomes with Program Outcomes:
Course Outcomes
Programme Outcomes
1
2
3
4 5 6 7 8
9
10 11 12
CO1
X X X
X
X
CO2
X X X
X
X
CO3
CO4
X X X
X X X
X
X
X
X
CO5
X X X
X
X
28
Subject Code: TCL308
Subject Name: Logic Design Lab
Credits: 0:0:1
Prerequisites: Basic Electronics
Course Objectives:
1. To Describe implementation of combinational logic
2. To demonstrate the design a seven segment display with a decimal to BCD encoder
3. To teach and realize the methods to control the flow of data by utilizing Multiplexers and Demultiplexers.
4. To design and implement combinational logic circuits using programmable logic devices.
5. To design and develop half and full adders using universal gates and flip flops
Course contents:
LIST OF EXPERIMENTS:
1.
2.
3.
1.
4.
5.
6.
7.
8.
9.
Simplification, realization of Boolean expressions using logic gates/Universal gates.
Realization of Half/Full adder and Half/Full Subtractors using logic gates.
(i) Realization of parallel adder/Subtractors using 7483 chip
(ii) BCD to Excess-3 code conversion and vice versa.
Realization of Binary to Gray code conversion and vice versa
MUX/DEMUX – use of 74153, 74139 for arithmetic circuits and code converter.
Realization of One/Two bit comparator and study of 7485 magnitude comparator.
Use of a) Decoder chip to drive LED display and b) Priority encoder.
Truth table verification of Flip-Flops: (i) JK Master slave (ii) T type and (iii) D type.
Realization of 3 bit counters as a sequential circuit and MOD – N counter design (7476, 7490,
74192, 74193).
10. Shift left; Shift right, SIPO, SISO, PISO, PIPO operations using 74S95.
11. Wiring and testing Ring counter/Johnson counter.
12. Wiring and testing of Sequence generator.
TEXT BOOKS:
1. John M Yarbrough, “Digital Logic Applications and Design”, Thomson Learning, 2001.
2. Donald D Givone, “Digital Principles and Design “, Tata McGraw Hill Edition, 2002
REFERENCE BOOKS:
1. Charles H Roth, Jr; “Fundamentals of logic design”, Thomson Learning, 2004.
2. R D Sudhaker Samuel, “Logic Design – A simplified approach” , Sanguine Technical
Publishers, 2004.
29
Course Delivery:
The Course will be delivered through black board teaching, exercises, self-study and demonstrations.
Course Assessment and Evaluation:
Direct Assessment Methods
What
When/ Where
(Frequency in
the course)
Internal
assessment
test
CIE
once(at the end
of the course)
Observation
book
Students
Record
Viva
SEE
Indirect
Assessmen
t Methods
To
whom
Standard
examination
Students feedback
Every lab session
( Average of the
all experiment
marks)
Every lab session
( Average of the
all experiment
marks)
once(at the end
of the course)
End of course
(Answering 1
Lab program )
Middle of the
course
Max
marks
Evidence
collected
Contributing to
Course Outcomes
30
Blue books
C01-C05
05
Observation
book
C01-C05
10
Record
C01-C05
05
Blue books
C01-C05
50
Answer
scripts
C01-C05
-
Feedback
forms
-
Questionnaire
Students
End of course survey
End of course
PO1,PO2,PO3,
PO4, PO11.
PO1,PO2,PO3,
PO4, PO11.
Course Outcomes:
1. Describe and design combinational logic
2. Formulate a seven segment display with a decimal to BCD encoder
3. Illustrate and evaluate the methods to control the flow of data by utilizing Multiplexers and Demultiplexers.
4. Design and analyze combinational logic circuits using programmable logic devices.
5. Design and develop half and full adders using universal gates and flip flops
Mapping Course Outcomes with Program Outcomes:
Course
Outcomes
CO1
CO2
CO3
CO4
Programme Outcomes
1
X
X
X
X
2
X
X
X
X
3
X
X
X
X
4 5 6 7 8 9 10 11 12
X
X
X
X
X
X
X
X
30
CO5
X X X X
X
Subject code: TCL309
Subject Name: Data Structure Using C Lab
Credits: 0:0:1
Prerequisites : Fundamentals of Computing
Course Objectives:
1. To teach the basics of creating Linear data base and design different applications.
2. To teach the basics of creating Nonlinear data base and design different applications
3. To give a knowhow on different algorithms for sorting and searching
4. To impart programming, analytical and logical skill sets with data structures concepts.
5. To train them to write programs on the various concepts of data structures.
Course contents:
LIST OF EXPERIMENTS:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
Insert, Delete and Display Singly/ Doubly,/ Circular Linked list.
Addition of two polynomials and large numbers.
Evaluation of a polynomial.
Addition of two large numbers.
Implement stack &queue
Conversion & Evaluation of expression using Stack.
Applications on stacks
Implement Different types of queues.
Create &Traverse a Binary Tree.
Create BST & perform the following operations
Delete
Append
Search
Traverse
Display
11. Sort the database using different sorting Techniques.
12. Search for the given key using suitable searching techniques.
13. Traversal techniques in graphs
TEXT BOOKS:
1. Tanenbaum, “Data Structures with C”, Prentice Hall 2000
2. Richard Gilberg and Behrouz Forouzan,”Data Structures: A Pseudo code approach with C”,2nd
edition, Thomson publishing, 2007.
Course Assessment and Evaluation:
Direct
Assessm
ent
Method
s
What
CIE
Internal
assessment
test
Observation
To
whom
Students
When/ Where
(Frequency in
the course)
Max
marks
Evidence
collected
Contributing to
Course
Outcomes
once(at the end
of the course)
30
Blue books
C01-C05
Every lab
05
Observation
C01-C05
31
book
session
( Average of the
all experiment
marks)
Every lab
session
( Average of the
all experiment
marks)
once(at the end
of the course)
End of course
(Answering 1
Lab program )
Middle of the
course
Record
Viva
Indirect
Assessmen
t Methods
SEE
Standard
examination
Students feedback
End of course
survey
book
10
Record
C01-C05
05
Blue books
C01-C05
50
Answer
scripts
C01-C05
-
Feedback
forms
-
Questionaire
Students
End of course
PO1,PO2,PO3,
PO4, PO11.
PO1,PO2,PO3,
PO4, PO11.
Course Outcomes:
1. Describe, illustrate, analyse and design a linear database in the form of linked list and perform
required operations on database.
2. Discuss, employ, inspect and design Stacks and Queues for different applications.
3. Explain, use, examine and design a nonlinear database and perform required operations on
database.
4. Choose and design sorting and searching techniques on different types of database.
5. Explain, apply, analyse and design graph for different applications.
Mapping Course Outcomes with Program Outcomes:
Course
Outcomes
CO1
CO2
CO3
CO4
CO5
Programme Outcomes
1
X
X
X
X
X
2 3 4 5 6 7 8 9 10 11 12
X X X
X
X X X
X
X X X
X
X
X X X
X
32
4th Semester B.E
Subject Code: TCMAT401
Subject Name: Engineering Mathematics –IV
Credits: 4:0:0
Prerequisites: Mathematics III.
Course Objectives:
1. Learn to solve algebraic and transcendental equations numerically and the concepts of finite
differences and it applications.
2. Understand the concepts of PDE and its applications to engineering.
3. Learn fitting of a curve, correlation, regression for a statistical data.
4. Learn the basic concepts of probability, random variables and probability distributions .
5. Learn the concepts of stochastic process and Markov chain.
Course contents:
UNIT 1
Numerical Solution of Algebraic and Transcendental equations: Method of false position, NewtonRaphson method.
Finite Differences and Interpolation: Forward and backward differences, Interpolation, NewtonGregory forward and backward Interpolation formulae, Lagrange’s interpolation formula, Newton’s
divided difference interpolation formula(no proof).
Numerical Differentiation and Numerical Integration: Derivatives using Newton – Gregory forward
and backward interpolation formulae, Newton – Cote’s quadrature formula , Trapezoidal rule,Simpson’s
1/3rd rule, Simpson’s 3/8th rule.
UNIT 2
Partial Differential Equations: Formation of PDE’s by elimination of arbitrary constants and arbitrary
functions, Solution of PDE - Lagrange’s Linear form, Method of separation of Variables.
Statistics: Curve fitting by the method of least squares, Fitting a Linear curve, Quadratic curve,
Geometric curve, Correlation and Regression.
UNIT 3
Probability: Probability of an event, Axiomatic definition, Addition law, Conditional probability,
Multiplication rule, Baye’s theorem.
Random Variables: Random variables (Discrete and Continuous), Probability density function,
Cumulative density function, Mean, Variance, Moment generating function.
UNIT 4
Probability Distributions: Binomial and Poisson distributions, Normal distribution, Exponential
distribution, Uniform distribution, Joint probability distribution (both discrete and continuous),
Conditional expectation.
UNIT 5
Stochastic Processes: Introduction, Classification of stochastic processes, Discrete time processes,
Stationary, Ergodicity, Autocorrelation, Power spectral density.
33
Markov Chain: Probability Vectors, Stochastic matrices, Regular stochastic matrices, Markov chains,
Higher transition probabilities, Stationary distribution of Regular Markov chains and absorbing states,
Markov and Poisson processes.
TEXT BOOKS:
1. 1.Murry R. Spiegel, John Schiller & R. Alu Srinivasan - Probability & Statistics - Schaum’s
outlines -2nd edition-2007.
2. R.E. Walpole, R. H. Myers, R. S. L. Myers and K. Ye – Probability and Statistics for Engineers
and Scientists – Pearson Education – Delhi – 8th edition – 2007.
3. B.S.Grewal-Higher Engineering Mathematics-Khanna Publishers-42nd edition-2012.
REFERENCE BOOKS:
1. B.S.Grewal - Numerical methods in Engineering and Science-Khanna Publishers-8th edition2009.
2. Glyn James- Advanced Modern Engineering Mathematics-PearsonEducation-4th edition-2010.
3. Kishor S. Trivedi – Probability & Statistics with reliability, Queuing and Computer
Science Applications – PHI – 2nd edition – 2002.
Course Delivery:
The Course will be delivered through lectures, class room interaction, group discussion and exercises and
self-study cases.
Course Assessment and Evaluation:
Direct Assessment Methods
What
Internal
assessment
tests
CIE
Class-room
open book
assignment
When/ Where
(Frequency in
the course)
Thrice (Average
of the best two
will be
computed)
Max
marks
Evidence
collected
Contributing to
Course
Outcomes
30
Blue books
C01-C05
Twice
10
Assignment
reports
C01-C05
10
Quiz
answers
Viva-Voce
Report
C01-C05
100
Answer
scripts
C01-C05
-
Feedback
forms
PO1,PO2,PO3,
PO4, PO11, PO12
-
Questionnaire
PO1,PO2,PO3,
PO4, PO11, PO12
Students
quiz
Viva-Voce
SEE
Indirect
Assessment
Methods
To
whom
Twice
End of course
(Answering 5 of
10 questions)
Middle of the
course
Standard
examination
Students feedback
Students
End of course survey
End of course
34
Questions for CIE and SEE will be designed to evaluate the various educational components
taxonomy) such as:
(Bloom’s
CIE and SEE evaluation:
S.No
Bloom’s Category
Test 1
Test 2
Test 3
Semester-End Examination
1
Remember
05
05
05
10
2
Understand
10
10
10
20
3
Apply
10
10
10
50
4
Analyze
05
05
05
20
5
Evaluate
0
10
0
0
6
Create
0
0
1
0
Course Outcomes:
1. Solve the problems of algebraic and transcendental equations using numerical methods
using a given data of equal and unequal intervals to find polynomial function for estimation.
2. Formation and solution of partial differential equations.
3. Fit a suitable curve for a tabulated values by the method of least squares.
4. Discuss the probability distribution arising in the study of engineering problems and their
applications.
5. Apply the stochastic process and Markov Chain concept in predictions of future events.
Mapping of course outcomes with Programme outcomes:
Course
Outcomes
Programme Outcomes
1
2
3
4
5 6 7 8 9 10 11 12
CO1
X X
X
CO2
X X X X
X
X
CO3
X X X X
X
X
CO4
X X
CO5
X X
X
35
Subject Code: TC402
Subject Name: Microcontroller
Credits: 4:0:0
Prerequisites: Logic Design, Analog Electronic circuits and Fundamentals of Computing
Course Objectives:
1. To provide the ability to understand the architecture of 8051 microcontroller, addressing modes
and instruction set
2. To provide experience to develop, run, and experimentally validate code written in a assembly
and high-level language for a 8051 microcontroller system
3. To provide experience to design digital and analog hardware interfaces for microcontroller-based
systems by integrating hardware and software
4. To validate and debug a microcontroller-based system and provide exposure to advanced
Microcontrollers like ARM and communication protocols like used in Embedded applications
5. To describe about the ARM processor architecture
Course contents:
UNIT 1
Microprocessors and Microcontroller: Introduction, Microprocessors and Microcontrollers, A
Microprocessors survey. RISC & CISC CPU Architectures, Harvard & Von-Neumann CPU architecture.
The 8051 Architecture: Introduction, 8051 Microcontroller Hardware, Input/ Output Pins, Ports and
Circuits External Memory, Counter and Timers, Serial Data Input / Output, Interrupts.
UNIT 2
Addressing Modes and Operations: Introduction, Addressing modes, External data Moves, Code
Memory, Read Only Data Moves / Indexed Addressing mode, PUSH and POP Opcodes, Data exchanges,
Example Programs; Byte level logical Operations, Bit level Logical Operations, Rotate and Swap
Operations, Example Programs. Arithmetic Operations: Flags, Incrementing and Decrementing, Addition,
Subtraction, Multiplication and Division, Decimal Arithmetic, Example Programs.
Jump and Call Instructions: The JUMP and CALL Program range, Jumps, calls and Subroutines,
Interrupts and Returns, More Detail on Interrupts, Example Problems
UNIT 3
8051 programming in C: Data types and time delays in 8051C, I/O programming, logic operations, data
conversion programs, accessing code ROM space, data serialization. Timer / Counter Programming in
8051: Programming 8051 Timers, Counter Programming, programming timers 0 and 1 in 8051 C, 8051
Serial Communication: Basics of Serial Communication, 8051connections to RS-232, 8051 Serial
communication Programming, Programming the second serial port, Serial port programming in C.
UNIT 4
Interrupts Programming: 8051 Interrupts, Programming Timer Interrupts, Programming External
Hardware Interrupts, Programming the Serial Communication Interrupts, Interrupt Priority in the
8051/52, interrupt programming in C.
8051 Interfacing and Applications: Interfacing 8051 to LCD, Keyboard, parallel and serial ADC, DAC,
Stepper motor interfacing, DC motor interfacing and PWM.
36
UNIT 5
ARM processor fundamentals, , Registers, Current Program Status Register, Pipelining, Exceptions,
Interrupts and Vector table, ARM processor Families, Serial Communication protocols – I2C, CAN,
USB, Firewire, Parallel protocols- parallel Bus, ARM Bus, ISA, PCI, Wireless Protocols
TEXT BOOKS:
1. Kenneth J. Ayala; “The 8051 Microcontroller Architecture, Programming & Applications”
2nd edition, Penram International, Thomson Learning 2005
2. Muhammad Ali Mazidi and Janice Gillespie Mazidi and Rollin D. McKinlay; “The 8051
Microcontroller and Embedded Systems – using assembly and C”- PHI, 2006
3. Andrew N. Sloss Dominic Symes, Chris Wright “ARM System Developer’s guide designing
and optimizing system software” by Elsevier Inc
4. Rajkamal “ Embedded systems, architecture, programming and design”
MCgraw-hill,
second edition
REFERENCE BOOKS:
1. Predko, “Programming and Customizing the 8051 Microcontroller” ,TMH
2. Raj Kamal, “Microcontrollers: Architecture, Programming, and Interfacing and System
Design”, Pearson Education, 2005
Course Delivery:
The Course will be delivered through lectures, class room interaction, exercises and self-study.
Indirect
Assessment
Methods
Direct Assessment Methods
Course Assessment and Evaluation:
What
To
whom
CIE
SEE
Internal
assessment
tests
Multiple
choice/
Objective
questions
Class-room
open book
assignment
Students
When/ Where
(Frequency in the
course)
Thrice(Average of
the best two will
be computed)
Max
marks
Evidence
collected
Contributing
to Course
Outcomes
30
Blue books
C01-C05
10
Blue books
C01-C05
10
Assignment
reports
C01-C05
100
Answer
scripts
C01-C05
Middle of the
course
-
Feedback
forms
End of course
-
Questionnaire
Thrice(Average of
the best two will
be computed)
Twice( Average of
the two will be
computed)
End of course
(Answering 5 of
10 questions)
Standard
examination
Students feedback
Students
End of course survey
37
PO1,PO2, PO3,
PO4, PO6, PO7,
PO8, PO9
PO1,PO2, PO3,
PO4, PO5, PO7,
PO10, PO12
Questions for CIE and SEE will be designed to evaluate the various educational components (Bloom’s
taxonomy) such as:
CIE and SEE evaluation:
S.No
Bloom’s Category
Test 1
Test 2
Test 3
Semester-End Examination
1
Remember
05
05
05
20
2
Understand
10
10
10
30
3
Apply
05
05
05
20
4
Analyze
05
05
05
20
5
Evaluate
05
05
05
10
6
Create
0
0
0
0
Course Outcomes:
1. Analyze and describe the architecture of 8051 microcontroller, addressing modes and instruction
set.
2. Develop, run, and experimentally validate code written in a assembly and high-level language for
a 8051 microcontroller system
3. Design digital and analog hardware interfaces for microcontroller-based systems by integrating
hardware and software
4. Develop and debug a microcontroller-based system and provide exposure to advanced
Microcontrollers like ARM and communication protocols like used in Embedded applications
5. Describe about the ARM processor architecture
Mapping of course outcomes with program outcomes
Course Outcomes
Programme Outcomes
1
CO1
CO2
CO3
CO4
CO5
2
3
4
5
X X
X
X X X
X
X
X X
X
6
7
8 9 10 11 12
X
X
38
X
Subject Code: TC403
Subject Name: Fundamentals of Verilog
Credits: 4:0:0
Prerequisites: Logic Design.
Course Objectives
1. Appreciate the importance of HDLs in digital designs.
2. Understand the lexical conventions of VERILOG HDL at dataflow; gate level, structural,
behavioral and RTL levels.
3. Model combinational and sequential circuits at behavioral, structural and RTL level.
4. Develop test benches to simulate combinational and sequential circuits in Modelsim Simulation
environment.
5. Interpret Verilog constructs for logic synthesis. Discriminate between manual and automated
logic synthesis and their impact on design. Discuss different FPGA architectures. Design
synchronous sequential circuits using FSM.
Course contents:
UNIT 1
Overview of Digital Design with Verilog HDL: Evolution of computer aided digital design- Emergence
of HDLs-Typical design flow-importance of HDLs-Verilog HDL-Design Methodologies-modulesinstances-components of simulation-example-basic concepts.
Modules and ports: Modules-ports-Rules-Hierarchical Names.
Gate Level modeling and Data flow modeling: Gate Types-Gate Delays-Examples-Continuous
assignment-Delays-Expressions, Operators, Operands-Operator Types-Examples.
UNIT 2
Behavioral modeling: Structured procedures-Procedural assignments- Timing controls-conditional
statement- Multi way branching-Loops-Sequential and parallel blocks, generate blocks-Examples.
Tasks and Functions: Difference between Tasks and Functions-Tasks-Functions-Automatic FunctionsConstant Function-Signed Functions.
UNIT 3
Logic synthesis with Verilog HDL: Logic synthesis-Verilog HDL Synthesis-Interpretation of Verilog
Constructs-Synthesis Design flow-examples-verification of the gate level netlist, modeling tips for logic
synthesis.
Timing and delays: Types of delay models- modeling-timing checks,-delay back annotation
UNIT 4
FPGA based systems: Introduction-basic concepts-Digital design with FPGAs-FPGA based system
design.
FPGA Fabrics: FPGA architectures-SRAM based FPGAs-Chip I/O- Circuit design of FPGA fabricsArchitecture of FPGA fabrics-SPARTAN-III and above versions-FPGA connectors
39
UNIT 5
Synchronous sequential circuits- Moore and Mealy machines-definition of state machines- state
machine as sequence controller- Design of state machines-state table- state assignment-transitionexcitation table- logic realization-Design example Serial adder.
Case studies- Traffic light controller, simple processor.
TEXT BOOKS:
1. Samir Palnitkar, VERILOG HDL-A Guide to digital design and synthesis, 2 ,nd edition, Pearson
education.2003.
2. Wayne Wolf , FPGA based system design, Reprint 2005, Pearson Education.
REFERENCE BOOKS:
1. Stephen Brown, Zvonko Vranesic ,Fundamentals of Digital logic with VERILOG design, ,
TMH.
Course Delivery:
The Course will be delivered through lectures, class room interaction, group discussion and exercises and
self-study cases.
Course Assessment and Evaluation:
CIE
Internal
assessment
tests
Class-room
open book
assignment
To
whom
Students
Surprise quiz
SEE
Indirect
Assessmen
t Methods
Direct Assessment Methods
What
Standard
examination
Students feedback
When/ Where
(Frequency in the
course)
Thrice(Average of
the best two will be
computed)
Twice( Average of
the two will be
computed)
Twice(Average of
two will be
computed)
End of course
(Answering 5 of 10
questions)
Middle of the
course
Max
marks
Evidence
collected
Contributing to
Course
Outcomes
30
Blue books
C01-C05
10
Assignment
reports
C01-C05
10
Quiz
answers
C01-C05
100
Answer
scripts
C01-C05
-
Feedback
forms
PO1,PO2,PO3,
PO4, PO11
End of course
-
Questionnaire
PO1,PO2,PO3,
PO4, PO11
Students
End of course survey
40
Questions for CIE and SEE will be designed to evaluate the various educational components (Bloom’s
taxonomy) such as:
CIE and SEE evaluation:
S.No
Bloom’s Category
Test 1
Test 2
Test 3
Semester-End Examination
1
Remember
05
05
05
10
2
Understand
05
05
05
10
3
Apply
10
10
10
50
4
Analyze
05
05
05
20
5
Evaluate
0
0
0
0
6
Create
05
05
05
10
Course Outcomes:
1. Demonstrate the basic knowledge of HDL.
2. Demonstrate the ability to apply HDL in modeling combinational and sequential circuits.
3. Ability to write a VERILOG test bench to test VERILOG modules.
4. Use EDA tools in digital circuit modeling, simulation, functional verification.
5. Target a VERILOG design to FPGA board. Design state machines to control complex systems.
Mapping of course outcome with program outcome:
Program Outcomes
Course
Outcome
s
CO1
CO2
CO3
CO4
CO5
PO
1
PO
2
PO
3
PO
4
X
X
X
X
X
X
X
X
X
X
X
X
X
x
X
x
X
X
X
X
PO
5
PO
6
PO
7
PO
8
PO
9
PO1
0
PO1
1
x
X
X
X
X
41
PO1
2
Subject code: TC 404
Subject Name: Control Systems
Credits: 3:1:0
Prerequisites: Engineering Mathematics III.
Course objectives:
1. To understand design concepts in engineering via this subject.
2. To understand basic concepts such as performance and stability, which are important concepts in
all engineering subjects.
3. To understand the concept of tradeoff in design, through examples showing how performance and
stability often involves clear tradeoff.
4. To understand how to perform critical analyses of a physical system – which will be useful for
projects and for their eventual industry or higher education progress.
Course contents:
UNIT 1
Modeling of Systems, Block diagrams and Signal Flow Graphs:
Control system, Mathematical Models of physical systems, Systems from Electrical-MechanicalChemical
domains,
Transfer
functions,
Block
Diagrams,
Signal
Flow
Graphs.
Tutorial: Covering four different application domains: 10 examples
UNIT 2
Time Response of Feedback Control systems:
Standard test signals, Unit step response, first and second order systems, Time response specifications,
Steady state errors.
Tutorial: Examples introducing the use of steady state errors and performance specifications in four
application domains. Introducing students to system design problems: 10 examples
UNIT 3
Stability Analysis:
Conditions for stability, Stability tests, Relative Stability, Root Locus construction, stability analysis and
design.
Tutorial: Examples to show the importance of stability in the performance assessment of any system, and
demonstrate how root locus can be used to analyze various stability related criteria. Furthermore, to
introduce students to the concept of tradeoff in design: where the tradeoff is between stability and
performance: 10 examples
UNIT 4
Stability in the Frequency Domain
Mathematical preliminaries, Nyquist Stability criterion, assessment of relative stability using Nyquist
criterion
Tutorial: Examples to demonstrate the difference between time and frequency domain approaches and the
power of the frequency domain approach. Further examples to calculate stability and relative stability:
10 examples
42
UNIT 5
Frequency Domain Analysis
Bode plots, Assessment of relative stability using Bode plots, All pass and minimum phase systems.
Tutorial: Use of the Bode plot and how they differ from Nyquist, through examples in different domains:
6 examples
TEXT BOOKS:
1. J Nagrath and M Gopal, “Control Systems Engineering”, New Age Inernational (P) Lts, 4 th
edition, 2005
REFERENCE BOOKS:
1. K Ogata, Modern Control Engineering, PHI, 4th Edition, 2002
2. M Gopal, Control Systems – Principles and Design, TMH, 1999
3. JJ D’Azzo, CH Houpis, Feedback Control System analysis and synthesis, McGraw Hill
Course Delivery:
The Course will be delivered through lectures, class room interaction, group discussion and exercises and
self-study cases.
Course Assessment and Evaluation:
Indirect
Assessment
Methods
Direct Assessment Methods
What
CIE
To
whom
When/ Where
(Frequency in
the course)
Max
marks
Evidence
collected
Contributing to
Course
Outcomes
Internal
assessment
tests
Thrice
30
Blue books
C01-C05
Open book
assignment
Twice
10
Assignment
reports
C01-C05
Surprise quiz
Twice(Average of
two will be
computed)
10
Quiz
answers
C01-C05
Standard
examination
End of course
(Answering 5 of
10 questions)
100
Answer
scripts
C01-C05
Middle of the
course
-
Feedback
forms
PO1,PO2,PO4,
PO7, PO9,PO12
End of course
-
Questionnaire
PO1,PO2,PO4,
PO7, PO9,PO12
Students
SEE
Students feedback
End of course
survey
Students
43
Questions for CIE and SEE will be designed to evaluate the various educational components (Bloom’s
taxonomy) such as:
CIE and SEE evaluation:
Sl.No
Bloom’s Category
Test 1
Test 2
Test 3
Semester-End Examination
1
Remember
10
05
05
10
2
Understand
0
05
05
20
3
Apply
10
10
00
30
4
Analyze
05
05
05
20
5
Evaluate
0
05
05
10
6
Create
05
00
10
10
Course Outcomes:
1. Understand the need and importance of control systems in engineering
2. Apply the response of 2nd order systems and some fundamental concepts of control through 2nd
order systems.
3. Understand concepts of stability, relative stability and Evaluate a systems stability properties root
locus analysis.
4. Value the concept of trade off in control system Design, through examples demonstrating how
performance and stability often involves clear trade off. Evaluate a systems stability properties
using Nyquist criterion.
5. Distinguish between time and frequency domain approaches and develop the ability to classify
which physical systems require the appropriate domain (time or frequency) for the
analysis/design. Evaluate a systems stability properties using Bode plots.
Mapping Course Outcomes with Program Outcomes:
Course Outcomes
Programme Outcomes
1
2
CO1
CO2
X X
X
CO3
CO4
X
X
CO5
3
4
5 6
7
8
9
10 11 12
X
X
X
X
X
X
X
44
Subject Code: TC405
Subject Name: Signals and Systems
Credits: 3:1:0
Prerequisites: Engineering Mathematics III
Course Objectives:
1. To familiarize the classification of signals. Different types of signals and properties of systems.
2. To provide the knowledge of analysis of LTI systems using concept of convolution,
difference/differential equations and block diagram representation
3. To learn the concept of Fourier representation of periodic and non-periodic signals
4. To learn the frequency analysis of LTI systems and sampling theorem and its application.
5. Introduce Z- transform, its properties and its applications in the analysis of LTI systems.
Course contents:
UNIT 1
Introduction: Definitions of a signal and a system, classification of signals, basic operations on signals,
elementary signals, and systems viewed as interconnections of operations, properties of systems.
UNIT 2
Time-domain representation for LTI systems-1: Convolution, impulse response representation,
Convolution Sum and Convolution Integral.
Time-domain representation for LTI systems-2: Properties of impulse response representation, Differential
and difference equation representations, Block diagram representations.
UNIT 3
Fourier representation for signals- 1: Discrete time and continuous time Fourier series (no derivation and
their properties.
Fourier representation for signals- 2: Discrete and continuous Fourier transforms (no derivations) and their
properties.
UNIT 4
Applications of Fourier representations: Introduction, Frequency response of LTI systems, Fourier
transform representation of periodic signals, Fourier transform representation of discrete time signals.
UNIT 5
Z-Transforms-1: Introduction, Z- transform, properties of ROC, properties of Z-transforms, inversion of Ztransforms.
Z-transforms-2: Transform analysis of LTI systems, unilateral Z-transform and its application to solve
difference equations.
45
REFERENCE BOOKS:
1. Simon Haykins and Barry Van Veen,Signals and Systems, John Wiley & Sons, 2002. Reprint
2009
2. Alan V Oppenheim, Alan S, Willsky and A Hamid Nawab ,Signals and Systems, ,Pearson
Education Asia/PHI, 2nd edition, 1997. Indian reprint 2010.
3. H.P Hsu, R. Ranjan,Signals and Systems, Scham’s Outlines, TMH, 2009
4. B.P Lathi, Linear systems and signals, Oxford University Press, 2010
5. Ganesh Rao and Satish Tunga,Signals and Systems, Sanguine Technical Publishers, 2012
Course Delivery:
The Course will be delivered through lectures, class room interaction, group discussion and exercises and
self-study.
Course Assessment and Evaluation:
To
whom
Internal
assessment
tests
Class-room
open book
assignment
CIE
Students
Surprise quiz
Standard
examination
SEE
Indirect
Assessmen
t Methods
Direct Assessment Methods
What
Students feedback
When/ Where
(Frequency in
the course)
Thrice(Average of
the best two will
be computed)
Twice( Average
of the two will be
computed)
Twice(Average of
two will be
computed)
End of course
(Answering 5 of
10 questions)
Middle of the
course
Max
marks
Evidence
collected
Contributing to
Course
Outcomes
30
Blue books
C01-C05
10
Assignment
reports
C01-C05
10
Quiz
answers
C01-C05
100
Answer
scripts
C01-C05
-
Feedback
forms
PO1,PO2,PO3,
PO4.PO5.PO11
End of course
-
Questionnaire
PO1,PO2,PO3,
PO4.PO5.PO11
Students
End of course survey
Questions for CIE and SEE will be designed to evaluate the various educational components (Bloom’s
taxonomy) such as:
CIE and SEE evaluation :
SL.No
Bloom’s Category
Test 1
Test 2
Test 3
Semester-End Examination
1
Remember
05
05
05
10
2
Understand
05
05
05
20
3
Apply
05
05
05
40
4
Analyze
05
05
05
10
46
5
Evaluate
05
05
05
10
6
Create
05
05
05
10
Course Outcomes:
1. Analyze the classification of signals, different types of signals and properties of systems.
2. Analyze and design of LTI systems using concept of convolution, difference/differential
equations and block diagram representation
3. Interpret and discuss the concepts of Fourier representation of periodic and non-periodic signals
4. Analyze frequency analysis of LTI systems and sampling theorem and its application.
5. Describe and solve Z- transform, its properties and its applications in the analysis of LTI systems.
Mapping Course Outcomes with Program Outcomes:
Course Outcomes
Programme Outcomes
1
2
3
4
5
6 7 8 9 10 11 12
CO1
CO2
CO3
CO4
X X
X
X X
X X
X
X
X
X
CO5
X X
X X
X
47
Sub Code: TC406
Subject Name: Microelectronics
Credits: 4:0:0
Prerequisites: Basic Electronics and Engineering Physics
Course Objectives:
1. To explain the need of Diodes and transistors
2. To discuss the applications of diodes and transistors.
3. To understand Fabrication Technologies.
4. To understand significance of BJTs and MOSFETs
5. To teach the characteristics of BJTs, MOSFETs and construction of gates and give exposure to
special semiconductor devices.
Course contents:
UNIT 1
Semiconductor Materials & Fabrication Technology:
Mobility and Conductivity - Charge Densities in a Semiconductor - Drift and Diffusion current Continuity Equation - Injected Minority Carrier Concentration - Potential Variation within a Graded
Semiconductor. Properties of Silicon and preparation, Fabrication Process –Oxidation, Diffusion, Ion
Implantation, Photolithography, Metallization, Planar Technologies
UNIT 2
PN Junction Diode:
Theory of PN Junction Diodes - V-I Characteristics - Static and Dynamic Resistance - Effect of
Temperature on Diodes – Space Charge and Diffusion Capacitance – Applications - Rectifiers, Clipper,
Clamper. Zener diode - Avalanche and Zener break down mechanisms - Zener diode as a voltage
regulator. Tunnel Diode and Varactor Diodes.
UNIT 3
Bipolar Junction Transistors:
Transistor types - Transistor Action - Current Components – Ebers Moll Equation - CB, CE, CC
Configurations - Transistor as a Switch and Amplifier - Comparison of Amplifier Configurations - Small
Signal Low Frequency Hybrid Model - High frequency Effects - DC and AC Load Lines - Operating
Point - Bias stability, Bias Methods, Bias Compensation.
UNIT 4
Field Effect Transistor:
Types - Comparison of FET and BJT - Characteristics and principle of operation of JFET - JFET
parameters - JFET as an amplifier, switch, and variable resistor. CS, CD, CG Configurations - Methods of
FET biasing. MOSFET - principle of operation - Depletion and Enhancement type of MOSFET - Output
and Transfer Characteristics - Other FET Devices: Heterojunction FETs, HEMTs, FINFET, MESFET
structure, Silicon Nanowire MOSFETs Introduction to CMOS devices.
UNIT 5
Special Devices
SCR : SCR Families - Two Transistor model. TRIAC - DIAC operation Characteristics - analysis Application. IGBT
and its application Opto Electronic Devices: Fundamentals of light –
Photoconductive , Photovoltaic, Photo-emissive Sensors - Application of Photo diodes and Photo
Transistors - Light emitters – Liquid Crystal Displays – Opto Couplers.
48
TEXT BOOKS:
1. Millman J and Halkias C C and Satyabrata J, Electronic Devices and Circuits , Third Edition,
Tata McGraw Hill, New Delhi, 2011.
2. Floyd T L, Electronic Devices and Circuits, Pearson Education, Seventh Edition, Pearson
Education, New Delhi, 2009.
REFERENCES:
1. Boylestad, R L and Nashelsky, L, Electronic Devices and Circuit Theory , Pearson Education,
Tenth Edition, ,New Delhi, 2009.
2. David A Bell, Electronic Devices and Circuits , Fourth Edition, Prentice Hall of India, 2008.
3. Robert T.Paynter, Introductory Electronic Devices and Circuits, Seventh Edition, Pearson
Education, USA, 2009.
Course Delivery:
The Course will be delivered through ppt lectures, class room interaction, group discussion and exercises
and self-study cases.
Course Assessment and Evaluation:
Indirect
Assessmen
t Methods
Direct Assessment Methods
What
CIE
Internal
assessment
tests
Class-room
open book
assignment
To
whom
Students
Surprise quiz
SEE
Standard
examination
Students feedback
When/ Where
(Frequency in the
course)
Thrice(Average of
the best two will be
computed)
Twice( Average of
the two will be
computed)
Twice(Average of
two will be
computed)
End of course
(Answering 5 of 10
questions)
Middle of the
course
Max
marks
Evidence
collected
Contributing to
Course
Outcomes
30
Blue books
C01-C05
10
Assignment
reports
C01-C05
10
Quiz
answers
C01-C05
100
Answer
scripts
C01-C05
-
Feedback
forms
PO1,PO2,PO7,
PO9
End of course
-
Questionnaire
PO1,PO2,PO7,
PO9
Students
End of course survey
49
Questions for CIE and SEE will be designed to evaluate the various educational components (Bloom’s
taxonomy) such as:
CIE and SEE evaluation:
Sl.No
Bloom’s Category
Test 1
Test 2
Test 3
Semester-End Examination
1
Remember
10
05
05
15
2
Understand
15
10
10
25
3
Apply
00
05
10
25
4
Analyze
05
05
05
25
5
Evaluate
0
5
0
10
6
Create
0
0
2
0
Course Outcomes:
1. Understand the semiconducting materials and the concept of fabrication technologies.
2. Understand the need of diodes and apply those in the application of devices
3. Analyze the characteristics, structure and fabrication of BJTs and be able to construct different
modes of operation of BJT.
4. Analyze the characteristics, structure and fabrication of JFETs and MOSFET and be able to
understand properties of JFET MOSFET and able to design CMOS Inverters
5. Understand the special semiconductor devices and technologies
Mapping Course Outcomes with Program Outcomes:
Course Outcomes
Programme Outcomes
1
2
3
4
CO1
CO2
CO3
CO4
X
X
X
X
X
CO5
X
X X
5 6 7 8 9 10 11 12
X
X
X
50
Subject Code: TCL 407
Subject Name: Microcontroller Lab
Credits: 0:0:1
Perquisites: Fundamentals of computing.
Course Objectives:
1. To apply the knowledge of microcontroller concepts by getting familiar to use the editor,
assembler, compiler, linker, loader and debugger tool chain of Keil IDE
2. To design the software for microcontroller systems by programming using Assembly and
Embedded C on Keil IDE
3. To develop, simulate and debug the Application software
4. To interface the microcontroller with other devices such as LEDs, Switches, Buzzer, Motor,
Interrupts, Keypad, LCD, ADC / DAC, Terminal etc. and build systems using internal Timers,
Serial port, Interrupt. the students conduct experiments
5. To validate and debug a microcontroller-based system
Course contents:
LIST OF EXPERIMENTS:
I – SIMULATION
1. Data transfer- block move, Exchange, Sorting, finding largest element in an array
2. Arithmetic instructions- Addition/subtraction, multiplication and division, square, cube- (16 bits
arithmetic operations-bit addressable)
3. Counters
4. Boolean and Logical Instructions (Bit manipulations)
5. CALL and RETURN
6. Code Conversion: BCD-ASCII, ASCII-Decimal, Decimal-ASCII, HEX-Decimal, and Decimal-HEX
7. Programs to generate Delay
II- INTERFACING:
1.
2.
3.
4.
5.
Write C programs to interface 8051 chip to Interfacing modules to develop single chip solutions
Key Board interface to 8051 to detect the key pressed
Seven segment interface to 8051 to display the message
Simple calculator using 6 digit seven segment display and Hex keyboard interface to 8051
Generate different waveforms Sine, Square, Triangular, Ramp etc using DAC interface to 8051,
change the frequency and amplitude.
6. Stepper motor interface to 8051
7. Elevator interface to 8051
8. ADC interface to 8051 to measure the analog voltage
TEXT BOOKS:
1. Kenneth J. Ayala; “The 8051 Microcontroller Architecture, Programming & Applications”
2nd edition, Penram International, Thomson Learning 2005
2. Muhammad Ali Mazidi and Janice Gillespie Mazidi and Rollin D. McKinlay; “The 8051
3. Microcontroller and Embedded Systems – using assembly and C”- PHI, 2006
51
Course Delivery:
The Course will be delivered through ppt lectures, class room interaction, group discussion and exercises
and self-study cases.
Course Assessment and Evaluation:
What
To
whom
Direct Assessment Methods
Internal
assessment
test
CIE
Indirect
Assessment
Methods
Max
marks
Evidence
collected
Contributing to
Course
Outcomes
30
Blue books
C01-C05
05
Observation
book
C01-C05
10
Record
C01-C05
05
Blue books
C01-C05
50
Answer
scripts
C01-C05
Middle of the
course
-
Feedback
forms
End of course
-
Questionaire
once(at the end
of the course)
Observation
book
Students
Record
Viva
SEE
When/ Where
(Frequency in
the course)
Standard
examination
Students feedback
Every lab
session
( Average of the
all experiment
marks)
Every lab
session
( Average of the
all experiment
marks)
once(at the end
of the course)
End of course
(Answering 1
Lab program )
Students
End of course
survey
PO1,PO2,PO3,
PO4,PO5,PO7,
PO10,PO12.
PO1,PO2,PO3,
PO4,PO5,PO7,
PO10,PO12.
Course Outcomes:
1. Design, write and debug “Assembly” and "C" programs for 8051 microcontrollers for various
tasks like data transfer, arithmetic and logical, bitwise and byte wise operations
2. Configure various peripherals such as timers, serial communications, analog-to-digital converters,
pulse width modulation for interrupt driven microcontroller applications using Keil IDE
3. Integrate the software and hardware modules for external interfaces to build microcontroller
based systems
4. Demonstrate and debug programs for simple real time embedded systems employing a 8051
microcontroller
5. Employ interfaces to microcontroller and integrate its applications
52
Mapping of course outcome with program outcome:
Course Outcomes
CO1
CO2
CO3
CO4
CO5
Programme Outcomes
1
2
3
4
X
X
X
X X X
X
X
X X
X
5
6
7
8 9 10 11 12
X
X
X
53
X
Subject Code: TCL408
Subject Name: Fundamentals of Verilog Lab
Credits: 0:0:1
Prerequisites: Logic Design Lab
Course Objectives:
1. To Design complex combinational and sequential digital circuits.
2. Model combinational and sequential digital circuits by Verilog HDL
3. Design and model digital circuits with Verilog HDL at behavioral, structural, and RTL levels
4. Develop test benches to simulate combinational and sequential circuits.
5. Describe the methods involved in debugging a programs using FPGA board
Course contents:
LIST OF EXPERIMENTS:
1. Introduction to CAD tool: Xilinx ISE 9.1i, Simulation using Modelsim: HDL code using
dataflow (operators), for all logic gates.
2. Data flow modeling: (operators) half adder, full adder, multiplexer, decoder,4 bit
comparator, adder/Subtractor. Gate level modeling: full adder, multiplexer, decoder,
3. Structural modeling: full adder using 2 half adders, 16:1 multiplexer using 4:1 multiplexer,
bit parallel adder using full adder
4. Test bench: half adder, full adder, multiplexer, 4 bit parallel adder, Fast adder
5. Behavioral modeling for combinational circuits: full adder, multiplexer, demultiplexer,
binary to gray code converter.
6. Introduction to logic synthesis onto FPGA kit: Logic synthesis of combinational circuits ,
full adder, multiplexer, decoder, binary to gray code converter
7. Logic synthesis : 3 bit ALU
8. Simulation of Sequential circuits : FFS: SR, JK, D, T FF with synchronous reset,
asynchronous reset
9. Synthesis of Sequential circuits : SR, JK, D, T FF with asynchronous reset & synchronous
reset with clock division
10. Counters: Design 4 bit binary, BCD counters, any sequence counter,
11. Gray counter ,Mod-13 counter, Shift Registers, Ring counter,
12. Interfacing Experiments : 7 Segment display, stepper motor, waveform generation using
DAC
54
TEXT BOOKS:
1. Samir Palnitkar, VERILOG HDL-A Guide to digital design and synthesis, 2nd edition, Pearson
education.2003.
REFERENCE BOOKS:
1. Wayne Wolf, FPGA based System Design , Pearson Education, 2005
2. Stephen Brown, Zvonko Vranesic, Fundamentals of Digital Logic with Verilog Design, Tata Mc
GrawHill,2010.
Course Delivery:
The Course will be delivered through black board teaching, exercises, self-study and demonstrations.
Course Assessment and Evaluation:
Direct Assessment Methods
What
When/ Where
(Frequency in
the course)
Max
marks
Evidence
collected
Contributing to
Course
Outcomes
Internal
assessment
test
once(at the end
of the course)
30
Blue books
C01-C05
Observation
book
Every lab
session
( Average of the
all experiment
marks)
05
Observation
book
C01-C05
Record
Every lab
session
( Average of the
all experiment
marks)
10
Record
C01-C05
Viva
once(at the end
of the course)
05
Blue books
C01-C05
Standard
examination
End of course
(Answering 1
Lab program )
50
Answer
scripts
C01-C05
Students feedback
Middle of the
course
-
Feedback
forms
PO1,PO2,PO3,
PO4, PO11.
End of course
-
Questionnaire
PO1,PO2,PO3,
PO4, PO11.
CIE
Students
SEE
Indirect
Assessment
Methods
To
whom
End of course
survey
Students
55
Course Outcomes:
1. Use electronic design automation (EDA) tools in digital circuit modeling, simulation, and
prototyping with FPGA
2. Implement existing SSI and MSI digital circuits with Verilog HDL.
3. Design combinational circuits of increasing complexity according to functional behavior.
4. Design sequential circuits of using RTL description.
5. Design various arithmetic circuits (both combinational and sequential) for specific needs.
Interface stepper motor and DAC with FPGA.
Mapping Course Outcomes with Program Outcomes:
Course
Outcomes
CO1
CO2
CO3
CO4
CO5
Programme Outcomes
1
X
X
X
X
X
2
X
X
X
X
X
3
X
X
X
X
X
4 5 6 7 8 9 10 11 12
X
X
X
X
X
X
X
X
X
X
56
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