Xiaowan Dong EDUCATION:

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Xiaowan Dong
Address: Department of Computer Science, RC BOX 270226, University of Rochester, Rochester, NY, 14627
Phone: +1(585)935-1686
Email: [email protected] Homepage: http://cs.rochester.edu/~xdong/
EDUCATION:
University of Rochester, Rochester, NY
Ph.D. student in the Department of Computer Science
University of Rochester, Rochester, NY
Master of Science in Computer Science
August 2014 - Present
(Advisor: Prof. Sandhya Dwarkadas )
August 2012 - August 2014
(Advisor: Prof. Sandhya Dwarkadas GPA: 3.96 / 4)
Nankai University, Tianjin, China
Bachelor of Engineering in Information Security
September 2008 - July 2012
Seoul National University, Seoul, Republic of Korea
March 2011 - August 2011
Exchange student in the Department of Computer Science and Engineering
RESEARCH INTERESTS:
Memory management, operating systems, and mobile systems
I am interested in improving the efficiency and safety of memory accesses in emerging computing
environments at the operating system levels. In particular, my current work explores the design of
shared address translation (page tables and TLB entries) for shared libraries to improve the efficiency
of Android systems.
RESEARCH EXPERIENCE:
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Sharing address translation information for shared libraries on Android platforms
Android applications' heavy use of shared libraries, coupled with the distinct features of Android
process creation model, provide opportunities for deduplication of address translation in memory,
cache and TLB. We implemented shared address translation infrastructure, in particular, page tables
and TLB entries, for shared libraries across all Android applications. Our approach is implemented in the
Android kernel with existing hardware support. Our experiments demonstrate sharing shared libraries'
address translation can halve the cost of fork. In addition, it can improve application launch (by 10%),
steady state and Inter-process communication (IPC) performance. The performance benefits come from
page fault elimination coupled with better cache and TLB performance.
PUBLICATIONS:
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Shared Address Translation Revisited. Xiaowan Dong, Sandhya Dwarkadas, Alan Cox. Under submission.
Characterization of Shared Library Access Patterns of Android Applications. Xiaowan Dong, Sandhya
Dwarkadas, Alan Cox. 2015 IEEE International Symposium on Workload Characterization (IISWC 2015), poster,
Atlanta, Georgia, USA
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COURSE PROJECTS:
Operating Systems Research Projects
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Built a shell in C language, which can launch programs in the foreground and the background, and support
pipe and a few internal commands like cd, exit, and jobs
Implemented an event-driven kernel synchronization primitive in the Linux kernel, where multiple
processes are allowed to block on an event until some other process signals that event
Implemented a Group Weighted Round Robin (GWRR) task scheduler in the Linux kernel
Implemented a counter-based clock page replacement algorithm in the Linux kernel
Computer Architecture Research Projects
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Implemented Sequential Prefetching, Tagged Sequential Prefetching, Stride Prefetching, and Delta
Correlation Prediction Table (DCPT) prefetching schemes on CMP$im simulator, based on the simulation
framework provided by The 1st JILP Data Prefetching Championship (DPC-1)
Built instruction cache and data cache on a basic MIPS 5-stage pipeline CPU simulator in Verilog
Implemented a MIPS OoO superscalar pipeline CPU simulator in Verilog
WORK EXPERIENCE:
Systems R&D intern, ARM Research, Austin TX
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May 2014 - August 2014
Analyzed the performance impact of Address Space Identifier (ASID) tag size on Translation Lookaside
Buffer (TLB)
Analyzed shared library access patterns of mobile workloads
COMPUTATIONAL SKILLS:
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Programming: C/C++, Java, PHP, MIPS and x86 assembly languages, Python, Verilog, and Matlab
Database Management System: SQL Server
Simulator: Gem5
Emulator: Qemu
GRADUATE-LEVEL COURSES:
Operating Systems, Parallel and Distributed Systems, Computer Architecture, Memory Systems, Advanced
Algorithms, Machine Learning, Data Mining
PROFESSIONAL SERVICES & HONORS:
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Submission Chair: Architectural Support for Programming Languages and Operating Systems (ASPLOS),
2015
Excellent Graduation Thesis Award, Nankai University, July 2012
Honorable Mention Award, Mathematical Contest in Modeling (MCM), 2011
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