Multicore Salsa
Parallel Programming 2.0
SC07 Reno Nevada
November 14 2007
Geoffrey Fox, Huapeng Yuan, Seung-Hee Bae
Community Grids Laboratory, Indiana University Bloomington IN 47404
Xiaohong Qiu
Research Computing UITS, Indiana University Bloomington IN
George Chrysanthakopoulos, Henrik Frystyk Nielsen
Microsoft Research, Redmond WA
gcf@indiana.edu, http://www.infomall.org
1
Abstract of Multicore Salsa
Parallel Programming 2.0
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Multicore or manycore systems are probably not architecturally that different
from parallel machines with which we are familiar. However in next 5-8 years
the basic commodity (PC) chips will have 64-256 cores and currently there is
little understanding of how to use them. It is clearly essential (at least for
major US technology companies) that we effectively use such cores on broadly
deployed machines.
This constraint makes multicore chips an exciting and different problem.
We describe general issues in context of the SALSA project at
http://www.infomall.org/multicore. This is using Service Aggregated Linked
Sequential Activities where we are looking at a suite of parallel datamining
applications as one important broadly useful capability for future multicorebased systems that will offer users navigation and advice based on the ever
increasing data from sensors and the Internet. A key idea is using services not
libraries as the basic building block so that we can offer productive user
interfaces (Parallel Programming 2.0) by adapting workflow and mashups for
composing parallel services. We still imagine that services will be constructed
by experts using extensions of current threading and MPI models. Automatic
compilers do not seem practical in the key 5-8 year time frame although
PGAS((Partitioned Global Address Space) could be valuable. We present
results on 8 cores (two quadcore chips) using the Microsoft CCR/DSS runtime
2
that combines MPI, threading and service capabilities.
Some links
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See http://www.connotea.org/user/crmc for references - select tag oldies for venerable links; tags like MPI
Applications Compiler have obvious significance
http://www.infomall.org/salsa for recent work including
publications
My tutorial on parallel computing
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http://grids.ucs.indiana.edu/ptliupages/presentations/PC2007/index.html
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Too
much
Computing?
Historically both grids and parallel computing have tried to increase
computing capabilities by
• Optimizing performance of codes at cost of re-usability
• Exploiting all possible CPU’s such as Graphics co-processors and
“idle cycles” (across administrative domains)
• Linking central computers together such as NSF/DoE/DoD
supercomputer networks without clear user requirements
Next Crisis in technology area will be the opposite problem –
commodity chips will be 32-128way parallel in 5 years time and we
currently have no idea how to use them – especially on clients
• Only 2 releases of standard software (e.g. Office) in this time span
so need solutions that can be implemented in next 3-5 years
Note that even cell phones will be multicore
There is “Too much data” as well as “Too much computing” and
maybe processing the data deluge will “solve” the “Too much
computing” problem
• Quite plausible on servers where we naturally will have lots of data
• Less clear on clients but short of other ideas
• Intel RMS analysis: Gaming and Generalized decision support
(data mining) are two ways of using these cycles
Intel’s Projection
RMS: Recognition Mining Synthesis
Recognition
Mining
Synthesis
What is …?
Is it …?
What if …?
Model
Find a model
instance
Create a model
instance
Today
Model-less
Real-time streaming and
transactions on
static – structured datasets
Very limited realism
Tomorrow
Model-based
multimodal
recognition
Real-time analytics on
dynamic, unstructured,
multimodal datasets
Photo-realism and
physics-based
animation
Intel’s Application Stack
Too much Data to the Rescue?
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Multicore servers have clear “universal parallelism” as many
users can access and use machines simultaneously
Maybe also need application parallelism (e.g. datamining) as
needed on client machines
Over next years, we will be submerged of course in data
deluge
• Scientific observations for e-Science
• Local (video, environmental) sensors
• Data fetched from Internet defining users interests
Maybe data-mining of this “too much data” will use up the
“too much computing” both for science and commodity PC’s
• PC will use this data(-mining) to be intelligent user
assistant?
• Must have highly parallel algorithms
Parallel Programming Model
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If multicore technology is to succeed, mere mortals must be able to
build effective parallel programs
There are interesting new developments – especially the new Darpa
HPCS Languages X10, Chapel and Fortress
However if mortals are to program the 64-256 core chips expected in 5-7
years, then we must use near term technology and we must make it easy
• This rules out radical new approaches such as new languages
Remember that the important applications are not scientific computing
but most of the algorithms needed are similar to those explored in
scientific parallel computing
We can divide problem into two parts:
• Micro-parallelism: High Performance scalable (in number of cores)
parallel kernels or libraries
• Macro-parallelism: Composition of kernels into complete
applications
We currently assume that the kernels of the scalable parallel
algorithms/applications/libraries will be built by experts with a
Broader group of programmers (mere mortals) composing library
members into complete applications.
Multicore SALSA at CGL
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Service Aggregated Linked Sequential Activities
Aims to link parallel and distributed (Grid) computing by
developing parallel applications as services and not as
programs or libraries
• Improve traditionally poor parallel programming
development environments
Developing set of services (library) of multicore parallel data
mining algorithms
Looking at Intel list of algorithms (and all previous experience),
we find there are two styles of “micro” parallelism
• Dynamic search as in integer programming, Hidden Markov Methods
(and computer chess); irregular synchronization with dynamic threads
• “MPI Style” i.e. several threads running typically in SPMD (Single
Program Multiple Data); collective synchronization of all threads together
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Most Intel RMS are “MPI Style” and very close to scientific
algorithms even if applications are not science
Scalable Parallel Components
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There are no agreed high-level programming environments for
building library members that are broadly applicable.
However lower level approaches where experts define
parallelism explicitly are available and have clear performance
models.
These include MPI for messaging or just locks within a single
shared memory.
There are several patterns to support here including the
collective synchronization of MPI, dynamic irregular thread
parallelism needed in search algorithms, and more specialized
cases like discrete event simulation.
We use Microsoft CCR
http://msdn.microsoft.com/robotics/ as it supports both MPI
and dynamic threading style of parallelism
There is MPI style messaging and ..
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OpenMP annotation or Automatic Parallelism of existing
software is practical way to use those pesky cores with existing
code
• As parallelism is typically not expressed precisely, one needs luck to get
good performance
• Remember writing in Fortran, C, C#, Java … throws away information
about parallelism
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HPCS Languages should be able to properly express parallelism
but we do not know how efficient and reliable compilers will be
• High Performance Fortran failed as language expressed a subset of
parallelism and compilers did not give predictable performance
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PGAS (Partitioned Global Address Space) like UPC, Co-array
Fortran, Titanium, HPJava
• One decomposes application into parts and writes the code for each
component but use some form of global index
• Compiler generates synchronization and messaging
• PGAS approach should work but has never been widely used – presumably
because compilers not mature
Summary of micro-parallelism
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On new applications, use MPI/locks with explicit
user decomposition
A subset of applications can use “data parallel”
compilers which follow in HPF footsteps
• Graphics Chips and Cell processor motivate such
special compilers but not clear how many
applications can be done this way
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OpenMP and/or Compiler-based Automatic
Parallelism for existing codes in conventional
languages
Composition of Parallel Components
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The composition (macro-parallelism) step has many excellent solutions
as this does not have the same drastic synchronization and correctness
constraints as one has for scalable kernels
• Unlike micro-parallelism step which has no very good solutions
Task parallelism in languages such as C++, C#, Java and Fortran90;
General scripting languages like PHP Perl Python
Domain specific environments like Matlab and Mathematica
Functional Languages like MapReduce, F#
HeNCE, AVS and Khoros from the past and CCA from DoE
Web Service/Grid Workflow like Taverna, Kepler, InforSense KDE,
Pipeline Pilot (from SciTegic) and the LEAD environment built at
Indiana University.
Web solutions like Mash-ups and DSS
Many scientific applications use MPI for the coarse grain composition
as well as fine grain parallelism but this doesn’t seem elegant
The new languages from Darpa’s HPCS program support task
parallelism (composition of parallel components) decoupling
composition and scalable parallelism will remain popular and must be
supported.
Mashups v Workflow?
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Mashup Tools are reviewed at
http://blogs.zdnet.com/Hinchcliffe/?p=63
Workflow Tools are reviewed by Gannon and Fox
http://grids.ucs.indiana.edu/ptliupages/publications/Workflow-overview.pdf
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Both include scripting
in PHP, Python, sh etc.
as both implement
distributed
programming at level
of services
Mashups use all types
of service interfaces
and perhaps do not
have the potential
robustness (security) of
Grid service approach
Mashups typically
“pure” HTTP (REST)
15
“Service Aggregation” in SALSA
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Kernels and Composition must be supported both inside
chips (the multicore problem) and between machines in
clusters (the traditional parallel computing problem) or
Grids.
The scalable parallelism (kernel) problem is typically only
interesting on true parallel computers as the algorithms
require low communication latency.
However composition is similar in both parallel and
distributed scenarios and it seems useful to allow the use of
Grid and Web composition tools for the parallel problem.
• This should allow parallel computing to exploit large
investment in service programming environments
Thus in SALSA we express parallel kernels not as traditional
libraries but as (some variant of) services so they can be used
by non expert programmers
For parallelism expressed in CCR, DSS represents the
natural service (composition) model.
Parallel Programming 2.0
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Web 2.0 Mashups will (by definition the largest
market) drive composition tools for Grid, web and
parallel programming
Parallel Programming 2.0 will build on Mashup tools
like Yahoo Pipes and Microsoft Popfly
Yahoo Pipes
CICC Chemical Informatics and Cyberinfrastructure
Collaboratory Web Service Infrastructure
Cheminformatics Services
Statistics Services
Database Services
Core functionality
Fingerprints
Similarity
Descriptors
2D diagrams
File format conversion
Computation functionality
Regression
Classification
Clustering
Sampling distributions
3D structures by
CID
SMARTS
3D Similarity
Docking scores/poses by
CID
SMARTS
Protein
Docking scores
Applications
Applications
Docking
Predictive models
Filtering
Feature selection
Druglikeness
2D plots
Toxicity predictions
Arbitrary R code (PkCell)
Mutagenecity predictions
PubChem related data by
Anti-cancer activity predictions
Need to make
Pharmacokinetic parameters
CID, SMARTS
all this parallel
OSCAR Document Analysis
InChI Generation/Search
Computational Chemistry (Gamess, Jaguar etc.)
Core Grid Services
Service Registry
Job Submission and Management
Local Clusters
IU Big Red, TeraGrid, Open Science Grid
Varuna.net
Quantum Chemistry
Portal Services
RSS Feeds
User Profiles
Collaboration as in Sakai
Clustering Data
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Cheminformatics was tested successfully with small datasets and
compared to commercial tools
Cluster on properties of chemicals from high throughput
screening results to chemical properties (structure, molecular
weight etc.)
Applying to PubChem (and commercial databases) that have 620 million compounds
• Comparing traditional fingerprint (binary properties) with real-valued
properties
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GIS uses publicly available Census data; in particular the 2000
Census aggregated in 200,000 Census Blocks covering Indiana
• 100MB of data
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Initial clustering done on simple attributes given in this data
• Total population and number of Asian, Hispanic and Renters
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Working with POLIS Center at Indianapolis on clustering of
SAVI (Social Assets and Vulnerabilities Indicators) attributes at
http://www.savi.org) for community and decision makers
• Economy, Loans, Crime, Religion etc.
Where are we?
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We have deterministically annealed clustering running well on 8core (2-processor quad core) Intel systems using C# and
Microsoft Robotics Studio CCR/DSS
Could also run on multicore-based parallel machines but didn’t
do this (is there a large Windows quad core cluster on
TeraGrid?)
• This would also be efficient on large problems
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Applied to Geographical Information Systems (GIS) and census
data
• Could be an interesting application on future broadly deployed PC’s
• Visualize nicely on Google Maps (and presumably Microsoft Virtual Earth)
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Applied to several Cheminformatics problems and have parallel
efficiency but visualization harder as in 150-1024 (or more)
dimensions
Will develop a family of such parallel annealing data-mining
tools where basic approach known for
• Clustering
• Gaussian Mixtures (Expectation Maximization)
• and possibly Hidden Markov Methods
Microsoft CCR
• Supports exchange of messages between threads using named
ports
• FromHandler: Spawn threads without reading ports
• Receive: Each handler reads one item from a single port
• MultipleItemReceive: Each handler reads a prescribed number of
items of a given type from a given port. Note items in a port can
be general structures but all must have same type.
• MultiplePortReceive: Each handler reads a one item of a given
type from multiple ports.
• JoinedReceive: Each handler reads one item from each of two
ports. The items can be of different type.
• Choice: Execute a choice of two or more port-handler pairings
• Interleave: Consists of a set of arbiters (port -- handler pairs) of 3
types that are Concurrent, Exclusive or Teardown (called at end
for clean up). Concurrent arbiters are run concurrently but
exclusive handlers are
• http://msdn.microsoft.com/robotics/
21
Preliminary Results
• Parallel Deterministic Annealing Clustering in
C# with speed-up of 7 on Intel 2 quadcore
systems
• Analysis of performance of Java, C, C# in
MPI and dynamic threading with XP, Vista,
Windows Server, Fedora, Redhat on
Intel/AMD systems
• Study of cache effects coming with MPI
thread-based parallelism
• Study of execution time fluctuations in
Windows (limiting speed-up to 7 not 8!)
Parallel Multicore
Deterministic Annealing Clustering
Parallel Overhead
on 8 Threads Intel 8b
0.45
10 Clusters
0.4
Overhead = Constant1 + Constant2/n
Speedup = 8/(1+Overhead)
0.35
Constant1 = 0.05 to 0.1 (Client Windows) due to thread
runtime fluctuations
0.3
0.25
20 Clusters
0.2
0.15
0.1
0.05
10000/(Grain Size n = points per core)
0
0
0.5
1
1.5
2
2.5
3
3.5
4
Total
Total
Asian
Asian
Hispanic
Hispanic
Purdue
Renters
Renters
Renters
IUB
30 Clusters
10 Clusters
In detail, different groups have
different cluster centers
Parallel Multicore
Deterministic Annealing Clustering
Parallel Overhead for large (2M points) Indiana Census clustering
on 8 Threads Intel 8b
This fluctuating overhead due to 5-10% runtime fluctuations between threads
0.250
0.200
overhead
“Constant1”
0.150
0.100
0.050
Increasing number of clusters decreases
communication/memory bandwidth overheads
0.000
0
5
10
15
20
#cluster
25
30
35
Parallel Multicore
Deterministic Annealing Clustering
0.200
Parallel Overhead for subset of PubChem clustering on 8 Threads
(Intel 8b)
0.180
“Constant1”
The fluctuating overhead
is reduced to 2% (as bits not doubles)
40,000 points with 1052 binary properties
(Census is 2 real valued properties)
0.160
overhead
0.140
0.120
0.100
0.080
0.060
0.040
Increasing number of clusters decreases
communication/memory bandwidth overheads
0.020
0.000
0
2
4
6
8
10
#cluster
12
14
16
18
Intel 8-core C# with 80 Clusters: Vista Run
Time Fluctuations for Clustering Kernel
• 2 Quadcore Processors
80 Cluster(ratio
of std to timeofvsrun
#thread)
• This is average of standard
deviation
time of the 8 threads
between messaging synchronization points
0.1
Standard Deviation/Run Time
10,000 Datpts
50,000 Datapts
0.05
500,000 Datapts
Number of Threads
0
0
1
2
3
4
5
6
7
8
Intel 8 core with 80 Clusters: Redhat Run
Time Fluctuations for Clustering Kernel
• This is average of standard deviation of run time of the
80 Cluster(ratio of std to time vs #thread)
8 threads between messaging synchronization points
0.006
Standard Deviation/Run Time
0.004
10,000 Datapts
50,000 Datapts
0.002
500,000 Datapts
Number of Threads
0
1
2
3
4
5
6
7
8
Basic Performance of CCR
MPI Exchange Latency in µs (20-30 µs computation between messaging)
Machine
OS
Runtime
Grains
Parallelism
MPI Exchange
Latency
Intel8c:gf12
(8 core 2.33 Ghz)
(in 2 chips)
Redhat
MPJE (Java)
Process
8
181
MPICH2 (C)
Process
8
40.0
MPICH2: Fast
Process
8
39.3
Nemesis
Process
8
4.21
MPJE
Process
8
157
mpiJava
Process
8
111
MPICH2
Process
8
64.2
Vista
MPJE
Process
8
170
Fedora
MPJE
Process
8
142
Fedora
mpiJava
Process
8
100
Vista
CCR (C#)
Thread
8
20.2
XP
MPJE
Process
4
185
Redhat
MPJE
Process
4
152
mpiJava
Process
4
99.4
MPICH2
Process
4
39.3
XP
CCR
Thread
4
16.3
XP
CCR
Thread
4
25.8
Intel8c:gf20
(8 core 2.33 Ghz)
Intel8b
(8 core 2.66 Ghz)
AMD4
(4 core 2.19 Ghz)
Intel4 (4 core 2.8 Ghz)
Fedora
CCR Overhead for a computation of
23.76 µs between messaging
Intel8b: 8 Core
(μs)
Pipeline
Spawned
Rendez
vous
MPI
Number of Parallel Computations
1
1.58
2
2.44
3
3
4
2.94
7
4.5
8
5.06
Shift
2.42
3.2
3.38
5.26
5.14
Two Shifts
Pipeline
4.94
3.96
5.9
4.52
6.84
5.78
14.32 19.44
6.82 7.18
Shift
Exchange As
Two Shifts
4.46
6.42
5.86
10.86 11.74
7.4
11.64
14.16 31.86 35.62
Exchange
6.94
11.22
13.3
2.48
18.78 20.16
Cache Line Interference
•
•
•
•
•
Cache
Line
Interference
Early implementations of our clustering algorithm
showed large fluctuations due to the cache line
interference effect discussed here and on next slide
in a simple case
We have one thread on each core each calculating a
sum of same complexity storing result in a common
array A with different cores using different array
locations
Thread i stores sum in A(i) is separation 1 – no
variable access interference but cache line
interference
Thread i stores sum in A(X*i) is separation X
Serious degradation if X < 8 (64 bytes) with Windows
– Note A is a double (8 bytes)
– Less interference effect with Linux – especially Red Hat
Cache Line Interference
•
•
•
Machine
OS
Run
Time
Intel8b
Intel8b
Intel8b
Intel8b
Intel8a
Intel8a
Intel8a
Intel8c
AMD4
AMD4
AMD4
AMD4
AMD4
AMD4
Vista
Vista
Vista
Fedora
XP CCR
XP Locks
XP
Red Hat
WinSrvr
WinSrvr
WinSrvr
XP
XP
XP
C# CCR
C# Locks
C
C
C#
C#
C
C
C# CCR
C# Locks
C
C# CCR
C# Locks
C
Time µs versus Thread Array Separation (unit is 8 bytes)
1
4
8
1024
Mean Std/
Mean
Std/
Mean Std/
Mean Std/
Mean
Mean
Mean
Mean
8.03
.029
3.04
.059
0.884 .0051
0.884 .0069
13.0
.0095 3.08
.0028
0.883 .0043
0.883 .0036
13.4
.0047 1.69
.0026
0.66
.029
0.659 .0057
1.50
.01
0.69
.21
0.307 .0045
0.307 .016
10.6
.033
4.16
.041
1.27
.051
1.43
.049
16.6
.016
4.31
.0067
1.27
.066
1.27
.054
16.9
.0016 2.27
.0042
0.946 .056
0.946 .058
0.441 .0035 0.423
.0031
0.423 .0030
0.423 .032
8.58
.0080 2.62
.081
0.839 .0031
0.838 .0031
8.72
.0036 2.42
0.01
0.836 .0016
0.836 .0013
5.65
.020
2.69
.0060
1.05
.0013
1.05
.0014
8.05
0.010
2.84
0.077
0.84
0.040
0.840 0.022
8.21
0.006
2.57
0.016
0.84
0.007
0.84
0.007
6.10
0.026
2.95
0.017
1.05
0.019
1.05
0.017
Note measurements at a separation X of 8 (and values between 8 and 1024 not shown)
are essentially identical
Measurements at 7 (not shown) are higher than that at 8 (except for Red Hat which
shows essentially no enhancement at X<8)
If effects due to co-location of thread variables in a 64 byte cache line, the array must be
aligned with cache boundaries
–
In early implementations we found poor X=8 performance expected in words of A split across
cache lines
DSS Section
• We view system as a collection of services
– in this case
– One to supply data
– One to run parallel clustering
– One to visualize results – in this by spawning
a Google maps browser
– Note we are clustering Indiana census data
• DSS is convenient as built on CCR
Average run time (microseconds)
350
DSS Service Measurements
300
250
200
150
100
50
0
1
10
100
1000
10000
Timing of HP Opteron Multicore as aRound
functiontrips
of number of simultaneous twoway service messages processed (November 2006 DSS Release)
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Measurements of Axis 2 shows about 500 microseconds – DSS is 10 times better
37
Inter-Service Communication
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Note that we are not assuming a uniform
implementation of service composition even if user sees
same interface for multicore and a Grid
• Good service composition inside a multicore chip can require
highly optimized communication mechanisms between the
services that minimize memory bandwidth use.
• Between systems interoperability could motivate very
different mechanisms to integrate services.
• Need both MPI/CCR level and Service/DSS level
communication optimization
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Note bandwidth and latency requirements reduce as
one increases the grain size of services
• Suggests the smaller services inside closely coupled cores and
machines will have stringent communication requirements.
Inside the SALSA Services
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We generalize the well known CSP (Communicating Sequential
Processes) of Hoare to describe the low level approaches to fine grain
parallelism as “Linked Sequential Activities” in SALSA.
We use term “activities” in SALSA to allow one to build services from
either threads, processes (usual MPI choice) or even just other services.
We choose term “linkage” in SALSA to denote the different ways of
synchronizing the parallel activities that may involve shared memory
rather than some form of messaging or communication.
There are several engineering and research issues for SALSA
• There is the critical communication optimization problem area for
communication inside chips, clusters and Grids.
• We need to discuss what we mean by services
• The requirements of multi-language support
Further it seems useful to re-examine MPI and define a simpler model
that naturally supports threads or processes and the full set of
communication patterns needed in SALSA (including dynamic
threads).
• Should start a new standards effort in OGF perhaps?