155 IEEE TRANSACTIONS ON COMPUTERS, VOL. 39, NO. 1, JANUARY 1990 hrther Comments on “Detection of Faults in Programmable Logic Arrays” JAMES JACOB A N D NRIPENDRA N. BISWAS Abstract-In a recent correspondence 111, Ye-Wei and Wei have shown two counterexamples which contradict Theorems 4 and 5 of Smith [2]. In his author’s reply [3], Smith has stated an additional condition under which Theorems 4 and 5 will hold good. In this correspondence, we provide a counterexample which contradicts Smith’s modified Theorem 5. We also provide another counterexample which contradicts even theorem 3 of Smith’s original paper [2]. Index Terms-Crosspoint faults, multiple fault detection, programmable logic array (PLA). The detection of multiple faults in PLA’s is an important though complex problem. Theorems 3, 4, and 5 in [2] relate to the detection of certain types of crosspoint faults in a PLA, by a test set for all single crosspoint faults. T is used to denote the complete test set for all detectable single crosspoint faults in a PLA. The theorems are stated below. Theorem 3: T detects any combination of S faults. Manuscript received April 6, 1987; revised August 20, 1987. The authors are with the Department of Electrical Communication Engineering, Indian Institute of Science, Bangalore 560 012, India. IEEE Log Number 8930680. 0018-9340/90/0100-0155$01.00 0 1990 IEEE 156 IEEE TRANSACTIONS ON COMPUTERS, VOL. 39, NO. 1 , JANUARY 1990 Theorem 4: In a G-D irredundant circuit, any detectable combination of G and D faults is detected by T. Theorem 5: In an S-A irredundant circuit, any detectable combination of S and A faults is detected by T. Theorem 3 relates to the detection of multiple S faults even when some undetectable single S faults may be present in the PLA. A similar theorem for A faults is also given in [2] as Theorem 2. No similar theorems exist for G and D faults since two or more undetectable faults of these types may become detectable in combination, as has been rightly pointed out in [2]. However, Theorem 3 is not valid because two or more undetectable S faults also can become detectable in combination. Consider the following example. Example 1: Let the C-D arrays of a PLA be XI x 2 x 3 z x 1. This is an irredundant PLA in which there are no shared implicants. All single G, D , S, and A faults can be detected by a minimal test set T of six vectors. The test vectors with their fault-free response is given below. X1 X2 X3 X4 21 22 23 24 ___-____---_--_-__------------------------ 1 1 x 1 1 ____________-______ A minimal test set T for all detectable single crosspoint faults in this PLA, constituting four vectors and the fault-free response of the PLA to this test set is given below. 2 O O O O 1 O O 0 1 0 1 1 1 0 0 0 0 0 1 1 1 0 0 . t 4 1 0 1 O 0 0 1 1 t 5 1 1 0 0 0 0 0 0 t 6 1 1 1 1 1 0 1 0 ____________________---------------------Suppose the following S and A faults C l , C i , c,q, d:, 4, 4, and 4 occur. The modified C-D arrays are shown below. x 1 x2 x 3 x 4 21 22 23 24 -_____-------__--------------------___ x1 x2 x 3 2 ...................... 1 1 x 1 1 0 t l O 0 1 0 O l O X 1 1 0 1 1 1. l 0 l X 0 0 t 3 1 0 1 1 t2 are undetectable individually, but are The S faults C ; and detectable in combination. The modified C-D arrays in the presence of these two faults is XI x2 x 3 z ----------__--_____ 0 1 1 1. 1 0 1 1 -----------------It may be easily verified that T fails to detect the detectable double fault. This contradicts Theorem 3 of [2]. Two counterexamples to Theorems 4 and 5 were given in [l]. However, in the author’s reply [3], it was pointed out that these theorems will remain valid if there are no shared implicants in a PLA or if there exists an output ordering among the q output functions such that all single G and D ( S and A ) faults on the implicants of any output function Z j are detected via one or more of the outputs Z;, i 5 j ( 1 5 i, j 5 q). Theorem 4 will indeed remain valid in such circumstances because G and D faults behave similar to stuckat-1 and stuck-at-0 faults on the corresponding fan-out branches in the AND-OR equivalent circuit of the PLA and hence the results of Schertz and Metze [4] are applicable to such PLA’s. However, since S and A faults behave differently from stuck faults, these results cannot be applied here and Theorem 5 is invalid even when an output ordering exists (as is the case when there are no shared implicants). Consider the following example. Example 2: Let the C-D arrays of the PLA be X1 X2 X3 X4 21 22 23 24 ----------_---------___________r_______ l X l 1 0 o x o x 0 1 l 0 0 X l X 1 0 1 0 0 . 1 0 0 x 0 0 1 0 1 ______________------__________________ t 4 1 1 o o ........................ X l t t 3 0 -----------------__ 1 t 0 0 0 0 1 . 0 It can be easily verified that the detectable combination of the above S and A faults is not detected by T. This contradicts Theorem 5 even under the modified assumption [3]. REFERENCES L. Ye-Wei and J. Wei, “Comments on ‘Detection of faults in programmable logic arrays’,’’ IEEE Trans. Comput., vol. C-35, pp. 930-931, Oct. 1986. [2] J. E. Smith, “Detection of faults in programmable logic arrays.” IEEE Trans. Comput., vol. C-28, pp. 845-853, Nov. 1979. [3] -, “Author’s reply,” IEEE Trans. Comput., vol. C-35, p. 931, Oct. 1986. [4] D. R. Schertz and G. Metze, “On the design of multiple fault diagnosable networks,” IEEE Trans. Comput., vol. C-20, pp. 1361-1364, Nov. 1971. [I] Author’s Reply J. E. SMITH In my original response to comments [11, paragraph 4 suggests the relevant modifications to Theorems 4 and 5 of [2]. I begin by restating the paragraph. To apply the results in [2] to general PLA’s, one must be able to order the n outputs, zil, zi2, ... zm such that all the G and D ( S and A ) faults, in the PLA feeding output zil are detected through output zil (i.e., by observing output zil only). All the faults in the portion of the PLA feeding zij must be detected through zij, with the exception of faults already detected through any zim, m < j . If any such Manuscript received December 21, 1987. The author is with the Astronautics Corporation of America, Madison, WI 53716. IEEE Log Number 8930683. x o x o 0 0 0 1 _________________--_------------------- OO18-9340/90/01OO-0156$01.OO 0 1990 IEEE 157 IEEE TRANSACTIONS ON COMPUTERS, VOL. 39, NO. 1, JANUARY 1990 ordering of outputs is possible for a given single G and D ( S and A ) test set, then the test set is also a multiple G and D (S and A ) test set. An immediate corollary of the above is that a sufficient condition for detecting G and D faults in a G-D irredundant PLA with a single fault test set is that all the implicants are unshared. I made an error in applying the same corollary to S and A faults. In order to apply the above output ordering to PLA’s with S and A faults, one must be careful with the definition of “faults in a PLA feeding an output.” Admittedly, this is not clearly done in [l]. The problem is that an appearance ( A ) fault connects more logic (and potential S faults) to a given output. Under certain fault conditions, S faults may be detectable through any of the outputs. Hence, for the purpose of applying the above output ordering, S faults must effectively be considered to feed all the outputs of the PLA. With this in mind, for an output ordering as defined above to exist, it is necessary for all the implicants (ANDS) to be connected to one of the outputs. This output then becomes zil. As has been the case throughout this discussion, this assumes an AND-OR PLA. REFERENCES [l] J . E. Smith, “Author’s reply,” ZEEE Trans. Comput., vol. C-35, p. 931, Oct. 1986. [2] -, “Detection of faults in programmable logic arrays,” ZEEE Trans. Comput., vol. C-28, pp. 845-853, Nov. 1979.