International Journal of Application or Innovation in Engineering & Management (IJAIEM)
Web Site: www.ijaiem.org Email: editor@ijaiem.org, editorijaiem@gmail.com
Volume 2, Issue 1, January 2013
ISSN 2319 - 4847
Methodology to Achieve Ride-Through of an
Adjustable Speed Drives (ASD’s) Using
Supercapacitors during Voltage Sag
S.S.Deswal1, Rajveer Mittal2, Ratna Dahiya3 and D.K.Jain4
1
Assoc. Prof., Department of Electrical Engg., Maharaja Agrasen Institute of Technology, Sec-22, Rohini, Delhi
2
Assoc. Prof., Department of Electrical Engg., Maharaja Agrasen Institute of Technology, Sec-22, Rohini, Delhi
3
Professor, Department of Electrical Engg., NIT, Kurukshetra, Haryana
4
Professor, Department of Electrical Engg., DCRUST, Murthal, Haryana
ABSTRACT
During the voltage unbalance, the resulting adverse effects on equipments such as induction motors and power electronic
converters and drives on ASDs have been described. It has been observed that during unsymmetrical fault, the input rectifier
slips into the single phase operation and draw heavy currents which may actuate the overload protection and trip the ASDs. The
application of supercapacitors bank with boost converter to inject energy at DC-Link under voltage unbalance condition has
been incorporated. The supercapacitor provides ride-through and reduces the current overshooting by injecting energy at DCLink. Based on the designed topology, simulation model in MATLAB 7.5 (Sim Power Block set) has been developed for voltage
unbalance conditions with supercapacitor as an energy storage device. The designed control technique is modeled, simulated
and successfully implemented in the laboratory. The extensive simulation results supported by experimental results were
provided to validate the proposed system .
Keywords: Adjustable Speed Drives, Electric Power Quality, Ride-through Capabilities, Energy Storage Devices,
Supercapacitors
1. INTRODUCTION
The greatest effect of voltage unbalance is on three-phase induction motors. Three-phase induction motors are one of
the most common loads on the network and are found in large numbers especially in industrial environments. When a
three-phase induction motor is supplied by an unbalanced system the resulting line currents show a degree of unbalance
that is several times the voltage unbalance. An excessive level of voltage unbalance can have serious impacts on mains
connected induction motors. Although induction motors are designed to tolerate a small level of unbalance they have
to be derated if the unbalance is excessive. Voltage unbalance also has an impact on ac variable speed drive systems
where the front end consists of three-phase rectifier systems. The triplen harmonic line currents that are
uncharacteristic to these rectifier systems can exist in these situations leading to unexpected harmonic problems.
Although it is practically impossible to eliminate voltage unbalance it can be kept under control at both utility and plant
level by several practical approaches.
Voltage unbalance is regarded as a power quality problem of significant concern at the electricity distribution level.
Although the voltages are quite well balanced at the generator and transmission levels the voltages at the utilization
level can become unbalanced due to the unequal system impedances and the unequal distribution of single-phase loads.
The level of current unbalance that is present is several times the level of voltage unbalance. Such an unbalance in the
line currents can lead to excessive losses in the stator and rotor that may cause protection systems to operate causing
loss of production. [1-5]
Three-phase diode rectifier systems are an essential part of conventional Adjustable Speed Drives as shown in . 1 and
uninterruptible power supplies. These rectifier systems draw non-sinusoidal current waveforms from the ac mains. If
the ac supply system is balanced the line current waveform may take the “double pulse per half cycle” shape that
contains characteristic harmonic orders given by:
h  kq  1
(1)
where h = harmonic order ,k = 1, 2,….and q=number of pulses of the rectifier system giving only 5th ,7th , 11th,
13th… order harmonics.
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Volume 2, Issue 1, January 2013
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Figure 1 Typical adjustable speed drives (ASDs) system
As the supply system becomes unbalanced the line current waveform deviates away from the double pulse formation to
single pulse formation leading to uncharacteristic triplen harmonics. Supply voltage unbalance can lead to tripping of
drive systems that is caused by excessive ac line currents on some phases and under voltage on the DC-Link. This can
also lead to excessive thermal stress on diodes and dc link capacitor. Increase in the unwanted triplen harmonic
currents can also lead to undesirable harmonic problems in the supply system.
The different ride-through require energy storage devices injecting power at the DC-link during voltage sags as
described in the literature[7-15]. They are based around software control (such as kinetic and magnetizing energy
recovery), hardware (such as increasing the DC-Link capacitor size), or a combination (such as a boost converter) [6,
19]. Most of the mitigation techniques are based on the injection of active power, thus compensating the loss of active
power supplied by the system [10-13]. An important distinction between each of the possible ride-through approaches is
their ability to provide full-power ride-through, which is required by many applications.
The conventional topology of a boost converter can be used to maintain the DC-Link voltage during voltage sag, and
can either be integrated into new drives between the rectifier and the DC-Link capacitors or retrofitted as an add-on
module. The add-on module is used to retrofit existing drives with ride-through capabilities. Besides energy storage
systems, some other devices Constant voltage transformers (CVT), DVR may be used to solve Electric Power Quality
problems [9-12].
The sensitivity of AC ASD’s to voltage sags is presented in a voltage tolerance curve is defined by IEEE Std. 1346[5]
as shown in Figure 2. It may be seen that the ASD’s can withstand a reduction in the line voltage upto 85% of nominal
value for an extended duration of time. For all points falling below the voltage tolerance curve, the drive will trip.
SEMI F47-0200, Specification for Semiconductor Processing Equipment Voltage Sag Immunity [6], specifies the
required voltage sag tolerance for semiconductor fabrication equipment. SEMI F47 requires that semiconductor
processing equipment tolerate voltage sags connected onto their AC power line. They must tolerate sags to 50% of
equipment nominal voltage for duration of up to 200 ms, sags to 70% for up to 0.5 seconds, and sags to 80% for up to
1.0 second.
Figure 2 Voltage tolerance curve of an ASD’s as per IEEE Std.1346
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Volume 2, Issue 1, January 2013
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It is observed from the literature survey that only theoretical analysis have been done by the different researchers in
regards of providing ride-through to an Adjustable Speed Drives during voltage unbalance due to unsymmetrical fault
conditions. Experimental work for improving upon the adverse effects of voltage unbalancing on Adjustable Speed
Drives has not yet been proposed and implemented. Therefore in the present work, it is aimed to study the effectiveness
of the supercapacitor as an energy storage device for providing ride-through to ASD’s during symmetrical and
unsymmetrical fault conditions [16-22].
2. ANALYSIS OF SYMMETRICAL AND UNSYMMETRICAL FAULTS
2.1 Symmetrical
The classification of different types of voltage sags such as type A,B,C,D,E are described in [2]. Voltage sag of Type A
occurs because of balanced three-phase faults or power failure. This type of voltage sag is the most severe. Voltage sags
of type A are symmetrical, all phases experience the same retained voltage and phase-angle jump. It results in the
reduction of the voltage on the DC-Link which is proportional to the AC source voltage. The under-voltage or over
current protection on the DC-Link may trip the ASD’s. The basic model for a distribution system [7] is shown in Figure
3.
Figure 3 Basic model for fault analysis
For a symmetric three-phase fault the voltage at the Point-of-Common-Coupling (PCC) can be estimated using a simple
voltage-divider model represented by the equation (2). In this case the fault impedance is not considered.
V
Z
Z
Feeder E
Z 1
S
Feeder
(2)
Here V is the retained voltage at PCC, E1 is the pre-fault voltage in phase A, ZFeeder is the feeder impedance and ZS
is the source impedance.
2.2 Unsymmetrical Faults
A phase to ground fault will result in a type B. A phase to phase fault results in a type C. If the voltage sag is of Type B
or Type C, the circuit will behave as a single-phase rectifier. Even 10% voltage sag will result in a single-phase
operation of the three-phase diode rectifier. The voltage between the two non faulted phases is unaffected and the DCLink voltage will not be reduced, however the current amplitude will increase. The same amount of energy must be
transferred, but now in two pulses instead of six pulses. The peak value of the current will be 200% larger, and may
cause an over-current or a current unbalance. The over-current or unbalance protection may trip the ASD’s. A phase
angle jump will affect the phase voltages and the DC-Link voltage. For sag magnitude of 50%, the DC-Link voltage
does not drop below 70%, even for a small capacitance. This is because there is at least one phase that is still at 100%
magnitude, and this phase stablizes the DC-Link voltage.
If there is a transformer that removes the zero-sequence between the fault location and the load for phase to ground
fault, the voltage sag will be of type D. The voltage sags of type E, F and G are due to a two phase to ground fault [1-5].
For sag magnitude 50% in Type D, there is no phase which has 100% magnitude and, therefore, the effect is more
harmful on the DC-Link. In case of type B, C, D or E voltage sag, input rectifier passes into single-phase operations
with the consequences such as input current distortion and DC voltage ripple increase with dominant component at
double frequency and with average voltage reduction in C type voltage sag case. Consequently torque contains the
second and fourth harmonic components along with the fundamental. The motor torque oscillatory component presence
can leads to mechanical resonance exciting in coupled multi-motor drives besides noise increase, for e.g. in paper
production machines.
Thus, the unsymmetrical faults lead to three major negative effects that unbalanced input voltages can have on ASD’s
performance. [9-12] :
a)
Significant input current unbalances which stresses the diode bridge rectifiers and input protective devices
such as fuses, contactors and circuit breakers.
b)
Injects a second harmonic voltage component on the DC-Link voltage which increases the electrical
stresses on the DC-Link choke inductor (if used) and the DC-Link electrolytic capacitors. It potentially
shortens the capacitor lifetime.
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Volume 2, Issue 1, January 2013
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c)
May give rise to ripple torque of magnitude double the fundamental frequency of induction machine
which increases the mechanical and thermal stresses.
3. PROPOSED RIDE-THROUGH TOPOLOGIES
The objective of this section is to investigate the performance of an ASD’s under three-phase symmetrical and
unsymmetrical fault leading to balanced and unbalanced voltage sag at PCC. The proposed topology is designed by
using supercapacitor as energy storage device along with boost converter across DC-Link as a ride-through alternative
for ASD’s.
The performance of ASD’s under various fault conditions has been simulated using MATLAB Simulink Power System
Block set tool box. The functional block diagram is shown in Figure 4. A three-phase programmable voltage source
feeds the power bus to PCC through series impedance (taken as resistance of 0.1 ohm assuming the length of line to be
very small). Two independent feeders are connected at this PCC bus; one feeds the ASD’s and the other is connected to
the load. The faults are created at the load feeder to study the impact of voltage sags on the ASD’s connected at the
same PCC. The shunt impedance method has been used to generate voltage sags [22]. At the time of faults the fault
current flows through the impedance leading to a voltage drop across it, thereby causing voltage sags at PCC.
Figure 4 Block Diagram of Proposed Technique
The ASD’s used is a scalar controlled induction motor of specifications 5 H.P, 415 volts (L-L), 3- Phase, 4 Poles, 50
Hz, 1444 rpm and is having a supercapacitors as an energy storage device at DC-Link. A buck-boost DC-DC converter
converts the output of the connected energy storage device to the desired DC-Link voltage. The hardware set up is
shown in Figure 5. It consists of:
a)
AC/DC converter section: This unit consists of uncontrolled three- phase diode bride rectifier.
b)
DC/AC inverter unit: This unit consists of MOSFET based inverter.
c)
Energy Storage Devices: The device is a supercapacitor bank of 12V modules. This 12V DC is converted
to 220 V DC (for experimental purpose) with the help of buck-boost converter
Voltage Sag Generator Unit: The various types of faults were created in the lab using shunt impedance method by
actually grounding/shorting the line terminals in order to represent the true voltage sag conditions as shown in Figure
4.
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Volume 2, Issue 1, January 2013
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Figure 5 View of Designed Hardware
1. Waveform in LabVIEW
2. DAQ board
3. DC isolation circuit
4. Isolation transformer
5. Supercapacitor
6. 3-phase induction motor
7. Sag generator
8. 3-phase supply
9. AC/DC converter section
10.Capacitor bank(DC- link)
11. Adjustable speed drives
12. Boost convereter
13. DC- link
14. Function generator
15.3-phase Auto transformer
16. Battery
4. MODELING OF THE SYSTEM
4.1 Diode Rectifier Equations
The basic equations of a three-phase uncontrolled rectifier with input impedance in derivative form are given as:
pi  (Vmax Vdc ) 2 Ls
(3)
d
pV  (id io ) Co
dc
(4)
where, id is supply current and io is the current drawn by the inverter section.
The input AC currents of the rectifier are computed as follows. When VRY is maximum (Vmax) the current (id) flows
from terminal ‘R’ to ‘Y’ through the concerned rectifier diode pair and the load. Where as for minimum value of VYR
is maximum, the current flows from terminal ‘Y’ to ‘R’. The current in line ‘B’ is zero when these conditions exist.
Likewise the currents flowing through the lines are computed when VYB and VBR satisfy these upper and lower voltage
conditions.
4.2 Scalar Control of Induction Motor Drive
An AC induction machine is scalar controlled, wherein, the ratio of stator voltage to frequency (V/F) is kept constant.
4.3 Modeling of Supercapacitor
A supercapacitor can be modeled using some standard circuit components as shown in Figure6. The two variable
capacitances are nonlinearly varying with the voltage that is applied across the circuit. The capacitance C is responsible
for the most important phenomenon in the model. The amount of energy stored and the rate of energy level variations
are both determined mainly by the capacitance value. The resistance R2 connected in parallel with the capacitor is
meant to represent the self discharge effect. The series resistance R1 represents the losses during charge and discharge.
The over voltage protection provided by R3 and the switch controlling its connection to the circuit is necessary to
prevent damage to the capacitor elements by balancing the voltage level. The resistance Rp and the capacitance Cp are
included in the circuit to model some of the fast dynamics in the behavior of the supercapacitor [11].
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Figure 6 Basic circuit model of the supercapacitor
Energy stored in the supercapacitor is given by the following equation:
E  1 2 CV 2
(5)
Where, C is the capacitance in farads, V is the voltage across C in volts; E is the energy stored in C in joules.
Usable Energy =
E  1 2 C V12  V2 2 
(6)
Where, V1 is the rated charging voltage V2 is the rated minimum operating voltage of supercapacitors.
5.
CONTROL OF BUCK-BOOST DC-DC CONVERTER
The output voltage of the switch-mode DC-DC buck-boost converter is regulated to be within a specified range. There
are two control methods for DC-DC converters: voltage mode control and current mode control respectively. The
current mode control for a DC-DC buck boost converter has been employed in the proposed technique. It contains twoloop system as shown in Figure 4. An additional inner current loop is added to the voltage loop. The current loop
monitors the inductor current and compares it with its reference value. The reference value for the inductor current is
generated by the voltage loop.
The key principle that drives the buck-boost converter is the tendency of an inductor to resist changes in current. When
being charged it acts as a load and absorbs energy, when being discharged, it acts as an energy source. The voltage it
produces during the discharge phase is related to the rate of change of current, and not to the original charging voltage,
thus allowing different input and output voltages.
6. RESULTS AND DISCUSSION
The objective of this section is to investigate the performance of an ASD’s under various power system faults. Figures.
7-10 show the performance of ASD’s with the proposed scheme during balanced voltage sag and Figures. 11-14 during
Double Line to Ground Faults (Type-E) with supercapacitor as ride-through.
The simulations have been carried out to get the traces of three-phase source voltages (Vsry, Vsyb, Vsbr), three-phase
source currents (Isr, Isy, Isb), Electromagnetic Torque(Te) , rotor speed (ωr) and DC-Link voltage (Vdc) respectively.
Performance of ASD’s during balanced voltage sag with supercapacitor as ride-through
The simulation and hardware results during voltage sag due to symmetrical three-phase line to ground fault are shown
in Figure 7 and Figure 8. The main characteristics of the voltage sag are magnitude and duration. The amplitude of line
voltages drops to a value of about 60% of the pre-event voltage during 1.025 to 1.6 sec (about 28 cycles). During the
symmetrical three phase fault the DC-Link voltage drops from 210V to 100 V. It can also observed from the same s that
the Electromagnetic torque (Te) the speed (wr) decrease during fault period.
The simulation and experimental results have been taken using supercapacitor as an energy storage device to provide
ride-through to the ASD’s as shown in Figure 9 and Figure 10. In this case the three-phase source voltage amplitude
drops to a value of about 60% of the normal voltage during fault period i.e from 0.85 to 1.68 sec about 42 cycles. The
transient response of the supercapacitor is fast enough to supply the current required by the ASD’s during the sag. It
has also been observed from the Figure 9 and Figure 10 that there is a marginal change in the DC-Link voltage during
fault condition which fluctuates normally above the preset value of the DC-Link.
Volume 2, Issue 1, January 2013
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International Journal of Application or Innovation in Engineering & Management (IJAIEM)
250
150
50
-50
-150
sry
V
(V)
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Volume 2, Issue 1, January 2013
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250
150
50
sy
b
V
(V)
-250
-50
-150
-250
250
50
-50
sbr
V
(V)
150
-150
-250
15
5
sr
i (A
)
25
-5
(A
)
i
(A
)
sb
i
sy
-15
-25
25
15
5
-5
-15
-25
25
15
5
-5
-15
300
d
c
v (V
)
-25
400
200
100
0.95
1
1.05
1.1
1.15
1.2
1.25
1.3
1.35
1.4
1.45
1.5
1.55
1.6
1.65
1.7
1.75
1.8
1.85
1.9
1.5
1.55
1.6
1.65
1.7
1.75
1.8
1.85
1.9
time (s)
0.5
0
e
T (N
-m
)
0
0.9
1
-0.5
r
w(ra
d
/s
)
-1
402
401.5
401
400.5
400
399.5
399
0.9
0.95
1
1.05
1.1
1.15
1.2
1.25
1.3
1.35
1.4
1.45
time (s)
Figure 7 Simulation Results showing three-phase source voltages, three-phase source currents, DC-Link voltage,
Electromagnetic Torque and Rotor speed during symmetrical fault condition without providing any ride-through
Figure 8 Experimental Results showing three-phase source voltages, three-phase source currents, DC-Link voltage,
Electromagnetic Torque and Rotor speed during symmetrical fault condition without providing any ride-through.
Voltage scale: 100 V per division. Current scale: 2.25 A per division. DC-Link Voltage scale: 100 V per division
Volume 2, Issue 1, January 2013
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Volume 2, Issue 1, January 2013
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150
s
ry
V (V
)
250
50
-50
-150
150
sy
b
V
(V
)
-250
250
50
-50
-150
sb
r
V (V
)
-250
250
150
50
-50
-150
-250
s
r
i (
A
)
5
2.5
0
-2.5
2.5
s
y
i (
A
)
-5
5
0
-2.5
2.5
s
b
i
(
A
)
-5
5
0
-2.5
300
d
c
v(
V
)
-5
400
200
100
0
0.5
0.6
0.7
0.8
0.9
1
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2
0.375
0.25
e
T(N
-m
)
0.5
0.125
600
400
r
w(ra
d
/s
)
0
800
200
0
0.5
0.6
0.7
0.8
0.9
1
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2
time (s)
Figure 9 Simulation Results showing three-phase source voltages, Currents, DC-Link voltage, Electromagnetic
Torque, Rotor Speed during symmetrical fault condition with supercapacitor as ride-through alternative
Figure 10 Experimental Results showing three-phase source voltages, Currents, DC-Link voltage, Electromagnetic
Torque, Rotor Speed during symmetrical fault condition with supercapacitor as ride-through alternative. Voltage
scale: 100 V per division. Current scale: 2.25 A per division. DC-Link Voltage scale: 100 V per division
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Volume 2, Issue 1, January 2013
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Performance of ASD’s during Double Line to Ground Faults (Type-E) with supercapacitor as ride-through
The simulation and hardware results during double line to ground fault are shown in Figure 11 to Figure 14. Simulated
results shows that the amplitude of line voltage ‘ry’ drops to a value of about 40% of the pre-event voltage and that of
‘yb’ and ‘br’ drops to 80% of the pre-event voltage during 1.32 to 1.48 sec about 8 cycles. During the fault period the
three-phase uncontrolled rectifier operates in unbalanced mode and draws unbalanced peaky currents The DC-Link
voltage drops from 195V to 155 V which is below the threshold setting at the DC-Link which may actuate the under
voltage protection and trips the ASD’s. The electromagnetic torque (Te) and the speed (wr) drop slightly as shown in
Figure 11 and Figure12. It can be observed that the effective motor current during the fault period increases so as to
maintain the desired torque.
250
150
sry
v
(V
)
The simulation and hardware results under unsymmetrical fault condition are shown in Figure 13 and Figure 14 with
supercapacitor as a ride-through capability connected across DC-Link using a buck-boost Converter. It is clearly seen
from Figure 13 and Figure 14, the supercapacitor bank provides ride-through during the fault as well as post fault;
since there is no inrush current after fault recovery.
50
-50
-150
-250
150
syb
v
(V
)
250
50
-50
-150
-250
250
sb
r
v
(V
)
150
50
-50
-150
-250
(A)
7.5
i
sr
2.5
-2.5
(A)
-7.5
7.5
i
sr
2.5
-2.5
(A)
-7.5
7.5
i
sr
2.5
-2.5
e
dc
200
150
100
0.5 1
0.4
0.3
0.2
1.05
1.1
1.15
1.2
1.25
1.3
1.35
1.4
1.45
1.5
1.55
1.6
1.65
1.7
1.75
1.8
0.1
0
r
w (rad/s)
T (N
-m
)
v (V)
-7.5
250
400.5
400.4
400.3
400.2
400.1
400
1
1.05
1.1
1.15
1.2
1.25
1.3
1.35
1.4
1.45
1.5
1.55
1.6
1.65
1.7
1.75
1.8
time(s)
Figure 11 Simulation results showing three-phase source voltages, currents, DC- Link voltage, electro-magnetic torque
and rotor speed during DLG fault (Type-E) without providing any ride- through
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Volume 2, Issue 1, January 2013
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250
150
50
-50
-150
sry
v
(V
)
Figure 12. Experimental results showing three-phase source voltages, currents, DC- Link voltage, electro-magnetic
torque and rotor speed during DLG fault (Type-E) without providing any ride- through. Voltage scale: 100 V per
division. Current scale: 2.25 A per division. DC-Link Voltage scale: 100 V per division
250
150
50
-50
-150
sy
b
v
(V
)
-250
250
150
50
-50
-150
sb
r
v
(V
)
-250
-250
s
r
i
(
A
)
5
2.5
0
-2.5
2.5
s
y
i
(
A
)
-5
5
0
-2.5
2.5
s
b
i
(
A
)
-5
5
0
-2.5
225
d
c
v(
V
)
-5
200
1.3
1.4
1.5
1.6
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2
2.1
2.2
1.7
1.8
1.9
2
2.1
2.2
0.4
0.3
e
T(N
-m
)
1.2
0.5
0.2
0.1
0
600
400
r
w
(r
a
d
/s
)
800
200
0
1.2
time(s)
Figure 13 Simulation results showing three-phase source voltages, currents, DC-Link voltage, electro-magnetic torque
and rotor speed during DLG fault (Type-E) with supercapacitor as ride-through alternative
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Figure 14 Experimental results showing three-phase source voltages, currents, DC-Link voltage, electro-magnetic
torque and rotor speed during DLG fault (Type-E) with supercapacitor as ride-through alternative. Voltage scale: 100
V per division. Current scale: 2.25 A per division. DC-Link Voltage scale: 100 V per division
7. CONCLUSIONS
In this paper the supercapacitors as an energy storage device for providing ride- through to ASD’s during symmetrical
and unsymmetrical fault conditions have been presented. The proposed topology is capable of providing ride- through
during both symmetrical and unsymmetrical voltage sags. The effectiveness of the proposed topology has been verified
by means of simulations based on MATLAB and experimental results obtained on a laboratory prototype. From these
results it is clear that the supercapacitor’s dynamic response is fast enough to respond to the load transient
requirements and avoid the affects of the various power quality disturbances on the adjustable speed drives. The
supercapacitor maintains the DC-Link voltage thereby reduces the input inrush current. The main emphasis of this
paper is that, the supercapacitor as an energy storage device may be employed during unsymmetrical fault condition so
as to avoid the nuisance tripping of the ASD’s.
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Web Site: www.ijaiem.org Email: editor@ijaiem.org, editorijaiem@gmail.com
Volume 2, Issue 1, January 2013
ISSN 2319 - 4847
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AUTHOR
S. S. Deswal received his B.Tech degree in Electrical Engineering from R.E.C, Kurukshetra ,
Kurukshetra University ,Haryana, India in 1998, the M.E degree in Electrical Engineering(Power
Apparatus and Systems) from Delhi College of Engineering, Delhi University, Delhi, India in 2005, and
Ph.D. degree from N.I.T, Kurukshetra a Deemed University, Haryana in Feb 2012. Currently, he is
working as a Associate Professor in EEE Department with the Maharaja Agrasen Institute of Technology,
Rohini, Delhi under GGSIP University, Delhi, India. His research interests include electric power quality, ASD’s,
electric motor drives, renewable energy sources.
Rajveer Mittal received his B.E degree in Electrical Engineering from R.E.C, Kurukshetra ,
Kurukshetra University ,Haryana, India in 1987, the M.E degree in Electrical
Engineering(Instrumentation & Control) from Delhi College of Engineering, Delhi University, Delhi,
India in 2003, and is currently pursuing the Ph.D. degree in the research area of “Power Quality Studies
of Wind Energy Systems” of Electrical Engineering from N.I.T, Kurukshetra a Deemed University,
Haryana, India. Currently, he is working as Head of the EEE Department with the Maharaja Agrasen Institute of
Technology, Rohini, Delhi under GGSIP University , Delhi, India.His research interests include power quality, motor
drives, and Renewable energy.
Ratna Dahiya received her B.Tech from GBU, Pant Nagar and M.Tech and Ph.D. degree degree in
Electrical Engineering from R.E.C, Kurukshetra, Kurukshetra University, Haryana, India. Currently, she
is working as Professor in Electrical Engineering Department with the NIT, Kurukshetra (Deemed
University), Haryana, India. Her research interests include SMES, electric power system and electric
power quality.
Volume 2, Issue 1, January 2013
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International Journal of Application or Innovation in Engineering & Management (IJAIEM)
Web Site: www.ijaiem.org Email: editor@ijaiem.org, editorijaiem@gmail.com
Volume 2, Issue 1, January 2013
ISSN 2319 - 4847
D. K. Jain received his B.Sc. (Engg), M.E (Electrical Engg.) and Ph.D. degree in Electrical Engineering
from R.E.C, Kurukshetra, Kurukshetra University, Haryana, India. Currently, he is working as Professor
in Electrical Engineering Department with the Deen Bandhu Chhotu Ram University of Science and
Technology(DCRUST), Murthal, Haryana, India. His research interests include electric power quality,
ASD’s, electric motor drives, renewable energy sources.
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