Datorarkitektur I
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Datorarkitektur I
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Course Information
Web page: http://www.ida.liu.se/~TDTS57
DATORARKITEKTUR
Examination: written
(Computer Architectures)
Case study: written report, defense and opposition
(counts for 25% of the final grade).
Soheil Samii(sohsa@ida.liu.se).
Petru Eles
Institutionen för Datavetenskap (IDA)
Linköpings Universitet
Lecture notes: available from the web page, latest 24
hours before the lecture.
email: petel@ida.liu.se
phone: 28 1396
B building
Text book: William Stallings: Computer Organization and
Architecture, 7th edition, Prentice Hall
International, Inc., 2006.
Petru Eles, IDA, LiTH
Petru Eles, IDA, LiTH
Datorarkitektur I
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Datorarkitektur I
INTRODUCTION
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What is a computer?
1. Computers and Computer Systems
2. The von Neumann Architecture
3. The Instruction Cycle
4. Programming Languages and Translators
•
A computer is a data processing machine which is
operated automatically under the control of a list of
instructions (called a program) stored in its main
memory.
5. Memories
Computer
6. Input/Output Devices
Central
Processing Unit
(CPU)
Main memory
7. Course Topics
data
control
Petru Eles, IDA, LiTH
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Datorarkitektur I
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Datorarkitektur I
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What is a computer system?
The von Neumann Architecture
The principles:
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A computer system consists usually of a
computer and its peripherals.
•
•
•
Computer peripherals include input devices,
output devices, and secondary memories.
•
•
Computer system
Input
device
Computer
Output
device
Data and instructions are both stored in the main
memory (stored program concept);
The content of the memory is addressable by
location (without regard to what is stored in that
location);
Instructions are executed sequentially (from one
instruction to the next, in order of their location in
memory) unless the order is explicitly modified.
The organization (architecture) of the computer:
- a central processing unit (CPU); it contains the
control unit (CU), that coordinates the execution
of instructions and the arithmetic/logic unit (ALU)
which performs arithmetic and logic operations;
- (main) memory.
Computer
Secondary
memory
Central
Processing Unit
(CPU)
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Datorarkitektur I
Main memory
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Datorarkitektur I
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The von Neumann Architecture (cont’d)
The von Neumann Architecture (cont’d)
In the von-Neumann architecture, a small set of circuits
can be driven to perform very different tasks, depending
on the software program which is executed.
CPU
Control unit
•
ALU
von Neumann computers are general purpose
computers.
Register
instructions
data
they can solve very different problems depending
on the program they got to execute!
Main memory
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•
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The primary function of a CPU is to execute the
instructions fetched from the main memory.
An instruction tells the CPU to perform one of its
basic operations (an arithmetic or logic operation,
to transfer a data from/to main memory, etc.).
The CU is the one which interprets (decodes) the
instruction to be executed and which "tells" the
different other components what to do.
The CPU includes a set of registers which are
temporary storage devices typically used to hold
intensively used data and intermediate results.
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Datorarkitektur I
The Instruction Cycle
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The Instruction Cycle (cont’d)
Each instruction is performed as a sequence of
steps; the steps corresponding to one instruction
are referred together as an instruction cycle.
A refined view of the instruction cycle:
A simple view of the instruction cycle:
Fetch
instruction
Decode
Fetch
instruction
Fetch
operand
Execute
instruction
Execute
instruction
Petru Eles, IDA, LiTH
Petru Eles, IDA, LiTH
Datorarkitektur I
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Datorarkitektur I
Programming Languages and Translators
Programming Languages and Translators
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The following four machine instructions perform
Z:=(Y+X)*3:
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Address
0 0 0 01 0 0 0
Move
0 0 0 01 0 0 1
addr of X Reg 3
0 0 1 01 0 0 00 0 0 11 0 1 1
Mul
0 0 0 01 0 1 1
addr of Y Reg 3
0 0 0 11 0 1 11 0 0 00 0 1 1
Add
0 0 0 01 0 1 0
•
0 0 0 01 0 1 11 0 0 01 0 1 1
Previous example (slide 11), using assembly language
notation:
operand "3" Reg 3
addr of Z Reg 3
....................................
0 1 1 10 0 0 0
0 1 1 10 0 0 1
0 1 1 10 0 1 0
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It is extremely difficult to deal with binary encoded
instructions!
In some very specific situations it is needed to write
programs "at the machine level" in order to access
details of the machine architecture. In such
situations programmers use assembly languages.
Assembly language programming is simpler then
binary encoding because it allows:
- symbolic names for each opcode (mnemonics)
- symbolic addresses
- assembler commands
0 0 0 10 0 1 11 0 0 10 0 1 1
Move
0 0 0 00 0 0 00 0 0 01 0 1 1
0 0 0 00 0 0 00 0 0 00 0 1 1
0 0 0 00 0 0 00 0 1 01 0 1 0
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X
X
Y
Z
Y
Z
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ORIGIN
DATA
DATA
RESERVE
$70
11
3
1
ORIGIN
MOVE
ADD
MUL
MOVE
$08
Y,R3
R3,X
R3,#3
R3,Z
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Programming Languages and Translators (cont’d)
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Programming Languages and Translators (cont’d)
A high-level language (HLL) provides a much
higher level of abstraction which makes
programming relatively easy and efficient.
------------------------------------
The previous example using a HLL (Pascal):
var X,Y,Z: integer;
-----------Z := (Y+X)*3;
growing abstraction level
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Assembler
executable
machine code
Assembly
program
------------------------------------
High-level language (machine architecture not visible)
Compiler
executable
machine code
HL-language
program
Assembly language (machine architecture fully visible)
Machine language (machine architecture fully visible)
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Compilers often generate assembly language
programs which then are translated by an
assembler into machine code.
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Datorarkitektur I
The Computer System
I/O
1
I/O
2
Memories
I/O
n
Bus
CPU
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•
•
Main
Memory
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The main memory is used to store the program and
data which are currently manipulated by the CPU.
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The secondary memory provides the long-term
storage of large amounts of data and program.
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Before the data and program in the secondary
memory can be manipulated by the CPU, they must
first be loaded into the main memory.
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The most important characteristics of a memory is
its speed, size, and cost, which are mainly
constrained by the technology used for its
implementation.
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Typically
- the main memory is fast and of limited size;
- secondary memory is relatively slow and of
very large size.
Sec.
Memory
CPU + main memory constitute the "core" of the
computer system.
Secondary memory + I/O devices are the so called
peripherals.
Communication between different components of
the system is usually performed using one or
several buses.
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Input-Output Devices
Course Topics
I/O
1
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Input and output devices provide a means for
people to make use of a computer.
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Some I/O devices function also as an interface
between a computer system and other physical
systems. Such interface usually consists of A/D and
D/A converters.
I/O
n
I/O
2
Bus
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CPU
Main
Memory
Sec.
Memory
•
The Memory System
- Components of the memory system
- The memory hierarchy
- Cash memory
- Virtual memory
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Input/Output Handling
- I/O devices and modules
- Interrupts and I/O
- Programmed and interrupt driven I/O
- Direct memory Access
- Bus interconnection
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Course Topics (cont’d)
I/O
1
Course Topics (cont’d)
I/O
n
I/O
2
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Reduced Instruction Set Computers
- Why do we need RISCs? The semantic gap
- Main characteristics of RISC architectures
- Are RISCs better then CISCs?
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Superscalar Processors
- Superpipelining
- Features of superscalar architectures
- Data dependencies
- Policies for parallel instruction execution
- Register renaming
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The Control Unit
- Microoperations and control signals
- The control unit - basic tasks
- Hardwired control
- Microprogrammed control
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Architectures for Parallel Computation
- Parallel computation and parallel programs
- A classification of computer architectures
- The interconnection network
- Array processors, multiprocessors, multicomputers
- Vector processors
Bus
CPU
•
Main
Memory
Sec.
Memory
The Instruction Set
- Machine instructions and their type
- Addressing modes
- Instruction formats
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Internal Structure and Functioning of the CPU
- Internal structure of the CPU
- Register Organization
- Instruction pipelining
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Pipeline Hazards and Branch Penalties
- Pipeline hazards
- Reducing branch penalties
- Delay branching
- Branch prediction
Petru Eles, IDA, LiTH
Petru Eles, IDA, LiTH