Schedulability Analysis
and Optimization for the Synthesis of
Multi-Cluster Distributed Embedded Systems
Paul Pop, Petru Eles, Zebo Peng
Embedded Systems Lab (ESLAB)
Linköping University, Sweden
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Heterogeneous Networks
Distributed Heterogeneous System
...
NoCs
...
...
...
...
Factory Systems
Heterogeneous Networks
Multi-Cluster Systems
Automotive Electronics
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Distributed Safety-Critical Applications
...
 Applications distributed over
the heterogeneous networks
Gateway
...
 Reduce costs:
use resources efficiently
 Requirements:
close to sensors/actuators
 Applications distributed over heterogeneous networks are difficult to...
 Analyze (e.g., guaranteeing timing constraints)
Unsolved
 Design (e.g., efficient implementation)
problems
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Contributions
 Analysis and design of Multi-Cluster Embedded Systems
 Analysis
 Proposed a schedulability analysis for safety-critical hard real-time
applications mapped on multi-cluster distributed embedded systems
 Is the application schedulable? (Are deadlines satisfied?)
 Bounds on the communication delays and communication buffer sizes
 Design optimization
 Several
In this paper
designwe
problems
have addressed
can be addressed
once an analysissynthesis
communication
is available.
and priority assignment for
 Improving the degree of schedulability of an application
 Minimizing communication buffer sizes needed to
run a schedulable application
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Outline
 Motivation
 Contributions
System architecture and application model
 Schedulability analysis for multi-clusters
 Optimization strategies
 Experimental results
 Message and future work
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Hardware Architecture
...
Time-triggered cluster
...
Gateway
 Static cyclic scheduling
 Time-triggered protocol
Event-triggered cluster
 Fixed priority preemptive scheduling
 Controller area network protocol
Time Triggered Protocol (TTP)


Bus access scheme:
time-division multiple-access (TDMA)
Schedule table located in each TTP
controller: message descriptor list (MEDL)
S0 S1
Slot
S2
SG
S0 S1
S2
Controller Area Network (CAN)



Priority bus, collision avoidance
Highest priority message
wins the contention
Priorities encoded in the frame identifier
SG
TDMA Round
Cycle of two rounds
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...
Software Architecture
...
Gateway
Time-triggered cluster
NG CPU
CAN Controller
N1 CPU
OutCAN
m3
T
T
m1
m1m2
P2
MBI
TTP Controller
TTP Controller
OutN2
P4
OutTTP
P1
N2 CPU
CAN Controller
m3
MBI
P
3
Event-triggered cluster
SG
S1
SG
S1
Round2
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Problem Formulation
 Input




An application modeled as a set of process graphs
Each process has an worst case execution time, a period, and a deadline
Each message has a known size
The system architecture and the mapping of the application are given
 Output
 Worst case response times and bounds on the buffer sizes
...
 Design implementation
such that the application is schedulable and buffer sizes are minimized
...
 Schedule table for TT processes
 Priorities for ET processes
System
 Schedule table for TT messages
configuration
Application:
set
of
process
graphs
Mapping
Architecture:
Multi-cluster
Communication
 Priorities for ET messages
parameters
infrastructure
 TT bus configuration
parameters
(TDMA slot sequence and sizes)
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Schedulability Analysis
 Scheduling time-triggered activities:
 Building a schedule table:
static cyclic scheduling (e.g., list scheduling)
 Scheduling event-triggered activities:
 Response time analysis:
calculate worst case response times for each process
 Schedulability test: response times smaller than the deadlines
 Response times depend on the communication delay
between sending and receiving a message
 Communication delays depend on the type of message passing
1. TTC  TTC
2. TTC  ETC
 Communication delays
3. ETC  ETC
 Bounds on the buffer sizes
4. ETC  TTC
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Multi-Cluster Scheduling
 Scheduling cannot be addressed separately for each type of cluster
 The inter-cluster communication creates a circular dependency:
 TTC static schedules (offsets)  ETC response times
 ETC response times  TTC schedule table construction
TT Bus
Configuration
Static
Scheduling
Application,
Mapping,
Architecture
Response
Times
Offsets
Priorities
Response
Time
Analysis
Multi-Cluster Scheduling
Schedule
Tables
Offset
earliest possible
start time for an
event-triggered
activity
Response Bounds
times
on the
buffer sizes
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Optimization Example
...
...
N1
TTP
P4
P1
S
SG1
S
SG1
m1m2 m1m2
SS
G1
m3
SS
G1
SG
m3
SG
P4 P4
m3
SG
NG
CAN
O2
N2
O3
P2
P3
P2
P3
P2
P3
Deadline
missed!
met
Transformation:
Transformation:
S1 is Pthe
the slot,
high m
priority
process
on Nsooner
2 isfirst
1 and m
2 are sent
2
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Optimization Strategies
 OptimizeSchedule
 Synthesizes the communication and assigns priorities
to obtain a schedulable application
 Based on a greedy approach
 Cost function: degree of schedulability
 OptimizeBuffers
 Synthesizes the communication and assigns priorities
to reduce the total buffer size
 Based on a hill-climbing heuristic
 Cost function: total buffer size
 Straightforward solution
 Finds a schedulable application
 Does not consider the optimization of the design
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Can We Improve Schedulability?
Average Percentage Deviation [%]
Cost function: degree of schedulability
Straightforward
solution
120
Does not perform optimizations
100
80
60
OptimizeSchedule?
40
OptimizeSchedule
20
0
80
160
240
320
Number of processes
Simulated Annealing
400 Near-optimal values for
the degree of schedulability
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Can We Reduce Buffer Sizes?
Cost function: total buffer size
Average total buffer size [k]
10k
OptimizeSchedule
8k
Does not optimize the
total buffer size
6k
OptimizeBuffers?
OptimizeBuffers
4k
Simulated Annealing
 Case study
Near-optimal values for the
2k
0
80
160
240
320
 Vehicletotal
cruise
buffercontroller
size
 Distributed over the
TT and ET clusters
400
Number of processes
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Message and Future Work
Analysis and optimization methods are
needed for the efficient implementation of
applications distributed over interconnected
heterogeneous networks.
 Future Work
 Explore more design problems
 Mapping for multi-clusters
 How to partition an application in ET and TT activities?
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