Performance Estimation for Embedded Systems with Data and Control Dependencies Paul Pop, Petru Eles, Zebo Peng Department of Computer and Information Science Linköpings universitet Sweden 1 of 12 May 3, 2000 Motivation and Characteristics Performance estimation. Worst case delay on the system execution time. Characteristics: Distributed hard real-time applications. Heterogeneous system architectures. Fixed priority preemptive scheduling. Systems with data and control dependencies. Performance Estimation for Embedded Systems with Data and Control Dependencies Paul Pop, Petru Eles, Zebo Peng 2 of 12 May 3, 2000 Schedulability Analysis Schedulability test: The worst case response time of each process is compared to its deadline. Process models: Independent processes; Data dependencies: release jitter, offsets, phases; Control dependencies: modes, periods, recurring tasks. Message: The pessimism of the analysis can be significantly reduced by considering the conditions during the analysis. Performance Estimation for Embedded Systems with Data and Control Dependencies Paul Pop, Petru Eles, Zebo Peng 3 of 12 May 3, 2000 Conditional Process Graph Subgraph corresponding to DCK P P00 P P11 C P P22 P P66 K P5 P7 P P88 P P99 P P14 14 P P12 12 D P13 K P15 P P16 16 P P17 17 P P10 10 First processor Second processor ASIC P P11 11 P P33 C C P4 D P P18 18 Performance Estimation for Embedded Systems with Data and Control Dependencies Paul Pop, Petru Eles, Zebo Peng 4 of 12 May 3, 2000 Problem Formulation Input An application modelled using conditional process graphs (CPG). Each CPG in the application has its own independent period. Each process has a worst case execution time, a deadline, and a priority. The system architecture and mapping of processes are given. Output Worst case response times for each process. Performance estimation for systems modelled using conditional process graphs. Performance Estimation for Embedded Systems with Data and Control Dependencies Paul Pop, Petru Eles, Zebo Peng 5 of 12 May 3, 2000 Example P0 27 P1 C C 30 P2 P9 30 P6 25 P3 CPG 25 P10 19 P5 No conditions Conditions 32 P11 24 P4 22 P7 Worst Case Delays P12 G1 120 100 G2 82 82 G2: 150 P8 G1: 200 Deadline: 110 Performance Estimation for Embedded Systems with Data and Control Dependencies Paul Pop, Petru Eles, Zebo Peng 6 of 12 May 3, 2000 Task Graphs with Data Dependencies K. Tindell: Adding Time-Offsets to Schedulabilty Analysis, Research Report Offset: fixed interval in time between the arrival of sets of tasks. Can reduce the pessimism of the schedulability analysis. Drawback: how to derive the offsets? T. Yen, W. Wolf: Performance Estimation for Real-Time Distributed Embedded Systems, IEEE Transactions On Parallel and Distributed Systems Phase (similar concept to offsets). Advantage: gives a framework to derive the phases. Performance Estimation for Embedded Systems with Data and Control Dependencies Paul Pop, Petru Eles, Zebo Peng 7 of 12 May 3, 2000 Schedulability Analysis for Task Graphs DelayEstimate(task graph G, system S) for each pair (Pi, Pj) in G maxsep[Pi, Pj]= end for worst case response times and step = 0 upper bounds for the offsets repeat LatestTimes(G) EarliestTimes(G) lower bounds for the offsets for each Pi G MaxSeparations(Pi) end for until maxsep is not changed or step < limit return the worst case delay dG of the graph G end DelayEstimate maximum separation: maxsep[Pi, Pj]=0 if the execution of the two processes never overlaps Performance Estimation for Embedded Systems with Data and Control Dependencies Paul Pop, Petru Eles, Zebo Peng 8 of 12 May 3, 2000 Schedulability Analysis for CPGs, 1 Two extreme solutions: Ignoring Conditions (IC) Ignore control dependencies and apply the schedulability analysis for the (unconditional) task graphs. Brute Force Algorithm (BF) Apply the schedulability analysis after each of the CPGs in the application have been decomposed in their constituent unconditional subgraphs. Performance Estimation for Embedded Systems with Data and Control Dependencies Paul Pop, Petru Eles, Zebo Peng 9 of 12 May 3, 2000 Schedulability Analysis for CPGs, 2 In between solutions: Conditions Separation (CS) Similar to Ignoring Conditions but uses the knowledge about the conditions in order to update the maxsep table: maxsep[Pi, Pj] = 0 if Pi and Pj are on different conditional paths. Relaxed Tightness Analysis (two variants: RT1, RT2) Similar to the Brute Force Algorithm, but tries to reduce the execution time by removing the iterative tightening loop (relaxed tightness) in the DelayEstimation function. Performance Estimation for Embedded Systems with Data and Control Dependencies Paul Pop, Petru Eles, Zebo Peng 10 of 12 May 3, 2000 Average Percentage Deviation [%] Experimental Results 100 80 Ignoring Conditions 60 Conditions Separation 40 Relaxed Tightness 1 20 Relaxed Tightness 2 Brute Force 0 80 160 240 320 400 Number of processes Performance Estimation for Embedded Systems with Data and Control Dependencies Paul Pop, Petru Eles, Zebo Peng 11 of 12 May 3, 2000 Conclusions Performance estimation for hard real-time systems with control and data dependencies. Modelling using conditional process graphs that capture both the flow of data and that of control. Heterogeneous architectures, fixed priority scheduling. Five approaches to the schedulability analysis of such systems. Extensive experiments and a real-life example show that: The pessimism of the analysis can be significantly reduced by considering the conditions during the analysis. Performance Estimation for Embedded Systems with Data and Control Dependencies Paul Pop, Petru Eles, Zebo Peng 12 of 12 May 3, 2000