SEMICONDUCTOR APPLICATIONS: EXEMPLAR QUESTIONS AND SOLUTIONS
SEMICONDUCTOR APPLICATIONS
Outcome 1
?1
The diode circuit shown below uses a 1N4148 diode.
The basic parameters for this device are:
V Ftyp = 0.7, I Fmax = 150 mA, V Rmax = 50 V
(a)
How much current will be flowing through the diode?
(b)
Does this current exceed the diode’s maximum forward current
rating?
(c)
What will be the power dissipated by the diode?
(d)
What will be the power dissipated by the resistor?
(e)
The 470  resistor is available in the following power ratings:
(i) 0.125 W
(f)
(ii) 0.25 W
(iii) 0.5 W
(iv) 1 W
(v) 2 W
What is the smallest value of R 1 that could be used in this circuit?
What would its power rating have to be?
N1
D1
N2
R1
470 
12 V
N3
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?1
Solution
Assuming V Ftyp = 0.7 V, the voltage at node 2 (N2) will be:
V N2 = V N1 – 0.7
V N2 = 12 – 0.7 = 11.3 V
As node 3 (N3) is connected to 0 V, the voltage across the resistor will
be the difference between the voltages at node 2 and node 3, i.e.
V R = V N2 – V N3
V R = 11.3 – 0 = 11.3 V
We now know that the voltage across R 1 is 11.3 V.
We also know that the value of R 1 is 470 
Hence by applying Ohm’s law we can calculate the current flowing
through the resistor R 1 :
I=
VR1
R1
=
11.3
= 24.04 mA
470
As the resistor is in series with the diode this is also the current that
will flow through the diode.
(a)
The maximum current rating of the diode is 150 mA. The
calculated current I is 24.04 mA, therefore the current rating of the
diode will not be exceeded.
(b)
Assuming the typical diode forward voltage V F = 0.7 V, the power
dissipated by the diode may be calculated using the power
equation:
P = V TYP
P=VI
 I = 0.7  24.04  10 –3 = 16 mA
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(c)
Applying the same power equation to the resistor:
P = V R1  I = 11.3  24.04  10 –3 = 0.272 W
(d)
This value is too large for the 0.25 W (1/4 W resistor) therefore
we have to select the next highest rating to ensure that the resistor
is capable of dissipating the power generated in this circuit, i.e.
the 0.5 W resistor.
(e)
It is the value of R 1 that controls the current flow through the
diode. The diode can handle a maximum of 150 mA, therefore we
must select an appropriate value of R 1 to limit the current to 150
mA. This can be calculated by applying Ohm’s law (note we are
assuming V typ = 0.7 V).
R=
V
11.3
=
= 75.33 
I
150 × 10 –3
The power rating of the resistor can be calculated using the power
equation:
P=VI
P = V R  I = 11.3  150  10 –3 = 1.7 W
In reality we have to select a 2 W resistor as 1.7 W resistors are not
available.
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?2
A sinusoidal source of 150 V pk* (300 V pk pk**) is applied to the
diode circuit shown below.
Oscilloscope
oscilloscope (CHA)
oscilloscope (CHB)
N1
N2
Source
100 
R1
N3
(a)
Sketch the waveform that would be recorded on CHB for a 150 V
pk (300 V pk to pk) input signal, as shown in the CHA scope
output. Explain the shape of the waveform on CHB.
(b)
Calculate the maximum current that would flow through the diode.
(c)
Calculate the maximum reverse voltage that the diode would have
to withstand.
(d)
Select a suitable diode from the data table for this circuit. Give
reasons why you have selected this particular device.
*pk = peak
**pk pk = peak to peak
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Channel A
Channel B
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?2
Solution
(a)
The CHB waveform shows that only the positive half cycle of the
source voltage appears at the resistor. This is to be expected as
during this half cycle the voltage at N1 is positive with respec t to
N2 so the diode is forward biased and conducting (note that there
will be a forward voltage V F = 0.7 V, however this voltage is so
small compared to source voltage that it would be difficult to
sketch). During the negative half cycle the diode is rev erse biased
and will not conduct. If there is no current flowing then there can
be no voltage across R 1 (remember V = IR) and so the output is flat
(zero).
Channel A
Channel B
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(b)
Unlike SAQ 1, the input voltage is not a steady dc but varies in a
sinusoidal manner (ac). The maximum current occurs when the
input voltage is at its peak. The maximum current may be
calculated as follows:
VR1
I R1
(c)
MAX
= VS MAX – VDIODE = 150 – 0.7 = 149.7 V
=
MAX
VR1
MAX
R1
=
149.7
= 1.49 A
100
The maximum reverse voltage occurs during the negative half
cycle. During this cycle the diode is not conducting and so there
is no current flowing, which means there is no voltage across the
resistor, i.e. the voltage at each end of the resistor is the same. As
the end connected to N3 is at 0 V, the end connected to N2 must
also be at 0 V. We know that N1 is at –150 V therefore the
voltage across the diode V AK must also be –150 V. The circuit
below shows this.
N1 = –150 V
N2 = 0 V
As there is no current through the resistor
both ends must be at the potential
Source
R1
100 
N3 = 0 V
(d)
From the above calculations we must choose a diode that can
handle a forward current I F = 1.44 A and a reverse voltage V R =
150 V.
A good choice would be the 1N5624 diode, which can handle a
forward current of 3 A and a reverse voltage of 200 V.
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?3
A sinusoidal source of 150 V pk (300V pk pk) is applied to th e diode
circuit shown below. The output is monitored on CHB.
oscilloscope
oscilloscope (CHB)
N1
Source
D1
D2
D4
D3
N2
R1
100 
N3
(a)
Sketch the waveform that would be recorded on CHB for a 150 V
pk (300V pk to pk) input signal.
Input
Channel B
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(b)
Explain the shape of the waveform that you have drawn.
(c)
What is this common name for this type of circuit?
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?3
Solution
(a)
Input
Channel B
(b)
In this circuit the voltage across R 1 is pulsating dc (i.e. it never
goes negative). The reason for this is that the arrangement of the
four diodes (D 1 to D 4 ) guides the current through the resistor in
the same direction.
To understand why this happens consider the situation when the
source is at its positive peak. At this point N1 is positive with
respect to N4 by 150 V therefore, if a path exists, current from the
source will enter the circuit at N1 and return at N4. The path it
will take is shown by the thick line.
At the junction between D 1 and D 2 the current flows through D 2 as
the orientation of D 1 blocks the flow of current. The current then
flows through R 1 and onwards toward the junction of D 1 and D 4 .
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At this junction it may appear as if the current could flow through
either diode, however we must remember that the current only
flows from high potential to low potential and the other end of D 1
(the cathode end) is at the highest potential in the circuit so there
is no way the current is going to take that path, consequently the
current flows through D 4 and back to the source.
The opposite cycle of the source (when N1 is negative with respect
to N4) is simply the reverse of the above argument. Fig SAQ 3 (ii)
shows the current flow path for this half of the cycle.
oscilloscope
oscilloscope (CHB)
N1
Source
D1
D2
D4
D3
N2
N4
R1
100 
N3
Fig SAQ 3(i)
oscilloscope
oscilloscope (CHB)
N1
D1
D2
D4
D3
N2
Source
R1
100 
N4
N3
Fig SAQ 3(ii)
(d)
The common name for this circuit is a full wave rectifier. This
process of converting ac to pulsating dc is one of the key elements
within any dc power supply.
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?4
(a)
For the diode circuit shown in Fig SAQ 4(i) sketch the output
waveform for the input waveform given in Fig SAQ 4(ii). D 1 is a
1N914 diode.
R1
30 
N1
N2
D1
Input
4 V pk pk
1 KHz
Output
N3
Fig SAQ 4(i)
V
Time base = 0.2 mS/Div
Voltage =1 V/Div
t(mS)
V
Time base = 0.2 mS/Div
Voltage =1 V/Div
t(mS)
Fig SAQ 4(ii)
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(b)
Calculate the maximum current that will flow through the diode.
(c)
From the data sheet check whether the diode in Fig SAQ 4(i) is
capable of handling this current.
(d)
What will the wattage rating of the 30  resistor, R 1 , have to be?
(e)
If a 1 V dc source is added to the circuit, as shown in Fig SAQ
4(iii), sketch the output on the graph provided in Fig SAQ 4(iv).
(f)
Calculate the maximum current that will flow through the diode in
Fig SAQ 4(iii).
(g)
Using the data sheet check whether the diode is capable of
handling this current.
(h)
Will we be able to use the same resistor as in the circuit in Fig
SAQ 4(i)?
N1
R1
30 
N2
D1
Input
4 V pk pk
1 KHz
Output
N4
1V
N3
Fig SAQ 4(iii)
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Channel A
Time base = 0.2 mS/Div
Voltage =1 V/Div
Channel B
Time base = 0.2 mS/Div
Voltage = 1 V/Div
Fig SAQ 4(iv)
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?4
Solution
(a)
The voltage at N2 can only rise to 0.7 V before the diode starts to
conduct. The diode holds the voltage at this value whilst the input
voltage is above 0.7 V. When the voltage at N2 falls below 0.7 the
diode stops conducting and the voltage effectively follows the
input as there is no current flow through the 30  resistor, i.e. the
voltage at N2 is the same as at N1 (the input voltage).
Channel A
Time base = 0.2
mS/Div
Voltage = 1 V/Div
Channel B
Time base = 0.2 mS/Div
Voltage = 1 V/Div
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(b)
The maximum current that will flow occurs when the voltage
across R 1 is at its highest. This occurs at the peak of the input
waveform, i.e. when the voltage at N1 = 2 V. Remember at this
point in time the voltage at N2 is clamped by the diode at 0.7. The
current I can be calculated using Ohm’s law.
I R1
=
VS MAX – VDIODE
R1
MAX
=
2 – 0.7
= 43.33 mA
30
(c)
The 1N914 diode can cope with up to 75 mA flowing through it
therefore this diode will be fine in this circuit.
(d)
The power dissipated by the resistor when 43.33 mA is flowing
through it can be calculated using any of the power equations. We
will use P = VI:
I = PR1
MAX
× I R1
= 1.3 × 43.33 × 10 –3 = 56.33 mW
MAX
We could use a 125 mW (1/8 W) resistor safely.
(e)
In this example a 1 V battery has been inserted, creating an
additional node, N4. The diode will not start conducting until the
anode is 0.7 V above the cathode. As the cathode (N4) is at –1 V
then the diode will not start conducting until the anode (N2)
reaches –0.3 V; at this point the voltage cannot rise any higher.
As with the previous example, when the voltage at N2 falls below
–0.3 V the diode stops conducting and the voltage effectively
follows the input as there is no current flow through the 30 
resistor, i.e. the voltage at N2 is the same as at N1 (the input
voltage).
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Channel A
Time base = 0.2 mS/Div
Voltage = 1 V/Div
Channel B
Time base = 0.2 mS/Div
Voltage = 1 V/Div
(f)
The maximum current that will flow occurs when the voltage
across R 1 is at its highest. This occurs at the peak of the input
waveform, i.e. when the voltage on N1 is at 2 V. Remember that
for the diode to conduct we are assuming that V AK must be 0.7 V.
As the cathode is at –1.0 V, the anode must be at –0.3 V when the
diode starts to conduct. The current can be calculated using
Ohm’s law:
I MAX =
(g)
VR1
MAX
R1
=
2 – (–0.3)
2.3
=
= 76.66 mA
30
30
From the data sheet it can be seen that the 1N914 diode can handle
a maximum 75 mA. The value calculated in (f) is too large and
therefore we must choose a diode with a greater current handling
capability, e.g. 1N4148, which can cope with 150 mA flowing
through it.
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(h)
The power dissipated by the resistor when 76.66 mA is flowing
through it can be calculated using any of the power equations. We
will use P = VI:
P = V × I = 2.3 × 76.66 × 10–3 = 176.37 mW
The previous resistor chosen had a power rating of 125 mW.
Obviously this is too small and will not be able to cope with the
heat generated by 76.66 mA flowing through it therefore a higher
wattage rating resistor must be chosen. A 250 mW (1/4 W) 30 
resistor will do.
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SEMICONDUCTOR APPLICATIONS: EXEMPLAR QUESTIONS AND SOLUTIONS
?5
(a)
The circuit shown in Fig SAQ 5(i) is a voltage stabiliser circuit
employing a zener diode.
Draw the typical characteristic curves for this device clearly
showing V Z , I Zmin and I Zmax .
With reference to the characteristic curves explain how this circuit
maintains a steady voltage between nodes N2 and N3 when the
input voltage varies between 10 and 16 V.
R1
100 
N1
Input voltage can vary from
10 V to 16 V
N2
R2
5.1 V
300 
N3
Fig SAQ 5(i)
(b)
What will be the maximum power that the diode will be required
to dissipate? Select a suitable diode from the data sheets that will
satisfy this requirement.
(c)
Calculate the maximum power dissipated in R 1 and select a
suitable wattage rating for this resistor.
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?5
Solution
(a)
Sketch of zener diode typical characteristic curve:
Iforward
VZ
IZmin
Vforward
IZmax
For the circuit to operate correctly a number of conditions have to
be met:
1.
2.
3.
the input voltage must be greater than the zener voltage, V Z
the current flowing through the zener must be greater than
I Zmin to maintain the zener voltage
the current flowing through the zener must be less than I Zmax
or the diode will get too hot (i.e. it will exceed its power
dissipation capabilities).
Assuming these conditions are met, the voltage across the diode
will remain fixed which, of course, means the voltage between N2
and N3 is fixed. This fixed voltage means that any resistor
connected between these nodes will have a fixed current flowing
through it.
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Should the input voltage increase then the input current will
increase. However, this increase will flow through the diode as
the current flowing through R 1 is fixed.
Should the input voltage decrease then the input current will
decrease. However, this will result in a decrease in the current
through the diode as the current flowing in R 1 is fixed. In this way
the diode maintains a steady voltage at the output terminals.
(b)
The maximum power that the diode will be required to dissipate
will occur when the maximum current is flowing through it, i.e.
when the input voltage is at its highest; in this case 1 6 V. The
zener voltage is 5.1 V hence the maximum input current I IN MAX will
be:
I IN MAX =
VIN MAX – VZ
R1
=
16 – 5.1
= 109 mA
100
Since we know the voltage across R 2 (5.1 V) and the value of R 2
(300  the current through R 2 can be calculated using Ohm’s law:
I R2 =
VR2
R2
=
VZ
5.1
=
= 17 mA
R2
300
This means that the current flowing through the zener diode is:
I ZMAX = I INMAX – I R2 = 109 mA – 17 mA = 92 mA
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We now know the current flowing through the zener (92 mA) and
the voltage across the zener (5.1 V). By applying the power
equation P = VI we can calculate the maximum power dissipated
by the zener diode:
PZMAX = VZ × I ZMAX = 5.1 × 92 × 10–3 = 469 mW
From the data sheet the most suitable 5.1 V zener is the
BZX55C5V1, which is capable of dissipating 500 mW.
(c)
The maximum power dissipated in R 1 occurs when the maximum
current flows through it. We already know that this occurs when
the input voltage is 16 V and results in a current flow of 109 mA.
We have enough information to use any of the power equations.
We will use P = VI.
When the input voltage is 16 V the voltage across the resistor will
be:
VR1MAX = VIN MAX – VZ = 16 – 5.1 = 10.9 V
Hence using the power equation P = VI we can calculate the
maximum power dissipated in R 1 :
PMAX = VR1
MAX
× I R1
= 10.9 × 109 × 10 –3 = 1.19 W
MAX
A suitable wattage rating for R 1 would be 2 W.
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Outcome 2
?1
(a)
Identify components W and X in the circuit shown in Fig SAQ
1(i).
Load
N2
N1
X
W
N3
N4
ac source
Triggering circuit
TRIGGER
N5
Fig SAQ 1(i)
(b)
For the source and trigger waveforms given in Fig SAQ 1(ii)
sketch the load current.
Source voltage
Trigger current
Load current
Fig SAQ 1(ii)
(c)
Explain the shape of the load current waveform.
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?1
Solution
(a)
W is a silicon-controlled rectifier (SCR) and X is a diac.
(b)
(c)
The SCR requires two conditions before it will conduct:
 the anode must be more positive than the cathode
 the gate must be triggered by a positive pulse.
The diac is simply a device to aid triggering. This device will
conduct when the voltage between its two terminals exceeds a
certain value.
The SCR will stop conducting when the voltage between the anode
and the cathode falls to zero.
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?2
(a)
Identify the components labelled Y and Z in the circuit in Fig SAQ
2(i).
Load
N2
N1
Y
N3
Z
N4
Triggering circuit
ac source
TRIGGER
N5
Fig SAQ 2(i)
(b)
For the source and trigger waveforms given in Fig SAQ 2(ii)
sketch the load current.
Source voltage
Trigger current
Load current
Fig SAQ 2(ii)
(c)
Explain the shape of the load current waveform.
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?2
Solution
(a)
Y is a triac and Z is a diac.
(b)
(c)
The triac differs from the SCR in that it will conduct in both
directions. However, to make the device conduct it still requires
to be triggered and it will stop conducting when the voltage
between its two terminals drops to zero (i.e. it has to be
continuously re-triggered). As with the SCR the diac is used to
aid triggering).
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?3
State the purpose of R V and C in the circuit shown in Fig SAQ 3(i).
Load
N2
N1
RV
ac source
N3
C
N4
Fig SAQ 3(i)
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?3
Solution
The purpose of R V and C is to control triggering beyond the 90° of the
input waveform. The variable R V allows the triggering angle to be
controlled between 90° and 180°.
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Outcome 3
?1
For the circuit given in Fig SAQ 1(i):
(a)
Identify the type of transistor used in the circuit and b riefly
explain how this device works.
(b)
From the information provided in Fig SAQ 1(i) determine the base
current, I B .
(c)
Calculate the exact value required for resistor R 1 in order that the
base current calculated in (b) will flow.
(d)
What value of R 1 would be required to change the dc voltage at N2
to 8 V?
N1
VSUPPLY = 10 V
R3
500 
R1
N2
Tr
hFE = 400
N3
5V
R2
15 K
0.7 V
N4
0V
Fig SAQ 1(i)
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?1
Solution
(a)
The type of transistor used in this circuit is an NPN bipolar
transistor.
The device basically works like a valve is used to control the flow
of fluid in a pipe. A current flowing between the collector and
emitter is controlled by a much smaller current flowing at the
base. Increase the base current and the larger current flowing
between the collector and emitter also increases. Decrease the
base current and current flowing between the collector and emitter
also decreases.
The device does have limits. A point is reached where any further
increase in the base current has no effect on the larger current
flowing between the collector and the emitter. This is like a valve
being fully open and is known as saturation. Similarly, if the base
current is decreased to zero then no current will flow between the
collector and the emitter. This is like a valve being fully closed
and is known as cut-off.
When the transistor is being used as a switch it operates in either
saturation or cut-off. It can do this millions of times a second, i.e.
it can switch very quickly.
When the transistor is being used as an amplifier it operates in
between saturation and cut-off. This region of operation is known
as the active region.
(b)
The first step in this problem is to calculate I C . We know that N1
= 10 V and we also know that N2 = 5 V. As R 3 is connected
between these two nodes we can calculate the voltage across R 3 ,
VR3:
V R 3 = 10 – 5 = 5 V
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As we know the value of R 3 we can use Ohm’s law to calculate the
current through R C :
IC =
VR 3
R3
=
5
= 10 mA
500
We know that the gain of the transistor is h FE = 400 therefore we
can now calculate the base current:
hFE =
IB =
IC
IB
IC
hFE
10 mA 10 × 10 –3
IB =
=
= 25  A
400
400
(c)
We also know the voltage between both ends of resistor R 2 , N3 =
0.7 and N4 = 0 V, therefore we can calculate how much current is
flowing through R 2 :
IR 2 =
VR 2
R2
=
0.7
0.7
=
= 46.67  A
15 K 15 × 103
The current that flows through R 1 , I R1 , splits to become I R2 and I B .
As we know both these currents we can calculate the current
through R 1 :
I R1  I B + I R2
I R1 = 25  A + 46.67  A = 71.67  A
We also know the voltages on both sides of resistor R 1 , N1 = 10 V
and N3 = 0.7 V, hence the voltage across the ends of R 1 = 9.3 V.
Using Ohm’s law we can calculate the exact size of the resistor
required for R 1 :
R1 =
VR1
I R1
=
9.3 V
=129.7 K
71.67  A
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(d)
If the voltage at N2 is 8 V, the current flowing through R 3 will be:
IR 3 =
VS – VN 2
10 – 8
=
= 4 mA
R3
500
As we know the current gain h FE = 400 we can calculate the new
base current I B :
hFE =
IB =
IC
IB
I C 4 mA
4 × 10 –3
=
=
=10  A
hFE
400
400
The current flowing through R 2 , I R2 = 46.67  A (see calculation
above). The current that flows through R 1 , I R1 , splits to become
I R2 and I B . As we know both these currents we can calculate the
current through R 1 :
I R2 = I R2 + I B = 46.67  A + 10  A = 56.67  A
Again we know the voltage levels on both sides of the resis tor R 1 ,
N1 = 10 V and N3 = 0.7 V, hence the voltage across the ends of R 1
= 9.3V.
Using Ohm’s law we can calculate the exact size of the resistor
required for R 1 :
R1 =
VR1
I R1
=
9.3 V
= 164.12 K
56.67  A
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?2
The circuit shown in Fig SAQ 2(i) shows a bipolar transist or circuit
configured to provide small signal amplification.
(a)
Calculate the signal gain.
(b)
On the graph paper provided sketch the input and output signals.
Your answer should show peak values and phase relationship.
(c)
The biasing technique used in this circuit is known as potential
divider biasing. What is meant by the term ‘biasing’?
(d)
Explain the purpose of components C1 and C2.
+12 V
R1
15 K
R3
1.8 K
22 uf
22 uf
C2
C1
Input Voltage = 10 mV pk pk
F = 10 KHz
Output Voltage = 1 V pk pk
R2
33 K
R4
470 
10 uf
C3
Fig SAQ 2(i)
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?2
Solution
(a)
The input signal is v in = 10 mV rms. The output signal is v out = 1 V rms.
gain =
vout
1V
1
=
=
= 100
vin
10 mV 10 × 10 –3
(b)
1 ms
2 ms
3 ms
4 ms
5 ms
1 ms
2 ms
3 ms
4 ms
5 ms
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(c)
Biasing is the term used to describe the establishing of the correct
dc current and voltage levels within an electronic circuit. This is
necessary to allow the circuit to process the signals applied to it
correctly. Practically all electronic circuits that process signals in
some way require biasing.
(d)
C1 and C2 are capacitors and their purpose in this circuit is to
couple and un-couple ac signals with dc bias levels. At a very
simple level a capacitor may be regarded as being invisible to ac,
allowing ac signals to pass straight through, whilst being an
impenetrable barrier to dc. A useful result of this property is that
we can use capacitors to add or remove an ac signal from a dc bias
value.
Whilst a signal is being processed it ‘rides’ on the dc bias levels of
the circuit. Capacitor C1 is there to add the small ac input signal
to the dc bias levels within the amplifier circuit. Capacitor C2
removes the dc level from the output (processed) signal. The
diagram below illustrates this point.
ac signal added
to 1 V dc bias
ac signal with no
bias
1 V dc bias
on this side
of capacitor
no dc bias
on this side
of capacitor
1V
0V
0V
coupling
capacitor
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SEMICONDUCTOR APPLICATIONS: EXEMPLAR QUESTIONS AND SOLUTIONS
?3
Fig SAQ 3(i) shows the dc bias circuit for a field effect transistor
(FET).
(a)
Identify the terminals 1, 2 and 3.
(b)
In your own words briefly explain how this device works.
(c)
Calculate the current flowing through R 1 .
(d)
Calculate the voltage across R 3 .
(e)
Calculate the voltage between terminals 2 and 3.
20 V
R1 = 1 k
1
2
3
10 V
R3 = 500 
Fig SAQ 3(i)
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?3
Solution
(a)
 Terminal 1 is known as the drain (D)
 Terminal 2 is known as the gate (G)
 Terminal 3 is known as the source (S)
(b)
The FET operates in a similar manner to a bipolar transistor in that
a current flowing between two of the terminals (the drain and the
source) is controlled by a signal applied to a third terminal (the
gate). The main difference between the two devices is that the
controlling signal in an FET is a voltage whereas in a bipolar
device it is a current applied to the base.
In summary:
(c)

in a bipolar device a current applied at the base controls a
larger current flowing between the other two terminals

in an FET a voltage applied at the gate controls a current
flowing between the drain and the source.
The resistor R 1 is connected between the drain and the supply V S .
The voltage at terminal 1 (drain) is 10 V, therefore the current
through the resistor R 1 is:
IR1 = ID =
(d)
VS – VD
20 – 10
10
=
=
= 10 mA
3
R1
1 × 10
1 × 103
The current that flows into the drain, I D , is identical to the current
that leaves the source, I S . This current flows through R 3 to 0 V.
As we know the value R 3 we can calculate the voltage across it.
This is the source voltage, V S .
VS = VR 3 = IS × R3 = 10 × 10–3 × 500 = 5 V
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(e)
The voltage between terminals 2 (gate) and 3 (source) is known as
V GS . As the gate is connected to 0 V and the source is at 5 V, V GS
= –5 V, i.e. the voltage at the gate is 5 V lower than the voltage at
the source (hence the negative symbol).
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?4
The circuit in the previous question is modified, as shown in Fig SAQ
4(i), to allow amplification to take place.
20 V
R1
1 k
C1
1
2
Input signal
200 mV pk pk
C2
Input signal
1V pk pk
3
R3
500 
R2
10 M
C3
0V
Fig SAQ 4(i)
(a)
Name this amplifier configuration.
(b)
Calculate the gain of this amplifier.
(c)
State the phase relationship between the input and the output.
(d)
Explain the purpose of capacitors C1 and C2.
(e)
Explain why the 10 M resistor has been added between the gate
and 0 V.
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?4
Solution
(a)
This FET amplifier configuration is one of the most common used
in electronics and is known as the common source configuration;
so-called because the source is common to both input and output
signals.
(b)
The gain of this amplifier is:
gain =
1 Vpkpk
Vout
=
=5
Vin
200 mVpkpk
(c)
The output and input signals will be 180 out of phase.
(d)
The purpose of C1 is to couple the input signal on to the dc bias at
the gate. The purpose of C2 is to uncouple the amplified signal
from the dc bias at the drain so that we are left simply with the
amplified signal at the output.
(e)
The best way to explain the reason for the 10 M resistor is to
consider what would happen without it.
If the 10 M were not there and we had the bias circuit as show in
Fig SAQ 3(i), the input signal would pass through the coupling
capacitor and immediately be shorted to 0 V, i.e. the resistor is
there so that we may apply a signal to the gate. It should be noted
that the 10 M resistor has no effect on the dc bias and that if it
had been included in Fig SAQ 3(i) the results calculated would
have been identical.
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Outcome 4
?1
Fig SAQ 1(i) shows the electronic symbol for an operational amplifier.
On the symbol identify:




the
the
the
the
inverting input
non-inverting input
output
supply rails.
Fig SAQ 1(i)
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?1
Solution
Positive supply rail
Inverting input
Output
Non-inverting input
Negative supply rail
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?2
Outline the main properties of an operational amplifier. Your answer
should refer to:
 open loop gain
 input impedance
 output impedance.
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?2
Solution
(a)
Open loop gain is the gain of the operational amplifier device on
its own, with no components linking the output back to the input
(feedback). The open loop gain is very high, typically over 1
million. The open loop gain is defined as:
gain OPENLOOP =
VOUT
V
= + OUT –
VDIFF
V –V
VDIFF
VOUT
(b)
At Intermediate 2 level ‘input impedance’ may be read as ‘input
resistance’. For an operational amplifier the input impedance is
extremely high and for most calculations we assume that it is
infinite. The main implication of this extremely high input
resistance is that virtually no current flows into the input terminals
(in most calculations it is assumed to be zero).
(c)
As in part (b) at Intermediate 2 level ‘output impedance’ may be
read as ‘output resistance’. For an operational amplifier the output
resistance is extremely low and for most calculations we assume it
to be zero. The main implication of this low output resistance is
that any voltage generated at the output will appear across the
load, i.e. there will be no loading.
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?3
Fig SAQ 3(i) shows the IC (Integrated Circuit) pin numbers for the
commonly used 741 operational amplifier. What is the purpose of the
variable resistor connected between pins 1 and 5?
7
2
6
3
5
1
4
10 K
+Vsupply
Fig SAQ 3(i)
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?3
Solution
These pins are used to correct a condition known as off-set. In this
condition the operational amplifier produces a slight output wh en there
is no difference between the input terminals, i.e. V DIFF = 0 V. To
correct this condition a variable resistor is placed between the off -set
pins (pins 1 and 5). This variable resistor is adjusted until the output is
zero.
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?4
Fig SAQ 4(i) shows an operational amplifier circuit configuration.
+Vs = 10 V
–Vs = –10 V
RA
30 K 
2 V pkpk
Output
RB
10 K 
Fig SAQ 4(i)
(a)
Identify the circuit configuration.
(b)
Write down the expression for the gain and hence determine the
gain of this circuit.
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(c)
Sketch the output waveform on the graph paper provided.
Input
Waveform
y = 1 V/div
x = 0.25 ms/div
Output
Waveform
y = 1 V/div
x = 0.25 ms/div
Fig SAQ 4(ii)
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(d)
The output waveform for an input of 6 V pk pk is shown in Fig
SAQ 4(iii). Explain the distorted shape in the output waveform.
Input
Waveform
y = 1 V/div
x = 0.25 ms/div
Output
Waveform
y = 1 V/div
x = 0.25 ms/div
Fig SAQ 4(iii)
(e) (i)
What value would R B have to take for this circuit to give a
gain of 50 (assume R A is unchanged)?
(ii) What would be the maximum input signal that could be
applied to this circuit without the output distorting?
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?4
Solution
(a)
The circuit configuration is a non-inverting amplifier.
(b)
The gain for this operational amplifier configuration may be
expressed as:
gain =

Vout
R 
= 1 + A 
Vin
RB 

Hence the gain of this particular circuit is:
30 K 

gain = 1 +
 =4
10 K 

(c)
Input
Waveform
y = 1 V/div
x = 0.25 ms/div
Output
Waveform
y = 1 V/div
x = 0.25 ms/div
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SEMICONDUCTOR APPLICATIONS: EXEMPLAR QUESTIONS AND SOLUTIONS
(d)
As calculated in part (c) the gain of this operational amplifier configuration
is 4. The input signal is 6 V pk pk, therefore the non-inverting operational
amplifier circuit will attempt to produce an output signal of:
Vout = gain × Vin = 4 × 6 Vpkpk = 24 Vpkpk
Of course the operational amplifier cannot produce an output signal
any greater than the supply rails of 10 V hence once the output
reaches +10 V or –10 V it stays there until the input signal reduces.
(e) (i)
The equation that determines the gain of the non-inverting amplifier is:
gain =

Vout
R 
= 1 + A 
Vin
RB 

If we require a gain of 50 then the equation would be:

R 
gain = 1 + A 
RB 


30 K 
50 = 1 +

RB 

50 – 1 =
RB =
30 K
RB
30 K
30 × 103
=
= 612.25 Ω
50 – 1
49
Of course this exact value of resistor is not available in practice
and we would have to select the nearest preferred value.
(ii) As stated previously the operational amplifier cannot produce
an output greater than its supply voltage, which in this case is
10 V, therefore for a gain of 50 the greatest input signal that
can be applied to this operational amplifier circuit would be:
gain =
Vout
Vin
50 =
10
Vin
Vin =
10
=  0.2 V
50
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?5
(i)
Identify the circuit shown in Fig SAQ 5.
+Vs = 10 V
–Vs = –10 V
Output
2 V pkpk
Fig SAQ 5
(ii) What is the gain of this operational amplifier circuit
configuration?
(iii) What is the purpose of such a circuit configuration?
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?5
Solution
(i)
The circuit shown in Fig SAQ 5 is known as a voltage follower.
(ii) This circuit is simply a special version of the non-inverting
amplifier given in SAQ 4 where R A is replaced by a short circuit
(i.e. 0  and R B is replaced by an open circuit (i.e. , infinite).
Substituting these values into the equation given for a non inverting amplifier configuration gives:
gain = 1 +
RA
0
=1+
=1+0=1
RB

i.e. the output is exactly the same as the input.
(iii) The purpose of this circuit is that it provides an extremely high
input resistance and an extremely low output resistance. This type
of circuit is used as a buffer between two circuits whose properties
make it unsatisfactory to connect them together.
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?6
The circuit in Fig SAQ 6 shows an alternative amplifier configuration
using an operational amplifier.
(a)
Identify the circuit configuration.
(b)
Write down the expression for the gain. Hence determine the gain
of this circuit.
(c)
Sketch the output waveform on the graph paper provided.
+Vs = 10 V
–Vs = –10 V
RB
10 K 
RA
5K
Output
Input
4 V pkpk
Fig SAQ 6
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Input
Waveform
y = 1 V/div
x = 0.25 ms/div
Output
Waveform
y = 1 V/div
x = 0.25 ms/div
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?6
Solution
(a)
This operational amplifier circuit configuration is known as an
inverting amplifier. Like the non-inverting amplifier this circuit
amplifies the input signal but also inverts the output, i.e. it will be
the opposite shape to the applied input signal (in the case of a sine
wave it is also known as 180° phase inversion).
(b)
The gain for this operational amplifier configuration may be
expressed as:
gain = –
RB
RA
Hence the gain for the inverting amplifier circuit shown in Fig
SAQ 6 is:
gain = –
RB
10 K 
=–
=2
RA
5K
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(c)
Input
Waveform
y = 1 V/div
x = 0.25 ms/div
Output
Waveform
y = 1 V/div
x = 0.25 ms/div
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