a
FEATURES
1.8 V to 5.5 V Single Supply
2.5 V Dual Supply
3 ON Resistance
0.75 ON Resistance Flatness
100 pA Leakage Currents
14 ns Switching Times
Single 8-to-1 Multiplexer ADG758
Differential 4-to-1 Multiplexer ADG759
20-Lead 4 mm 4 mm Chip Scale Package
Low Power Consumption
TTL-/CMOS-Compatible Inputs
For Functionally Equivalent Devices in 16-Lead TSSOP
Package, See ADG708/ADG709
APPLICATIONS
Data Acquisition Systems
Communication Systems
Relay Replacement
Audio and Video Switching
Battery-Powered Systems
3 , 4-/8-Channel Multiplexers
in Chip Scale Package
ADG758/ADG759
FUNCTIONAL BLOCK DIAGRAMS
ADG758
ADG759
S1
S1A
DA
S4A
D
S1B
DB
S4B
S8
1 OF 8
DECODER
A0 A1
A2 EN
1 OF 4
DECODER
A0
A1
EN
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
The ADG758 and ADG759 are low voltage, CMOS analog
multiplexers comprising eight single channels and four differential
channels, respectively. The ADG758 switches one of eight inputs
(S1–S8) to a common output, D, as determined by the 3-bit
binary address lines A0, A1, and A2. The ADG759 switches one
of four differential inputs to a common differential output as
determined by the 2-bit binary address lines A0 and A1. An EN
input on both devices is used to enable or disable the device. When
disabled, all channels are switched OFF.
1. Small 20-Lead 4 mm × 4 mm Chip Scale Packages (CSP).
2. Single/Dual Supply Operation. The ADG758 and ADG759
are fully specified and guaranteed with 3 V and 5 V singlesupply and ± 2.5 V dual-supply rails.
3. Low RON (3 Ω Typical).
4. Low Power Consumption (<0.01 µW).
5. Guaranteed Break-Before-Make Switching Action.
Low power consumption and an operating supply range of 1.8 V to
5.5 V make the ADG758 and ADG759 ideal for battery-powered,
portable instruments. All channels exhibit break-before-make
switching action preventing momentary shorting when switching channels.
These switches are designed on an enhanced submicron process
that provides low power dissipation yet gives high switching
speed, very low ON resistance and leakage currents. ON resistance
is in the region of a few ohms and is closely matched between
switches and very flat over the full signal range. These parts can
operate equally well as either multiplexers or demultiplexers
and have an input signal range that extends to the supplies.
The ADG758 and ADG759 are available in 20-lead chip
scale packages.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/461-3113
© Analog Devices, Inc., 2013
ADG758/ADG759–SPECIFICATIONS1 (V
DD
= 5 V 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.)
B Version
Parameter
+25C
ANALOG SWITCH
Analog Signal Range
ON Resistance (RON)
–40C
to +85C
0 V to VDD
3
4.5
ON Resistance Match Between
Channels (∆RON)
ON Resistance Flatness (RFLAT(ON))
5
0.4
0.8
0.75
1.2
LEAKAGE CURRENTS
Source OFF Leakage IS (OFF)
Drain OFF Leakage ID (OFF)
Channel ON Leakage ID, IS (ON)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
± 0.01
± 0.1
± 0.01
± 0.1
± 0.01
± 0.1
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
Test Conditions/Comments
VS = 0 V to VDD, IDS = 10 mA;
Test Circuit 1
VS = 0 V to VDD, IDS = 10 mA
VS = 0 V to VDD, IDS = 10 mA
VDD = 5.5 V
VD = 4.5 V/1 V, VS = 1 V/4.5 V;
Test Circuit 2
VD = 4.5 V/1 V, VS = 1 V/4.5 V;
Test Circuit 3
VD = VS = 1 V, or 4.5 V, Test Circuit 4
± 0.75
nA typ
nA max
nA typ
nA max
nA typ
nA max
2.4
0.8
V min
V max
± 0.1
µA typ
µA max
pF typ
VIN = VINL or VINH
± 0.3
± 0.75
0.005
CIN, Digital Input Capacitance
Unit
2
2
DYNAMIC CHARACTERISTICS
tTRANSITION
Break-Before-Make Time Delay, tD
8
tON (EN)
14
tOFF (EN)
7
Charge Injection
±3
ns typ
ns max
ns typ
ns min
ns typ
ns max
ns typ
ns max
pC typ
Off Isolation
–60
–80
dB typ
dB typ
Channel-to-Channel Crosstalk
–60
–80
dB typ
dB typ
–3 dB Bandwidth
CS (OFF)
CD (OFF)
ADG758
ADG759
CD, CS (ON)
ADG758
ADG759
55
13
MHz typ
pF typ
RL = 300 Ω, CL = 35 pF; Test Circuit 5
VS1 = 3 V/0 V, VS8 = 0 V/3 V
RL = 300 Ω, CL = 35 pF
VS = 3 V; Test Circuit 6
RL = 300 Ω, CL = 35 pF
VS = 3 V; Test Circuit 7
RL = 300 Ω, CL = 35 pF
VS = 3 V; Test Circuit 7
VS = 2.5 V, RS = 0 Ω, CL = 1 nF;
Test Circuit 8
RL = 50 Ω, CL = 5 pF, f = 10 MHz
RL = 50 Ω, CL = 5 pF, f = 1 MHz;
Test Circuit 9
RL = 50 Ω, CL = 5 pF, f = 10 MHz
RL = 50 Ω, CL = 5 pF, f = 1 MHz;
Test Circuit 10
RL = 50 Ω, CL = 5 pF; Test Circuit 11
f = 1 MHz
85
42
pF typ
pF typ
f = 1 MHz
f = 1 MHz
96
48
pF typ
pF typ
f = 1 MHz
f = 1 MHz
0.001
µA typ
µA max
14
25
1
25
12
POWER REQUIREMENTS
IDD
1.0
VDD = 5.5 V
Digital Inputs = 0 V or 5.5 V
NOTES
1
Temperature range is as follows: B Version: –40°C to +85°C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
–2–
REV. B
ADG758/ADG759
SPECIFICATIONS1 (V
DD
= 3 V 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.)
B Version
Parameter
+25C
ANALOG SWITCH
Analog Signal Range
ON Resistance (RON)
–40C
to +85C
0 V to VDD
8
11
ON Resistance Match Between
Channels (∆RON)
LEAKAGE CURRENTS
Source OFF Leakage IS (OFF)
Drain OFF Leakage ID (OFF)
Channel ON Leakage ID, IS (ON)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
± 0.01
± 0.1
± 0.01
± 0.1
± 0.01
± 0.1
12
0.4
1.2
Test Conditions/Comments
V
Ω typ
Ω max
Ω typ
Ω max
VS = 0 V to VDD, IDS = 10 mA;
Test Circuit 1
VS = 0 V to VDD, IDS = 10 mA
VDD = 3.3 V
VS = 3 V/1 V, VD = 1 V/3 V;
Test Circuit 2
VS = 3 V/1 V, VD = 1 V/3 V;
Test Circuit 3
VS = VD = 1 V or 3 V; Test Circuit 4
± 0.75
nA typ
nA max
nA typ
nA max
nA typ
nA max
2.0
0.8
V min
V max
± 0.1
µA typ
µA max
pF typ
VIN = VINL or VINH
± 0.3
± 0.75
0.005
CIN, Digital Input Capacitance
Unit
2
2
DYNAMIC CHARACTERISTICS
tTRANSITION
Break-Before-Make Time Delay, tD
8
tON (EN)
18
tOFF (EN)
8
Charge Injection
±3
ns typ
ns max
ns typ
ns min
ns typ
ns max
ns typ
ns max
pC typ
Off Isolation
–60
–80
dB typ
dB typ
Channel-to-Channel Crosstalk
–60
–80
dB typ
dB typ
–3 dB Bandwidth
CS (OFF)
CD (OFF)
ADG758
ADG759
CD, CS (ON)
ADG758
ADG759
55
13
MHz typ
pF typ
RL = 300 Ω, CL = 35 pF; Test Circuit 5
VS1 = 2 V/0 V, VS2 = 0 V/2 V
RL = 300 Ω, CL = 35 pF
VS = 2 V; Test Circuit 6
RL = 300 Ω, CL = 35 pF
VS = 2 V; Test Circuit 7
RL = 300 Ω, CL = 35 pF
VS = 2 V; Test Circuit 7
VS = 1.5 V, RS = 0 Ω, CL = 1 nF;
Test Circuit 8
RL = 50 Ω, CL = 5 pF, f = 10 MHz
RL = 50 Ω, CL = 5 pF, f = 1 MHz;
Test Circuit 9
RL = 50 Ω, CL = 5 pF, f = 10 MHz
RL = 50 Ω, CL = 5 pF, f = 1 MHz;
Test Circuit 10
RL = 50 Ω, CL = 5 pF; Test Circuit 11
f = 1 MHz
85
42
pF typ
pF typ
f = 1 MHz
f = 1 MHz
96
48
pF typ
pF typ
f = 1 MHz
f = 1 MHz
0.001
µA typ
µA max
18
30
1
30
15
POWER REQUIREMENTS
IDD
1.0
NOTES
1
Temperature ranges are as follows: B Version: –40°C to +85°C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
REV. B
–3–
VDD = 3.3 V
Digital Inputs = 0 V or 3.3 V
ADG758/ADG759–SPECIFICATIONS1
DUAL SUPPLY (V
DD
= +2.5 V 10%, VSS = –2.5 V 10%, GND = 0 V, unless otherwise noted.)
B Version
Parameter
+25C
ANALOG SWITCH
Analog Signal Range
ON Resistance (RON)
–40C
to +85C
VSS to VDD
2.5
4.5
ON Resistance Match Between
Channels (∆RON)
ON Resistance Flatness (RFLAT(ON))
5
0.4
0.8
0.6
1.0
LEAKAGE CURRENTS
Source OFF Leakage IS (OFF)
Drain OFF Leakage ID (OFF)
Channel ON Leakage ID, IS (ON)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
± 0.01
± 0.1
± 0.01
± 0.1
± 0.01
± 0.1
0.005
CIN, Digital Input Capacitance
Unit
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
Test Conditions/Comments
VS = VSS to VDD, IDS = 10 mA;
Test Circuit 1
VS = VSS to VDD, IDS = 10 mA
VS = VSS to VDD, IDS = 10 mA
VDD = +2.75 V, VSS = –2.75 V
VS = +2.25 V/–1.25 V, VD = –1.25 V/+2.25 V;
Test Circuit 2
VS = +2.25 V/–1.25 V, VD = –1.25 V/+2.25 V;
Test Circuit 3
VS = VD = +2.25 V/–1.25 V; Test Circuit 4
± 0.75
nA typ
nA max
nA typ
nA max
nA typ
nA max
1.7
0.7
V min
V max
± 0.1
µA typ
µA max
pF typ
VIN = VINL or VINH
ns typ
ns max
ns typ
ns min
ns typ
ns max
ns typ
ns max
pC typ
± 0.3
± 0.75
2
2
DYNAMIC CHARACTERISTICS
tTRANSITION
Break-Before-Make Time Delay, tD
8
tON (EN)
14
tOFF (EN)
8
Charge Injection
±3
Off Isolation
–60
–80
dB typ
dB typ
Channel-to-Channel Crosstalk
–60
–80
dB typ
dB typ
–3 dB Bandwidth
CS (OFF)
CD (OFF)
ADG758
ADG759
CD, CS (ON)
ADG758
ADG759
55
13
MHz typ
pF typ
RL = 300 Ω, CL = 35 pF; Test Circuit 5
VS = 1.5 V/0 V; Test Circuit 5
RL = 300 Ω, CL = 35 pF
VS = 1.5 V; Test Circuit 6
RL = 300 Ω, CL = 35 pF
VS = 1.5 V; Test Circuit 7
RL = 300 Ω, CL = 35 pF
VS = 1.5 V; Test Circuit 7
VS = 0 V, RS = 0 Ω, CL = 1 nF;
Test Circuit 8
RL = 50 Ω, CL = 5 pF, f = 10 MHz
RL = 50 Ω, CL = 5 pF, f = 1 MHz;
Test Circuit 9
RL = 50 Ω, CL = 5 pF, f = 10 MHz
RL = 50 Ω, CL = 5 pF, f = 1 MHz;
Test Circuit 10
RL = 50 Ω, CL = 5 pF; Test Circuit 11
f = 1 MHz
85
42
pF typ
pF typ
f = 1 MHz
f = 1 MHz
96
48
pF typ
pF typ
f = 1 MHz
f = 1 MHz
0.001
µA typ
µA max
µA typ
µA max
14
25
1
25
POWER REQUIREMENTS
IDD
15
1.0
ISS
0.001
1.0
VDD = +2.75 V
Digital Inputs = 0 V or 2.75 V
VSS = –2.75 V
Digital Inputs = 0 V or 2.75 V
NOTES
1
Temperature range is as follows: B Version: –40°C to +85°C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
–4–
REV. B
ADG758/ADG759
ABSOLUTE MAXIMUM RATINGS
TA = 25C, unless otherwise noted.
Parameter
VDD to VSS
VDD to GND
VSS to GND
Analog Inputs1
Digital Inputs1
Peak Current, S or D
Continuous Current, S or D
Operating Temperature Range
Industrial (B Version)
Storage Temperature Range
Junction Temperature
Chip Scale Package,
θJA Thermal Impedance
Lead Temperature, Soldering
Vapor Phase (60 sec)
Infrared (15 sec)
1
Rating
7V
–0.3 V to +7 V
+0.3 V to –3.5 V
VSS – 0.3 V to VDD +0.3 V or
30 mA, Whichever Occurs First
–0.3 V to VDD +0.3 V or
30 mA, Whichever Occurs First
100 mA (Pulsed at 1 ms, 10%
Duty Cycle max)
30 mA
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
–40°C to +85°C
–65°C to +150°C
150°C
32°C/W
215°C
220°C
Overvoltages at EN, A, S, or D will be clamped by internal diodes. Current
should be limited to the maximum ratings given.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
PIN CONFIGURATIONS
Table I. ADG758 Truth Table
ADG758
Switch Condition
NONE
1
2
3
4
5
6
7
8
TOP VIEW
(Not to Scale)
EN
VSS
S1
S2
S3
Table II. ADG759 Truth Table
02371-102
ADG759
TOP VIEW
(Not to Scale)
ON Switch Pair
NONE
1
2
3
4
NC
A0
NC
A1
NC
EN
0
1
1
1
1
20
19
18
17
16
A0
X
0
1
0
1
GND
VDD
S5
S6
S7
NOTES
1. NC = NO CONNECT.
2. EXPOSED PAD TIED TO SUBSTRATE, VSS.
X = Don’t Care
A1
X
0
0
1
1
15
14
13
12
11
1
2
3
4
5
EN
VSS
S1A
S2A
S3A
S4A 6
DA 7
NC 8
DB 9
S4B 10
X = Don’t Care
15
14
13
12
11
1
2
3
4
5
GND
VDD
S1B
S2B
S3B
02371-103
EN
0
1
1
1
1
1
1
1
1
NC
A0
A1
A2
NC
A0
X
0
1
0
1
0
1
0
1
20
19
18
17
16
A1
X
0
0
1
1
0
0
1
1
S4 6
D 7
NC 8
NC 9
S8 10
A2
X
0
0
0
0
1
1
1
1
NOTES
1. NC = NO CONNECT.
2. EXPOSED PAD TIED TO SUBSTRATE, VSS.
Rev. B | Page 5
ADG758/ADG759
TERMINOLOGY
VDD
VSS
GND
S
D
IN
RON
RFLAT(ON)
IS (OFF)
ID (OFF)
ID, IS (ON)
VD (VS)
CS (OFF)
CD (OFF)
CD, CS (ON)
CIN
tTRANSITION
tON (EN)
tOFF (EN)
tOPEN
Off Isolation
Crosstalk
Charge
Injection
On Response
On Loss
VINL
VINH
IINL (IINH)
IDD
ISS
Most Positive Power Supply Potential
Most Negative Power Supply in a dual-supply application. In single-supply applications, this should be tied to
ground at the device.
Ground (0 V) Reference
Source Terminal. May be an input or output.
Drain Terminal. May be an input or output.
Logic Control Input
Ohmic Resistance between D and S
Flatness is defined as the difference between the maximum and minimum value of ON resistance as measured over
the specified analog signal range.
Source Leakage Current with the Switch OFF
Drain leakage Current with the Switch OFF
Channel Leakage current with the Switch ON
Analog Voltage on Terminals D, S
OFF Switch Source Capacitance. Measured with reference to ground.
OFF Switch Drain Capacitance. Measured with reference to ground.
ON Switch Capacitance. Measured with reference to ground.
Digital Input Capacitance
Delay Time measured between the 50% and 90% points of the digital inputs and the switch ON condition when
switching from one address state to another.
Delay Time between the 50% and 90% points of the EN digital input and the switch ON condition.
Delay Time between the 50% and 90% points of the EN digital input and the switch OFF condition.
OFF Time measured between the 80% points of both switches when switching from one address state to another.
A measure of unwanted signal coupling through an OFF switch.
A measure of unwanted signal which is coupled through from one channel to another as a result of parasitic capacitance.
A measure of the glitch impulse transferred from the digital input to the analog output during switching.
The Frequency Response of the ON Switch.
The Loss Due to the ON Resistance of the Switch
Maximum Input Voltage for Logic “0”
Minimum Input Voltage for Logic “1”
Input Current of the Digital Input
Positive Supply Current
Negative Supply Current
–6–
REV. B
Typical Performance Characteristics– ADG758/ADG759
8
8
TA = 25C
VSS = 0V
7
6
6
VDD = 2.7V
ON RESISTANCE – ON RESISTANCE – VDD = 3V
VSS = 0V
7
5
VDD = 3.3V
4
VDD = 4.5V
VDD = 5.5V
3
+85C
5
4
–40C
3
2
2
1
1
0
+25C
0
0
1
2
3
4
VD, VS, DRAIN OR SOURCE VOLTAGE – V
5
0
TPC 1. ON Resistance as a Function of VD (VS) for Single
Supply
0.5
1.0
1.5
2.0
2.5
VD OR VS – DRAIN OR SOURCE VOLTAGE – V
TPC 4. ON Resistance as a Function of VD (VS) for
Different Temperatures, Single Supply
8
8
VDD = +2.5V
VSS = –2.5V
7
7
6
6
ON RESISTANCE – ON RESISTANCE – TA = 25C
5
4
VDD = +2.25V
VSS = –2.25V
3
5
4
+25C
3
+85C
2
2
0
–3.0 –2.5 –2.0 –1.5 –1.0 –0.5
0
0.5
1.0
1.5
–40C
1
VDD = +2.75V
VSS = –2.75V
1
2.0
2.5
0
–3.0 –2.5 –2.0 –1.5 –1.0 –0.5
3.0
0
0.5 1.0
1.5
2.0
2.5 3.0
VD OR VS – DRAIN OR SOURCE VOLTAGE – V
VD OR VS – DRAIN OR SOURCE VOLTAGE – V
TPC 5. ON Resistance as a Function of VD (VS) for
Different Temperatures, Dual Supply
TPC 2. ON Resistance as a Function of VD (VS) for Dual
Supply
0.12
8
VDD = 5V
VSS = 0V
7
VDD = 5V
VSS = 0V
TA = 25C
0.08
6
ID (ON), VS = VD
CURRENT – nA
ON RESISTANCE – 3.0
5
4
+25C
3
+85C
0.04
0.00
IS (OFF)
–0.04
2
ID (OFF)
–0.08
–40C
1
0
–0.12
0
1
2
3
4
VD OR VS – DRAIN OR SOURCE VOLTAGE – V
0
5
TPC 3. ON Resistance as a Function of VD (VS) for Different
Temperatures, Single Supply
REV. B
1
2
3
VS, (VD = VDD – VS) – V
4
5
TPC 6. Leakage Currents as a Function of VD (VS)
–7–
ADG758/ADG759
0.12
0.35
VDD = 3V
VSS = 0V
TA = 25C
0.08
VDD = 3V
VSS = 0V
0.30
CURRENT – nA
CURRENT – nA
0.25
ID (ON), VS = VD
0.04
0.00
IS (OFF)
–0.04
ID (OFF)
0.20
0.15
0.10
ID (OFF)
0.05
–0.08
0.00
–0.12
0
0.5
1.0
1.5
2.0
VS, (VD = VDD – VS) – V
–0.05
15
3.0
2.5
TPC 7. Leakage Currents as a Function of VD (VS)
25
35
45
55
65
TEMPERATURE – C
75
85
TPC 10. Leakage Currents as a Function of Temperature
0.12
10m
VDD = +2.5V
VSS = –2.5V
TA = 25C
0.08
TA = 25C
1m
0.00
IS (OFF)
–0.04
VDD = +2.5V
VSS = –2.5V
100
ID (ON), VS = VD
0.04
CURRENT – A
CURRENT – nA
ID (ON)
IS (OFF)
10
VDD = +5V
1
VDD = +3V
100n
–0.08
ID (OFF)
–0.12
–3.0 –2.5 –2.0 –1.5 –1.0 –0.5 0
0.5 1.0
VS, (VD = VDD – VS) – V
1.5
2.0
2.5
10n
1n
10
3.0
TPC 8. Leakage Currents as a Function of VD (VS)
100
1k
10k
100k
FREQUENCY – Hz
1M
10M
TPC 11. Supply Current vs. Input Switching Frequency
0
0.35
VDD = 5V
TA = 25C
VDD = 5V, VSS = 0V
VDD = +2.5V, VSS = –2.5V
0.30
–20
ATTENUATION – dB
CURRENT – nA
0.25
0.20
0.15
ID (OFF)
0.10
–40
–60
–80
ID (ON)
0.05
–100
0.00
IS (OFF)
–0.05
15
25
35
45
55
65
TEMPERATURE – C
75
–120
30k
85
100k
1M
FREQUENCY – Hz
10M
100M
TPC 12. OFF Isolation vs. Frequency
TPC 9. Leakage Currents as a Function of Temperature
–8–
REV. B
ADG758/ADG759
0
20
TA = 25C
–20
10
–40
0
QINJ – pC
ATTENUATION – dB
VDD = 5V
TA = 25C
–60
–20
–100
–30
100k
1M
FREQUENCY – Hz
10M
–40
–3
100M
TPC 13. Crosstalk vs. Frequency
VDD = 5V
TA = 25C
ATTENUATION – dB
–5
–10
–15
100k
1M
FREQUENCY – Hz
10M
100M
TPC 14. ON Response vs. Frequency
REV. B
VDD = +2.5V
VSS = –2.5V
–2
–1
0
1
2
VOLTAGE – V
3
4
TPC 15. Charge Injection vs. Source Voltage
0
–20
30k
VDD = 3V
VSS = 0V
–10
–80
–120
30k
VDD = 5V
VSS = 0V
–9–
5
ADG758/ADG759
Test Circuits
IDS
V1
VDD
VSS
VDD
VSS
S1
ID (OFF)
S2
S
D
A
D
S8
VS
VS
EN
GND
VD
0.8V
RON = V1/IDS
Test Circuit 3. ID (OFF)
Test Circuit 1. ON Resistance
VDD
VSS
VDD
VSS
IS(OFF)
VDD
NC
D
S2
VS
S8
VD
NC
VDD
VSS
VDD
A2
VSS
A0
EN
VD
2.4V
Test Circuit 4. ID (ON)
3V
S1
ADDRESS
DRIVE (VIN)
VS1
S8
VS8
VS1
90%
VOUT
CL
35pF
RL
300
GND
50%
VOUT
D
EN
50%
0V
S2 THRU S7
ADG758*
2.4V
A
S8
GND
A1
50
D
NC = NO CONNECT
Test Circuit 2. IS (OFF)
VIN
ID (ON)
S1
0.8V
EN
GND
VSS
VDD
S1
A
VSS
90%
VS8
tTRANSITION
tTRANSITION
*SIMILAR CONNECTION FOR ADG759
Test Circuit 5. Switching Time of Multiplexer, tTRANSITION
VDD
VDD
A2
VIN
A1
50
VSS
3V
VSS
ADDRESS
DRIVE (VIN)
VS
S1
0V
S2 THRU S7
A0
ADG758*
2.4V
S8
VOUT
D
EN
GND
RL
300
VOUT
CL
35pF
80%
80%
tOPEN
*SIMILAR CONNECTION FOR ADG759
Test Circuit 6. Break-Before-Make Delay, tOPEN
–10–
REV. B
ADG758/ADG759
VSS
3V
VSS
ENABLE
DRIVE (VIN)
VDD
VDD
A2
VS
S1
tOFF (EN)
S2 THRU S8
V0
ADG758*
VOUT
D
EN
VIN
50%
0V
A1
A0
50%
CL
35pF
RL
300
GND
50
0.9V0
0.9V0
OUTPUT
0V
tON (EN)
*SIMILAR CONNECTION FOR ADG759
Test Circuit 7. Enable Delay, tON (EN), tOFF (EN)
VDD
A2 VDD
VSS
3V
VSS
LOGIC INPUT
(VIN)
0V
A1
A0
RS
ADG758*
D
S
VS
CL
1nF
EN
VIN
VOUT
VOUT
VOUT
QINJ = CL VOUT
GND
*SIMILAR CONNECTION FOR ADG759
Test Circuit 8. Charge Injection
VDD
VDD
VSS
0.1F
VDD
NETWORK
ANALYZER
VSS
VDD
A1
S
50
50
A0
EN
RL
50
VOUT
OFF ISOLATION = 20 LOG
2.4V
VOUT
VS
ADG758*
D
S1
S2
S8
RL
50
VOUT
VOUT WITH SWITCH
VOUT WITHOUT SWITCH
Test Circuit 11. Bandwidth
Power-Supply Sequencing
VSS
EN
A1
A0
EN
INSERTION LOSS = 20 LOG
VS
0.1F
A2 VDD
2.4V
NETWORK
ANALYZER
VOUT
RL
50
When using CMOS devices, care must be taken to ensure correct
power-supply sequencing. Incorrect power-supply sequencing
can result in the device being subjected to stresses beyond the
maximum ratings listed in the data sheet. Digital and analog
inputs should always be applied after power supplies and ground.
For single-supply operation, VSS should be tied to GND as close
to the device as possible.
GND
*SIMILAR CONNECTION FOR ADG759
CHANNEL-TO-CHANNEL
VOUT
CROSSTALK = 20 LOG
VS
Test Circuit 10. Channel-to-Channel Crosstalk
REV. B
50
VSS
VDD
0.1F
VS
S
GND
Test Circuit 9. OFF Isolation
50
NETWORK
ANALYZER
D
GND
NETWORK
ANALYZER
50
VSS
A0
VS
D
2.4V
0.1F
A2
A2
A1
VSS
0.1F
0.1F
–11–
ADG758/ADG759
OUTLINE DIMENSIONS
0.30
0.25
0.18
0.50
BSC
PIN 1
INDICATOR
20
16
15
1
EXPOSED
PAD
2.30
2.10 SQ
2.00
11
0.65
0.60
0.55
TOP VIEW
0.80
0.75
0.70
5
10
0.20 MIN
BOTTOM VIEW
0.05 MAX
0.02 NOM
COPLANARITY
0.08
0.20 REF
SEATING
PLANE
6
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATIONS
SECTION OF THIS DATA SHEET.
COMPLIANT TO JEDEC STANDARDS MO-220-WGGD-1.
08-16-2010-B
PIN 1
INDICATOR
4.10
4.00 SQ
3.90
20-Lead Lead Frame Chip Scale Package [LFCSP_WQ]
4 mm × 4 mm Body, Very Very Thin Quad
(CP-20-6)
Dimensions shown in millimeters
ORDERING GUIDE
Model1
ADG758BCPZ
ADG758BCPZ-REEL7
ADG759BCPZ
ADG759BCPZ-REEL
ADG759BCPZ-REEL7
1
Temperature Range
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
Package Description
20-Lead Lead Frame Chip Scale Package (LFCSP_WQ)
20-Lead Lead Frame Chip Scale Package (LFCSP_WQ)
20-Lead Lead Frame Chip Scale Package (LFCSP_WQ)
20-Lead Lead Frame Chip Scale Package (LFCSP_WQ)
20-Lead Lead Frame Chip Scale Package (LFCSP_WQ)
Z = RoHS Compliant Part.
REVISION HISTORY
3/13—Rev. A to Rev. B
Updated Outline Dimensions ........................................................12
Changes to Ordering Guide ...........................................................12
5/02—Rev. 0 to Rev. A
Edits to General Description section .............................................. 1
Updated Outline Drawings ............................................................12
©2013 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D02371-0-3/13(B)
Rev. B | Page 12
Package Option
CP-20-6
CP-20-6
CP-20-6
CP-20-6
CP-20-6