EV-ADF4355SD1Z User Guide
UG-805
One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com
Evaluating the ADF4355 Microwave Wideband Synthesizer with Integrated VCO
FEATURES
GENERAL DESCRIPTION
Self contained board, including ADF4355 frequency
synthesizer with integrated VCO, differential 122.88 MHz
temperature controlled crystal oscillator (TCXO), loop
filter (20 kHz), USB interface, and voltage regulators
Windows®-based software allows control of synthesizer
functions from a PC
Externally powered by 6 V
The EV-ADF4355SD1Z evaluates the performance of the
ADF4355 frequency synthesizer with integrated VCO for
phase-locked loops (PLLs). A photograph of the evaluation
board is shown in Figure 1. The evaluation board contains
the ADF4355 frequency synthesizer with integrated VCO, a
differential 122.88 MHz reference (TCXO), a loop filter, a
USB interface, power supply connectors, and subminiature
Version A (SMA) connectors. A USB cable is included to
connect the board to a PC USB port.
EVALUATION KIT CONTENTS
EV-ADF4355SD1Z
USB cable
For easy programming of the synthesizer, download the
Windows-based software from www.analog.com/ADF4355.
EQUIPMENT NEEDED
Windows-based PC with USB port for evaluation software
System demonstration platform, serial only (SDP-S)
EVAL-SDP-CS1Z controller board
Power supply (6 V)
Spectrum analyzer
50 Ω terminators
This board requires an SDP-S (shown in Figure 1, but not
supplied with the kit). The SDP-S allows software programming
of the EV-ADF4355SD1Z device.
ONLINE RESOURCES
Documents Needed
ADF4355 data sheet
EV-ADF4355SD1Z user guide
PLL Software Installation Guide
Required Software
Analog Devices, Inc., ADF4355 software, Version 0.46.1 or
higher (available for download at
www.analog.com/ADF4355)
12944-001
EVALUATION BOARD PHOTOGRAPH
Figure 1. EV-ADF4355SD1Z
UG-805
EV-ADF4355SD1Z User Guide
TABLE OF CONTENTS
Features .............................................................................................. 1
RF Output .......................................................................................4
Evaluation Kit Contents ................................................................... 1
Loop Filter ......................................................................................4
Equipment Needed ........................................................................... 1
Reference Source ...........................................................................4
Online Resources .............................................................................. 1
Default Configuration ..................................................................4
General Description ......................................................................... 1
Evaluation Board Setup ................................................................5
Evaluation Board Photograph......................................................... 1
Evaluation Board Software ...............................................................6
Revision History ............................................................................... 2
Main Controls ................................................................................6
Getting Started .................................................................................. 3
Evaluation and Test ...........................................................................7
Software Installation Procedures ................................................ 3
Evaluation Board Schematics and Artwork ...................................8
Evaluation Board Setup Procedures........................................... 3
Ordering Information .................................................................... 17
Evaluation Board Hardware ............................................................ 4
Bill of Materials ........................................................................... 17
Power Supplies .............................................................................. 4
REVISION HISTORY
5/15—Revision 0: Initial Version
Rev. 0 | Page 2 of 18
EV-ADF4355SD1Z User Guide
UG-805
GETTING STARTED
SOFTWARE INSTALLATION PROCEDURES
EVALUATION BOARD SETUP PROCEDURES
See the ADF4355 product page for the EV-ADF4355SD1Z
control software. For the software installation procedure, see
the PLL Software Installation Guide.
To run the software,
1.
2.
3.
Click the ADF4355 file on the desktop or from the Start
menu.
On the Select Device and Connection tab, choose
ADF4355 and SDP board (black), and then click Connect
(see Figure 2).
When connecting the board, allow 5 sec to 10 sec for the
label on the status bar to change.
12944-002
Under the File menu, the current settings can be saved to, and
loaded from, a text file.
Figure 2. Software Front Panel Display—Select Device and Connection
EV-ADF4355SD1Z User Guide
The EV-ADF4355SD1Z schematics are shown in Figure 7,
Figure 8, and Figure 9. The silkscreens for the evaluation board
are shown in Figure 10 and Figure 11.
R14
C61
R1
R17
RCPOUT
C73
R5
POWER SUPPLIES
The board is powered by a 6 V power supply connected to the
red and black banana connectors. Connect the red connector to
a 6 V power supply and the black connector to ground.
The power supply circuitry allows the user two or three separate
low dropout (LDO) regulators to feed the ADF4355 (using
fewer LDO regulators increases the risk of spur contaminated
dc feeds).
The charge pump and VCO supply pins are driven from a
5 V ADM7150 high performance, low noise regulator. The
remaining supplies are powered from 3.3 V ADM7150 high
performance, low noise regulator.
RVTUNE
Figure 3. Loop Filter Placement
REFERENCE SOURCE
The evaluation board contains a 122.88 MHz differential output
TCXO from Vectron International. If preferred, the user may
supply either a single-ended or differential reference input to
REFINA/REFINB SMA connectors. When using an external
reference, remove R12 to disconnect the power rail to the
TCXO.
To use a single-ended REFINx, connect a low noise 122.88 MHz
reference source to SMA REFINB, and connect a 50 Ω terminator
to SMA REFINA. Remove Resistor R27 (100 Ω). To use a
differential REFINx, connect the differential signal to SMA
REFINA and SMA REFINB. The differential REFINA/REFINB
SMA connectors can operate to a 500 MHz input frequency.
LED1 indicates when the ADF4355 is powered on. Use
Switch S1 to switch the 6 V to the board on and off.
RF OUTPUT
The EV-ADF4355SD1Z has two pairs of SMA output
connectors: RFOUTA+/RFOUTA− and RFOUTB+/RFOUTB−
(differential outputs). Because they are sensitive to impedance
mismatch, connect the RF outputs to equal load impedances.
If only one port of a differential pair is used, terminate the
complementary port with an equal load terminator (in general,
a 50 Ω terminator).
LOOP FILTER
The loop filter schematic is included in the board schematic in
Figure 7. Figure 3 shows the loop filter component placements.
For lowest rms phase noise, use the following components (that
are inserted on the evaluation board) with a 0.9 mA charge
pump current:
•
•
C60
The EV-ADF4355SD1Z requires the SDP-S platform that uses
the EVAL-SDP-CS1Z. (SDP-B is not recommended.)
C59
RPIN18
EVALUATION BOARD HARDWARE
12944-003
UG-805
In the schematic shown in Figure 7, the REFINA pin of U1
(ADF4355) is connected to SMA REFINB, and the REFINB pin
of U1 (ADF4355) is connected to SMA REFINA. This
schematic matches the evaluation board connections.
DEFAULT CONFIGURATION
All components necessary for local oscillator (LO) generation
are inserted on the board. This board is shipped with the
ADF4355 synthesizer with an integrated VCO, a differential
122.88 MHz reference TCXO, and a 20 kHz loop filter (ICP =
0.9 mA).
C60 = 1.2 nF, C59 = 33 nF, C61 = 390 pF, C73 = 10 pF
R14 = 1 kΩ, R17 = 3.3 kΩ
Narrower loop filter bandwidths have lower spurious signals.
Rev. 0 | Page 4 of 18
EV-ADF4355SD1Z User Guide
UG-805
EVALUATION BOARD SETUP
SDP-S BOARD
USB
PC
VSUPPLY
EXTERNAL POWER
SWITCH
EXTERNAL DC
SUPPLY
PLL
POWER
LED
EXTERNAL DC
GND
SPECTRUM
ANALYZER
SIGNAL GENERATOR
LOCK
DETECT
LED
REFERENCE
IN/OUT
REFINB
TCXO
LOOP FILTER
REFINA
REFERENCE
(OPTIONAL)
ADF4355
(UNDERNEATH BOARD)
RFOUTB–
RFOUTA–
RFOUTB+
12944-004
RFOUTA+
Figure 4. Evaluation Setup Block Diagram
UG-805
EV-ADF4355SD1Z User Guide
EVALUATION BOARD SOFTWARE
MAIN CONTROLS
The Main Controls tab (see Figure 5) selects the RF and user
configurable register settings. Consult the register descriptions
of the ADF4355 data sheet for details. Default settings are
recommended for most registers.
In Register 4, program the CP current to match the value used
for the loop filter design.
12944-005
In the RF Settings, ensure that VCOout (MHz) equals the
VCO frequency. Set the Output divider to give the required
RFoutA± (MHz).
Ensure that Reference freq equals the applied reference signal.
The PFD frequency is calculated from the reference frequency,
the R counter, the reference doubler, and the reference divide
by 2. Ensure that the value in PFD (MHz) matches the value
specified in the loop filter design.
Figure 5. Software Front Panel Display—Main Controls
Rev. 0 | Page 6 of 18
EV-ADF4355SD1Z User Guide
UG-805
EVALUATION AND TEST
–70
–70
–80
–80
–90
–90
–100
–100
–110
–110
–120
–120
–130
–130
–140
–140
–150
–150
–160
–160
–170
–170
1k
10k
100k
1M
10M
FREQUENCY OFFSET (Hz)
Figure 6. Single Sideband Phase Noise
SPUR POWER (dBc)
1.
PHASE NOISE (dBc/Hz)
Install the ADF4355 software (see the PLL Software
Installation Guide).
2. Follow the hardware driver installation procedure
(Windows XP only).
3. Connect a 50 Ω terminator to RFOUTA−.
4. Connect the EV-ADF4355SD1Z board to the SDP-S board.
5. Connect the 6 V power supply to the banana connectors
and power-on the board using S1 (check that LED1 is on).
6. Connect the USB cable from the SDP-S board to the PC.
7. Run the ADF4355 software.
8. Select ADF4355 and SDP board (black) in the Select
Device and Connection tab of the software front panel
display window (see Figure 2).
9. Click the Main Controls tab, and set the VCOout (MHz)
to a frequency of 5000 MHz.
10. Click Write All Registers.
11. Connect the spectrum analyzer to SMA connector
RFOUTA+, see Figure 4 for a typical evaluation setup.
12. Measure the output spectrum and single sideband phase
noise.
Figure 6 shows a phase noise plot of the SMA RFOUTA+ equal
to 5 GHz.
12944-006
To evaluate and test the performance of the ADF4355, use the
following procedure:
Figure 7. Evaluation Board Schematic—Page 1
Rev. 0 | Page 8 of 18
+3.3V
RA3
0Ω
DNI
CA3
1µF
DNI
GND
CA2
1µF
DNI
GND
C2
C1
OUT–
1
GND
5 4 3 2
REFINA
GND
5
OUT+
NC GND
2
3 125MHz
6
DNI
7 Y1_ALT
VTUNE VCC
1
CA5
1µF
DNI
GND
4
GND
CA4
1µF
DNI
GND
8
RA2
0Ω
DNI
REFINA AND REFINB ARE SPACED 15mm
CENTER TO CENTER ON PCB
CA1
100pF
DNI
GND
3
R8
51Ω
DNI
R7
51Ω
DNI
1
CE IN
LE IN
DATA IN
CLK IN
1
R16
0Ω
TP2
C44
100pF
GND
GND
GND
R23
1.8kΩ
R25
1.5kΩ
GND
R24
DNI
+3.3V
C41
1000pF
R10
51Ω
DNI
REFINB
R12 +3.3V
0Ω
VP
TP6
C50
0.1µF
GND
CREG2
C48
10pF
GND
C37
10pF
GND
C43
10pF
GND
29
REFINA
28
REFINB
1
CLK
2
DATA
3
LE
4
CE
ADF4355
C46
10pF
GND
C33
0.1µF
GND
C53
0.1µF
GND
C45
0.1µF
GND
DVDD
AVDD2
TP3 TP4 TP5
GND
5 4 3 2
1
C47
1µF
GND
R9
51Ω +3.3V
DNI
C42
1000pF
R19
1.8kΩ
C39
1000pF
R27
100Ω
C40
1000pF
R18
1.8kΩ
TP1
E/D
GND
6
GND
VDD
1
NC
Y1
5 4
GND
+3.3V
R11
0Ω
RA4
0Ω
DNI
RA5
0Ω
DNI
122.88MHz
2
CFO
FO
RA1
0Ω
DNI
32
16
27
6
22
GND
U1
R3
0Ω
DNI
GND
IN
C25
10pF
C59
0.033µF
R14
1kΩ
R35
0Ω
0201
R34
0Ω
0201
R33
0Ω
0201
R32
0Ω
0201
GND
L4
4.7nH
0201
DNI
GND
L7
4.7nH
0201
DNI
GND
L6
4.7nH
0201
DNI
GND
L3
4.7nH
0201
DNI
C55
0.1µF
GND
GND
AVDD1
R21
0Ω
C54
10pF
A
DS1
R17
3.3kΩ
C3
10pF
0201
GND
L8
C63
100nH 100pF
0402 0201
VRF1
L5
C64
100nH 100pF
0402 0201
VRF1
L2
C6
7.4nH 10pF
0302 0201
VRF1
R1
0Ω
C61
390pF
GND
L1
7.4nH
0302
VRF1
C23
DNI
C60
1600pF
GND
R4
0Ω
C31
10pF
GND
C29
10pF
GND
C28
10pF
GND
32K243-40ML5
RFOUTB–
32K243-40ML5
RFOUTB+
32K243-40ML5
RFOUTA–
GND
RFOUTB–
GND
RFOUTB+
GND
RFOUTA–
GND
C17
4.7µF
GND
VREF
GND
C15
1µF
DNI
VBIAS
VRF1
VRF1
C68
120pF
C67
0.1µF
C66
1µF
C65
120pF
C57
120pF
C58
0.1µF
C21
1µF
C56
120pF
GND
GND
RF CHOKE
MATED LINE WIDTH’S
TRACE WIDTH = 380µm
C19
10µF
GND
VREGVCO
RFOUTA+
C30
1000pF
GND
C27
1000pF
GND
C26
0.1µF
GND
LOCK DETECT
32K243-40ML5
RFOUTA+
GND
C73
10pF
DNI
R5 VTUNE
0Ω
C
R26
0Ω
DNI
LOOP FILTER
PLACE ON BOTTOM SIDE
OF PCB SHIELD SIGNALS WITH VIAS
GND
C12
1µF
VVCO
GND
R22
68Ω
R20
0Ω
DNI
IN MUXOUT
MUXOUT
RMUX
0Ω 1
VRF
C9
1µF
GND
GND
GND
CPOUT RCPOUT
0Ω
C32
1000pF
GND
C34
10pF
GND
GND
C35
0.1µF
C36
1000pF
CREG1
C38
10pF
PDRF
PDRF
R2
10kΩ
+3.3V
GND
ADF4355
30
25
7
5
10
17
20
24
23
19
11
12
14
15
R6
5.1kΩ
GND
MUXOUT
CREG1
CPOUT
AVDD
VREF
VVCO
VTUNE
VBIAS
VREF
VREGVCO
RFOUTA+
RFOUTA–
RFOUTB+
RFOUTB–
CREG2
AVDD
DVDD
VP
RSET
9
8 AGND
31 CPGND
SDGND
18
AGNDVCO
21
AGNDVCO
13
AGNDRF
26
PDBRF
PAD
PAD
+3.3V
12944-007
UG-805
EV-ADF4355SD1Z User Guide
EVALUATION BOARD SCHEMATICS AND ARTWORK
AVDD
DVDD
VRF
VRF1
VVCO
VP
VRVCO
G1
G2
G3
G4
G5
G6
G7
G8
G9
G10
G11
G12
G13
G14
G15
G16
G17
G18
G19
G20
G21
G22
G23
G24
G25
G26
G27
G28
G29
G30
G31
G32
G33
G34
G35
G36
1
2
3
4
5
6
7
8
P1
GND
MUX/LE
IN
GND
CVVCO
22µF
0Ω
RV7
GND
CVP
22µF
Figure 8. Evaluation Board Schematic—Page 2
GND
CVRF1
22µF
RV5
0Ω
AVDD2
GND
CVRF
22µF
GND
CDVDD
22µF
GND
CAVDD
22µF
GND
1
TP_VP
1
0Ω
1
1
3.3V
AVDD2
RV2
0Ω
DNI
VRF1
VRF
DVDD
TP_VRF1
RV31
0Ω
1
TP_VRF
RV25
0Ω
RV20
1
AVDD1
TP_DVDD
1
TP_AVDD2
0Ω
RV14
VREF
R_VREF
DNI
GND
C4
1µF
RV9
0Ω
RV10
0Ω
DNI
GND
REF
VIN
4
GND
PAD
EP
VR2
ADM7150ACPZ-5.0
1
VREG
3
2 VOUT
BYP
7
5
REF_SENSE EN
6
8
RV30
0Ω
0Ω
RV26
RV4
DNI
RV19
0Ω
0Ω
RV15
1kΩ
0Ω
GND
C16
10µF
GND
C2
10µF
RV3
0Ω
RAVDD
R3V3
GND
C18
1µF
RV27
0Ω
GND
C5
1µF
RV16
0Ω
LED1
RV28
0Ω
DNI
GND
RV17
0Ω
DNI
GND
GND
EN
VIN
GND
VIN
4
GND
PAD
REF
EP
PAD 4
EP
REF_SENSE
REF
VOUT
7
8
VR5
ADM7150ACPZ-3.3
1
VREG
3
2 VOUT
BYP
7
5
REF_SENSE EN
6
8
5
6
BYP
VR3
ADM7150ACPZ-3.3
1
VREG
3
2
R_VREGVCO VREGVCO PLACE VBIAS, VREF 7 VREGVCO
RESISTORS CLOSE TO DUT PINS
0Ω
VBIAS
GND
C1
10µF
R_VBIAS
DNI
RV12
0Ω
RV8
0Ω
RV6
0Ω
TP_+3.3V
VVCO
VP
TP_AVDD1
1
TP_VVCO
0
+ CVRVCO
22µF
+
+
RV1
GND
C22
10µF
RV29
0Ω
GND
C24 +
1µF
C20
10µF
GND
GND
C11
10µF
RV18
0Ω
GND
C14 +
1µF
C76
100µF
GND
6V
C75
100µF
GND
6V
6V
C8
10µF
GND
GND
C10
10µF
RV11
0Ω
C13 + C74
1µF
100µF
GND
GND
C7
10µF
GND
GND
+
G1
G2
G3
G4
G5
G6
G7
G8
G9
G10
G11
G12
G13
G14
G15
G16
1
2
3
4
P2
6V
ZD1
GND
RPIN18
0Ω
DNI
VSUPPLY
DNI
IN
IN
1
2
GND
VSUPPLY_ALT
LE
MUX/LE
MUXOUT
IN
IN
IN
1
2
3
JUMPER 3 PIN
P3
CPOUT SHIELD SIGNALS WITH VIAS ALL
THE WAY TO THE DUT PINS.
VTUNE PLACE VTUNE, CPOUT AND SW
RESISTORS CLOSE TO DUT PINS
GND
1
2
GND
5 4 3 2
1
VSUPPLY
RVTUNE
0Ω
DNI
1
3
3
GND
GND
C71
22µF
1
S1
EV-ADF4355SD1Z User Guide
UG-805
12944-008
EV-ADF4355SD1Z User Guide
CN1
RLE
1.5kΩ
LE
IN
DATA
IN
MUXOUT
IN
CLK
IN
RDATA
1.5kΩ
VIO_+3.3V
RE3
TBD0603
DNI
RE1
100kΩ
RE2
100kΩ
GND
GND
8
1
2
3
6
7
RMUXOUT
0Ω
RCLK
1.5kΩ
UE1
A0 VCC
A1
5 SDA_0
A2
SDA
SCL
WP
VSS
4
24LC32A-I/MS
SDA
1
SCL
GND
SCL_0
PDRF
CE
1
R28
0Ω
DNI
IN
R29
0Ω
DNI
IN
R30
0Ω
DNI
GND
LE
R31
0Ω
DNI
IN
Figure 9. Evaluation Board Schematic—Page 3
Rev. 0 | Page 10 of 18
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
GND
CN1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
GND
12944-009
UG-805
UG-805
12944-010
EV-ADF4355SD1Z User Guide
Figure 10. Evaluation Board Silk Screen—Top Side
EV-ADF4355SD1Z User Guide
12944-011
UG-805
Figure 11. Evaluation Board Silk Screen—Bottom Side
Rev. 0 | Page 12 of 18
UG-805
12944-012
EV-ADF4355SD1Z User Guide
Figure 12. Evaluation Board Layer 1—Primary
EV-ADF4355SD1Z User Guide
12944-013
UG-805
Figure 13. Evaluation Board Layer 2—Ground
Rev. 0 | Page 14 of 18
UG-805
12944-014
EV-ADF4355SD1Z User Guide
Figure 14. Evaluation Board Layer 3—Power
EV-ADF4355SD1Z User Guide
12944-015
UG-805
Figure 15. Evaluation Board Layer 4—Secondary
Rev. 0 | Page 16 of 18
EV-ADF4355SD1Z User Guide
UG-805
ORDERING INFORMATION
BILL OF MATERIALS
Table 1.
Reference Designator
C1, C2, C7, C8, C10, C11,
C16, C20, C22
C9, C12, C21, C47, C66
C4, C5, C13, C14, C18, C24
C17
C19
C25, C28, C29, C31, C34, C37,
C38, C43, C46, C48, C54
C26
C27, C30, C32, C36,
C39 to C42
C3, C6
C33, C35, C45, C50, C53, C55,
C58, C67
C44
C56, C57, C65, C68
C59
C60
C61
C63, C64
C71
C74 to C76
CVP, CVRF, CAVDD, CDVDD,
CVRF1, CVVCO, CVRVCO
CN1
Description
Ceramic multilayer capacitor, X5R
Value
10 µF
Manufacturer
TDK
Part Number
C2012X5R1E106K085AC
Ceramic capacitor, X7R
Ceramic capacitor, X8R
Ceramic capacitor, X5R
Ceramic capacitor, X5R
RF/microwave capacitor, C0G
1 μF
1 μF
4.7 μF
10 μF
10 pF
Allied Electronics
TDK
TDK
TDK
Allied Electronics
0603YC105KAT2A
C2012X8R1C105K125AB
C1608X5R1C475K080AC
C1608X5R1A106M080AC
04025U100GAT2A
Ceramic monochip capacitor, X5R
Ceramic capacitor, C0G 0402
0.1 μF
1000 pF
Murata
Murata
GRM155R61A104KA01D
GRM1555C1H102JA01
Chip ceramic capacitor, RF
Ceramic capacitor, X7R
10 pF
0.1 μF
Allied Electronics
KEMET
0201ZK100GBSTR
C0402C104K4RACTU
100 pF
120 pF
0.033 μF
1600 pF
390 pF
100 pF
22 μF
100 μF
22 μF
Yageo
Murata
Murata
Murata
TDK
Murata
Allied Electronics
Allied Electronics
Allied Electronics
2238 867 15101
GRM1555C1H121JA01
GRM188R71C333KA01D
GRM1885C1H162JA01D
C1608C0G1H391J
GRM033R71E101KA01D
TCJC226M025R0100
TAJB107K006R
TAJB226K016R
HRS
FX8-120S-SV(21)
DS1, LED1
Ceramic capacitor, NP0
Ceramic capacitor, C0G, 0402
Ceramic capacitor, X7R, 0603
Monolithic ceramic capacitor, NP0
Chip capacitor, C0G, 0603
Ceramic capacitor, 0201, X7R
Tantalum solid electrolytic capacitor
Tantalum chip capacitor
Tantalum surface-mount device
(SMD) capacitor
Printed circuit board (PCB), vertical
type receptacle, SMD connector
570 nm SMD (green) LED
HSMG-C170
GND
PCB single socket (black) connector
L1, L2
L5, L8
SCL, SDA, TP1 to TP6, PDRF,
TP_VP, MUXOUT, TP_VRF,
TP_DVDD, TP_VRF1, TP_VVCO,
TP_+3.3V, TP_AVDD1,
TP_AVDD2
P3
R1, R4, R5, R12, R21, RV1, RV3,
RV5 to RV9, R3V3, RV11, RV12,
RV14 to RV16, RV18 to RV20,
RV25 to RV27, RV29 to RV31,
RMUXOUT
R11, R16, RMUX,
RCPOUT, R_VREGVCO
R14
R17
R18, R19, R23
R2
R22
R25, RLE, RCLK, RDATA
Chip inductor
Chip inductor
PCB test point connector (yellow)
Avago
Technologies
Del-Tron
Precision, Inc.
Coilcraft
Coilcraft
Components
Corporation
R27
R32 to R35
7.4 nH
100 nH
571-0100
0302CS-7N4XJLU
0402CS-R10XJLU
TP-104-01-04
Connector PCB, Header 3
Film SMD resistor, 0603
0Ω
Molex
Multicomp
22-28-4033
MC0603WG00000T5E-TC
Thick film chip resistor
0Ω
Multicomp
0402WGF0000TCE
Film SMD resistor, 0603
Film SMD resistor, 0603
Film SMD resistor,0603
Thick film chip resistor
Film SMD resistor, 0603
Precision thick film chip resistor,
R0805
High-frequency thin film chip resistor
Chip SMD resistor, 0201
1 kΩ
3.3 kΩ
1.8 kΩ
10 kΩ
68 Ω
1.5 kΩ
Multicomp
Multicomp
Multicomp
Multicomp
Multicomp
Panasonic
MC 0.063W 0603 1% 1K
MC 0.063W 0603 1% 3K3
MC 0.063W 0603 1% 1K8
MC 0.063W 0603 1% 10K
MC 0.063W 0603 1% 68R
ERJ-6ENF1501V
100 Ω
0Ω
Vishay
Panasonic
FC0402E1000BST1
ERJ-1GE0R00C
UG-805
Reference Designator
R6
RAVDD
RE1, RE2
REFINA, REFINB
RFOUTA+, RFOUTA−,
RFOUTB+, RFOUTB−
S1
U1
UE1
VR2
EV-ADF4355SD1Z User Guide
Description
STD thick film chip resistor
Precision thick film chip resistor,
R0805
Precision thick film chip resistor,
R0805
PCB coaxial SMA end launch
connector
PCB SMA RA jack connector
Manufacturer
Vishay
Panasonic
Part Number
CRCW04025K10FKED
ERJ-6ENF1001V
100 kΩ
Panasonic
ERJ-6ENF1003V
Johnson
142-0701-801
Rosenberger
32K243-40ML5
Alcoswitch
Analog Devices
TT11AGPC-1
ADF4355BCPZ
Microchip
Technology, Inc.
Analog Devices
24LC32A-I/MS
Analog Devices
ADM7150ACPZ-3.3
Del-Tron
Precision, Inc.
Vectron
International
Philips
Johnson
571-0500
SW SPST momentary
Microwave wideband synthesizer
with integrated VCO
IC 32 kB serial EEPROM
VSUPPLY_ALT
800 mA, ultralow noise high power
supply rejection ratio (PSRR), 5.0 V
output RF linear regulator
800 mA, ultralow noise high PSRR,
3.3 V output RF linear regulator
PCB single socket( red) connector
Y1
IC crystal LVPECL, LVDS oscillator
ZD1
VSUPPLY
BZX84C, 6.8 V, Zener, SOT-23 diode
PCB coaxial SMA end launch
connector
VR3, VR5
Value
5.1 kΩ
1 kΩ
ADM7150ACPZ-5.0
VCC6-LAB-122M880000
BZX84-C6V8
DNI
ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection
circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.
Legal Terms and Conditions By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be
bound by the terms and conditions set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do
not use the Evaluation Board until you have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you
(“Customer”) and Analog Devices, Inc. (“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants
to Customer a free, limited, personal, temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees
that the Evaluation Board is provided for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly
made subject to the following additional limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the
Evaluation Board. As used herein, the term “Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all
rights not expressly granted herein, including ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and
proprietary information of ADI. Customer may not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination
of this Agreement, Customer agrees to promptly return the Evaluation Board to ADI. ADDITIONAL resistorTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation
Board. Customer shall inform ADI of any occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the
material content of the Evaluation Board. Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMINATION. ADI may terminate this
Agreement at any time upon giving written notice to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER
IS PROVIDED “AS IS” AND ADI MAKES NO WARRANTIES OR REPresistorENTATIONS OF ANY KIND WITH resistorPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPresistorENTATIONS, ENDORSEMENTS,
GUARANTEES, OR WARRANTIES, EXPresistorS OR IMPLIED, RELATED TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A
PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT, OR CONSEQUENTIAL
DAMAGES resistorULTING FROM CUSTOMER’S POSSESSION OR USE OF THE EVALUATION BOARD, INCLUDING BUT NOT LIMITED TO LOST PROFITS, DELAY COSTS, LABOR COSTS OR LOSS OF GOODWILL. ADI’S
TOTAL LIABILITY FROM ANY AND ALL CAUSES SHALL BE LIMITED TO THE AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the
Evaluation Board to another country, and that it will comply with all applicable United States federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and
construed in accordance with the substantive laws of the Commonwealth of Massachusetts (excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal
courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby submits to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the
International Sale of Goods shall not apply to this Agreement and is expressly disclaimed.
©2015 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
UG12944-0-5/15(0)
Rev. 0 | Page 18 of 18