Evaluation Board User Guide EV-ADF4193SD1Z/EV-ADF4193SD2Z/EV-ADF4196SD1Z One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Evaluating the ADF4193 and ADF4196 Frequency Synthesizers for Phase-Locked Loops FEATURES REQUIRED DOCUMENTS EV-ADF4193SD1Z board includes an ADF4193 synthesizer, loop filter, VCO, voltage regulators, and SDP interface EV-ADF4193SD2Z and EV-ADF4196SD1Z boards include an ADF4193 or ADF4196 synthesizer, voltage regulators, and SDP interface Accompanying software allows control of synthesizer functions from a PC (via an SDP interface) Externally powered by a 5 V to 9 V supply ADF4193 data sheet ADF4196 data sheet EV-ADF4193SD1Z/EV-ADF4193SD2Z/EV-ADF4196SD1Z user guide EVALUATION KIT CONTENTS EV-ADF4193SD1Z, EV-ADF4193SD2Z, or EV-ADF4196SD1Z evaluation board CD with evaluation software REQUIRED ADDITIONAL EQUIPMENT VCO (for EV-ADF4193SD2Z and EV-ADF4196SD1Z) Loop filter components (for EV-ADF4193SD2Z and EV-ADF4196SD1Z) Soldering equipment Spectrum analyzer Power supplies (9 V) Windows-based PC with USB port for evaluation software REQUIRED SOFTWARE Analog Devices ADF4193-6 evaluation software, Version 6.0.7 or higher (included on the CD in the evaluation board kit or available for download at www.analog.com) GENERAL DESCRIPTION The EV-ADF4193SD1Z/EV-ADF4193SD2Z/EV-ADF4196SD1Z evaluate the performance of the ADF4193 or ADF4196 frequency synthesizer for phase-locked loops (PLL). A photograph of the evaluation board is shown in Figure 1. The evaluation board includes the ADF4196 synthesizer, an SDP connector, SMA connectors, and power supply connectors. There are also footprints for loop filter components and a voltage controlled oscillator (VCO); if used, these components must be soldered to the board to complete the loop. The board connects to a PC via an SDP adapter board. In addition, the evaluation kit contains Windows®-based software to allow easy programming of the synthesizer. 11352-001 EVALUATION BOARD PHOTOGRAPH Figure 1. Photograph of the EV-ADF4196SD1Z PLEASE SEE THE LAST PAGE FOR AN IMPORTANT WARNING AND LEGAL TERMS AND CONDITIONS. Rev. 0 | Page 1 of 12 EV-ADF4193SD1Z/EV-ADF4193SD2Z/EV-ADF4196SD1Z Evaluation Board User Guide TABLE OF CONTENTS Features .............................................................................................. 1 VCO ................................................................................................3 Evaluation Kit Contents ................................................................... 1 Loop Filter ......................................................................................3 Required Additional Equipment .................................................... 1 Output Signals ...............................................................................3 Required Documents ....................................................................... 1 Jumpers ...........................................................................................3 Required Software ............................................................................ 1 Evaluation Setup ................................................................................4 General Description ......................................................................... 1 Getting Started ...................................................................................5 Evaluation Board Photograph ......................................................... 1 Installing the Software ..................................................................5 Revision History ............................................................................... 2 Configuring and Setting Up the Board ......................................5 Evaluation Board Hardware ............................................................ 3 Using the Software—Main Controls ...........................................6 Overview........................................................................................ 3 Using the Software—Phase Tables ..............................................7 Power Supplies .............................................................................. 3 Evaluation Board Schematics...........................................................8 REVISION HISTORY 3/13—Revision 0: Initial Version Rev. 0 | Page 2 of 12 Evaluation Board User Guide EV-ADF4193SD1Z/EV-ADF4193SD2Z/EV-ADF4196SD1Z EVALUATION BOARD HARDWARE OVERVIEW VCO EV-ADF4193SD1Z The EV-ADF4193SD1Z/EV-ADF4193SD2Z/EV-ADF4196SD1Z can accept three industry-standard VCOs with different footprints. These VCOs are labeled Y4 and Y3 (Y3 can accept two different types of VCOs). The EV-ADF4193SD1Z board includes a VCO, loop filter components, power regulators, and an ADF4193 synthesizer. To operate this board, it is necessary to 1. 2. 3. Table 1. VCOs1 Supply a reference signal. Power the board. Program the board using the provided software. VCO Y4 Y3 EV-ADF4193SD2Z and EV-ADF4196SD1Z The EV-ADF4193SD2Z and EV-ADF4196SD1Z boards include power regulators and an ADF4193 or ADF4196 synthesizer. To operate these boards, it is necessary to 1. 2. 3. 4. 5. Solder the loop filter components to the board. Connect/solder a VCO to the board. Supply a reference signal. Power the board. Program the board using the provided software. 1 R40 0Ω DNI R37 0Ω DNI R44 DNI 0Ω DNI = do not insert. Alternatively, an external VCO can be connected at the VTUNE SMA, but you must ensure that R4 = R47 = 0 Ω. The output signal of the VCO should be fed back to the RFIN+ SMA. LOOP FILTER See the ADF4193-TN-001 technical note, ADF4193 PLL Loop Filter Design Using ADISimPLL, for guidance on designing a loop filter using ADIsimPLL. POWER SUPPLIES The evaluation board is powered by a 5 V to 9 V power supply connected to the red and black banana connectors. Connect the red connector to a 5 V to 9 V power supply, and connect the black connector to ground. OUTPUT SIGNALS When an on-board VCO is used, the output signal is routed to J2. When an external VCO is used, connect the feedback signal to J2. JUMPERS Table 2 describes the various jumper options. Table 2. Jumpers Jumper LK1 Supplies ADF4193/ADF4196 VDD supply LK2 VCO supply LK3 VP supply LK4 VP3 supply Setting 5V 3V None 5V VCO None 5V 3V None 5V VCO None R37 DNI 0Ω Description From 5 V regulator, U8, ADP3331ARTZ-REEL7 From 3 V regulator, U4, ADP3330ARTZ-3-RL7. Connect supply to T13. From 5 V regulator, U8, ADP3331ARTZ-REEL7. From 5 V regulator, U2, ADP3330ARTZ-5-RL7. Connect supply to T14. From 5 V regulator, U8, ADP3331ARTZ-REEL7. From 3 V regulator, U4, ADP3330ARTZ-3-RL7. Connect supply to T15. From 5 V regulator, U8, ADP3331ARTZ-REEL7. From 5 V regulator, U2, ADP3330ARTZ-5-RL7. Connect supply to T17. Rev. 0 | Page 3 of 12 EV-ADF4193SD1Z/EV-ADF4193SD2Z/EV-ADF4196SD1Z Evaluation Board User Guide EVALUATION SETUP REFERENCE SIGNAL FROM SIGNAL GENERATOR TO PC VCO OUTPUT TO SPECTRUM ANALYZER SDP VCO ADF4193/ADF4196 GND 11352-002 9V Figure 2. Evaluation Setup Block Diagram, Using On-Board VCO REFERENCE SIGNAL FROM SIGNAL GENERATOR TO PC VCO OUTPUT TO SPECTRUM ANALYZER FEEDBACK SIGNAL FROM VCO VTUNE TO VCO VCO SDP ADF4193/ADF4196 GND 11352-003 9V Figure 3. Evaluation Setup Block Diagram, Using External VCO Rev. 0 | Page 4 of 12 Evaluation Board User Guide EV-ADF4193SD1Z/EV-ADF4193SD2Z/EV-ADF4196SD1Z GETTING STARTED INSTALLING THE SOFTWARE 3. For the software installation procedure, see UG-476, PLL Software Installation Guide. The control software for the EV-ADF4193SD1Z, EV-ADF4193SD2Z, and EV-ADF4196SD1Z is provided on the CD included in the evaluation board kit. 4. CONFIGURING AND SETTING UP THE BOARD Set up the circuit as shown in Figure 2 or Figure 3. Run the ADF4193-6 software. 6. 11352-004 1. 2. 5. Select ADF4193 or ADF4196 and SDP board (black), and then click Connect (see Figure 4). Click the Main Controls tab to view the main controls (see Figure 5). The default values are set to lock a VCO at 1880 MHz. After initial power-up, the ADF4193 or ADF4196 must be initialized. To do this, click Run Initialization Sequence. On the spectrum analyzer, confirm that the output signal is locked at 1880 MHz. Figure 4. Software—Device Selection Rev. 0 | Page 5 of 12 EV-ADF4193SD1Z/EV-ADF4193SD2Z/EV-ADF4196SD1Z USING THE SOFTWARE—MAIN CONTROLS In the PLL Settings area, the Muxout drop-down box allows you to choose the signal that is connected to the output of the MUXOUT pin. In the Registers area near the bottom of the window, the values to be written to each register are displayed. If the background of a text box is green, the value displayed is different from the value actually on the device. Click Write Rx (where x = 0 to 7) to write the value displayed to the device. 11352-005 Use the Main Controls tab to select the RF and PLL settings. In the RF Settings area, set the RF VCO Output Frequency to the desired VCO output. Set the Reference Frequency to be the same as the applied reference signal. The PFD frequency is calculated from the reference frequency, the R-counter, the reference doubler, and the reference-divide-by-2. Ensure that the value in the PFD Frequency box matches the value specified in the loop filter design. Evaluation Board User Guide Figure 5. Software—Main Controls Rev. 0 | Page 6 of 12 Evaluation Board User Guide EV-ADF4193SD1Z/EV-ADF4193SD2Z/EV-ADF4196SD1Z USING THE SOFTWARE—PHASE TABLES Table 3. Files Loaded into Phase Tables Directory for ADF4193-6 To achieve phase locking times of less than 20 µs, you must choose a value of phase corresponding to the value of FRAC for the ADF4193 or ADF4196 File Name gsm1800tx_phase_codes.txt gsm1800rx_phase_codes.txt gsm900tx_phase_codes.txt gsm900rx_phase_codes.txt 26M_60K_phase_codes.txt Use the Phase Tables area of the Main Controls tab to allow the software to automatically update to the optimum value of phase every time the value of FRAC changes. After the software is installed, several phase code files are loaded into the Phase Tables directory within the installation directory. For example, the files described in Table 3 are loaded to C:\Program Files\Analog Devices\ADF4193-6\Phase Tables. Description GSM 1800 Tx systems GSM 1800 Rx systems GSM 900 Tx systems GSM 900 Rx systems GSM 1800 Tx systems designed with a PFD frequency of 26 MHz To use a phase code file, click Open in the Phase Tables area of the Main Controls tab, and then choose the required file. When the codes are loaded, select the Update Phase value when Frac phase changes. The Phase value still needs to be written by the device check box. Rev. 0 | Page 7 of 12 330r 330r 330r R12 R13 R14 DATA LE 1nF MUXOUT C16 CLK J3 REFIN T2 T6 T5 T4 J7 R24 51r DNP C35 J4 1nF R49 590r C17 R50 590r 0r DNP C15 R17 T3 C5 DNP C14 C23 0.1uF 2k4 R31 0r R51 590r C44 + R30 T1 0.1uF 10uF 19 18 17 1 23 16 11 VDD 8 LE DATA CLK CMR RSET MUXOUT REFIN 0r R28 C8 10pF AGND1 6.3V C9 AVDD1 0.1uF 0r R29 U1 ADF4193 DGND3 7 4 SDVDD 13 DVDD3 DGND2 + 0.1uF C33 24 T10 0r R38 AIN- RFIN- RFIN+ SW3 AOUT SWGND SW1 CPOUT+ AIN+ SW2 R3 3 5 6 R2 R5 R6 2 28 29 30 31 27 26 25 C20 CPOUT- VP2 32 VP3 20 VP1 SDGND 10 DVDD2 DGND1 9 DVDD1 AGND2 22 100pF C13 R1B3 VP C1A C1B 100pF L1 22mH R1A3 C12 0r 0r 0.1uF 6.3V 10uF + C7 C6 R11 51r C3 R1A1 C2A R1B1 R4 R1A2 R1B2 C4 DNI R20 DNI R19 0.1uF 6.3V 10uF + C22 C21 C2B VP3 AIN+ AIN- R42 80r R47 DNI 100r R41 0r R37 DNI R36 VTUNE 4 CTRL VCC 10 VIN RFOUT Y4 R43 80r VCO19V-XXXXT 2 VVCO 0r R40 1 VCC 8 RFOUT RFOUT-VCO Y3 10pF C10 C11 6.3V VCO-ALPS-15X10_DUAL CTRL 10uF VVCO + 15 21 Rev. 0 | Page 8 of 12 12 Figure 6. Evaluation Board Schematic (1 of 3) 14 14 6.3V 10uF C34 DNI R39 R45 293r R58 DNI 17r R44 RFIN 293r R46 1uF C46 C37 33pF DNI R27 4 CB 1 RFIN C48 C47 U3 ADL5541 68pF 1uF 2 GND 3 GND 6 7 GND GND 0.1uF VPOS 18r R9 RFOUT 5 8 C38 L2 43nH J2 33pF 1nF 68pF C51 1uF C50 C49 VAMP(+5V) 33pF C2 R10 18r R8 18r EV-ADF4193SD1Z/EV-ADF4193SD2Z/EV-ADF4196SD1Z Evaluation Board User Guide EVALUATION BOARD SCHEMATICS 11352-006 Figure 7. Evaluation Board Schematic (2 of 3) Rev. 0 | Page 9 of 12 BANANA J8 Black +9V 0V D2 SD103C 8.6V S1 +8.6V C28 1uF 16V C31 1uF 16V C27 1uF 16V C24 1uF 16V + + + + U4 ERR OUT NR ADP3300ART-3 GND SD IN 4 6 2 4 6 2 ERR OUT NR U9 ERR OUT NR ADP3330ART-5 GND SD IN ADP3330ART-5 GND SD IN U2 U8 ADP3331ART 3 ERR 1 2 OUT IN 5 FB SD GND 4 6 1 3 5 3 1 5 3 1 5 6 4 2 150pF 150pF R54 0r T12 T11 10nF 330K R34 C30 330K R1 C1 330K R33 330K R32 C25 301K 953K R26 R25 C26 4.7uF 10V C29 4.7uF 10V + + C18 + C32 4.7uF 10V C19 4.7uF 10V R55 D1 + +5V(VCO) D3 Red R7 4K7 +5V LK3 A B LK4 A B 9V +3V LK1 A B LK2 B A BANANA J6 Red VP3 VVCO VP VDD T16 T17 T14 T15 T13 VAMP(+5V) J5 J13 ** J14 ** J12 ** 11352-007 Evaluation Board User Guide EV-ADF4193SD1Z/EV-ADF4193SD2Z/EV-ADF4196SD1Z Figure 8. Evaluation Board Schematic (3 of 3) Rev. 0 | Page 10 of 12 R15 DNP RESET_IN BMODE1 UART_TX UART_RX GND GND SLEEP RESET_OUT SDP WAKE TWI_A0 STANDARD NC NC CONNECTOR NC NC NC NC GND GND NC NC CLK_OUT NC TMR_C * TMR_D TIMERS TMR_A TMR_B GPIO6 GPIO7 GND GND GENERAL GPIO4 GPIO5 INPUT/OUTPUT GPIO2 GPIO3 GPIO0 GPIO1 SCL_1 SCL_0 I2C SDA_1 SDA_0 GND GND SPI_SEL1/SPI_SS SPI_CLK SPI_SEL_C SPI_MISO SPI SPI_SEL_B SPI_MOSI SPI_SEL_A GND GND SPORT_INT SPORT_TSCLK SPI_D3 * SPI_D2 * SPORT_DT0 SPORT SPORT_DT1 SPORT_TFS SPORT_DR1 SPORT_RFS SPORT_TDV1 * SPORT_DR0 SPORT_TDV0 * SPORT_RSCLK GND GND PAR_FS1 PAR_CLK PAR_FS3 PAR_FS2 PAR_A1 PAR_A0 PAR_A3 PAR_A2 GND GND PAR_CS PAR_INT PAR_WR PAR_RD PAR_D0 PAR_D1 PARALLEL PAR_D3 PAR_D2 PORT PAR_D5 PAR_D4 GND GND PAR_D7 PAR_D6 PAR_D9 PAR_D8 PAR_D11 PAR_D10 PAR_D13 PAR_D12 PAR_D14 GND GND PAR_D15 * * PAR_D17 PAR_D16 * PAR_D18 PAR_D19 * * PAR_D20 PAR_D21 * * PAR_D22 PAR_D23 * GND GND USB_VBUS VIO(+3.3V) GND GND GND GND NC NC *NC on BLACKFIN SDP VIN NC 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 R23 R21 VIO MUXOUT MUXOUT U5 8 VCC 7 WP 6 SCL 5 SDA R16 24LC32A-I/MS 1 2 A0 3 A1 4 A2 VSS VIO: USE to set IO voltage max draw 20mA DNP R22 DNP DNP R56 100K R53 DNP 0r T19 LE DATA CLK Main I2C bus (Connected to blackfin TWI - Pull up resistors not required) Board ID EEPROM (24LC64) must be on I2C bus 0, address is at user discretion T18 VIO 11352-008 J10 VIN: Use this pin to power the SDP requires 4-7V 200mA SDP_VDD 5V_USB LE LE2 LE2 to synchronise two ADF4350 boards 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 R57 100K VIO EV-ADF4193SD1Z/EV-ADF4193SD2Z/EV-ADF4196SD1Z Evaluation Board User Guide Evaluation Board User Guide EV-ADF4193SD1Z/EV-ADF4193SD2Z/EV-ADF4196SD1Z NOTES Rev. 0 | Page 11 of 12 EV-ADF4193SD1Z/EV-ADF4193SD2Z/EV-ADF4196SD1Z Evaluation Board User Guide NOTES ESD Caution ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality. Legal Terms and Conditions By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices, Inc. (“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal, temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term “Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. 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Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby submits to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed. ©2013 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. UG11352-0-3/13(0) Rev. 0 | Page 12 of 12