RF performance of short channel graphene field-effect transistor Please share

advertisement
RF performance of short channel graphene field-effect
transistor
The MIT Faculty has made this article openly available. Please share
how this access benefits you. Your story matters.
Citation
Wu, Y.Q. et al. “RF Performance of Short Channel Graphene
Field-effect Transistor.” IEEE, 2010. 9.6.1–9.6.3. Web. 1 June
2012.
As Published
http://dx.doi.org/10.1109/IEDM.2010.5703331
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Version
Final published version
Accessed
Wed May 25 22:01:56 EDT 2016
Citable Link
http://hdl.handle.net/1721.1/71001
Terms of Use
Article is made available in accordance with the publisher's policy
and may be subject to US copyright law. Please refer to the
publisher's site for terms of use.
Detailed Terms
RF Performance of Short Channel Graphene Field-Effect Transistor
Y.Q. Wu1, Y.-M. Lin1, K.A. Jenkins1, J.A. Ott1, C. Dimitrakopoulos1, D.B. Farmer1, F. Xia1, A. Grill1, D.A. Antoniadis2
and Ph. Avouris1
1
IBM T. J. Watson Research Center, Yorktown Heights, NY 10598, U.S.A
2
Massachusetts Institute of Technology, Cambridge, MA 02139, U.S.A
Introduction: Graphene, a two dimensional single sheet of
carbon atoms with excellent electronic properties, has
attracted tremendous research efforts because of its high
carrier mobility and velocity [1-6]. While the lack of a
bandgap in graphene makes its use challenging for digital
applications, significant progress has been made on graphene
analog devices for radio-frequency (RF) applications, where a
high on/off ratio is not necessarily required. Recently,
graphene RF transistors [6-7] with a cut-off frequency as high
as 100 GHz have been demonstrated [3]. Future advances in
the RF performance would rely on the proper scaling of the
graphene channel. Despite extensive theoretical efforts, a
systematic experimental scaling study has been largely lacking.
In this paper, we present experimental studies on transport
characteristics of graphene FETs with channel lengths down to
70 nm. The factors limiting the performance of short channel
graphene devices are discussed. RF performance of a sub-100
nm graphene transistor fabricated on epitaxial graphene grown
on a SiC substrate is also presented. A cut-off frequency as
high as 170 GHz is achieved in a 90 nm graphene FET using a
scalable top-down fabrication processes. Our results indicate
that further improvement of RF performance of graphene
FETs can be enabled by channel length scaling with structure
optimization and contact resistance reduction.
Experiments: 20nm Pd/30nm Au by e-beam evaporation is
used as the contact metal. NFC/HfO2 is used as the top gate
dielectric for top-gated RF devices [3].
Results and discussion: The carrier density dependence of the
total resistance of a 1μm and a 70 nm device at Vds =10 mV at
room temperature is shown in Fig. 2 and Fig. 3. The mobility
can be extracted by model fitting [8]. The quantum
capacitance and the impact of gate field on contact resistance
are not considered here. Fig. 4 and Fig. 5 show the output
characteristics of the 1μm and 70 nm device at room
temperature and low temperature. Fig. 6 summarizes the
temperature-dependent transfer characteristics for the 70 nm
device. The transconductance is increased by almost 40%
when measured at low temperature as shown in Fig. 7. Fig. 8
summarizes the temperature dependence of carrier mobility.
The decrease of effective mobility as the channel gets shorter
is a strong signature of quasi-ballistic transport. [10-12]. Fig. 9
summarizes the temperature dependent contact resistance of
the three different devices. The reduction of contact resistance
would greatly benefit the DC and RF performance, especially
for short channel devices. In order to evaluate the performance
of short channel graphene devices for RF applications, a
“virtual source” model, which was originally developed for Si
MOSFET [9], is adopted here after incorporating the effect of
residual doping at the Dirac point, drain-induced doping effect
978-1-4244-7419-6/10/$26.00 ©2010 IEEE
at high drain bias, and the carrier density relation with gate
voltage for graphene FETs. The parameters such as contact
resistance, mobility and residual doping used in this model are
based on the values extracted from the low-field mobility
fitting as shown in Figs. 2 and 3. As shown in Fig. 10 and Fig.
11, excellent agreement is obtained between simulation and
experimental results for both the transfer and output
characteristics of the 70 nm device. The impact of the contact
resistance can be witnessed in Fig. 12, where a simulated
output characteristic for this device with zero series resistance
is shown, exhibiting greatly improved on-current as well as
the saturation behavior. As shown in Fig. 13, transconductance
can be improved by 4 times for the 70 nm device by reducing
the contact resistance, which is much more significant than the
long channel case. Fig. 14 shows the RF device fabricated on
epitaxial graphene grown on the Si-face of a SiC wafer. The
gate length is 90 nm, and the ungated channel length between
source and drain is roughly 80 nm. Fig. 16 shows the dc
transfer characteristic of the 90–nm-gate graphene FET. The
cut-off frequency of this device is as high as 170 GHz at a
drain voltage of 2.2V as shown in Fig. 17. It is noted that the
device performance here is limited by the series resistance,
including the contact resistance and the access resistance
associated with ungated region. It is expected that the cut-off
frequency can be enhanced to as high as 350 GHz for this 90nm gate length using a self-aligned gate structure.
Conclusion: We have experimentally demonstrated the high
performance short channel RF graphene device with cut-off
frequency of 170 GHz on epitaxial graphene on SiC. We have
also studied performance improvement by reducing contact
resistance at lower measurement temperature for short channel
device. The study shows continuous performance
improvement can be achieved by proper channel length
scaling and structure optimization such as self-aligned gate
and technological solutions for contact resistance reduction.
Acknowledgement: The authors thank C.Y. Sung for insightful
discussions and B. Ek and J. Bucchignano for technical assistance.
The work is supported by DARPA under contract FA8650-08-C7838 through the CERA program.
References:
[1] K.S. Novoselov, et al., Nature 438, 197 (2005).
[2] Y. Zhang, et al., Nature 438, 201 (2005)
[3] Y.-M. Lin, et al., Science 327, 662 (2010).
[4] I. Meric et al., Nature Nanotechnology 3, 654 (2008).
[5] C. Berger, Science 312, 1191 (2006).
[6] J. S. Moon et al., IEEE Electron Device Lett., 31, 260 (2009).
[7] I. Meric et al., IEDM Digest 4796738 (2008)
[8] S. Kim et al., Appl. Phys. Lett. 94, 062107 (2009)
[9] D.A. Antoniadis et al., IBM J. Res & Dev. 50 363 (2006)
[10] M. S. Shur, IEEE Electron Device Lett., 23, 511 (2002)
[11] A. Rahman et al., IEEE Trans. Electron. Devices, 50, 1853 (2003)
[12] Z. Chen et al., IEDM Tech. Dig., 4796737 (2008).
9.6.1
IEDM10-226
4
90 nm SiO2
6
p+ Si substrate
Graphene
(b)
S
(c)
1.0
2
3 ȝm
0.8
0.6
D
1
0.4
70 nm
-6
-3
0
3
12
-6
6
Fig. 1 (a) Schematic view of a back-gated
graphene FET, (b) SEM image of metal
contacts of a 70nm device and (c) optical
image of the fabricated devices.
gm (Ps/Pm)
0.4
20
Measured at RT
Measured at 7 K
1.2
Id (mA/Pm)
Id (mA/Pm)
Lch=70 nm
0.6
0.8
0.4
0.0
-0.2
0.0
0.2
0.4
-0.2
0.0
Vds = 0.5 V
0.4
Red : Lch=70 nm
Blue: Lch=1Pm
0.02
Lch=500 nm
2000
1000
50
100
150
200
250
300
Temperature (K)
Fig. 7 Peak transconductance gm vs. T
from devices with channel length of 1 ȝm
and 70 nm.
IEDM10-227
-10
0
10
20
300
250
Electron
200
3000
Lch=70 nm
0
-20
Fig.
6
Temperature
dependent
transconductance for a 70 nm device.
Lch=1Pm
2
0.03
0.01
T=300K
T=150K
T=50K
T=15K
T=7.5K
Vbg-VDirac (V)
Hollow - Electron
Solid - Hole
4000
Peff (cm /Vs)
Gm_peak (mS / Pm)
0.2
Fig. 5 Output characteristics for a 70 nm
device at room temperature and 7 K. Vbg
sweeps 25 V from Dirac point with a
step of 5 V for both nFET and pFET.
0.05
0.04
-20
Vd (V)
Vd (V)
Fig. 4 Output characteristics for a 1ȝm
device at room temperature and 7 K. Vbg
sweeps 30 V from Dirac point with a step of
5 V for both nFET and pFET.
-2
0
-60
-0.4
Rc (: Pm)
-0.4
6
12
Vds=0.5 V
Lch=70nm
-40
0.2
0.0
3
40
1.6
Lch=1 Pm
Measured at RT
Measured at 7 K
0
Fig. 3 Rtot vs ncarrier of a 70 nm device at
10 mV at room temperature and the
fitting based on Eq. (1) .
Fig. 2 Rtot vs ncarrier of a 1ȝm device at
10 mV at room temperature and the
fitting based on Eq. (1). The Cg used
here is calculated from the 90 nm SiO2.
1.0
-3
Carrier density ( 10 cm )
-2
Carrier density ( 10 cm )
0.8
Experimental
Fitting
3
Drain
Source
Lch/ W=70 nm/1 Pm
Vd = 10 mV at RT
Experimental
Fitting
Lch/W=1Pm/1Pm
Vd=10mV at RT
Rtot (k:)
1
2
3
1.2
Graphene
Source
Rtot (k:)
(a)
150
100
0
0
50
100
150
T (K)
200
250
300
Hole
L=1 Pm
L=500 nm
L=70 nm
50
0
50
100
150
200
250
300
T (K)
Fig. 8 Effective electron and hole mobility Fig. 9 Contact resistance RC vs. T from
ȝeff vs. T from devices with different channel devices with different channel length, from 1
length, from 1 ȝm down to 70 nm.
ȝm down to 70 nm.
9.6.2
x 10
1.8
-3
1
4
0.8
1.4
Model V =0.5V
d
Model V =0.01V
d
1.2
3
0.6
0.4
d
Lch = 70nm at RT
Experiment V =0.01V
d
15
20
25
30
35
0
0
40
0.1
0.2
Fig. 10 Comparison of experiment and
model of the transfer characteristics of a 70
nm device at room temperature.
Model with R =285 : Pm
0.16
s
Experiment
0.04
ch
15
0.1
30
35
0.4
0.5
Fig. 12 Modeled output characteristics
with Rs=0 for the 70nm device at RT.
Vbg sweeps 25V from Dirac point with a
step of 5 V.
Fig. 11 Experimental output characteristic
and model for a 70 nm device at RT. Vbg
sweeps 25V from Dirac point with a step
of 5 V.
(a)
(b)
Drain
Source
s
Drain
Source
Source
Experiment
Source
Gate
0.08
ds
25
0.3
Vd (V)
L
ch
= 70 nm at RT V
ds
= 0.5 V
Gate
(c) Graphene
= 1Pm at RT V =0.5V
20
0.2
s
0.04
L
0
0
0.5
Model with R =50: Pm
0.12
0.02
0
10
0.4
Model with R =0: Pm
Gm (mS/P m)
Gm (mS/P m)
Model with R =0 : Pm
0.06
0.3
Model with R =285: Pm
s
s
Model with R =50 : Pm
s
2
Vd (V)
Vg (V)
0.08
Lch = 70nm at RT
1
0.2
Experiment V =0.5V
1
s
Experiment
Id (mA/P m)
Id (mA/P m)
Gch (S/P m)
1.6
Model with R =0 : Pm
Model
Experiment
Lch = 70nm at RT
40
0
15
20
25
Vg (V)
30
35
Source
40
Vg (V)
Rs (Ÿ ȝm) 285
50
0
fT (GHz)
10.8 16.6 24.9
Lch=1 ȝm
fT (GHz)
118.4 485.5 728.3
Lch=70nm
Gate
5 ȝm
NFC+HfO2
Drain
Gate
Source
SI SiC substrate
Fig. 14 SEM image of a finished RF
device (a&b) Schematic view of a topgated RF graphene FET (c) .
Fig. 13 Modeling of Gm by varying
Rs for 70 nm and 1ȝm devices and
the improvement of projected fT.
1.8
Id (mA/Pm)
10
11 GHz
1.6
70
60
1.4
Lg = 1ȝm
1
0.1
1
Frequency [GHz]
Fig. 15 A RF graphene transistor
showing a cut-off frequency of 11
GHz. The gate length is 1 μm.
10
1.2
-3
-2
100
10
170 GHz
Lg=90 nm
50
Lg=90 nm
-1
0
1
2
3
Vg (V)
Fig. 16 Transfer characteristics of a
short channel RF graphene devices at
Vds=2.2 V.
9.6.3
Vd=2.2V, Vg=0V
Vd=2.2V, Vg=-2.5V
80
Current Gain |h21|
Vd=2.2V
Vd = 2.5V
gm (PS/Pm)
Current Gain |h21|
100
1
1
10
100
Frequency (GHz)
Fig. 17 A high performance graphene
transistor showing a cut-off frequency
of 170 GHz. The gate length is 90 nm.
IEDM10-228
Download