Tactical Grade,
Six Degrees of Freedom Inertial Sensor
ADIS16485
Data Sheet
FEATURES
GENERAL DESCRIPTION
Triaxial, digital gyroscope, ±450°/sec dynamic range
±0.05° orthogonal alignment error
6°/hr in-run bias stability
0.3°/√hr angular random walk
0.01% nonlinearity
Triaxial, digital accelerometer, ±5 g
Triaxial, delta angle, and delta velocity outputs
Fast start-up time, ~500 ms
Factory calibrated sensitivity, bias, and axial alignment
Calibration temperature range: −40°C to +85°C
SPI-compatible serial interface
Embedded temperature sensor
Programmable operation and control
Automatic and manual bias correction controls
4 FIR filter banks, 120 configurable taps
Digital I/O: data-ready alarm indicator, external clock
Alarms for condition monitoring
Power-down/sleep mode for power management
Optional external sample clock input: up to 2.4 kHz
Single command self test
Single-supply operation: 3.0 V to 3.6 V
2000 g shock survivability
Operating temperature range: −40°C to +105°C
The ADIS16485 iSensor® device is a complete inertial system that
includes a triaxial gyroscope and a triaxial accelerometer. Each
inertial sensor in the ADIS16485 combines industry-leading
iMEMS® technology with signal conditioning that optimizes
dynamic performance. The factory calibration characterizes
each sensor for sensitivity, bias, alignment, and linear acceleration
(gyroscope bias). As a result, each sensor has its own dynamic
compensation formulas that provide accurate sensor measurements.
The ADIS16485 provides a simple, cost-effective method for
integrating accurate, multiaxis inertial sensing into industrial
systems, especially when compared with the complexity and
investment associated with discrete designs. All necessary motion
testing and calibration are part of the production process at the
factory, greatly reducing system integration time. Tight orthogonal
alignment simplifies inertial frame alignment in navigation systems.
The SPI and register structure provide a simple interface for
data collection and configuration control.
The ADIS16485 uses the same footprint and connector system
as the ADIS16375, ADIS16488, and ADIS16488A, which greatly
simplifies the upgrade process. It comes in a module that is
approximately 47 mm × 44 mm × 14 mm and has a standard
connector interface.
APPLICATIONS
Platform stabilization and control
Navigation
Personnel tracking
Instruments
Robotics
FUNCTIONAL BLOCK DIAGRAM
VDD
DIO1 DIO2 DIO3 DIO4 RST
SELF TEST
I/O
ALARMS
TRIAXIAL
GYRO
POWER
MANAGEMENT
OUTPUT
DATA
REGISTERS
TRIAXIAL
ACCEL
CONTROLLER
TEMP
CALIBRATION
AND
FILTERS
VDD
GND
CS
SCLK
SPI
USER
CONTROL
REGISTERS
DIN
DOUT
ADIS16485
VDDRTC
10666-001
CLOCK
Figure 1.
Rev. E
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ADIS16485
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Product Identification................................................................ 19
Applications ....................................................................................... 1
Digital Signal Processing ............................................................... 20
General Description ......................................................................... 1
Gyroscopes/Accelerometers ..................................................... 20
Functional Block Diagram .............................................................. 1
Averaging/Decimation Filter .................................................... 20
Revision History ............................................................................... 3
FIR Filter Banks .......................................................................... 21
Specifications..................................................................................... 4
Calibration ....................................................................................... 23
Timing Specifications .................................................................. 6
Gyroscopes .................................................................................. 23
Absolute Maximum Ratings ............................................................ 8
Accelerometers ........................................................................... 24
ESD Caution .................................................................................. 8
Restoring Factory Calibration .................................................. 25
Pin Configuration and Function Descriptions ............................. 9
Point of Percussion Alignment ................................................. 25
Typical Performance Characteristics ........................................... 10
Alarms .............................................................................................. 26
Basic Operation............................................................................... 11
Static Alarm Use ......................................................................... 26
Register Structure ....................................................................... 11
Dynamic Alarm Use .................................................................. 26
SPI Communication ................................................................... 12
System Controls .............................................................................. 27
Device Configuration ................................................................ 12
Global Commands ..................................................................... 27
Reading Sensor Data .................................................................. 12
Memory Management ............................................................... 27
User Registers .................................................................................. 13
General-Purpose I/O ................................................................. 28
Output Data Registers .................................................................... 16
Power Management.................................................................... 28
Inertial Sensor Data Format...................................................... 16
Applications Information .............................................................. 30
Rotation Rate (Gyroscope) ........................................................ 16
Mounting Tips ............................................................................ 30
Acceleration................................................................................. 17
Evaluation Tools ......................................................................... 31
Delta Angles ................................................................................ 17
Power Supply Considerations ................................................... 31
Delta Velocity .............................................................................. 18
Outline Dimensions ....................................................................... 32
Internal Temperature ................................................................. 18
Ordering Guide .......................................................................... 32
Status/Alarm Indicators ............................................................. 19
Firmware Revision...................................................................... 19
Rev. E | Page 2 of 32
Data Sheet
ADIS16485
REVISION HISTORY
2/15—Rev. D to Rev. E
Changes to Features Section ............................................................ 1
Changes to Table 1 ............................................................................ 4
Changes to Table 2 and Figure 2 ..................................................... 6
Added Table 3; Renumbered Sequentially ..................................... 6
Change to Figure 4 ............................................................................ 7
Change to Operating Temperature Range, Table 4 ....................... 8
Change to Dual Memory Structure Section ................................12
Changes to Ordering Guide ...........................................................32
5/14—Rev. C to Rev. D
Changes to Table 73, Table 74, and Table 75 ...............................23
4/14—Rev. B to Rev. C
Change to Features Section .............................................................. 1
Moved Revision History ................................................................... 3
Added Endnote 7; Renumbered Sequentially, and Changes to
Endnote 9, Table 1 ............................................................................. 5
Changes to Table 9 ..........................................................................14
Changes to Delta Angles Section ..................................................16
Changes to Delta Velocity Section ................................................17
Change to Figure 20 Caption .........................................................19
Changes to Linear Acceleration on Effect on Gyroscope Bias
Section and Manual Bias Correction ............................................23
Changes to Status Alarm Use Section and Dynamic Alarm
Use Section .......................................................................................25
Change to Software Reset Section.................................................26
Changes to General-Purpose I/O Section....................................27
12/13—Rev. A to Rev. B
Change to t2 Parameter, Table 2 ....................................................... 5
Change to Figure 6 ............................................................................ 7
Changes to Delta Angles Section .................................................. 15
Changes to Delta Velocity Section ................................................ 16
Changes to Status/Alarm Indicators Section ............................... 17
Deleted Prototype Interface Board Section, PC Evaluation with
EVAL_ADIS Section, Mechanical Design Tips Section, Figure 26,
Figure 27, Figure 30, and Figure 31; Renumbered Sequentially .....27
Added Mounting Tips Section and Figure 26; Renumbered
Sequentially ...................................................................................... 27
Added Evaluation Tools Section, Power Supply Considerations
Section, Figure 29 and Figure 30; Renumbered Sequentially ... 28
Changes to Ordering Guide ........................................................... 29
12/12—Rev. 0 to Rev. A
Changes to Table 1 ............................................................................ 3
Added tSFS Parameter, Table 2 .......................................................... 5
Changes to t2 Parameter, Table 2 and Figure 2 .............................. 5
Changes to Figure 8 .......................................................................... 8
Changes to Linear Acceleration on Effect on Gyroscope Bias
Section .............................................................................................. 21
Changes to Prototype Interface Board Section ........................... 27
Deleted Installation Tips Section, and Figure 28; Renumbered
Sequentially ...................................................................................... 27
Added Mechanical Design Tips Section, Connector Down
Mounting Tips Section, and Figure 28; Renumbered
Sequentially ...................................................................................... 27
Added Connector Up Mounting Tips Section, Figure 30, and
Figure 31 ........................................................................................... 28
Updated Outline Dimensions........................................................ 29
5/12—Revision 0: Initial Version
Rev. E | Page 3 of 32
ADIS16485
Data Sheet
SPECIFICATIONS
TA = 25°C, VDD = 3.3 V, angular rate = 0°/sec, dynamic range = ±450°/sec ± 1 g, 300 mbar to 1100 mbar, unless otherwise noted.
Table 1.
Parameter
GYROSCOPES
Dynamic Range
Sensitivity
Repeatability1
Sensitivity Temperature Coefficient
Misalignment
Nonlinearity
Bias Repeatability1, 2
In-Run Bias Stability
Angular Random Walk
Bias Temperature Coefficient
Linear Acceleration Effect on Bias
Output Noise
Rate Noise Density
3 dB Bandwidth
Sensor Resonant Frequency
ACCELEROMETERS
Dynamic Range
Sensitivity
Repeatability1
Sensitivity Temperature Coefficient
Misalignment
Nonlinearity
Bias Repeatability1, 2
In-Run Bias Stability
Velocity Random Walk
Bias Temperature Coefficient
Output Noise
Noise Density
3 dB Bandwidth
Sensor Resonant Frequency
TEMPERATURE SENSOR
Scale Factor
LOGIC INPUTS3
Input High Voltage, VIH
Input Low Voltage, VIL
CS Wake-Up Pulse Width
Logic 1 Input Current, IIH
Logic 0 Input Current, IIL
All Pins Except RST
RST Pin
Input Capacitance, CIN
DIGITAL OUTPUTS
Output High Voltage, VOH
Output Low Voltage, VOL
Test Conditions/Comments
Min
Typ
±450
x_GYRO_OUT and x_GYRO_LOW (32-bit)
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +85°C, 1 σ
Axis-to-axis
Axis-to-frame (package)
Best fit straight line, FS = 450°/sec
−40°C ≤ TA ≤ +85°C, 1 σ
1σ
1σ
−40°C ≤ TA ≤ +85°C, 1 σ
Any axis, 1 σ (CONFIG[7] = 1)
No filtering
f = 25 Hz, no filtering
Max
Unit
±480
°/sec
°/sec/LSB
%
ppm/°C
Degrees
Degrees
% of FS
°/sec
°/hr
°/√hr
°/sec/°C
°/sec/g
°/sec rms
°/sec/√Hz rms
Hz
kHz
3.052 × 10−7
±1
±35
±0.05
±1.0
0.01
±0.2
6.25
0.3
±0.0025
0.009
0.16
0.0066
330
18
Each axis
±10
±0.035
±1.0
0.1
±3
32
0.023
±0.03
1.25
0.055
330
5.5
g
g/LSB
%
ppm/°C
Degrees
Degrees
% of FS
mg
µg
m/sec/√hr
mg/°C
mg rms
mg/√Hz rms
Hz
kHz
0.00565
°C/LSB
±5
x_ACCL_OUT and x_ACCL_LOW (32-bit)
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +85C, 1 σ
Axis-to-axis
Axis-to-frame (package)
Best-fit straight line, ±5 g
−40°C ≤ TA ≤ +85°C, 1 σ
1σ
1σ
−40°C ≤ TA ≤ +85°C
No filtering
f = 25 Hz, no filtering
3.815 × 10−9
±0.5
Output = 0x0000 at 25°C (±5°C)
2.0
0.8
20
VIH = 3.3 V
VIL = 0 V
10
10
0.33
10
ISOURCE = 0.5 mA
ISINK = 2.0 mA
2.4
0.4
Rev. E | Page 4 of 32
V
V
µs
µA
µA
mA
pF
V
V
Data Sheet
Parameter
FLASH MEMORY
Data Retention5
FUNCTIONAL TIMES6
Power-On, Start-Up Time
Reset Recovery Time7
Sleep Mode Recovery Time
Flash Memory Update Time
Flash Memory Test Time
Automatic Self Test Time
CONVERSION RATE
Initial Clock Accuracy
Temperature Coefficient
Sync Input Clock8
POWER SUPPLY, VDD
Power Supply Current9
POWER SUPPLY, VDDRTC
Real-Time Clock Supply Current
ADIS16485
Test Conditions/Comments
Endurance4
TJ = 85°C
Time until data is available
Min
100,000
20
Max
400 ± 160
400 ± 160
500
900
66
12
2.46
0.02
40
Using internal clock, 100 SPS
Operating voltage range
Normal mode, VDD = 3.3 V, µ ± σ
Sleep mode, VDD = 3.3 V
Power-down mode, VDD = 3.3 V
Operating voltage range
Normal mode, VDDRTC = 3.3 V
Typ
0.7
3.0
2.4
3.6
197
12.2
37
3.0
3.6
13
Unit
Cycles
Years
ms
ms
µs
ms
ms
ms
kSPS
%
ppm/°C
kHz
V
mA
mA
µA
V
µA
The repeatability specifications represent analytical projections that are based off of the following drift contributions and conditions: temperature hysteresis (−40°C to
+85°C), electronics drift (high temperature operating life test: +110°C, 500 hours), drift from temperature cycling (JESD22, Method A104-C, Method N, 500 cycles,
−40°C to +85°C), rate random walk (10 year projection), and broadband noise
2
Bias repeatability describes a long-term behavior over a variety of conditions. Short-term repeatability is related to the in-run bias stability and noise density
specifications.
3
The digital I/O signals use a 3.3 V system.
4
Endurance is qualified as per JEDEC Standard 22, Method A117, and measured at −40°C, +25°C, +85°C, and +125°C.
5
The data retention specification assumes a junction temperature (TJ) of 85°C as per JEDEC Standard 22, Method A117. Data retention lifetime decreases with TJ.
6
These times do not include thermal settling and internal filter response times, which may affect overall accuracy.
7
The RST line must be in a low state for at least 10 μs to assure a proper reset initiation and recovery.
8
The device functions at clock rates below 0.7 kHz but at reduced performance levels.
9
Supply current transients can reach 600 mA during start-up and reset recovery.
1
Rev. E | Page 5 of 32
ADIS16485
Data Sheet
TIMING SPECIFICATIONS
TA = 25°C, VDD = 3.3 V, unless otherwise noted.
Table 2.
Parameter
fSCLK
tSTALL2
tCLS
tCHS
tCS
Description
Serial clock
Stall period between data communication cycles
Serial clock low period
Serial clock high period
Chip select to clock edge
tDAV
tDSU
tDHD
tDR, tDF
tDSOE
tHD
tSFS
tDSHI
t1
t2
t3
DOUT valid after SCLK edge
DIN setup time before SCLK rising edge
DIN hold time after SCLK rising edge
DOUT rise/fall times, ≤100 pF loading
CS assertion to data out active
SCLK edge to data out invalid
Last SCLK edge to CS deassertion
CS deassertion to data out high impedance
Input sync pulse width
Input sync to data invalid
Input sync period
1
2
Normal Mode
Typ
Min1
0.01
2
31
31
32
Max1
15
Unit
MHz
µs
ns
ns
ns
10
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
µs
2
2
3
8
11
0
0
32
0
5
9
510
417
Guaranteed by design and characterization, but not tested in production.
See Table 3 for exceptions to the stall time rating.
Table 3. Register Specific Stall Times
Register
FNCTIO_CTRL
FLTR_BNK0
FLTR_BNK1
NULL_CFG
GLOB_CMD[1]
GLOB_CMD[2]
GLOB_CMD[3]
GLOB_CMD[6]
GLOB_CMD[7]
Function
Configure DIOx functions
Enable/select FIR filter banks
Enable/select FIR filter banks
Configure autonull bias function
Self test
Memory test
Flash memory update
Flash memory test
Software reset
Minimum Stall Time (μs)
60
320
320
10
12000
50000
375000
75000
12000
Timing Diagrams
CS
tCHS
tCS
1
2
3
tCLS
4
5
tSFS
6
15
16
SCLK
DOUT
MSB
tDAV
DB14
tHD
DB13
R/W
A6
DB11
DB10
DB2
tDHD
tDSU
DIN
DB12
tDR
A5
tDSHI
DB1
LSB
tDF
A4
A3
A2
Figure 2. SPI Timing and Sequence
Rev. E | Page 6 of 32
D2
D1
LSB
10666-002
tDSOE
Data Sheet
ADIS16485
tSTALL
10666-003
CS
SCLK
Figure 3. Stall Time and Data Rate
t2
t3
t1
SYNC
CLOCK (CLKIN)
OUTPUT
REGISTERS
DATA VALID
DATA VALID
Figure 4. Input Clock Timing Diagram
Rev. E | Page 7 of 32
10666-004
DATA
READY
ADIS16485
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter
Acceleration
Any Axis, Unpowered
Any Axis, Powered
VDD to GND
Digital Input Voltage to GND
Digital Output Voltage to GND
Operating Temperature Range
Storage Temperature Range
1
Rating
2000 g
2000 g
−0.3 V to +3.6 V
−0.3 V to VDD + 0.2 V
−0.3 V to VDD + 0.2 V
−40°C to +105°C
−65°C to +150°C1
Extended exposure to temperatures that are lower than −40°C or higher
than +105°C can adversely affect the accuracy of the factory calibration.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Table 5. Package Characteristics
Package Type
24-Lead Module (ML-24-6)
ESD CAUTION
Rev. E | Page 8 of 32
θJA
22.8°C/W
θJC
10.1°C/W
Device
Weight
48 g
Data Sheet
ADIS16485
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
ADIS16485
DNC
DNC
DNC
DNC
GND
VDD
VDD
RST
CS
DOUT
DIO4
22
20
18
16
14
12
10
8
6
4
2
23
21
19
17
15
13
11
9
7
5
3
1
DNC
DNC
DNC
GND
GND
VDD
DIO2
DIO1
DIN
SCLK
NOTES
1. THIS REPRESENTATION DISPLAYS THE TOP VIEW PINOUT
FOR THE MATING SOCKET CONNECTOR.
2. THE ACTUAL CONNECTOR PINS ARE NOT VISIBLE FROM
THE TOP VIEW.
3. MATING CONNECTOR: SAMTEC CLM-112-02 OR EQUIVALENT.
4. DNC = DO NOT CONNECT.
10666-005
DIO3
DNC
24
VDDRTC
TOP VIEW
(Not to Scale)
Figure 5. Mating Connector Pin Assignments
PIN 23
PIN 1 PIN 2
10666-106
PIN 1
Figure 6. Axial Orientation (Top Side Facing Up)
Table 6. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10, 11, 12
13, 14, 15
16 to 22, 24
23
Mnemonic
DIO3
DIO4
SCLK
DOUT
DIN
CS
DIO1
RST
DIO2
VDD
GND
DNC
VDDRTC
Type
Input/output
Input/output
Input
Output
Input
Input
Input/output
Input
Input/output
Supply
Supply
Not applicable
Supply
Description
Configurable Digital Input/Output.
Configurable Digital Input/Output.
SPI Serial Clock.
SPI Data Output. Clocks output on SCLK falling edge.
SPI Data Input. Clocks input on SCLK rising edge.
SPI Chip Select.
Configurable Digital Input/Output.
Reset.
Configurable Digital Input/Output.
Power Supply.
Power Ground.
Do Not Connect to These Pins.
Real-Time Clock Power Supply.
Rev. E | Page 9 of 32
ADIS16485
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
1000
0.8
AVERAGE
GYRO SCALE ERROR (% FS)
100
+1σ
10
1
10
100
1000
10000
0
–0.2
–0.4
INTEGRATION PERIOD (Seconds)
–0.8
–40 –30 –20 –10
10666-007
0.1
0.2
–0.6
–1σ
1
0.01
INITIAL ERROR = ±0.5%
0.4 TEMPCO = 35ppm/°C
Figure 7. Gyroscope Allan Variance, 25°C
0
10
20
30
40
50
60
70
10666-009
ROOT ALLAN VARIANCE (°/Hour)
0.6
80
TEMPERATURE (°C)
Figure 9. Gyroscope Scale (Sensitivity) Error and Hysteresis vs. Temperature
1
0.6
INITIAL ERROR = ±0.2°/sec
0.5 TEMPCO = 0.0025°/sec/°C
AVERAGE
0.1
GYRO BIAS ERROR (°/sec)
ROOT ALLAN VARIANCE (mg)
0.4
+δ
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–δ
1
10
100
1000
INTEGRATION PERIOD (Seconds)
10000
Figure 8. Accelerometer Allan Variance, 25°C
–0.6
–40 –30 –20 –10
0
10
20
30
40
50
60
70
80
TEMPERATURE (°C)
Figure 10. Gyroscope Bias Error and Hysteresis vs. Temperature
Rev. E | Page 10 of 32
10666-010
0.1
–0.5
10666-008
0.01
0.01
Data Sheet
ADIS16485
BASIC OPERATION
The register structure and SPI port provide a bridge between
the sensor processing system and an external, master processor.
It contains both output data and control registers. The output
data registers include the latest sensor data, a real-time clock, error
flags, alarm flags, and identification data. The control registers
include sample rate, filtering, input/output, alarms, calibration,
and diagnostic configuration options. All communication between
the ADIS16485 and an external processor involves either reading
or writing to one of the user registers.
TRIAXIS
GYRO
+3.3V
SYSTEM
PROCESSOR
SPI MASTER
11
12
TEMP
SENSOR
23
CONTROLLER
CONTROL
REGISTERS
ADIS16485
SS
6
CS
SCLK
3
SCLK
MOSI
5
DIN
MISO
4
DOUT
IRQ
9
DIO2
Figure 12. Basic Operation
14
15
10666-011
13
Figure 11. Electrical Connection Diagram
Table 7. Generic Master Processor Pin Names and Functions
Mnemonic
Function
SS
IRQ
MOSI
MISO
SCLK
Slave select
Interrupt request
Master output, slave input
Master input, slave output
Serial clock
The register structure uses a paged addressing scheme that is
composed of 13 pages, with each one containing 64 register
locations. Each register is 16 bits wide, with each byte having its
own unique address within the memory map of that page. The SPI
port has access to one page at a time, using the bit sequence in
Figure 17. Select the page to activate for SPI access by writing its
code to the PAGE_ID register. Read the PAGE_ID register to
determine which page is currently active. Table 9 displays the
PAGE_ID contents for each page, together with their basic functions.
The PAGE_ID register is located at Address 0x00 on every page.
Table 9. User Register Page Assignments
Embedded processors typically use control registers to configure
their serial ports for communicating with SPI slave devices such
as the ADIS16485. Table 8 provides a list of settings, which describe
the SPI protocol of the ADIS16485. The initialization routine of
the master processor typically establishes these settings using
firmware commands to write them into its serial control registers.
Table 8. Generic Master Processor SPI Settings
Processor Setting
Master
SCLK ≤ 15 MHz
SPI Mode 3
MSB-First Mode
16-Bit Mode
OUTPUT
REGISTERS
TRIAXIS
ACCEL
VDD
10
DSP
SPI
I/O LINES ARE COMPATIBLE WITH
3.3V LOGIC LEVELS
REGISTER STRUCTURE
10666-012
The ADIS16485 is an autonomous sensor system that starts up
on its own when it has a valid power supply. After running through
its initialization process, it begins sampling, processing, and
loading calibrated sensor data into the output registers, which
are accessible using the SPI port. The SPI port typically connects to
a compatible port on an embedded processor, using the connection
diagram in Figure 11. The four SPI signals facilitate synchronous,
serial data communication. Connect RST (Pin 8, see Table 6) to
VDD or leave RST open for normal operation. The factory default
configuration provides users with a data-ready signal on the DIO2
pin, which pulses high when new data is available in the output
data registers.
Description
ADIS16485 operates as slave
Maximum serial clock rate
CPOL = 1 (polarity), and CPHA = 1 (phase)
Bit sequence
Shift register/data length
Page
0
1
2
3
4
5
6
7
8
9
10
11
12
Rev. E | Page 11 of 32
PAGE_ID
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
0x0B
0x0C
Function
Output data, clock, identification
Reserved
Calibration
Control: sample rate, filtering, I/O, alarms
Serial number
FIR Filter Bank A Coefficient 0 to Coefficient 59
FIR Filter Bank A, Coefficient 60 to Coefficient 119
FIR Filter Bank B, Coefficient 0 to Coefficient 59
FIR Filter Bank B, Coefficient 60 to Coefficient 119
FIR Filter Bank C, Coefficient 0 to Coefficient 59
FIR Filter Bank C, Coefficient 60 to Coefficient 119
FIR Filter Bank D, Coefficient 0 to Coefficient 59
FIR Filter Bank D, Coefficient 60 to Coefficient 119
ADIS16485
Data Sheet
SPI COMMUNICATION
MANUAL
FLASH
BACKUP
The SPI port supports full duplex communication, as shown in
Figure 17, which enables external processors to write to DIN
while reading DOUT, when the previous command was a read
request. Figure 17 provides a guideline for the bit coding on
both DIN and DOUT.
VOLATILE
SRAM
NONVOLATILE
FLASH MEMORY
SPI ACCESS
(NO SPI ACCESS)
10666-014
START-UP
RESET
DEVICE CONFIGURATION
Figure 14. SRAM and Flash Memory Diagram
The SPI provides write access to the control registers, one byte
at a time, using the bit assignments shown in Figure 17. Each
register has 16 bits, where Bits[7:0] represent the lower address
(listed in Table 10) and Bits[15:8] represent the upper address.
Write to the lower byte of a register first, followed by a write to
its upper byte. The only register that changes with a single write to
its lower byte is the PAGE_ID register. For a write command,
the first bit in the DIN sequence is set to 1. Address Bits[A6:A0]
represent the target address, and Data Command Bits[DC7:DC0]
represent the data being written to the location. Figure 13 provides
an example of writing 0x03 to Address 0x00 (PAGE_ID [7:0]),
using DIN = 0x8003. This write command activates the control
page for SPI access.
READING SENSOR DATA
CS
SCLK
DIN
10666-013
DIN = 1000 0000 0000 0011 = 0x8003, WRITES 0x03 TO ADDRESS 0x00
0x1A00
DOUT
Figure 13. SPI Sequence for Activating the Control Page (DIN = 0x8003)
0x1800
NEXT
ADDRESS
Z_GYRO_OUT
Z_GYRO_LOW
Figure 15. SPI Read Example
Dual Memory Structure
Figure 16 provides an example of the four SPI signals when reading
PROD_ID in a repeating pattern. This is a good pattern to use
for troubleshooting the SPI interface setup and communications
because the contents of PROD_ID are predefined and stable.
Writing configuration data to a control register updates its SRAM
contents, which are volatile. After optimizing each relevant control
register setting in a system, use the manual flash update command,
which is located in GLOB_CMD[3] on Page 3 of the register map.
Activate the manual flash update command by turning to Page 3
(DIN = 0x8003) and setting GLOB_CMD[3] = 1 (DIN = 0x8208,
then DIN = 0x8300). Make sure that the power supply is within
specification for the entire 375 ms processing time for a flash
memory update. Table 10 provides a memory map for all of the
user registers, which includes a column of flash backup
information. A yes in this column indicates that a register has a
mirror location in flash and, when backed up properly,
automatically restores itself during startup or after a reset.
Figure 14 provides a diagram of the dual memory structure
used to manage operation and store critical user settings.
CS
SCLK
DIN
DIN = 0111 1110 0000 0000 = 0x7E00
10666-016
DIN
DOUT
DOUT = 0100 0000 0110 0101 = 0x4065 = 16,485 (PROD_ID)
Figure 16. SPI Read Example, Second 16-Bit Sequence
CS
DIN
R/W
D15
A6
A5
A4
A3
A2
A1
A0
DC7
DC6
DC5
DC4
DC3
DC2
DC1
DC0
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
R/W
D15
A6
A5
D14
D13
NOTES
1. DOUT BITS ARE PRODUCED ONLY WHEN THE PREVIOUS 16-BIT DIN SEQUENCE STARTS WITH R/W = 0.
2. WHEN CS IS HIGH, DOUT IS IN A THREE-STATE, HIGH IMPEDANCE MODE, WHICH ALLOWS MULTIFUNCTIONAL USE OF THE LINE
FOR OTHER DEVICES.
Figure 17. SPI Communication Bit Sequence
Rev. E | Page 12 of 32
10666-017
SCLK
DOUT
10666-015
The ADIS16485 automatically starts up and activates Page 0 for
data register access. Write 0x00 to the PAGE_ID register (DIN =
0x8000) to activate Page 0 for data access after accessing any other
page. A single register read requires two 16-bit SPI cycles. The
first cycle requests the contents of a register using the bit assignments
in Figure 17, and then the register contents follow DOUT during
the second sequence. The first bit in a DIN command is zero,
followed by either the upper or the lower address for the register.
The last eight bits are don’t care, but the SPI requires the full set
of 16 SCLKs to receive the request. Figure 15 includes two register
reads in succession, which starts with DIN = 0x1A00 to request
the contents of the Z_GYRO_OUT register and follows with
0x1800 to request the contents of the Z_GYRO_LOW register.
Data Sheet
ADIS16485
USER REGISTERS
Table 10. User Register Memory Map (N/A Means Not Applicable)
Name
PAGE_ID
Reserved
SYS_E_FLAG
DIAG_STS
ALM_STS
TEMP_OUT
X_GYRO_LOW
X_GYRO_OUT
Y_GYRO_LOW
Y_GYRO_OUT
Z_GYRO_LOW
Z_GYRO_OUT
X_ACCL_LOW
X_ACCL_OUT
Y_ACCL_LOW
Y_ACCL_OUT
Z_ACCL_LOW
Z_ACCL_OUT
Reserved
X_DELTANG_LOW
X_DELTANG_OUT
Y_DELTANG_LOW
Y_DELTANG_OUT
Z_DELTANG_LOW
Z_DELTANG_OUT
X_DELTVEL_LOW
X_DELTVEL_OUT
Y_DELTVEL_LOW
Y_DELTVEL_OUT
Z_DELTVEL_LOW
Z_DELTVEL_OUT
Reserved
TIME_MS_OUT
TIME_DH_OUT
TIME_YM_OUT
PROD_ID
Reserved
PAGE_ID
Reserved
X_GYRO_SCALE
Y_GYRO_SCALE
Z_GYRO_SCALE
X_ACCL_SCALE
Y_ACCL_SCALE
Z_ACCL_SCALE
R/W
R/W
N/A
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
N/A
R
R
R
R
R
R
R
R
R
R
R
R
N/A
R
R
R
R
N/A
R/W
N/A
R/W
R/W
R/W
R/W
R/W
R/W
Flash
No
N/A
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
N/A
No
No
No
No
No
No
No
No
No
No
No
No
N/A
Yes
Yes
Yes
Yes
N/A
No
N/A
Yes
Yes
Yes
Yes
Yes
Yes
PAGE_ID
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x01
0x02
0x02
0x02
0x02
0x02
0x02
0x02
0x02
Address
0x00
0x02 to 0x06
0x08
0x0A
0x0C
0x0E
0x10
0x12
0x14
0x16
0x18
0x1A
0x1C
0x1E
0x20
0x22
0x24
0x26
0x28 to 0x3E
0x40
0x42
0x44
0x46
0x48
0x4A
0x4C
0x4E
0x50
0x52
0x54
0x56
0x58 to 0x76
0x78
0x7A
0x7C
0x7E
0x00 to 0x7E
0x00
0x02
0x04
0x06
0x08
0x0A
0x0C
0x0E
Default
0x00
N/A
0x0000
0x0000
0x0000
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
0x4065
N/A
0x00
N/A
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
Register Description
Page identifier
Reserved
Output, system error flags
Output, self test error flags
Output, alarm error flags
Output, temperature
Output, x-axis gyroscope, low word
Output, x-axis gyroscope, high word
Output, y-axis gyroscope, low word
Output, y-axis gyroscope, high word
Output, z-axis gyroscope, low word
Output, z-axis gyroscope, high word
Output, x-axis accelerometer, low word
Output, x-axis accelerometer, high word
Output, y-axis accelerometer, low word
Output, y-axis accelerometer, high word
Output, z-axis accelerometer, low word
Output, z-axis accelerometer, high word
Reserved
Output, x-axis delta angle, low word
Output, x-axis delta angle, high word
Output, y-axis delta angle, low word
Output, y-axis delta angle, high word
Output, z-axis delta angle, low word
Output, z-axis delta angle, high word
Output, x-axis delta velocity, low word
Output, x-axis delta velocity, high word
Output, y-axis delta velocity, low word
Output, y-axis delta velocity, high word
Output, z-axis delta velocity, low word
Output, z-axis delta velocity, high word
Reserved
Factory configuration time: minutes/seconds
Factory configuration date/time: day/hour
Factory configuration date: year/month
Output, product identification (16,485)
Reserved
Page identifier
Reserved
Calibration, scale, x-axis gyroscope
Calibration, scale, y-axis gyroscope
Calibration, scale, z-axis gyroscope
Calibration, scale, x-axis accelerometer
Calibration, scale, y-axis accelerometer
Calibration, scale, z-axis accelerometer
Rev. E | Page 13 of 32
Format
N/A
N/A
Table 41
Table 42
Table 43
Table 39
Table 15
Table 11
Table 16
Table 12
Table 17
Table 13
Table 22
Table 18
Table 23
Table 19
Table 24
Table 20
N/A
Table 29
Table 25
Table 30
Table 26
Table 31
Table 27
Table 36
Table 32
Table 37
Table 33
Table 38
Table 34
N/A
Table 96
Table 97
Table 98
Table 47
N/A
N/A
N/A
Table 64
Table 65
Table 66
Table 74
Table 75
Table 76
ADIS16485
Name
XG_BIAS_LOW
XG_BIAS_HIGH
YG_BIAS_LOW
YG_BIAS_HIGH
ZG_BIAS_LOW
ZG_BIAS_HIGH
XA_BIAS_LOW
XA_BIAS_HIGH
YA_BIAS_LOW
YA_BIAS_HIGH
ZA_BIAS_LOW
ZA_BIAS_HIGH
Reserved
USER_SCR_1
USER_SCR_2
USER_SCR_3
USER_SCR_4
FLSHCNT_LOW
FLSHCNT_HIGH
PAGE_ID
GLOB_CMD
Reserved
FNCTIO_CTRL
GPIO_CTRL
CONFIG
DEC_RATE
NULL_CNFG
SLP_CNT
Reserved
FILTR_BNK_0
FILTR_BNK_1
Reserved
ALM_CNFG_0
ALM_CNFG_1
Reserved
XG_ALM_MAGN
YG_ALM_MAGN
ZG_ALM_MAGN
XA_ALM_MAGN
YA_ALM_MAGN
ZA_ALM_MAGN
Reserved
FIRM_REV
FIRM_DM
FIRM_Y
Reserved
Reserved
SERIAL_NUM
Reserved
Data Sheet
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
N/A
R/W
R/W
R/W
R/W
R
R
R/W
W
N/A
R/W
R/W
R/W
R/W
R/W
R/W
N/A
R/W
R/W
N/A
R/W
R/W
N/A
R/W
R/W
R/W
R/W
R/W
R/W
N/A
R
R
R
N/A
N/A
R
N/A
Flash
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
N/A
Yes
Yes
Yes
Yes
Yes
Yes
No
No
N/A
Yes
Yes
Yes
Yes
Yes
No
N/A
Yes
Yes
N/A
Yes
Yes
N/A
Yes
Yes
Yes
Yes
Yes
Yes
N/A
Yes
Yes
Yes
N/A
N/A
Yes
N/A
PAGE_ID
0x02
0x02
0x02
0x02
0x02
0x02
0x02
0x02
0x02
0x02
0x02
0x02
0x02
0x02
0x02
0x02
0x02
0x02
0x02
0x03
0x03
0x03
0x03
0x03
0x03
0x03
0x03
0x03
0x03
0x03
0x03
0x03
0x03
0x03
0x03
0x03
0x03
0x03
0x03
0x03
0x03
0x03
0x03
0x03
0x03
0x03
0x04
0x04
0x04
Address
0x10
0x12
0x14
0x16
0x18
0x1A
0x1C
0x1E
0x20
0x22
0x24
0x26
0x28 to 0x72
0x74
0x76
0x78
0x7A
0x7C
0x7E
0x00
0x02
0x04
0x06
0x08
0x0A
0x0C
0x0E
0x10
0x12 to 0x14
0x16
0x18
0x1A to 0x1E
0x20
0x22
0x24 to 0x26
0x28
0x2A
0x2C
0x2E
0x30
0x32
0x34 to 0x76
0x78
0x7A
0x7C
0x7E
0x00 to 0x18
0x20
0x22 to 0x7F
Default
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
N/A
0x0000
0x0000
0x0000
0x0000
N/A
N/A
0x0000
N/A
N/A
0x000D
0x00X01
0x00C0
0x0000
0x070A
N/A
N/A
0x0000
0x0000
N/A
0x0000
0x0000
N/A
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
Register Description
Calibration, offset, gyroscope, x-axis, low word
Calibration, offset, gyroscope, x-axis, high word
Calibration, offset, gyroscope, y-axis, low word
Calibration, offset, gyroscope, y-axis, high word
Calibration, offset, gyroscope, z-axis, low word
Calibration, offset, gyroscope, z-axis, high word
Calibration, offset, accelerometer, x-axis, low word
Calibration, offset, accelerometer, x-axis, high word
Calibration, offset, accelerometer, y-axis, low word
Calibration, offset, accelerometer, y-axis, high word
Calibration, offset, accelerometer, z-axis, low word
Calibration, offset, accelerometer, z-axis, high word
Reserved
User Scratch Register 1
User Scratch Register 2
User Scratch Register 3
User Scratch Register 4
Diagnostic, flash memory count, low word
Diagnostic, flash memory count, high word
Page identifier
Control, global commands
Reserved
Control, I/O pins, functional definitions
Control, I/O pins, general purpose
Control, clock, and miscellaneous correction
Control, output sample rate decimation
Control, automatic bias correction configuration
Control, power-down/sleep mode
Reserved
Filter selection
Filter selection
Reserved
Alarm configuration
Alarm configuration
Reserved
Alarm, x-axis gyroscope threshold setting
Alarm, y-axis gyroscope threshold setting
Alarm, z-axis gyroscope threshold setting
Alarm, x-axis accelerometer threshold
Alarm, y-axis accelerometer threshold
Alarm, z-axis accelerometer threshold
Reserved
Firmware revision
Firmware programming date: day/month
Firmware programming date: year
Reserved
Reserved
Serial number
Reserved
Rev. E | Page 14 of 32
Format
Table 60
Table 57
Table 61
Table 58
Table 62
Table 59
Table 71
Table 68
Table 72
Table 69
Table 73
Table 70
N/A
Table 92
Table 93
Table 94
Table 95
Table 87
Table 88
N/A
Table 86
N/A
Table 89
Table 90
Table 67
Table 49
Table 63
Table 91
N/A
Table 50
Table 51
N/A
Table 83
Table 84
N/A
Table 77
Table 78
Table 79
Table 80
Table 81
Table 82
N/A
Table 44
Table 45
Table 46
N/A
N/A
Table 48
N/A
Data Sheet
Name
PAGE_ID
FIR_COEF_Axxx
PAGE_ID
FIR_COEF_Axxx
PAGE_ID
FIR_COEF_Bxxx
PAGE_ID
FIR_COEF_Bxxx
PAGE_ID
FIR_COEF_Cxxx
PAGE_ID
FIR_COEF_Cxxx
PAGE_ID
FIR_COEF_Dxxx
PAGE_ID
FIR_COEF_Dxxx
1
ADIS16485
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Flash
No
Yes
No
Yes
No
Yes
No
Yes
No
Yes
No
Yes
No
Yes
No
Yes
PAGE_ID
0x05
0x05
0x06
0x06
0x07
0x07
0x08
0x08
0x09
0x09
0x0A
0x0A
0x0B
0x0B
0x0C
0x0C
Address
0x00
0x02 to 0x7E
0x00
0x02 to 0x7E
0x00
0x02 to 0x7E
0x00
0x02 to 0x7E
0x00
0x02 to 0x7E
0x00
0x02 to 0x7E
0x00
0x02 to 0x7E
0x00
0x02 to 0x7E
Default
0x0000
N/A
0x0000
N/A
0x0000
N/A
0x0000
N/A
0x0000
N/A
0x0000
N/A
0x0000
N/A
0x0000
N/A
Register Description
Page identifier
FIR Filter Bank A, Coefficients 0 through 59
Page identifier
FIR Filter Bank A, Coefficients 60 through 119
Page identifier
FIR Filter Bank B, Coefficients 0 through 59
Page identifier
FIR Filter Bank B, Coefficients 60 through 119
Page identifier
FIR Filter Bank C, Coefficients 0 through 59
Page identifier
FIR Filter Bank C, Coefficients 60 through 119
Page identifier
FIR Filter Bank D, Coefficients 0 through 59
Page identifier
FIR Filter Bank D, Coefficients 60 through 119
The GPIO_CTRL[7:4] bits reflect the logic levels on the DIOx lines and do not have a default setting.
Rev. E | Page 15 of 32
Format
N/A
Table 52
N/A
Table 52
N/A
Table 53
N/A
Table 53
N/A
Table 54
N/A
Table 54
N/A
Table 55
N/A
Table 55
ADIS16485
Data Sheet
OUTPUT DATA REGISTERS
After the ADIS16485 completes its start-up process, the PAGE_ID
register contains 0x0000, which sets Page 0 as the active page
for SPI access. Page 0 contains the output data, real-time clock,
status, and product identification registers.
Table 12. Y_GYRO_OUT (Page 0, Base Address = 0x16)
Bits
[15:0]
INERTIAL SENSOR DATA FORMAT
Table 13. Z_GYRO_OUT (Page 0, Base Address = 0x1A)
The gyroscope, accelerometer, delta angle, and delta velocity output
data registers use a 32-bit, twos complement format. Each output
uses two registers to support this resolution. Figure 18 provides
an example of how each register contributes to each inertial
measurement. In this case, X_GYRO_OUT is the most significant
word (upper 16 bits), and X_GYRO_LOW is the least significant
word (lower 16 bits). In many cases, using the most significant
word registers alone provide sufficient resolution for preserving
key performance metrics.
Bits
[15:0]
Rotation Rate
+450°/sec
+0.04/sec
+0.02°/sec
0°/sec
−0.02°/sec
−0.04°/sec
−450°/sec
X_GYRO_LOW
0 15
0
X-AXIS GYROSCOPE DATA
Figure 18. Gyroscope Output Format Example, DEC_RATE > 0
Decimal
+22,500
+2
+1
0
−1
−2
−22,500
Hex
0x57E4
0x0002
0x0001
0x0000
0xFFFF
0xFFFE
0xA81C
Table 15. X_GYRO_LOW (Page 0, Base Address = 0x10)
Bits
[15:0]
ROTATION RATE (GYROSCOPE)
The registers that use the x_GYRO_OUT format are the primary
registers for the gyroscope measurements (see Table 11, Table 12,
and Table 13). When processing data from these registers, use
a 16-bit, twos complement data format. Table 14 provides
x_GYRO_OUT digital coding examples.
Description
X-axis gyroscope data; additional resolution bits
Table 16. Y_GYRO_LOW (Page 0, Base Address = 0x14)
Bits
[15:0]
Description
Y-axis gyroscope data; additional resolution bits
Table 17. Z_GYRO_LOW (Page 0, Base Address = 0x18)
Table 11. X_GYRO_OUT (Page 0, Base Address = 0x12)
Bits
[15:0]
Description
X-axis gyroscope data; twos complement,
±450°/sec range, 0°/sec = 0x0000, 1 LSB = 0.02°/sec
Description
Z-axis gyroscope data; additional resolution bits
Z-AXIS
aZ
gZ
X-AXIS
Y-AXIS
aX
gX
10666-119
aY
gY
Binary
0101 0111 1110 0100
0000 0000 0000 0010
0000 0000 0000 0001
0000 0000 0000 0000
1111 1111 1111 1111
1111 1111 1111 1110
1010 1000 0001 1100
The registers that use the x_GYRO_LOW naming format provide
additional resolution for the gyroscope measurements (see
Table 15, Table 16, and Table 17). The MSB has a weight of
0.01°/sec, and each subsequent bit has ½ the weight of the
previous one.
The arrows in Figure 19 describe the direction of the motion,
which produces a positive output response in each sensor’s
output register. The accelerometers respond to both dynamic
and static forces associated with acceleration, including gravity.
When lying perfectly flat, as shown in Figure 19, the z-axis
accelerometer output is 1 g, and the x and y accelerometers are 0 g.
Bits
[15:0]
Description
Z-axis gyroscope data; twos complement,
±450°/sec range, 0°/sec = 0x0000, 1 LSB = 0.02°/sec
Table 14. x_GYRO_OUT Data Format Examples
10666-021
X_GYRO_OUT
15
Description
Y-axis gyroscope data; twos complement,
±450°/sec range, 0°/sec = 0x0000, 1 LSB = 0.02°/sec
PIN 23
PIN 1
Figure 19. Inertial Sensor Direction Reference Diagram
Rev. E | Page 16 of 32
Data Sheet
ADIS16485
ACCELERATION
DELTA ANGLES
The registers that use the x_ACCL_OUT format are the primary
registers for the accelerometer measurements (see Table 18,
Table 19, and Table 20). When processing data from these
registers, use a 16-bit, twos complement data format. Table 21
provides x_ACCL_OUT digital coding examples.
The x_DELTANG_OUT registers are the primary output
registers for the delta angle calculations. When processing data
from these registers, use a 16-bit, twos complement data format
(see Table 25, Table 26, and Table 27). Table 28 shows
x_DELTANG_OUT digital coding examples.
Table 18. X_ACCL_OUT (Page 0, Base Address = 0x1E)
The delta angle outputs represent an integration of the gyroscope measurements and use the following formula for all
three axes (x-axis displayed):
Bits
[15:0]
Description
X-axis accelerometer data; twos complement,
±5 g range, 0 g = 0x0000, 1 LSB = 0.25 mg
∆θ x ,n D =
Table 19. Y_ACCL_OUT (Page 0, Base Address = 0x22)
Bits
[15:0]
Description
Y-axis accelerometer data; twos complement,
±5 g range, 0 g = 0x0000, 1 LSB = 0.25 mg
Description
Z-axis accelerometer data; twos complement,
±5 g range, 0 g = 0x0000, 1 LSB = 0.25 mg
Table 21. x_ACCL_OUT Data Format Examples
Acceleration
+5 g
+0.5 mg
+0.25 mg
0 mg
−0.25 mg
−0.5 mg
−5 g
Decimal
+20,000
+2
+1
0
−1
−2
−20,000
Hex
0x4E20
0x0002
0x0001
0x0000
0xFFFF
0xFFFE
0xB1E0
Binary
0100 1110 0010 0000
0000 0000 0000 0010
0000 0000 0000 0001
0000 0000 0000 0000
1111 1111 1111 1111
1111 1111 1111 1110
1011 0001 1110 0000
The registers that use the x_ACCL_LOW naming format
provide additional resolution for the accelerometer
measurements (see Table 22, Table 23, and Table 24). The
MSB has a weight of 0.125 mg, and each subsequent bit has ½
the weight of the previous one.
When using the internal sample clock, fS is equal to 2460 SPS.
When using the external clock option, fS is equal to the frequency
of the external clock, which is limited to a minimum of 2 kHz,
to prevent overflow in the x_DELTANG_xxx registers at high
rotation rates. See Table 49 and Figure 20 for more information
on the DEC_RATE register (decimation filter).
The x_DELTANG_LOW registers (see Table 29, Table 30, and
Table 31) provide additional resolution bits for the delta angle and
combine with the x_DELTANG_OUT registers to provide a 32-bit,
twos complement number. The MSB in the x_DELTANG_LOW
registers have a weight of ~0.011° (720°/216), and each subsequent
bit carries a weight of ½ of the previous one.
Table 25. X_DELTANG_OUT (Page 0, Base Address = 0x42)
Bits
[15:0]
Table 22. X_ACCL_LOW (Page 0, Base Address = 0x1C)
Bits
[15:0]
Description
X-axis accelerometer data; additional resolution bits
Table 23. Y_ACCL_LOW (Page 0, Base Address = 0x20)
Bits
[15:0]
Description
Y-axis accelerometer data; additional resolution bits
Table 24. Z_ACCL_LOW (Page 0, Base Address = 0x24)
Bits
[15:0]
)
where:
D is the decimation rate = DEC_RATE + 1.
fS is the sample rate.
d is the incremental variable in the summation formula.
ωx is the x-axis rate of rotation (gyroscope).
n is the sample time, prior to the decimation filter.
Table 20. Z_ACCL_OUT (Page 0, Base Address = 0x26)
Bits
[15:0]
(
1 D −1
×∑ω
+ ω x ,n D + d −1
2 f S d = 0 x ,n D + d
Description
Z-axis accelerometer data; additional resolution bits
Description
X-axis delta angle data; twos complement,
±720° range, 0° = 0x0000, 1 LSB = 720°/215 = ~0.022°
Table 26. Y_DELTANG_OUT (Page 0, Base Address = 0x46)
Bits
[15:0]
Description
Y-axis delta angle data; twos complement,
±720° range, 0° = 0x0000, 1 LSB = 720°/215 = ~0.022°
Table 27. Z_DELTANG_OUT (Page 0, Base Address = 0x4A)
Bits
[15:0]
Description
Z-axis delta angle data; twos complement,
±720° range, 0° = 0x0000, 1 LSB = 720°/215 = ~0.022°
Table 28. x_DELTANG_OUT Data Format Examples
Angle (°)
+720 × (215 − 1)/215
+1440/215
+720/215
0
−720/215
−1440/215
−720
Rev. E | Page 17 of 32
Decimal
+32,767
+2
+1
0
−1
−2
−32,768
Hex
0x7FFF
0x0002
0x0001
0x0000
0xFFFF
0xFFFE
0x8000
Binary
0111 1111 1111 1111
0000 0000 0000 0010
0000 0000 0000 0001
0000 0000 0000 0000
1111 1111 1111 1111
1111 1111 1111 1110
1000 0000 0000 0000
ADIS16485
Data Sheet
The x_DELTANG_LOW registers (see Table 29, Table 30, and
Table 31) provide additional resolution for the angle measurement
and combine with the x_DELTANT_OUT registers to provide a
32-bit, twos complement number. The MSBs in the x_DELTANG_
LOW registers have a weight of ~0.011° (720°/216), and each
subsequent bit carries a weight of ½ of the previous one.
Table 34. Z_DELTVEL_OUT (Page 0, Base Address = 0x56)
Table 29. X_DELTANG_LOW (Page 0, Base Address = 0x40)
Velocity (m/sec)
+50 × (215 − 1)/215
+100/215
+50/215
0
−50/215
−100/215
−50
Bits
[15:0]
Description
X-axis delta angle data; additional resolution bits
Table 30. Y_DELTANG_LOW (Page 0, Base Address = 0x44)
Bits
[15:0]
Description
Y-axis delta angle data; additional resolution bits
Table 31. Z_DELTANG_LOW (Page 0, Base Address = 0x48)
Bits
[15:0]
Description
Z-axis delta angle data; additional resolution bits
DELTA VELOCITY
The registers that use the x_DELTVEL_OUT format are the
primary registers for the delta velocity calculations. When
processing data from these registers, use a 16-bit, twos complement
data format (see Table 32, Table 33, and Table 34). Table 35
provides x_DELTVEL_OUT digital coding examples.
Vx ,n D


Binary
0111 1111 1111 1111
0000 0000 0000 0010
0000 0000 0000 0001
0000 0000 0000 0000
1111 1111 1111 1111
1111 1111 1111 1110
1000 0000 0000 0000
Table 36. X_DELTVEL_LOW (Page 0, Base Address = 0x4C)
Description
X-axis delta velocity data; additional resolution bits
Description
Y-axis delta velocity data; additional resolution bits
Table 38. Z_DELTVEL_LOW (Page 0, Base Address = 0x54)
Bits
[15:0]
Description
Z-axis delta velocity data; additional resolution bits
INTERNAL TEMPERATURE
Table 32. X_DELTVEL_OUT (Page 0, Base Address = 0x4E)
Description
X-axis delta velocity data; twos complement,
±50 m/sec range, 0 m/sec = 0x0000,
1 LSB = 50 m/sec ÷ (215 – 1) = ~1.526 mm/sec
The TEMP_OUT register provides an internal temperature
measurement that can be useful for observing relative temperature
changes inside of the ADIS16485 (see Table 39). Table 40 provides
TEMP_OUT digital coding examples. Note that this temperature
reflects a higher temperature than ambient, due to self heating.
Table 39. TEMP_OUT (Page 0, Base Address = 0x0E)
Bits
[15:0]
Description
Temperature data; twos complement,
0.00565°C per LSB, 25°C = 0x0000
Table 40. TEMP_OUT Data Format Examples
Table 33. Y_DELTVEL_OUT (Page 0, Base Address = 0x52)
Description
Y-axis delta velocity data; twos complement,
±50 m/sec range, 0 m/sec = 0x0000,
1 LSB = 50 m/sec ÷ (215 – 1) = ~1.526 mm/sec
Hex
0x7FFF
0x0002
0x0001
0x0000
0xFFFF
0xFFFE
0x8000
The x_DELTVEL_LOW registers (see Table 36, Table 37, and
Table 38) provide additional resolution bits for the delta-velocity
measurement and combine with the x_DELTVEL_OUT
registers to provide a 32-bit, twos complement number. The
MSBs in the x_DELTVEL_LOW registers have a weight of
~0.7629 mm/sec (50 m/sec ÷ 216), and each subsequent bit
carries a weight of ½ of the previous one.
Bits
[15:0]
When using the internal sample clock, fS is equal to 2460 SPS.
When using the external clock option, fS is equal to the frequency
of the external clock, which is limited to a minimum of 2 kHz,
to prevent overflow in the x_DELTVEL_xxx registers at high
rotation rates. See Table 49 and Figure 20 for more information
on the DEC_RATE register (decimation filter).
Bits
[15:0]
Decimal
+32,767
+2
+1
0
−1
−2
−32,768
Table 37. Y_DELTVEL_LOW (Page 0, Base Address = 0x50)
where:
ax is the x-axis linear acceleration.
fS is the sample rate.
n is the sample time, prior to the decimation filter.
D is the decimation rate = DEC_RATE + 1.
d is the incremental variable in the summation formula.
Bits
[15:0]
Description
Z-axis delta velocity data; twos complement,
±50 m/sec range, 0 m/sec = 0x0000,
1 LSB = 50 m/sec ÷ (215 – 1) = ~1.526 mm/sec
Table 35. x_DELTVEL_OUT, Data Format Examples
Bits
[15:0]
The delta velocity outputs represent an integration of the
accelerometer measurements and use the following formula
for all three axes (x-axis displayed):
1 D 1

 a
 a x ,n D  d 1
2 f S d  0 x ,n D  d
Bits
[15:0]
Temperature (°C)
+85
+25 + 0.0113
+25 + 0.00565
+25
+25 − 0.00565
+25 − 0.0113
−40
Rev. E | Page 18 of 32
Decimal
+10,619
+2
+1
0
−1
−2
−11,504
Hex
0x297B
0x0002
0x0001
0x0000
0xFFFF
0xFFFE
0xD310
Binary
0010 1001 0111 1011
0000 0000 0000 0010
0000 0000 0000 0001
0000 0000 0000 0000
1111 1111 1111 1111
1111 1111 1111 1110
1101 0011 0001 0000
Data Sheet
ADIS16485
STATUS/ALARM INDICATORS
FIRMWARE REVISION
The SYS_E_FLAG register in Table 41 provides the system error
flags for a variety of conditions (see Table 41). Reading the
SYS_E_FLAG register clears all of its error flags and returns each
bit to a zero value, with the exception of Bit[7]. If SYS_E_FLAG[7]
is high, use the software reset (GLOB_CMD[7], see Table 86) to
clear this condition and restore normal operation. If any bit in
the SYS_E_FLAG register is associated with an error condition
that remains after reading this register, this bit automatically
returns to an alarm value as 1.
The FIRM_REV register (see Table 44) provides the firmware
revision for the internal processor. Each nibble represents a digit
in this revision code. For example, if FIRM_REV = 0x0102, the
firmware revision is 1.02.
Table 41. SYS_E_FLAG (Page 0, Base Address = 0x08)
Bits
15
[14:8]
7
6
5
4
3
[2:1]
0
Description (Default = 0x0000)
Watch dog timer flag (1 = timed out)
Not used
Processing overrun (1 = error)
Flash memory update, result of GLOB_CMD[3] = 1
(1 = failed update, 0 = update successful)
Inertial self test failure (1 = DIAG_STS ≠ 0x0000)
Sensor overrange (1 = at least one sensor overranged)
SPI communication error (1 = error condition, when the
number of SCLK pulses is not equal to a multiple of 16)
Not used
Alarm status flag (1 = ALM_STS ≠ 0x0000)
The DIAG_STS register in Table 42 provides the flags for the
internal self test function, which is from GLOB_CMD[1] (see
Table 86). Note that reading DIAG_STS also resets it to 0x0000.
Description (Default = 0x0000)
Not used
Self test failure, z-axis accelerometer (1 = failure)
Self test failure, y-axis accelerometer (1 = failure)
Self test failure, x-axis accelerometer (1 = failure)
Self test failure, z-axis gyroscope (1 = failure)
Self test failure, y-axis gyroscope (1 = failure)
Self test failure, x-axis gyroscope (1 = failure)
Table 43. ALM_STS (Page 0, Base Address = 0x0C)
Description (Default = 0x0000)
Not used
Z-axis accelerometer alarm flag (1 = alarm is active)
Y-axis accelerometer alarm flag (1 = alarm is active)
X-axis accelerometer alarm flag (1 = alarm is active)
Z-axis gyroscope alarm flag (1 = alarm is active)
Y-axis gyroscope alarm flag (1 = alarm is active)
X-axis gyroscope alarm flag (1 = alarm is active)
The FIRM_DM register (see Table 45) contains the month and
day of the factory configuration date. FIRM_DM[15:12] and
FIRM_DM[11:8] contain digits that represent the month
of factory configuration. For example, November is the 11th
month in a year and represented by FIRM_DM[15:8] = 0x11.
FIRM_DM[7:4] and FIRM_DM[3:0] contain digits that represent
the day of factory configuration. For example, the 27th day of
the month is represented by FIRM_DM[7:0] = 0x27.
Table 45. FIRM_DM (Page 3, Base Address = 0x7A)
Bits
[15:12]
[11:8]
[7:4]
[3:0]
Description
Binary, month 10s digit, range: 0 to 1
Binary, month 1s digit, range: 0 to 9
Binary, day 10s digit, range: 0 to 3
Binary, day 1s digit, range: 0 to 9
Table 46. FIRM_Y (Page 3, Base Address = 0x7C)
Bits
[15:12]
[11:8]
[7:4]
[3:0]
The ALM_STS register in Table 43 provides the alarm bits for
the programmable alarm levels of each sensor. Note that
reading ALM_STS also resets its value to 0x0000.
Bits
[15:6]
5
4
3
2
1
0
Description
Binary, revision, 10s digit
Binary, revision, 1s digit
Binary, revision, tenths digit
Binary, revision, hundredths digit
The FIRM_Y register (see Table 46) contains the year of the
factory configuration date. For example, the year of 2013 is
represented by FIRM_Y = 0x2013.
Table 42. DIAG_STS (Page 0, Base Address = 0x0A)
Bits
[15:6]
5
4
3
2
1
0
Table 44. FIRM_REV (Page 3, Base Address = 0x78)
Bits
[15:12]
[11:8]
[7:4]
[3:0]
Description
Binary, year 1000s digit, range: 0 to 9
Binary, year 100s digit, range: 0 to 9
Binary, year 10s digit, range: 0 to 9
Binary, year 1s digit, range: 0 to 9
PRODUCT IDENTIFICATION
The PROD_ID register (see Table 47) contains the binary
equivalent of the part number (16,485 = 0x4065), and the
SERIAL_NUM register (see Table 48) contains a lot-specific
serial number.
Table 47. PROD_ID (Page 0, Base Address = 0x7E)
Bits
[15:0]
Description (Default = 0x4065)
Product identification = 0x4065 (16,485)
Table 48. SERIAL_NUM (Page 4, Base Address = 0x20)
Bits
[15:0]
Rev. E | Page 19 of 32
Description
Lot specific serial number
ADIS16485
Data Sheet
DIGITAL SIGNAL PROCESSING
GYROSCOPES/ACCELEROMETERS
AVERAGING/DECIMATION FILTER
Figure 20 provides a signal flow diagram for all the components
and settings that influence the frequency response for the
accelerometers and gyroscopes. The sample rate for each
accelerometer and gyroscope is 9.84 kHz. Each sensor has its
own averaging/decimation filter stage that reduces the update
rate to 2.46 kSPS. When using the external sync clock option
(FNCTIO_CTRL[7:4], see Table 89), the input clock drives a
4-sample burst at a sample rate of 9.84 kSPS, which feeds into
the 4× averaging/decimation filter. This results in a data rate
that is equal to the input clock frequency.
The DEC_RATE register (see Table 49) provides user control for
the final filter stage (see Figure 20), which averages and decimates
the accelerometers, gyroscopes, delta angle, and delta velocity data.
The output sample rate is equal to 2460/(DEC_RATE + 1). When
using the external sync clock option (FNCTIO_CTRL[7:4], see
Table 89), replace the 2460 number in this relationship with the
input clock frequency. For example, turn to Page 3 (DIN = 0x8003),
and set DEC_RATE = 0x18 (DIN = 0x8C18, then DIN = 0x8D00)
to reduce the output sample rate to 98.4 SPS (2460 ÷ 25).
Table 49. DEC_RATE (Page 3, Base Address = 0x0C)
Bits
[15:11]
[10:0]
Description (Default = 0x0000)
Don’t care
Decimation rate, binary format, maximum = 2047,
see Figure 20 for impact on sample rate
2.46kHz, fs
MEMS
SENSOR
1
4
330Hz
GYROSCOPE
2-POLE: 404Hz, 757Hz
ACCELEROMETER
1-POLE: 330Hz
INTERNAL
CLOCK
9.84kHz
fs
4
FIR
FILTER
BANK
÷4
4×
AVERAGE
DECIMATION
FILTER
1
D
D
÷D
SELECTABLE
AVERAGE/DECIMATION FILTER
FIR FILTER BANK
D = DEC_RATE[10:0] + 1
FILTR_BNK_0
FILTR_BNK_1
NOTES
1. WHEN FNCTIO_CTRL[7] = 1, EACH CLOCK PULSE ON THE DESIGNATED DIOx LINE (FNCTIO_CTRL[5:4]) STARTS A 4-SAMPLE BURST,
AT A SAMPLE RATE OF 9.84kHz. THESE FOUR SAMPLES FEED INTO THE 4x AVERAGE/DECIMATION FILTER, WHICH PRODUCES A
DATA RATE THAT IS EQUAL TO THE INPUT CLOCK FREQUENCY.
Figure 20. Sampling and Frequency Response Signal Flow
Rev. E | Page 20 of 32
10666-019
DIOx
OPTIONAL INPUT CLOCK
FNCTIO_CTRL[7] = 1
fs < 2400Hz
Data Sheet
ADIS16485
FIR FILTER BANKS
Table 52. Filter Bank A Memory Map, FIR_COEF_Axxx
The ADIS16485 provides four configurable, 120-tap FIR filter
banks. Each coefficient is 16 bits wide and occupies its own
register location with each page. When designing a FIR filter for
these banks, use a sample rate of 2.46 kHz and scale the coefficients
so that their sum equals 32,768. For filter designs that have less
than 120 taps, load the coefficients into the lower portion of the
filter and start with Coefficient 1. Make sure that all unused taps
are equal to zero, so that they do not add phase delay to the
response. The FILTR_BNK_x registers provide three bits per
sensor, which configure the filter bank (A, B, C, D) and turn
filtering on and off. For example, turn to Page 3 (DIN = 0x8003),
then write 0x002F to FILTR_BNK_0 (DIN = 0x962F, DIN =
0x9700) to set the x-axis gyroscope to use the FIR filter in Bank D,
to set the y-axis gyroscope to use the FIR filter in Bank B, and
to enable these FIR filters in both x- and y-axis gyroscopes.
Note that the filter settings update after writing to the upper
byte; therefore, always configure the lower byte first. In cases
that require configuration to only the lower byte of either
FILTR_BNK_0 or FILTR_BNK_1, complete the process by
writing 0x00 to the upper byte.
Page
5
5
5
5
5
PAGE_ID
0x05
0x05
0x05
0x05
0x05
Address
0x00
0x02 to 0x07
0x08
0x0A
0x0C to 0x7C
5
6
6
6
6
6
0x05
0x06
0x06
0x06
0x06
0x06
0x7E
0x00
0x02 to 0x07
0x08
0x0A
0x0C to 0x7C
6
0x06
0x7E
Table 50. FILTR_BNK_0 (Page 3, Base Address = 0x16)
Bits
15
14
[13:12]
11
[10:9]
8
[7:6]
5
[4:3]
2
[1:0]
Description (Default = 0x0000)
Don’t care
Y-axis accelerometer filter enable (1 = enabled)
Y-axis accelerometer filter bank selection:
00 = Bank A, 01 = Bank B, 10 = Bank C, 11 = Bank D
X-axis accelerometer filter enable (1 = enabled)
X-axis accelerometer filter bank selection:
00 = Bank A, 01 = Bank B, 10 = Bank C, 11 = Bank D
Z-axis gyroscope filter enable (1 = enabled)
Z-axis gyroscope filter bank selection:
00 = Bank A, 01 = Bank B, 10 = Bank C, 11 = Bank D
Y-axis gyroscope filter enable (1 = enabled)
Y-axis gyroscope filter bank selection:
00 = Bank A, 01 = Bank B, 10 = Bank C, 11 = Bank D
X-axis gyroscope filter enable (1 = enabled)
X-axis gyroscope filter bank selection:
00 = Bank A, 01 = Bank B, 10 = Bank C, 11 = Bank D
Table 51. FILTR_BNK_1 (Page 3, Base Address = 0x18)
Bits
[15:3]
2
[1:0]
Description (Default = 0x0000)
Don’t care
Z-axis accelerometer filter enable (1 = enabled)
Z-axis accelerometer filter bank selection:
00 = Bank A, 01 = Bank B, 10 = Bank C, 11 = Bank D
Filter Memory Organization
Each filter bank uses two pages of the user register structure.
See Table 52, Table 53, Table 54, and Table 55 for the register
addresses in each filter bank.
Register
PAGE_ID
Not used
FIR_COEF_A000
FIR_COEF_A001
FIR_COEF_A002 to
FIR_COEF_A058
FIR_COEF_A059
PAGE_ID
Not used
FIR_COEF_A060
FIR_COEF_A061
FIR_COEF_A062 to
FIR_COEF_A118
FIR_COEF_A119
Table 53. Filter Bank B Memory Map, FIR_COEF_Bxxx
Page
7
7
7
7
7
PAGE_ID
0x07
0x07
0x07
0x07
0x07
Address
0x00
0x02 to 0x07
0x08
0x0A
0x0C to 0x7C
7
8
8
8
8
8
0x07
0x08
0x08
0x08
0x08
0x08
0x7E
0x00
0x02 to 0x07
0x08
0x0A
0x0C to 0x7C
8
0x08
0x7E
Register
PAGE_ID
Not used
FIR_COEF_B000
FIR_COEF_B001
FIR_COEF_B002 to
FIR_COEF_B058
FIR_COEF_B059
PAGE_ID
Not used
FIR_COEF_B060
FIR_COEF_B061
FIR_COEF_B062 to
FIR_COEF_B118
FIR_COEF_B119
Table 54. Filter Bank C Memory Map, FIR_COEF_Cxxx
Page
9
9
9
9
9
PAGE_ID
0x09
0x09
0x09
0x09
0x09
Address
0x00
0x02 to 0x07
0x08
0x0A
0x0C to 0x7C
9
10
10
10
10
10
0x09
0x0A
0x0A
0x0A
0x0A
0x0A
0x7E
0x00
0x02 to 0x07
0x08
0x0A
0x0C to 0x7C
10
0x0A
0x7E
Rev. E | Page 21 of 32
Register
PAGE_ID
Not used
FIR_COEF_C000
FIR_COEF_C001
FIR_COEF_C002 to
FIR_COEF_C058
FIR_COEF_C059
PAGE_ID
Not used
FIR_COEF_C060
FIR_COEF_C061
FIR_COEF_C062 to
FIR_COEF_C118
FIR_COEF_C119
ADIS16485
Data Sheet
Table 55. Filter Bank D Memory Map, FIR_COEF_Dxxx
Table 56. FIR Filter Descriptions, Default Configuration
Page
11
11
11
11
11
PAGE_ID
0x0B
0x0B
0x0B
0x0B
0x0B
Address
0x00
0x02 to 0x07
0x08
0x0A
0x0C to 0x7C
FIR Filter Bank
A
B
C
D
11
12
12
12
12
12
0x0B
0x0C
0x0C
0x0C
0x0C
0x0C
0x7E
0x00
0x02 to 0x07
0x08
0x0A
0x0C to 0x7C
12
0x0C
0x7E
Register
PAGE_ID
Not used
FIR_COEF_D000
FIR_COEF_D001
FIR_COEF_D002 to
FIR_COEF_D058
FIR_COEF_D059
PAGE_ID
Not used
FIR_COEF_D060
FIR_COEF_D061
FIR_COEF_D062 to
FIR_COEF_D118
FIR_COEF_D119
Taps
120
120
32
32
−3 dB Frequency (Hz)
310
55
275
63
0
–10
MAGNITUDE (dB)
–20
B
D
A
NO FIR
FILTERING
C
–30
–40
–50
–60
–70
–80
Default Filter Performance
The FIR filter banks have factory programmed filter designs. They
are all low-pass filters that have unity dc gain. Table 56 provides
a summary of each filter design, and Figure 21 shows the frequency
response characteristics. The phase delay is equal to ½ of the total
number of taps.
Rev. E | Page 22 of 32
0
200
400
600
800
1000
FREQUENCY (Hz)
Figure 21. FIR Filter Frequency Response Curves
1200
10666-020
–90
–100
Data Sheet
ADIS16485
CALIBRATION
Bias Null Command
The ADIS16485 factory calibration produces correction formulas
for the gyroscopes and the accelerometers and then programs
them into the flash memory. In addition, there are a series of
user-configurable calibration registers for in-system tuning.
GYROSCOPES
The user calibration for the gyroscopes includes registers for
adjusting bias and sensitivity, as shown in Figure 22.
1 + X_GYRO_SCALE
FACTORY
CALIBRATION
AND
FILTERING
XG_BIAS_HIGH
X_GYRO_OUT
X_GYRO_LOW
10666-021
X-AXIS
GYRO
XG_BIAS_LOW
Figure 22. User Calibration Signal Path, Gyroscopes
Manual Bias Correction
The xG_BIAS_HIGH registers (see Table 57, Table 58, and
Table 59) and xG_BIAS_LOW registers (see Table 60, Table 61,
and Table 62) provide a bias adjustment function for the output
of each gyroscope sensor.
Table 57. XG_BIAS_HIGH (Page 2, Base Address = 0x12)
Bits
[15:0]
Description (Default = 0x0000)
X-axis gyroscope offset correction, upper word;
twos complement, 0°/sec = 0x0000, 1 LSB = 0.02°/sec
Table 58. YG_BIAS_HIGH (Page 2, Base Address = 0x16)
Bits
[15:0]
Description (Default = 0x0000)
Y-axis gyroscope offset correction, upper word;
twos complement, 0°/sec = 0x0000, 1 LSB = 0.02°/sec
Table 59. ZG_BIAS_HIGH (Page 2, Base Address = 0x1A)
Bits
[15:0]
Description (Default = 0x0000)
Z-axis gyroscope offset correction, upper word;
twos complement, 0°/sec = 0x0000, 1 LSB = 0.02°/sec
Table 60. XG_BIAS_LOW (Page 2, Base Address = 0x10)
Bits
[15:0]
Description (Default = 0x0000)
X-axis gyroscope offset correction, lower word;
twos complement, 0°/sec = 0x0000,
1 LSB = 0.02°/sec ÷ 216 = ~0.000000305°/sec
Table 61. YG_BIAS_LOW (Page 2, Base Address = 0x14)
Bits
[15:0]
Description (Default = 0x0000)
Y-axis gyroscope offset correction, lower word;
twos complement, 0°/sec = 0x0000,
1 LSB = 0.02°/sec ÷ 216 = ~0.000000305°/sec
Table 62. ZG_BIAS_LOW (Page 2, Base Address = 0x18)
Bits
[15:0]
Description (Default = 0x0000)
Z-axis gyroscope offset correction, lower word;
twos complement, 0°/sec = 0x0000,
1 LSB = 0.02°/sec ÷ 216 = ~0.000000305°/sec
The continuous bias estimator (CBE) accumulates and
averages data in a 64-sample FIFO. The average time (tA)
for the bias estimates relies on the sample time base setting in
NULL_CNFG[3:0] (see Table 63). Users can load the correction
factors of the CBE into the gyroscope offset correction registers
(see Table 57, Table 58, Table 59, Table 60, Table 61, and Table 62)
using the bias null command in GLOB_CMD[0] (see Table 86).
NULL_CNFG[13:8] provide on/off controls for the sensors that
update when issuing a bias null command. The factory default
configuration for NULL_CNFG enables the bias null command
for the gyroscopes, disables the bias null command for the accelerometers, and establishes the average time to ~26.64 seconds.
For best results, make sure the ADIS16485 is stationary for this
entire time.
Table 63. NULL_CNFG (Page 3, Base Address = 0x0E)
Bits
[15:14]
13
12
11
10
9
8
[7:4]
[3:0]
Description (Default = 0x070A)
Not used
Z-axis acceleration bias correction enable (1 = enabled)
Y-axis acceleration bias correction enable (1 = enabled)
X-axis acceleration bias correction enable (1 = enabled)
Z-axis gyroscope bias correction enable (1 = enabled)
Y-axis gyroscope bias correction enable (1 = enabled)
X-axis gyroscope bias correction enable (1 = enabled)
Not used
Time base control (TBC), range: 0 to 13 (default = 10);
tB = 2TBC/2460, time base, tA = 64 × tB, average time
Turn to Page 3 (DIN = 0x8003) and set GLOB_CMD[0] = 1
(DIN = 0x8201, then DIN = 0x8300) to update the user offset
registers with the correction factors of the CBE.
Manual Sensitivity Correction
The x_GYRO_SCALE registers enable sensitivity adjustment
(see Table 64, Table 65, and Table 66).
Table 64. X_GYRO_SCALE (Page 2, Base Address = 0x04)
Bits
[15:0]
Description (Default = 0x0000)
X-axis gyroscope scale correction; twos complement,
0x0000 = unity gain, 1 LSB = 1 ÷ 215 = ~0.003052%
Table 65. Y_GYRO_SCALE (Page 2, Base Address = 0x06)
Bits
[15:0]
Description (Default = 0x0000)
Y-axis gyroscope scale correction; twos complement,
0x0000 = unity gain, 1 LSB = 1 ÷ 215 = ~0.003052%
Table 66. Z_GYRO_SCALE (Page 2, Base Address = 0x08)
Bits
[15:0]
Rev. E | Page 23 of 32
Description (Default = 0x0000)
Z-axis gyroscope scale correction; twos complement,
0x0000 = unity gain, 1 LSB = 1 ÷ 215 = ~0.003052%
ADIS16485
Data Sheet
Linear Acceleration on Effect on Gyroscope Bias
Table 71. XA_BIAS_LOW (Page 2, Base Address = 0x1C)
MEMS gyroscopes typically have a bias response to linear acceleration that is normal to their axes of rotation. The ADIS16485
offers an optional compensation function for this effect; the factory
default setting (0x00C0) for the CONFIG register enables this
function. To turn it off, turn to Page 3 (DIN = 0x8003) and set
CONFIG[7] = 0 (DIN = 0x8A20, DIN = 0x8B00). Note that this
also keeps the point of percussion alignment function enabled.
Bits
[15:0]
Table 72. YA_BIAS_LOW (Page 2, Base Address = 0x20)
Bits
[15:0]
Table 67. CONFIG (Page 3, Base Address = 0x0A)
Bits
[15:8]
7
6
[5:2]
1
0
Description (Default = 0x00C0)
Not used
Linear-g compensation for gyroscopes (1 = enabled)
Point of percussion alignment (1 = enabled)
Not used
Real-time clock, daylight savings time (1: enabled,
0: disabled)
Real-time clock control (1: relative/elapsed timer mode,
0: calendar mode)
Description (Default = 0x0000)
X-axis accelerometer offset correction, low word;
twos complement, 0 g = 0x0000,
1 LSB = 0.25 mg ÷ 216 = ~0.000003815 mg
Description (Default = 0x0000)
Y-axis accelerometer offset correction, low word;
twos complement, 0 g = 0x0000,
1 LSB = 0.25 mg ÷ 216 = ~0.000003815 mg
Table 73. ZA_BIAS_LOW (Page 2, Base Address = 0x24)
Bits
[15:0]
Description (Default = 0x0000)
Z-axis accelerometer offset correction, low word;
twos complement, 0 g = 0x0000,
1 LSB = 0.25 mg ÷ 216 = ~0.000003815 mg
Manual Sensitivity Correction
The x_ACCL_SCALE registers enable sensitivity adjustment
(see Table 74, Table 75, Table 76).
ACCELEROMETERS
Table 74. X_ACCL_SCALE (Page 2, Base Address = 0x0A)
The user calibration for the accelerometers includes registers for
adjusting bias and sensitivity, as shown in Figure 23.
Bits
[15:0]
1 + X_ACCL_SCALE
FACTORY
CALIBRATION
AND
FILTERING
XA_BIAS_HIGH
Table 75. Y_ACCL_SCALE (Page 2, Base Address = 0x0C)
X_ACCL_OUT
X_ACCL_LOW
10666-022
X-AXIS
ACCL
XA_BIAS_LOW
Figure 23. User Calibration Signal Path, Gyroscopes
Bits
[15:0]
The xA_BIAS_HIGH (see Table 68, Table 69, and Table 70) and
xA_BIAS_LOW (see Table 71, Table 72, and Table 73) registers
provide a bias adjustment function for the output of each accelerometer sensor. The xA_BIAS_HIGH registers use the same
format as x_ACCL_OUT registers. The xA_BIAS_LOW
registers use the same format as x_ACCL_LOW registers.
Bits
[15:0]
Table 68. XA_BIAS_HIGH (Page 2, Base Address = 0x1E)
Description (Default = 0x0000)
X-axis accelerometer offset correction, high word;
twos complement, 0 g = 0x0000, 1 LSB = 0.25 mg
Table 69. YA_BIAS_HIGH (Page 2, Base Address = 0x22)
Bits
[15:0]
Description (Default = 0x0000)
Y-axis accelerometer offset correction, high word;
twos complement, 0 g = 0x0000, 1 LSB = 0.25 mg
Table 70. ZA_BIAS_HIGH (Page 2, Base Address = 0x26)
Bits
[15:0]
Description (Default = 0x0000)
Y-axis accelerometer scale correction; twos complement,
0x0000 = unity gain, 1 LSB = 1 ÷ 215 = ~0.003052%
Table 76. Z_ACCL_SCALE (Page 2, Base Address = 0x0E)
Manual Bias Correction
Bits
[15:0]
Description (Default = 0x0000)
X-axis accelerometer scale correction; twos complement,
0x0000 = unity gain, 1 LSB = 1 ÷ 215 = ~0.003052%
Description (Default = 0x0000)
Z-axis accelerometer offset correction, high word;
twos complement, 0 g = 0x0000, 1 LSB = 0.25 mg
Rev. E | Page 24 of 32
Description (Default = 0x0000)
Z-axis accelerometer scale correction; twos complement,
0x0000 = unity gain, 1 LSB = 1 ÷ 215 = ~0.003052%
Data Sheet
ADIS16485
RESTORING FACTORY CALIBRATION
Turn to Page 3 (DIN = 0x8003) and set GLOB_CMD[6] = 1
(DIN = 0x8240, DIN = 0x8300) to execute the factory
calibration restore function. This function resets each user
calibration register to zero, resets all sensor data to 0, and
automatically updates the flash memory within 900 ms. See
Table 86 for more information on GLOB_CMD.
PIN 23
POINT OF PERCUSSION
ALIGNMENT REFERENCE POINT.
SEE CONFIG[6].
POINT OF PERCUSSION ALIGNMENT
CONFIG[6] offers a point of percussion alignment function
that maps the accelerometer sensors to the corner of the package
identified in Figure 24. To activate this feature, turn to Page 3
(DIN = 0x8003), then set CONFIG[6] = 1 (DIN = 0x8A40,
DIN = 0x8B00). See Table 67 for more information on the
CONFIG register.
Rev. E | Page 25 of 32
Figure 24. Point of Percussion Reference Point
10666-023
PIN 1
ADIS16485
Data Sheet
ALARMS
Each sensor has an independent alarm function that provides
controls for alarm magnitude, polarity, and enabling a dynamic
rate-of-change option. The ALM_STS register (see Table 43)
contains the alarm output flags and the FNCTIO_CTRL register
(see Table 89) provides an option for configuring one of the
digital I/O lines as an alarm indicator.
Table 83. ALM_CNFG_0 (Page 3, Base Address = 0x20)
Bits
15
14
13
STATIC ALARM USE
The static alarm setting compares the output of each sensor
with the trigger settings in the xx_ALM_MAGN registers (see
Table 77, Table 78, Table 79, Table 80, Table 81, and Table 82)
of that sensor. The polarity controls for each alarm are in the
ALM_CNFG_x registers (see Table 83 and Table 84) and establish
the relationship for the condition that causes the corresponding
alarm flag to be active. For example, when ALM_CNFG_0[13]
= 1, the alarm flag for the x-axis accelerometer (ALM_STS[3],
see Table 43) becomes active (equal to 1) when X_ACCL_OUT
is greater than XA_ALM_MAGN.
12
11
10
9
8
7
6
5
DYNAMIC ALARM USE
The dynamic alarm setting provides the option to compare the
change in each sensor’s output over a period of 48.7 ms with that
sensor’s xx_ALM_MAGN register.
Table 77. XG_ALM_MAGN (Page 3, Base Address = 0x28)
Bits
[15:0]
Description (Default = 0x0000)
X-axis gyroscope alarm threshold settings;
twos complement, 0°/sec = 0x0000, 1 LSB = 0.02°/sec
4
3
2
1
0
Description (Default = 0x0000)
X-axis accelerometer alarm (1 = enabled)
Not used
X-axis accelerometer alarm polarity
1 = active when X_ACCL_OUT > XA_ALM_MAGN
0 = active when X_ACCL_OUT > XA_ALM_MAGN
X-axis accelerometer dynamic enable (1 = enabled)
Z-axis gyroscope alarm (1 = enabled)
Not used
Z-axis gyroscope alarm polarity
1 = active when Z_GYRO_OUT > ZG_ALM_MAGN
0 = active when Z_GYRO_OUT > ZG_ALM_MAGN
Z-axis gyroscope dynamic enable (1 = enabled)
Y-axis gyroscope alarm (1 = enabled)
Not used
Y-axis gyroscope alarm polarity
1 = active when Y_GYRO_OUT > YG_ALM_MAGN
0 = active when Y_GYRO_OUT > YG_ALM_MAGN
Y-axis gyroscope dynamic enable (1 = enabled)
X-axis gyroscope alarm (1 = enabled)
Not used
X-axis gyroscope alarm polarity
1 = active when X_GYRO_OUT > XG_ALM_MAGN
0 = active when X_GYRO_OUT > XG_ALM_MAGN
X-axis gyroscope dynamic enable (1 = enabled)
Table 78. YG_ALM_MAGN (Page 3, Base Address = 0x2A)
Table 84. ALM_CNFG_1 (Page 3, Base Address = 0x22)
Bits
[15:0]
Bits
[15:8]
7
6
5
Description (Default = 0x0000)
Y-axis gyroscope alarm threshold settings;
twos complement, 0°/sec = 0x0000, 1 LSB = 0.02°/sec
Table 79. ZG_ALM_MAGN (Page 3, Base Address = 0x2C)
Bits
[15:0]
Description (Default = 0x0000)
Z-axis gyroscope alarm threshold settings;
twos complement, 0°/sec = 0x0000, 1 LSB = 0.02°/sec
Table 80. XA_ALM_MAGN (Page 3, Base Address = 0x2E)
Bits
[15:0]
Description (Default = 0x0000)
X-axis accelerometer alarm threshold settings;
twos complement, 0 g = 0x0000, 1 LSB = 0.25 mg
Table 81. YA_ALM_MAGN (Page 3, Base Address = 0x30)
Bits
[15:0]
Description (Default = 0x0000)
Y-axis accelerometer alarm threshold settings;
twos complement, 0 g = 0x0000, 1 LSB = 0.25 mg
Description (Default = 0x0000)
Z-axis accelerometer alarm threshold settings;
twos complement, 0 g = 0x0000, 1 LSB = 0.25 mg
0
Alarm Example
Table 82. ZA_ALM_MAGN (Page 3, Base Address = 0x32)
Bits
[15:0]
4
3
2
1
Description (Default = 0x0000)
Don’t care
Z-axis accelerometer alarm (1 = enabled)
Not used
Z-axis accelerometer alarm polarity
1 = active when Z_ACCL_OUT > ZA_ALM_MAGN
0 = active when Z_ACCL_OUT > ZA_ALM_MAGN
Z-axis accelerometer dynamic enable (1 = enabled)
Y-axis accelerometer alarm (1 = enabled)
Not used
Y-axis accelerometer alarm polarity
1 = active when Y_ACCL_OUT > YA_ALM_MAGN
0 = active when Y_ACCL_OUT > YA_ALM_MAGN
Y-axis accelerometer dynamic enable (1 = enabled)
Table 85 offers an alarm configuration example, which sets the
z-axis gyroscope alarm to trip when Z_GYRO_OUT > 131.1°/sec
(0x199B).
Table 85. Alarm Configuration Example
DIN
0xAC9B, 0xAD19
0xA000, 0xA10A
Rev. E | Page 26 of 32
Description
Set ZG_ALM_MAGN = 0x199B
Set ALM_CNFG_0 = 0x0A00
Data Sheet
ADIS16485
SYSTEM CONTROLS
The ADIS16485 provides a number of system level controls for
managing its operation, which include reset, self test, calibration,
memory management, and I/O configuration.
GLOBAL COMMANDS
The GLOB_CMD register (see Table 86) provides trigger bits for
several operations. Write 1 to the appropriate bit in GLOB_CMD to
start a function. After the function completes, the bit restores to 0.
Execution Time
Not applicable
120 ms
75 ms
Not applicable
375 ms
50 ms
12 ms
See Table 63
Software Reset
Turn to Page 3 (DIN = 0x8003) and then set GLOB_CMD[7] = 1
(DIN = 0x8280, DIN = 0x8300) to reset the operation, which
removes all data, initializes all registers from their flash settings,
and starts data collection. This function provides a firmware
alternative to the RST pin (see Table 6, Pin 8).
Bits
[15:0]
Description
Binary counter; number of flash updates, lower word
Table 88. FLSHCNT_HIGH (Page 2, Base Address = 0x7E)
Bits
[15:0]
Description
Binary counter; number of flash updates, upper word
600
RETENTION (Years)
Description
Not used
Software reset
Factory calibration restore
Not used
Flash memory update
Flash memory test
Self test
Bias null
The data retention of the flash memory depends on the temperature
and the number of write cycles. Figure 25 characterizes the
dependence on temperature, and the FLSHCNT_LOW and
FLSHCNT_HIGH registers (see Table 87 and Table 88) provide a
running count of flash write cycles. The flash updates every time
GLOB_CMD[6], GLOB_CMD[3], or GLOB_CMD[0] is set to 1.
Table 87. FLSHCNT_LOW (Page 2, Base Address = 0x7C)
Table 86. GLOB_CMD (Page 3, Base Address = 0x02)
Bits
[15:8]
7
6
[5:4]
3
2
1
0
MEMORY MANAGEMENT
450
300
150
Turn to Page 3 (DIN = 0x8003) and then set GLOB_CMD[1] = 1
(DIN = 0x8202, then DIN = 0x8300) to run an automatic, self
test routine, which executes the following steps:
1.
2.
3.
4.
5.
6.
7.
Measure the output on each sensor.
Activate the self test on each sensor.
Measure the output on each sensor.
Deactivate the self test on each sensor.
Calculate the difference with the self test on and off.
Compare the difference with the internal pass/fail criteria.
Report the pass/fail results for each sensor in DIAG_STS.
0
30
40
55
70
85
100
125
JUNCTION TEMPERATURE (°C)
135
150
10666-024
Automatic Self Test
Figure 25. Flash Memory Retention
Flash Memory Test
Turn to Page 3 (DIN = 0x8003), and then set GLOB_CMD[2] = 1
(DIN = 0x8204, DIN = 0x8300) to run a checksum test of the
internal flash memory, which compares a factory programmed
value with the current sum of the same memory locations. The
result of this test loads into SYS_E_FLAG[6]. Turn to Page 0
(DIN = 0x8000) and use DIN = 0x0800 to read SYS_E_FLAG.
After waiting 12 ms for this test to complete, turn to Page 0
(DIN = 0x8000) and read DIAG_STS using DIN = 0x0A00.
Note that using an external clock can extend this time. When
using an external clock of 100 Hz, this time extends to 35 ms.
Note that 100 Hz is too slow for optimal sensor performance.
Rev. E | Page 27 of 32
ADIS16485
Data Sheet
GENERAL-PURPOSE I/O
General-Purpose I/O Control
There are four general-purpose I/O pins: DIO1, DIO2, DIO3, and
DIO4. The FNCTIO_CTRL register controls the basic function
of each I/O pin. Each I/O pin only supports one function at a
time. In cases where a single pin has two different assignments,
the enable bit for the lower priority function automatically resets to
zero and is disabled. The priority is (1) data-ready, (2) sync clock
input, (3) alarm indicator, and (4) general-purpose, where 1
identifies the highest priority and 4 indicates the lowest priority.
When FNCTIO_CTRL does not configure a DIOx pin,
GPIO_CTRL provides register controls for general-purpose use
of the pin. GPIO_CTRL[3:0] provides input/output assignment
controls for each pin. When the DIOx pins are inputs, monitor
their levels by reading GPIO_CTRL[7:4]. When the DIOx pins are
used as outputs, set their levels by writing to GPIO_CTRL[7:4]. For
example, use the following sequence to set DIO1 and DIO3 as high
and low output pins, respectively, and set DIO2 and DIO4 as input
pins. Turn to Page 3 (DIN = 0x8003) and set GPIO_CTRL[7:0] =
0x15 (DIN = 0x8815, then DIN = 0x8900).
Table 89. FNCTIO_CTRL (Page 3, Base Address = 0x06)
Bits
[15:12]
11
10
[9:8]
7
6
[5:4]
3
2
[1:0]
Description (Default = 0x000D)
Not used
Alarm indicator: 1 = enabled, 0 = disabled
Alarm indicator polarity: 1 = positive, 0 = negative
Alarm indicator line selection:
00 = DIO1, 01 = DIO2, 10 = DIO3, 11 = DIO4
Sync clock input enable: 1 = enabled, 0 = disabled
Sync clock input polarity: 1 = rising edge, 0 = falling edge
Sync clock input line selection:
00 = DIO1, 01 = DIO2, 10 = DIO3, 11 = DIO4
Data-ready enable: 1 = enabled, 0 = disabled
Data-ready polarity: 1 = positive, 0 = negative
Data-ready line selection:
00 = DIO1, 01 = DIO2, 10 = DIO3, 11 = DIO4
Table 90. GPIO_CTRL (Page 3, Base Address = 0x08)
Bits
[15:8]
7
6
5
4
3
2
1
0
Data-Ready Indicator
FNCTIO_CTRL[3:0] provide some configuration options for
using one of the DIOx lines as a data-ready indicator signal,
which can drive the interrupt control line of a processor. The
factory default assigns DIO2 as a positive polarity, data-ready
signal. Use the following sequence to change this assignment to
DIO1 with a negative polarity: turn to Page 3 (DIN = 0x8003)
and set FNCTIO_CTRL[3:0] = 1000 (DIN = 0x8608, then DIN =
0x8700). The timing jitter on the data-ready signal is ±1.4 µs.
Input Sync/Clock Control
FNCTIO_CTRL[7:4] provide some configuration options for
using one of the DIOx lines as an input synchronization signal
for sampling inertial sensor data. For example, use the following
sequence to establish DIO4 as a positive polarity, input clock pin
and keep the factory default setting for the data-ready function: turn
to Page 3 (DIN = 0x8003) and set FNCTIO_CTRL[7:0] = 0xFD
(DIN = 0x86FD, then DIN = 0x8700). Note that this command
also disables the internal sampling clock, and no data sampling
takes place without the input clock signal. When selecting a
clock input frequency, consider the 330 Hz sensor bandwidth,
because under sampling the sensors can degrade noise and
stability performance.
1
Description (Default = 0x00X0)1
Don’t care
General-Purpose I/O Line 4 (DIO4) data level
General-Purpose I/O Line 3 (DIO3) data level
General-Purpose I/O Line 2 (DIO2) data level
General-Purpose I/O Line 1 (DIO1) data level
General-Purpose I/O Line 4 (DIO4) direction control
(1 = output, 0 = input)
General-Purpose I/O Line 3 (DIO3) direction control
(1 = output, 0 = input)
General-Purpose I/O Line 2 (DIO2) direction control
(1 = output, 0 = input)
General-Purpose I/O Line 1 (DIO1) direction control
(1 = output, 0 = input)
The GPIO_CTRL register, Bits[7:4], reflect the levels on the DIOx pins and do
not have a default setting.
POWER MANAGEMENT
The SLP_CNT register (see Table 91) provides controls for both
power-down mode and sleep mode. The trade-off between powerdown mode and sleep mode is between idle power and recovery
time. Power-down mode offers the best idle power consumption
but requires the most time to recover. Also, all volatile settings
are lost during power-down but are preserved during sleep mode.
For timed sleep mode, turn to Page 3 (DIN = 0x8003), write
the amount of sleep time to SLP_CNT[7:0] and then, set
SLP_CNT[8] = 1 (DIN = 0x9101) to start the sleep period. For
a timed power-down period, change the last command to set
SLP_CNT[9] = 1 (DIN = 0x9102). To power down or sleep for
an indefinite period, set SLP_CNT[7:0] = 0x00 first, then set
either SLP_CNT[8] or SLP_CNT[9] to 1. Note that the command
takes effect when the CS line goes high. To awaken the device
from sleep or power-down mode, use one of the following
options to restore normal operation:
•
•
•
Assert CS from high to low.
Pulse RST low, then high again.
Cycle the power.
For example, set SLP_CNT[7:0] = 0x64 (DIN = 0x9064), then
set SLP_CNT[8] = 1 (DIN = 0x9101) to start a sleep period of
100 seconds.
Rev. E | Page 28 of 32
Data Sheet
ADIS16485
Table 91. SLP_CNT (Page 3, Base Address = 0x10)
Bits
[15:10]
9
8
[7:0]
Description
Not used
Power-down mode
Normal sleep mode
Programmable time bits; 1 sec/LSB; 0x00 = indefinite
If the sleep mode and power-down mode bits are both set high,
the normal sleep mode (SLP_CNT[8]) bit takes precedence.
General-Purpose Registers
The USER_SCR_x registers (see Table 92, Table 93, Table 94,
and Table 95) provide four 16-bit registers for storing data.
Table 92. USER_SCR_1 (Page 2, Base Address = 0x74)
Bits
[15:0]
Description
User-defined
Table 93. USER_SCR_2 (Page 2, Base Address = 0x76)
Bits
[15:0]
Description
User-defined
Bits
[15:14]
[13:8]
[7:6]
[5:0]
Description
User-defined
Table 95. USER_SCR_4 (Page 2, Base Address = 0x7A)
Bits
[15:0]
Write the current time to each time data register after setting
CONFIG[0] = 1 (DIN = 0x8003, DIN = 0x8A01). Note that
CONFIG[1] provides a bit for managing daylight savings time.
After the CONFIG and TIME_xx_OUT registers are configured,
set GLOB_CMD[3] = 1 (DIN = 0x8003, DIN = 0x8208, DIN =
0x8300) to back up these settings up in flash, and use a separate
3.3 V source to supply power to the VDDRTC function. Note that
access to time data in the TIME_xx_OUT registers requires
normal operation (VDD = 3.3 V and full startup), but the timer
function only requires that VDDRTC = 3.3 V when the rest of
the ADIS16485 is turned off.
Table 96. TIME_MS_OUT (Page 0, Base Address = 0x78)
Table 94. USER_SCR_3 (Page 2, Base Address = 0x78)
Bits
[15:0]
The updates to the timer do not become active until there is a
successful write to the TIME_ YM_OUT[14:8] byte. The realtime clock registers reflect the newly updated values only after
the next seconds tick of the clock that follows the write to
TIME_YM_OUT[14:8] (year). Writing to TIME_YM_OUT[14:8]
activates all timing values; therefore, always write to this location
last when updating the timer, even if the year information does
not require updating.
Description
User-defined
Description
Not used
Minutes, binary data, range = 0 to 59
Not used
Seconds, binary data, range = 0 to 59
Table 97. TIME_DH_OUT (Page 0, Base Address = 0x7A)
Real-Time Clock Configuration/Data
The VDDRTC power supply pin (see Table 6, Pin 23) provides
a separate supply for the real-time clock (RTC) function. This
enables the RTC to keep track of time, even when the main supply
(VDD) is off. Configure the RTC function by selecting one of
two modes in CONFIG[0] (see Table 67). The real-time clock
data is available in the TIME_MS_OUT register (see Table 96),
TIME_DH_OUT register (see Table 97), and TIME_YM_OUT
register (see Table 98). When using the elapsed timer mode, the
time data registers start at 0x0000 when the device starts up (or
resets) and begin keeping time in a manner that is similar to a
stopwatch. When using the clock/calendar mode, write the current
time to the real-time registers in the following sequence: seconds
(TIME_MS_OUT[5:0]), minutes (TIME_ MS_OUT[13:8]), hours
(TIME_DH_OUT[5:0]), day (TIME_DH_OUT[12:8]), month
(TIME_YM_OUT[3:0]), and year (TIME_YM_OUT[14:8]).
Bits
[15:13]
[12:8]
[7:6]
[5:0]
Description
Not used
Day, binary data, range = 1 to 31
Not used
Hours, binary data, range = 0 to 23
Table 98. TIME_YM_OUT (Page 0, Base Address = 0x7C)
Bits
[15]
[14:8]
[7:4]
[3:0]
Rev. E | Page 29 of 32
Description
Not used
Year, binary data, range = 0 to 99, relative to 2000 A.D.
Not used
Month, binary data, range = 1 to 12
ADIS16485
Data Sheet
APPLICATIONS INFORMATION
39.600 BSC
MOUNTING TIPS
19.800 BSC
For best performance, follow these simple rules when installing
the ADIS16485 into a system.
0.560 BSC 2×
ALIGNMENT HOLES
FOR MATING SOCKET
5 BSC
5 BSC
10666-027
These three rules help prevent nonuniform force profiles, which
can warp the package and introduce bias errors in the sensors.
Figure 26 provides an example that leverages washers to set the
package off the mounting surface and uses 2.85 mm pass-through
holes and backside washers/nuts for attachment. Figure 27 and
Figure 28 provide some details from mounting hole and connector
alignment pin drill locations. For more information on mounting
the ADIS16485, see the AN-1295 Application Note, Mechanical
Design Tips for ADIS16375, ADIS16480, ADIS16485, and
ADIS16488.
ADIS16485AMLZ
OUTLINE
1.642 BSC
NOTES
1. ALL DIMENSIONS IN mm UNITS.
2. THE CONNECTOR FACES DOWN AND ARE NOT VISIBLE FROM THIS VIEW.
Figure 27. Suggested PCB Layout Pattern, Connector Down
0.4334 [11.0]
0.019685
[0.5000]
(TYP)
0.0240 [0.610]
MOUNTING SCREWS
M2 × 0.4mm, 4×
0.054 [1.37]
0.0394 [1.00]
0.1800
[4.57]
WASHERS (OPTIONAL)
M2, 4×
ADIS16488A
0.022±
DIA (TYP)
NONPLATED
THROUGH HOLE 2×
SPACERS/WASHERS
SUGGESTED, 4×
0.0394 [1.00]
0.022 DIA THROUGH HOLE (TYP)
NONPLATED THROUGH HOLE
Figure 28. Suggested Layout and Mechanical Design when Using Samtec
P/N CLM-112-02-G-D-A for the Mating Connector
PCB
MATING CONNECTOR
CLM-112-02
PASS-THROUGH HOLES
DIAMETER ≥ 2.85mm
NUTS
M2 × 0.4mm, 4×
10666-133
WASHERS (OPTIONAL)
M2, 4×
Figure 26. Mounting Example
Rev. E | Page 30 of 32
10666-028
3.
42.600
2.
Eliminate opportunity for translational force (x-axis and
y-axis direction; see Figure 6.
Isolate mounting force to the four corners, on the part of
the package surface that surrounds the mounting holes.
Use uniform mounting forces on all four corners. The
suggested torque setting is 40 inch-ounces (0.285 N-m).
21.300 BSC
1.
PASS-THROUGH HOLE
FOR MOUNTING SCREWS
DIAMETER OF THE HOLE
MUST ACCOMMODATE
DIMENSIONAL TOLERANCE
BETWEEN THE CONNECTOR
AND HOLES.
Data Sheet
ADIS16485
EVALUATION TOOLS
T
VDD
Breakout Board, ADIS16IMU/PCBZ
The ADIS16IMU1/PCBZ (sold separately) provides a breakout
board function for the ADIS16485, which means that it provides
access to the ADIS16485 through larger connectors that support
standard 1 mm ribbon cabling. It also provides four mounting
holes for attachment of the ADIS16485 to the breakout board.
For more information on the ADIS16IMU1/PCBZ, see
http://www.analog.com/en/evaluation/eval-adis16imu1/eb.html.
PC-Based Evaluation, EVAL-ADIS
1
CURRENT
The EVAL-ADIS system support PC-based evaluation of the
ADIS16485. For more information on the EVAL-ADIS system,
see http://www.analog.com/EVAL-ADIS.
CH1 2.00V
CH4 100mA Ω
1.00ms 1.00MS/s
CH1
T 9.800% 1M POINTS
2.72V
10666-129
4
Figure 29. Transient Current Demand, Start-Up
POWER SUPPLY CONSIDERATIONS
The ADIS16485 has approximately ~24 µF of capacitance across
the VDD and GND pins. While this capacitor bank provides a
large amount of localized filtering, it also presents an opportunity
for excessive charging current when the VDD voltage ramps too
quickly. Use the following relationship to help determine the
appropriate VDD voltage profile, with respect to any current
limit functions that can cause the power supply to lose regulation
and potentially introduce unsafe conditions for the ADIS16485.
T
CURRENT
i(t ) = C dV dt
Rev. E | Page 31 of 32
4
CH4 100mA Ω
1.00ms 1.00MS/s
CH1
T 9.800% 1M POINTS
2.72V
Figure 30. Transient Current Demand, Peak Demand
10666-128
In addition to managing the initial voltage ramp, take note of the
transient current demand that the ADIS16485 requires during
its start-up/self-initialization process. Once VDD reaches 2.85 V,
the ADIS16485 begins its start-up process. Figure 29 offers a
broad connection that communicates when to expect the spikes
in current, and Figure 30 provides more detail on the current/time
behavior during the peak transient condition, which typically
occurs approximately 350 ms after VDD reaches 2.85 V. In
Figure 30 notice that the peak current approaches 600 mA and
the transient condition lasts for approximately 1.75 ms.
ADIS16485
Data Sheet
OUTLINE DIMENSIONS
44.254
44.000
43.746
Ø 2.40 BSC
(4 PLACES)
39.854
39.600
39.346
2.20 BSC
20.10
19.80
19.50
(8 PLACES)
DETAIL A
15.00
BSC
PIN 1
1.942
1.642
1.342
8.25
BSC
42.854
42.600
42.346
1.00 BSC
47.254
47.000
46.746
DETAIL A
BOTTOM VIEW
14.254
14.000
13.746
DETAIL B
FRONT VIEW
6.50 BSC
3.454
3.200
2.946
5.50
BSC
5.50
BSC
1.00 BSC
PITCH
0.30 SQ BSC
DETAIL B
12-07-2012-E
2.84 BSC
Figure 31. 24-Lead Module with Connector Interface [MODULE]
(ML-24-6)
Dimensions shown in millimeters
ORDERING GUIDE
Model1
ADIS16485BMLZ
1
Temperature Range
−40°C to +105°C
Package Description
24-Lead Module with Connector Interface [MODULE]
Z = RoHS Compliant Part.
©2012−2015 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D10666-0-2/15(E)
Rev. E | Page 32 of 32
Package Option
ML-24-6