Circuit Note CN-0133 Devices Connected/Referenced Circuit Designs Using Analog Devices Products Apply these product pairings quickly and with confidence. For more information and/or support call 1-800-AnalogD (1-800-262-5643) or visit www.analog.com/circuit. ADXL345 3-Axis, ±2 g/±4 g/±8 g/±16 g Digital Accelerometer ADuC7024 Precision Analog Microcontroller, 12-Bit Analog I/O, ARM7TDMI® MCU Sensing Low-g Acceleration Using the ADXL345 Digital Accelerometer Connected to the ADuC7024 Precision Analog Microcontroller CIRCUIT FUNCTION AND BENEFITS estate. Additionally, the ADXL345 includes a variety of built-in features. Activity/inactivity detection, tap/double-tap detection, and free-fall detection are all done internally with no need for the host processor to perform any calculations. A built-in 32-stage FIFO memory buffer reduces the burden on the host processor, allowing algorithm simplification and power savings. Additional system level power savings can be implemented using the built-in activity/inactivity detection and by using the ADXL345 as a “motion switch” to turn the whole system off when no activity is felt and on when activity is sensed again. The ADXL345 is a small, thin, low power, 3-axis accelerometer with high resolution (13-bit) measurement up to ±16 g. Digital output data is formatted as 16-bit twos complement and is accessible through either an SPI (3- or 4-wire) or I2C digital interface. The ADXL345 is well suited for mobile device applications. It measures the static acceleration of gravity in tilt-sensing applications, as well as dynamic acceleration resulting from motion or shock. Its high resolution (4 mg/LSB) enables measurement of inclination changes of about 0.25°. Using a digital output accelerometer such as the ADXL345 eliminates the need for analog-to-digital conversion, reducing system cost and real The ADXL345 communicates via I2C or SPI interface. The circuits described in this document demonstrate how to implement communication via these protocols. VSUP C3 0.47µF VSUP 21 IOVDD 20 VREF 55 DACREF UART 56 IOVDD VSUP 42 AVDD 59 DACVDD 60 LVDD 1 7 48 P1.2/SPM2/PLAI(2) CS 47 14 46 13 P1.3/SPM3/PLAI(3) 1 50 2 11 RES SDA ADXL345 12 45 P1.5/SPM5/PLAI(5)/IRQ3 49 3 VS SCL P1.4/SPM4/PLAI(4)/IRQ2 P1.0/T1/SPM0/PLAI(0) 6 VDD I/O 10 NC SDO P1.1/SPM1/PLAI(1) 3 4 IRQ0/P0.4/PWMTRIP/PLAO(1) IRQ1/P0.5/ADCBUSY/PLAO(2) 31 8 32 9 RES INT1 INT2 GND GND GND VSUP 2 4 5 ADuC7024 RST GND SW3 22 7 57 58 41 1.8V–3.2V 2AAA + C1 10µF VSUP C2 0.1µF 08654-001 19 SW1 IOGND BM/P0.0/CMPOUT/PLAI(7) AGND 15 DACGND 28 GNDREF R2 1kΩ DGND R1 1kΩ IOGND SW2 GND Figure 1. ADXL345 and ADuC7024 in 4-Wire SPI Configuration (Simplified Schematic: Decoupling and All Connections Not Shown) Rev. 0 “Circuits from the Lab” from Analog Devices have been designed and built by Analog Devices engineers. Standard engineering practices have been employed in the design and construction of each circuit, and their function and performance have been tested and verified in a lab environment at room temperature. However, you are solely responsible for testing the circuit and determining its suitability and applicability for your use and application. Accordingly, in no event shall Analog Devices be liable for direct, indirect, special, incidental, consequential, or punitive damages due to any cause whatsoever connected to the use of any“Circuit from the Lab”. (Continued on last page) One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2009 Analog Devices, Inc. All rights reserved. CN-0133 Circuit Note VSUP C3 0.47µF VSUP 21 IOVDD 20 VREF 55 DACREF UART 56 IOVDD VSUP 42 AVDD 59 DACVDD 60 R3 R4 10kΩ 10kΩ 7 CS 1 50 2 P1.0/T1/SPM0/PLAI(0) 14 47 13 6 VS SCLK P1.3/SPM3/PLAI(3) 49 3 48 P1.2/SPM2/PLAI(2) 1 VDD I/O ADXL345 SDIO P1.1/SPM1/PLAI(1) 10 ALT ADDRESS NC 3 4 IRQ0/P0.4/PWMTRIP/PLAO(1) IRQ1/P0.5/ADCBUSY/PLAO(2) VSUP 31 8 32 9 RES INT1 INT2 GND GND GND 2 ADuC7024 RST 4 5 GND SW3 22 7 57 58 41 1.8V–3.2V 2AAA + C1 10µF VSUP C2 0.1µF 08654-002 19 SW1 IOGND BM/P0.0/CMPOUT/PLAI(7) AGND 15 DACGND 28 GNDREF R2 1kΩ DGND R1 1kΩ IOGND SW2 GND 11 RES 12 Figure 2. ADXL345 and ADuC7024 in I2C Configuration (Simplified Schematic: Decoupling and All Connections Not Shown) CIRCUIT DESCRIPTION COMMON VARIATIONS This circuit uses an ADuC7024 precision analog microcontroller in conjunction with the ADXL345 digital accelerometer. Both are I2C- and SPI-ready. Figure 1 shows the ADXL345 and ADuC7024 in an SPI configuration, and Figure 2 shows the same devices in an I2C configuration. The CS pin (Pin 7 on the ADXL345) is used to select the desired interface. I2C mode is enabled if the CS pin is tied high to VDD I/O. In SPI mode, CS is toggled to signify the beginning and end of each transmission. When CS is pulled high, this indicates that no SPI transmission is occurring or that an I2C transmission may occur. Figure 1 shows the ADXL345 in a 4-wire SPI configuration. The ADXL345 can also communicate via 3-wire SPI. Figure 3 outlines this configuration. Both schematics are simplified, but required connections (supplies, ground connections, etc.) are shown. In these schematics, the ADuC7024 is programmed via UART (connected to Pin 49 and Pin 50). SW2 and SW3 are Reset and Download buttons, respectively, for programming the microcontroller. SW1 is an on/off power switch. CS SDIO PROCESSOR D OUT D IN/OUT SDO SCLK D OUT 08654-003 ADXL345 Figure 3. 3-Wire SPI Connection Diagram The circuit described uses the ADuC7024 microcontroller. The same configuration can be applied with any SPI- or I2C-capable microcontroller, as outlined in the diagrams in Figure 4. The standard I2C and SPI connections are used. Pin functions for the two protocols are listed in Table 1. Table 1. ADXL345 Pin Functionality in SPI and I2C Communication Modes Functionality ADXL345 Pin Number 7 12 13 14 Pin Name CS I2C SPI SDO/ALT ADDRESS (Connect to VDD for I2C) Alternate Address Select SDA/SDI/SDIO SCL/SCLK Serial Data Serial Communications Clock Chip Select Serial Data Output Serial Data Input (SPI 4-Wire)/ Serial Data Input and Output (SPI 2-Wire) Serial Communications Clock Rev. 0 | Page 2 of 3 Circuit Note CN-0133 VDD I/O ADXL345 PROCESSOR CS D OUT CS SDI D OUT SDA SDO SCLK D IN RP RP PROCESSOR D IN/OUT ALT ADDRESS D OUT SCL D OUT 08654-004 ADXL345 Figure 4. SPI (left) and I2C (right) Connection Diagrams LEARN MORE This circuit is used in the ADXL345 Development Board (model number EVAL-ADXL345Z-DB). For information on ADXL345 operation and register functions, please refer to the ADXL345 data sheet. For information on programming the ADuC7024, please see the ADuC7024 data sheet. Sample code for the I2C configuration shown in Figure 2 is available at www.analog.com/static/ imported-files/circuit_notes/CN0133_Source_Code.zip. Data Sheets and Evaluation Boards ADXL345 Data Sheet ADXL345 Evaluation Tools ADuC7024 Data Sheet ADuC7024 Evaluation Tools REVISION HISTORY 10/09—Revision 0: Initial Version (Continued from first page) "Circuits from the Lab" are intended only for use with Analog Devices products and are the intellectual property of Analog Devices or its licensors. While you may use the "Circuits from the Lab" in the design of your product, no other license is granted by implication or otherwise under any patents or other intellectual property by application or use of the "Circuits from the Lab". Information furnished by Analog Devices is believed to be accurate and reliable. However, "Circuits from the Lab" are supplied "as is" and without warranties of any kind, express, implied, or statutory including, but not limited to, any implied warranty of merchantability, noninfringement or fitness for a particular purpose and no responsibility is assumed by Analog Devices for their use, nor for any infringements of patents or other rights of third parties that may result from their use. Analog Devices reserves the right to change any "Circuits from the Lab" at any time without notice, but is under no obligation to do so. Trademarks and registered trademarks are the property of their respective owners. ©2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. CN08654-0-10/09(0) Rev. 0 | Page 3 of 3