<1 Ω CMOS, 1.8 V to 5.5 V, Dual SPST Switches ADG821/ADG822/ADG823

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<1 Ω CMOS, 1.8 V to 5.5 V,
Dual SPST Switches
ADG821/ADG822/ADG823
FUNCTIONAL BLOCK DIAGRAMS
0.8 Ω maximum on resistance @ 125°C
0.3 Ω maximum on resistance flatness @ 125°C
1.8 V to 5.5 V single supply
200 mA current carrying capability
Automotive temperature range: −40°C to +125°C
Rail-to-rail operation
8-lead MSOP
33 ns switching times
Typical power consumption: <0.01 μW
TTL-/CMOS-compatible inputs
Pin-compatible with the ADG721/ADG722/ADG723
ADG821
ADG822
S1
S1
IN1
IN1
D1
D1
D2
D2
IN2
IN2
SWITCHES SHOWN FOR
A LOGIC 0 INPUT.
S2
02851-001
S2
SWITCHES SHOWN FOR
A LOGIC 0 INPUT.
Figure 1.
02851-002
FEATURES
Figure 2.
ADG823
APPLICATIONS
S1
Power routing
Battery-powered systems
Communication systems
Data acquisition systems
Audio and video signal routing
Cellular phones
Modems
PCMCIA cards
Hard drives
Relay replacement
IN1
D1
D2
IN2
SWITCHES SHOWN FOR
A LOGIC 0 INPUT.
02851-003
S2
Figure 3.
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
The ADG821/ADG822/ADG823 are monolithic CMOS singlepole, single-throw (SPST) switches. These switches are designed
on an advanced submicron process that provides low power
dissipation, yet gives high switching speed, low on resistance,
and low leakage currents.
1.
2.
3.
4.
5.
The ADG821/ADG822/ADG823 are designed to operate from
a single 1.8 V to 5.5 V supply, making them ideal for use in
battery-powered instruments.
6.
Very Low On Resistance: 0.5 Ω typ.
On Resistance Flatness (RFLAT(ON)): 0.15 Ω typ.
Automotive Temperature Range: −40°C to +125°C.
Current Carrying Capability: 200 mA.
Low Power Dissipation. CMOS construction ensures low
power dissipation.
8-Lead MSOP.
Each switch of the ADG821/ADG822/ADG823 conducts
equally well in both directions when on. The ADG821/
ADG822/ADG823 contain two independent SPST switches.
The ADG821 and ADG822 differ only in that both switches are
normally open and normally closed, respectively. In the ADG823,
Switch 1 is normally open and Switch 2 is normally closed. The
ADG823 exhibits break-before-make switching action.
The ADG821/ADG822/ADG823 are available in an
8-lead MSOP.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2002–2008 Analog Devices, Inc. All rights reserved.
ADG821/ADG822/ADG823
TABLE OF CONTENTS
Features .............................................................................................. 1
ESD Caution...................................................................................5
Applications ....................................................................................... 1
Pin Configuration and Function Descriptions..............................6
Functional Block Diagrams ............................................................. 1
Typical Performance Characteristics ..............................................7
General Description ......................................................................... 1
Test Circuits ........................................................................................9
Product Highlights ........................................................................... 1
Terminology .................................................................................... 11
Revision History ............................................................................... 2
Outline Dimensions ....................................................................... 12
Specifications..................................................................................... 3
Ordering Guide .......................................................................... 12
Absolute Maximum Ratings............................................................ 5
REVISION HISTORY
4/08—Rev. 0 to Rev. A
Updated Format .................................................................. Universal
Added Table 6.................................................................................... 6
Updated Outline Dimensions ....................................................... 12
Changes to Ordering Guide .......................................................... 12
8/02—Revision 0: Initial Version
Rev. A | Page 2 of 12
ADG821/ADG822/ADG823
SPECIFICATIONS
VDD = 5 V ± 10%, GND = 0 V; TA = −40°C to +125°C, unless otherwise noted.
Table 1.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
On Resistance Match Between
Channels (ΔRON)
On Resistance Flatness (RFLAT(ON))
LEAKAGE CURRENTS
Source Off Leakage, IS (Off )
Drain Off Leakage, ID (Off )
Channel On Leakage, ID, IS (On)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS 2
tON
tOFF
Break-Before-Make Time Delay, tBBM
(ADG823 Only)
Charge Injection
Off Isolation
Channel-to-Channel Crosstalk
Bandwidth −3 dB
CS (Off )
CD (Off )
CD, CS (On)
POWER REQUIREMENTS
IDD
25°C
−40°C to
+85°C
0 V to VDD
0.5
0.6
0.16
0.2
0.15
0.23
±0.01
±0.25
±0.01
±0.25
±0.01
±0.25
0.7
0.8
0.25
0.28
0.26
0.3
2
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
Test Conditions/Comments
VS = 0 V to VDD, IS = 100 mA, see Figure 17
VS = 0 V to VDD, IS = 100 mA
VS = 0 V to VDD, IS = 100 mA
VDD = 5.5 V
VS = 4.5 V/1 V, VD = 1 V/4.5 V, see Figure 18
±3
±25
±3
±25
±3
±25
2.0
0.8
V min
V max
μA typ
μA max
pF typ
VIN = VINL or VINH
±0.1
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
MHz typ
pF typ
pF typ
pF typ
RL = 50 Ω, CL = 35 pF, VS = 3 V, see Figure 20
0.005
4
33
45
11
16
32
Unit
nA typ
nA max
nA typ
nA max
nA typ
nA max
48
52
19
21
1
15
−52
−82
24
85
98
230
0.001
1.0
1
−40°C to
+125°C 1
2.0
On resistance parameters tested with IS = 10 mA.
Guaranteed by design, not subject to production test.
Rev. A | Page 3 of 12
μA typ
μA max
VS = 4.5 V/1 V, VD = 1 V/4.5 V, see Figure 18
VS = VD = 1 V, or VS = VD = 4.5 V, see Figure 19
RL = 50 Ω, CL = 35 pF, VS = 3 V, see Figure 20
RL = 50 Ω, CL = 35 pF, VS1 = VS2 = 3 V,
see Figure 21
VS = 2.5 V; RS = 0 Ω, CL = 1 nF, see Figure 22
RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 23
RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 24
RL = 50 Ω, CL = 5 pF, see Figure 25
f = 1 MHz
f = 1 MHz
f = 1 MHz
VDD = 5.5 V, digital inputs = 0 V or 5.5 V
ADG821/ADG822/ADG823
VDD = 2.7 V to 3.6 V, GND = 0 V, TA = −40°C to +125°C, unless otherwise noted.
Table 2.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
On Resistance Match Between
Channels (ΔRON)
On Resistance Flatness (RFLAT(ON))
LEAKAGE CURRENTS
Source Off Leakage, IS (Off )
Drain Off Leakage, ID (Off )
Channel On Leakage, ID, IS (On)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS 2
tON
tOFF
Break-Before-Make Time Delay, tBBM
(ADG823 Only)
Charge Injection
Off Isolation
Channel-to-Channel Crosstalk
Bandwidth −3 dB
CS (Off )
CD (Off )
CD, CS (On)
POWER REQUIREMENTS
IDD
25°C
−40°C to
+85°C
0 V to VDD
0.7
1.4
0.16
0.2
0.3
±0.01
±0.25
±0.01
±0.25
±0.01
±0.25
1.5
1.6
0.25
0.28
0.33
2
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Test Conditions/Comments
VS = 0 V to VDD, IS = 100 mA, see Figure 17
VS = 0 V to VDD, IS = 100 mA
VS = 0 V to VDD, IS = 100 mA
VDD = 3.6 V
VS = 3.3 V/1 V, VD = 1 V/3.3 V, see Figure 18
±15
±3
±25
±3
±25
nA typ
nA max
nA typ
nA max
nA typ
nA max
2.0
0.8
V min
V max
VIN = VINL or VINH
±0.1
μA typ
μA max
pF typ
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
MHz typ
pF typ
pF typ
pF typ
RL = 50 Ω, CL = 35 pF, VS = 1.5 V, see Figure 20
0.005
4
48
67
12
18
40
Unit
±3
74
78
20
23
1
±2
−52
−82
24
85
98
230
0.001
1.0
1
−40°C to
+125°C 1
2.0
On resistance parameters tested with IS = 10 mA.
Guaranteed by design, not subject to production test.
Rev. A | Page 4 of 12
μA typ
μA max
VS = 3.3 V/1 V, VD = 1 V/3.3 V, see Figure 18
VS = VD = 1 V, or 3.3 V, see Figure 19
RL = 50 Ω, CL = 35 pF, VS = 1.5 V, see Figure 20
RL = 50 Ω, CL = 35 pF, VS1 = VS2 = 1.5 V,
see Figure 21
VS = 1.5 V; RS = 0 Ω, CL = 1 nF, see Figure 22
RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 23
RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 24
RL = 50 Ω, CL = 5 pF, see Figure 25
f = 1 MHz
f = 1 MHz
f = 1 MHz
VDD = 3.6 V, digital inputs = 0 V or 3.6 V
ADG821/ADG822/ADG823
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 3.
Parameter
VDD to GND
Analog Inputs1
Digital Inputs1
Peak Current, S or D
Continuous Current, S or D
Operating Temperature Range
Automotive
Storage Temperature Range
Junction Temperature (TJ max)
Package Power Dissipation
8-Lead MSOP Thermal Impedance
θJA
θJC
Lead Temperature,
Soldering (10 sec)
IR Reflow, Peak Temperature (<20
sec)
1
Rating
−0.3 V to +7 V
−0.3 V to VDD + 0.3 V or 30 mA,
whichever occurs first
−0.3 V to VDD + 0.3 V or 30 mA,
whichever occurs first
400 mA (pulsed at 1 ms,
10% duty cycle maximum)
200 mA
−40°C to +125°C
−65°C to +150°C
150°C
(TJ max − TA)/θJA
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Table 4. Truth Table for the ADG821/ADG822
ADG821 INx
0
1
ADG822 INx
1
0
Switch x Condition
Off
On
Table 5. Truth Table for the ADG823
IN1
0
0
1
1
206°C/W
44°C/W
300°C
IN2
0
1
0
1
ESD CAUTION
235°C
Overvoltages at IN, S, or D are clamped by internal diodes. Current should be
limited to the maximum ratings given.
Rev. A | Page 5 of 12
Switch S1
Off
Off
On
On
Switch S2
On
Off
On
Off
ADG821/ADG822/ADG823
S1
1
D1
2
IN2
3
GND
4
ADG821/
ADG822/
ADG823
TOP VIEW
(Not to Scale)
8
VDD
7
IN1
6
D2
5
S2
02851-004
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Figure 4. Pin Configuration
Table 6. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
Mnemonic
S1
D1
IN2
GND
S2
D2
IN1
VDD
Description
Source Terminal. This pin can be an input or output.
Drain Terminal. This pin can be an input or output.
Logic Control Input.
Ground (0 V) Reference.
Source Terminal. This pin can be an input or output.
Drain Terminal. This pin can be an input or output.
Logic Control Input.
Most Positive Power Supply Potential.
Rev. A | Page 6 of 12
ADG821/ADG822/ADG823
TYPICAL PERFORMANCE CHARACTERISTICS
0.8
0.8
TA = 25°C
VDD = 2.7V
0.7
0.7
VDD = 3.0V
+125°C
VDD = 3.3V
ON RESISTANCE (Ω)
ON RESISTANCE (Ω)
+85°C
0.6
0.6
VDD = 4.5V
0.5
0.4
0.3
VDD = 5.0V
0.5
0.4
+25°C
0.3
–40°C
0.2
0.2
VDD = 5.5V
0.1
0.1
0
0
1
2
3
VD, VS (V)
4
5
0
Figure 5. On Resistance vs. VD, VS
1.0
1.5
VD, VS (V)
2.0
2.5
3.0
Figure 8. On Resistance vs. VD, VS for Different Temperatures, VDD = 3 V
5.0
8
TA = 25°C
VDD = 5V, 3V
4.5
7
4.0
6
3.5
VDD = 1.8V
CURRENT (nA)
3.0
2.5
2.0
1.5
IS, ID (ON)
5
4
ID (OFF)
3
2
1
1.0
0.5
0
0
–1
0
0.2
0.4
0.6
0.8
1.0
VD, VS (V)
1.2
1.4
1.6
1.8
02851-006
IS (OFF)
0
Figure 6. On Resistance vs. VD, VS; VDD = 1.8 V
20
40
60
80
TEMPERATURE (°C)
100
120 125
02851-009
ON RESISTANCE (Ω)
0.5
02851-008
0
02851-005
VDD = 3V
Figure 9. Leakage Current vs. Temperature
0.8
200
TA = 25°C
VDD = 5V
0.7
150
+125°C
CHARGE INJECTION (pC)
ON RESISTANCE (Ω)
0.6
+85°C
0.5
0.4
0.3
+25°C
0.2
100
50
VDD = 3V
0
VDD = 5V
–50
–100
–40°C
0.1
0
0.5
1.0
1.5
2.0
2.5
3.0
VD, VS (V)
3.5
4.0
4.5
5.0
Figure 7. On Resistance vs. VD, VS for Different Temperatures, VDD = 5 V
Rev. A | Page 7 of 12
–200
0
0.5
1.0
1.5
2.0
2.5
3.0
VS (V)
3.5
4.0
Figure 10. Charge Injection vs. Source Voltage
4.5
5.0
02851-010
0
02851-007
–150
ADG821/ADG822/ADG823
60
–10
TA = 25°C
–20
VDD = 3V
50
ATTENUATION (dB)
–30
TIME (ns)
40
VDD = 5V
tON
30
20
VDD = 3V, 5V
tOFF
–40
–50
–60
–70
–80
–90
10
–20
0
20
40
60
TEMPERATURE (°C)
80
100
120
–110
02851-011
0
–40
0.1
Figure 11. tON/tOFF vs. Temperature
1.8
VDD = 3V, 5V
TA = 25°C
1.6
LOGIC THRESHOLD VOLTAGE (V)
–20
–30
–40
–50
–60
1.4
1.2
VIN RISING
1.0
VIN FALLING
0.8
0.6
0.4
0.2
1
10
FREQUENCY (MHz)
100
0
02851-012
–70
0.2
0
Figure 12. Off Isolation vs. Frequency
1
2
3
VDD (V)
4
5
6
Figure 15. Logic Threshold Voltage vs. Supply Voltage
0
0.050
–1
0.045
VS = 5V
V p-p = 2V
RL = 600Ω
0.040
–2
0.035
THD (%)
–3
–4
–5
0.030
0.025
0.020
–6
0.015
–7
0.010
0.005
1
FREQUENCY (MHz)
10
100
02851-013
–8 V = 3V, 5V
DD
TA = 25°C
–9
0.1
20
100
1k
FREQUENCY (Hz)
Figure 16. THD vs. Frequency
Figure 13. On Response vs. Frequency
Rev. A | Page 8 of 12
10k
02851-016
ATTENUATION (dB)
100
Figure 14. Crosstalk vs. Frequency
–10
ATTENUATION (dB)
10
02851-015
0
1
FREQUENCY (MHz)
02851-014
–100
ADG821/ADG822/ADG823
TEST CIRCUITS
IDS
V1
D
A
VD
VS
Figure 17. On Resistance
S
NC
02851-018
RON = V1/IDS
ID (ON)
ID (OFF)
S
A
02851-017
VS
D
D
NC = NO CONNECT
Figure 18. Off Leakage
A
VD
Figure 19. On Leakage
VDD
0.1µF
VIN
ADG821
50%
50%
VIN
ADG822
50%
50%
VDD
S
VS
VOUT
D
CL
35pF
RL
50Ω
IN
90%
VOUT
90%
tOFF
tON
02851-020
GND
Figure 20. Switching Times
VDD
VIN
0.1µF
VDD
VIN
D1
S2
D2
VOUT1
RL2
50Ω
IN1,
IN2
CL2
35pF
RL1
50Ω
VOUT2
CL1
35pF
VOUT1
90%
90%
0V
90%
VOUT2
90%
0V
GND
tBBM
tBBM
Figure 21. Break-Before-Make Time Delay, tBBM (ADG823 only)
VDD
VDD
RS
S
SW ON
D
SW OFF
VOUT
VIN
VS
CL
1nF
IN
GND
VOUT
QINJ = CL × ΔVOUT
Figure 22. Charge Injection
Rev. A | Page 9 of 12
ΔVOUT
02851-021
VS2
S1
50%
02851-022
VS1
50%
0V
02851-019
IS (OFF)
S
ADG821/ADG822/ADG823
VDD
VDD
0.1µF
0.1µF
NETWORK
ANALYZER
VDD
S
S
50Ω
50Ω
VIN
RL
50Ω
GND
VOUT
VIN
VOUT
VS
Figure 23. Off Isolation
0.1µF
NETWORK
ANALYZER
VDD
S1
D
S2
IN
CHANNEL-TO-CHANNEL CROSSTALK = 20 log
R
50Ω
GND
VOUT
VS
02851-024
VS
INSERTION LOSS = 20 log
Figure 24. Channel-to-Channel Crosstalk
Rev. A | Page 10 of 12
VOUT
VOUT WITH SWITCH
VOUT WITHOUT SWITCH
Figure 25. Bandwidth
VDD
50Ω
RL
50Ω
GND
02851-023
OFF ISOLATION = 20 log
RL
50Ω
VS
D
D
VOUT
50Ω
IN
VS
02851-025
IN
NETWORK
ANALYZER
VDD
ADG821/ADG822/ADG823
TERMINOLOGY
VDD
Most positive power supply potential.
IINL (IINH)
Input current of the digital input.
GND
Ground (0 V) reference.
CS (Off)
Off switch source capacitance.
IDD
Positive supply current.
CD (Off)
Off switch drain capacitance.
S
Source terminal. May be an input or output.
CD, CS (On)
On switch capacitance.
D
Drain terminal. May be an input or output.
tON
Delay between applying the digital control input and the output
switching on.
IN
Logic control input.
tOFF
Delay between applying the digital control input and the output
switching off.
RON
Ohmic resistance between Terminal D and Terminal S.
tBBM
Off time or on time measured between the 90% points of both
switches, when switching from one address state to another.
ΔRON
On resistance match between any two channels (that is,
RON max − RON min).
RFLAT(ON)
Flatness is defined as the difference between the maximum and
minimum value of on resistance as measured over the specified
analog signal range.
Charge Injection
Charge injection is a measure of the glitch impulse transferred
from the digital input to the analog output during switching.
IS (Off)
Source leakage current with the switch off.
Crosstalk
Crosstalk is a measure of unwanted signal that is coupled
through from one channel to another as a result of parasitic
capacitance.
ID (Off)
Drain leakage current with the switch off.
Off Isolation
A measure of unwanted signal coupling through an off switch.
ID, IS (On)
Channel leakage current with the switch on.
Bandwidth
The frequency at which the output is attenuated by −3 dBs.
VD, VS
Analog voltage on Terminal D and Terminal S.
On Response
The frequency response of the on switch.
VINL
Maximum input voltage for Logic 0.
Insertion Loss
The loss due to the on resistance of the switch.
VINH
Minimum input voltage for Logic 1.
Rev. A | Page 11 of 12
ADG821/ADG822/ADG823
OUTLINE DIMENSIONS
3.20
3.00
2.80
8
3.20
3.00
2.80
5
1
5.15
4.90
4.65
4
PIN 1
0.65 BSC
0.95
0.85
0.75
1.10 MAX
0.15
0.00
0.38
0.22
COPLANARITY
0.10
0.23
0.08
8°
0°
0.80
0.60
0.40
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 26. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
ORDERING GUIDE
Model
ADG821BRM
ADG821BRM-REEL
ADG821BRMZ 1
ADG821BRMZ-REEL71
ADG822BRM
ADG822BRM-REEL
ADG822BRM-REEL7
ADG822BRMZ1
ADG822BRMZ-REEL71
ADG823BRM
ADG823BRM-REEL
ADG823BRMZ1
ADG823BRMZ-REEL71
1
Temperature Range
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
Package Description
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
Z = RoHS Compliant Part, # denotes RoHS compliant product may be top or bottom marked.
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registered trademarks are the property of their respective owners.
D02851-0-4/08(A)
Rev. A | Page 12 of 12
Package Option
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
Branding
SQB
SQB
S0P
S0P
SRB
SRB
SRB
S1J
S1J
SSB
SSB
SSB#
SSB#
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