FEATURES
FUNCTIONAL BLOCK DIAGRAM
Low on resistance: 0.8 Ω maximum at 125°C
0.25 Ω maximum on resistance flatness
1.8 V to 5.5 V single supply
200 mA current carrying capability
Automotive temperature range: –40°C to +125°C
Rail-to-rail operation
6-lead SOT-23, 8-lead MSOP, and 6-ball WLCSP packages
Fast switching times
Typical power consumption (<0.01 µW)
TTL-/CMOS-compatible inputs
Pin compatible with the ADG719
ADG819
S2
D
S1
IN
SWITCHES SHOWN
FOR A LOGIC 1 INPUT
02801-001
Data Sheet
0.5 Ω, CMOS,
1.8 V to 5.5 V, 2:1 Mux/SPDT Switch
ADG819
Figure 1.
APPLICATIONS
Power routing
Battery-powered systems
Communication systems
Data acquisition systems
Cellular phones
Modems
PCMCIA cards
Hard drives
Relay replacement
GENERAL DESCRIPTION
The ADG819 is a monolithic, CMOS, single-pole, double-throw
(SPDT) switch. This switch is designed on a submicron process
that provides low power dissipation yet gives high switching
speed, low on resistance, and low leakage currents.
Low power consumption and an operating supply range of
1.8 V to 5.5 V make the ADG819 ideal for battery-powered,
portable instruments.
PRODUCT HIGHLIGHTS
1.
2.
3.
4.
Very low on resistance, 0.5 Ω typical.
1.8 V to 5.5 V single-supply operation.
High current carrying capability.
Tiny 6-lead SOT-23, 8-lead MSOP, and 6-ball, 1.14 mm ×
2.18 mm WLCSP packages.
Each switch of the ADG819 conducts equally well in both
directions when on. The ADG819 exhibits break-before-make
switching action, thus preventing momentary shorting when
switching channels.
The ADG819 is available in a 6-lead SOT-23 package, an 8-lead
MSOP package, and in a 6-ball WLCSP package. This chip
occupies only a 1.14 mm × 2.18 mm area, making it the ideal
candidate for space-constrained applications.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
www.analog.com
Tel: 781.329.4700
Fax: 781.461.3113 ©2002–2012 Analog Devices, Inc. All rights reserved.
ADG819
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
ESD Caution...................................................................................5
Applications ....................................................................................... 1
Pin Configurations and Function Descriptions ............................6
Functional Block Diagram .............................................................. 1
Typical Performance Characteristics ..............................................7
General Description ......................................................................... 1
Test Circuits........................................................................................9
Product Highlights ........................................................................... 1
Terminology .................................................................................... 11
Revision History ............................................................................... 2
Outline Dimensions ....................................................................... 12
Specifications..................................................................................... 3
Ordering Guide .......................................................................... 13
Absolute Maximum Ratings ............................................................ 5
REVISION HISTORY
5/12—Rev. 0 to Rev. A
Updated Format .................................................................. Universal
Deleted ADG820 ................................................................ Universal
Changes to General Description .................................................... 1
Changes to Table 1 ............................................................................ 3
Changes to Table 2 ............................................................................ 4
Change to WLCSP θJA Thermal Impedance Parameter,
Table 3 ................................................................................................ 5
Added Table 5 and Table 6; Renumbered Sequentially ............... 6
Deleted Test Circuit 6; Renumbered Sequentially ....................... 8
Changes to Figure 11 to Figure 14.................................................. 8
Changes to Terminology Section.................................................. 11
Updated Outline Dimensions ....................................................... 12
Changes to Ordering Guide .......................................................... 13
5/02—Revision 0: Initial Version
Rev. A | Page 2 of 16
Data Sheet
ADG819
SPECIFICATIONS
VDD = 5 V ± 10%, GND = 0 V, unless otherwise noted.
Table 1.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance, RON 1
On Resistance Match Between
Channels, ΔRON1
On Resistance Flatness, RFLAT(ON)1
LEAKAGE CURRENTS
Source Off Leakage, IS (Off)
Channel On Leakage, ID, IS (On)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS2
tON
tOFF
Break-Before-Make Time Delay,
tBBM
25°C
−40°C to
+85°C
–40°C to
+125°C
0 V to VDD
0.5
0.6
0.06
0.08
0.1
0.17
±0.01
±0.25
±0.01
±0.25
0.7
0.8
0.1
0.12
0.2
0.25
2
VS = 0 V to VDD, IS = 100 mA
VS = 0 V to VDD, IS = 100 mA
VDD = 5.5 V
VS = 4.5 V/1 V, VD = 1 V/4.5 V; see Figure 17
±10
±3
±25
2.0
0.8
V min
V max
μA typ
μA max
pF typ
VIN = VINL or VINH
±0.1
ns typ
ns max
ns typ
ns max
ns typ
RL = 50 Ω, CL = 35 pF, VS = 3 V; see Figure 19
5
50
55
18
21
20
–71
–72
17
80
300
0.001
1.0
1
Ω max
Ω typ
Ω max
VS = 0 V to VDD, IS = 100 mA; see Figure 16
±3
1
Charge Injection
Off Isolation
Channel-to-Channel Crosstalk
Bandwidth, –3 dB
CS (Off)
CD, CS (On)
POWER REQUIREMENTS
IDD
V
Ω typ
Ω max
Ω typ
Test Conditions/Comments
nA typ
nA max
nA typ
nA max
0.005
35
45
10
16
5
Unit
2.0
ns min
pC typ
dB typ
dB typ
MHz typ
pF typ
pF typ
μA typ
μA max
On resistance parameters tested with IS = 10 mA.
Guaranteed by design; not subject to production test.
Rev. A | Page 3 of 16
VS = VD = 1 V, or VS = VD = 4.5 V; see Figure 18
RL = 50 Ω, CL = 35 pF, VS = 3 V; see Figure 19
RL = 50 Ω, CL = 35 pF, VS1 = VS2 = 3 V; see Figure 20
VS = 2.5 V, RS = 0 Ω, CL = 1 nF; see Figure 21
RL = 50 Ω, CL = 5 pF, f = 100 kHz; see Figure 22
RL = 50 Ω, CL = 5 pF, f = 100 kHz; see Figure 24
RL = 50 Ω, CL = 5 pF; see Figure 23
f = 1 MHz
f = 1 MHz
VDD = 5.5 V, digital inputs = 0 V or 5.5 V
ADG819
Data Sheet
VDD = 2.7 V to 3.6 V, GND = 0 V, unless otherwise noted.
Table 2.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance, RON1
On Resistance Match Between
Channels, ΔRON1
25°C
–40°C to
+85°C
0 V to VDD
0.7
1.4
0.06
1.5
0.13
On Resistance Flatness, RFLAT(ON)1
LEAKAGE CURRENTS
Source Off Leakage, IS (Off)
Channel On Leakage, ID, IS (On)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS2
tON
tOFF
Break-Before-Make Time Delay,
tBBM
–40°C to
+125°C
1.6
0.13
Ω max
Ω typ
±0.01
±0.25
±0.01
±0.25
2
VS = 0 V to VDD, IS = 100 mA; see Figure 16
VS = 0 V to VDD, IS = 100 mA
VS = 0 V to VDD, IS = 100 mA
VDD = 3.6 V
VS = 3.3 V/1 V, VD = 1 V/3.3 V; see Figure 17
±3
±10
±3
±25
2.0
0.8
V min
V max
μA typ
μA max
pF typ
VIN = VINL or VINH
±0.1
ns typ
ns max
ns typ
ns max
ns typ
RL = 50 Ω, CL = 35 pF, VS = 1.5 V; see Figure 19
0.005
5
40
60
10
16
40
Test Conditions/Comments
nA typ
nA max
nA typ
nA max
65
70
18
21
10
−71
−72
17
80
300
0.001
1.0
1
V
Ω typ
Ω max
Ω typ
0.25
1
Charge Injection
Off Isolation
Channel-to-Channel Crosstalk
Bandwidth, –3 dB
CS (Off)
CD, CS (On)
POWER REQUIREMENTS
IDD
Unit
2.0
ns min
pC typ
dB typ
dB typ
MHz typ
pF typ
pF typ
μA typ
μA max
On resistance parameters tested with IS = 10 mA.
Guaranteed by design; not subject to production test.
Rev. A | Page 4 of 16
VS = VD = 1 V, or VS = VD = 3.3 V; see Figure 18
RL = 50 Ω, CL = 35 pF, VS = 1.5 V; see Figure 19
RL = 50 Ω, CL = 35 pF, VS1 = VS2 = 1.5 V; see Figure 20
VS = 1.5 V, RS = 0 Ω,CL = 1 nF; see Figure 21
RL = 50 Ω, CL = 5 pF, f = 100 kHz; see Figure 22
RL = 50 Ω, CL = 5 pF, f = 100 kHz; see Figure 24
RL = 50 Ω, CL = 5 pF; see Figure 23
f = 1 MHz
f = 1 MHz
VDD = 3.6 V, digital Inputs = 0 V or 3.6 V
Data Sheet
ADG819
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted
Table 3.
Parameter
VDD to GND
Analog Inputs1
Digital Inputs1
Peak Current, Sx or D
Continuous Current, Sx or D
Operating Temperature Range
Industrial
Automotive
Storage Temperature Range
Junction Temperature
MSOP
θJA Thermal Impedance
θJC Thermal Impedance
SOT-23 (4-Layer Board)
θJA Thermal Impedance
WLCSP (4-Layer Board)
θJA Thermal Impedance
Lead Temperature, Soldering
(10 sec)
IR Reflow, Peak Temperature
(<20 sec)
1
Rating
−0.3 V to +7 V
−0.3 V to VDD + 0.3 V or 30 mA,
whichever occurs first
−0.3 V to VDD + 0.3 V or 30 mA,
whichever occurs first
400 mA (pulsed at 1 ms, 10%
duty cycle maximum)
200 mA
−40°C to +85°C
−40°C to +125°C
−65°C to +150°C
150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Only one absolute maximum rating can be applied at any
one time.
Table 4. Truth Table for the ADG819
IN
0
1
Switch S1
On
Off
ESD CAUTION
206°C/W
44°C/W
119°C/W
80°C/W
300°C
235°C
Overvoltages at IN, Sx, or D are clamped by internal diodes. Current should
be limited to the maximum ratings given.
Rev. A | Page 5 of 16
Switch S2
Off
On
ADG819
Data Sheet
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
S2
6 S2
Mnemonic
IN
VDD
GND
S1
D
S2
Description
Logic Control Input.
Most Positive Power Supply Potential.
Ground (0 V) Reference.
Source Terminal. Can be an input or output.
Drain Terminal. Can be an input or output.
Source Terminal. Can be an input or output.
D 1
ADG819
8
S2
7
NC
TOP VIEW 6 IN
(Not to Scale)
5 NC
VDD 4
NC = NO CONNECT
02801-004
GND 3
Figure 4. 8-Lead MSOP Pin Configuration
Table 6. 8-Lead MSOP Pin Function Descriptions
Mnemonic
D
S1
GND
VDD
NC
IN
NC
S2
5
GND
3
4
Figure 3. 6-Ball WLCSP Pin Configuration
S1 2
Pin No.
1
2
3
4
5
6
7
8
2
S1
ADG819
Table 5. 6-Lead SOT-23 and 6-Ball WLCSP Pin Function Descriptions
Pin No.
WLCSP
6
5
4
3
2
1
VDD
TOP VIEW
(BUMPS AT THE BOTTOM)
NOT TO SCALE
Figure 2. 6-Lead SOT-23 Pin Configuration
SOT-23
1
2
3
4
5
6
6
D
02801-003
VDD 2 ADG819 5 D
TOP VIEW
GND 3 (Not to Scale) 4 S1
02801-002
IN 1
IN
1
Description
Drain Terminal. Can be an input or output.
Source Terminal. Can be an input or output.
Ground (0 V) Reference.
Most Positive Power Supply Potential.
No Connect. Do not connect to this pin.
Logic Control Input.
No Connect. Do not connect to this pin.
Source Terminal. Can be an input or output.
Rev. A | Page 6 of 16
Data Sheet
ADG819
TYPICAL PERFORMANCE CHARACTERISTICS
1.0
1.0
TA = 25°C
0.9
VDD = 3V
VDD = 2.7V
0.8
TA = +125°C
0.8
0.7
ON RESISTANCE (Ω)
ON RESISTANCE (Ω)
TA = +85°C
VDD = 3V
0.6
0.5
VDD = 3.3V
0.4
VDD = 4.5V
0.3
VDD = 5V
0.6
TA = +25°C
0.4
TA = –40°C
VDD = 5.5V
0.2
0.2
0
1
2
3
VD, VS (V)
4
5
0
0
1.5
2.0
2.5
3.0
VD, VS (V)
Figure 5. On Resistance vs. VD, VS
Figure 8. On Resistance vs. VD, VS for Different Temperatures
1.0
10
VDD = 5V
TA = 25 C
9 VDD = 1.8V
0.8
8
7
ON RESISTANCE (Ω)
ON RESISTANCE (Ω)
1.0
0.5
02801-008
0
02801-005
0.1
6
5
4
3
TA = +125°C
TA = +85°C
0.6
0.4
TA = +25°C
TA = –40°C
0.2
2
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
VD, VS (V)
0
0
02801-006
0
1
2
3
4
5
VD, VS (V)
02801-009
1
0
Figure 9. On Resistance vs. VD, VS for Different Temperatures
Figure 6. On Resistance vs. VD, VS
10
50
VDD = 3V, 5V
40
tON
VDD = 3V
VDD = 5V
TIME (ns)
6
4
ID, IS (ON)
30
20
2
20
40
60
80
100
TEMPERATURE (°C)
120
VDD = 3V, 5V
tOFF
0
–40
–20
0
20
40
60
80
100
TEMPERATURE (°C)
Figure 7. Leakage Currents vs. Temperature
Figure 10. tON/tOFF Times vs. Temperature
Rev. A | Page 7 of 16
120
02801-010
–2
0
10
IS (OFF)
0
02801-007
LEAKAGE CURRENTS (nA)
8
ADG819
Data Sheet
1
250
VDD = 3V, 5V
TA = 25 C
TA = 25°C
200
0
ON RESPONSE (dB)
CHARGE INJECTION (pC)
150
100
50
VDD = 3V
VDD = 5V
0
–50
–1
–2
–3
–4
–100
–5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
VS (V)
–6
0.2
Figure 14. On Response vs. Frequency
1.8
VDD = 5V, 3V
TA= 25°C
TA = 25°C
1.6
LOGIC THRESHOLD VOLTAGE (V)
–10
OFF ISOLATION (dB)
–20
–30
–40
–50
–60
–70
–80
1.4
RISING
1.2
FALLING
1.0
0.8
0.6
0.4
0.2
1
2
FREQUENCY (MHz)
0
0
02801-012
–90
0.1
–10
–20
–30
–40
–50
–60
–70
1
2
02801-013
–80
FREQUENCY (MHz)
2
3
4
5
Figure 15. Logic Threshold Voltage vs. Supply Voltage
0
–90
0.1
1
VDD (V)
Figure 12. Off Isolation vs. Frequency
CROSSTALK (dB)
30
10
FREQUENCY (MHz)
Figure 11. Charge Injection vs. VS (Source Voltage)
0
1
Figure 13. Crosstalk vs. Frequency
Rev. A | Page 8 of 16
6
02801-015
0.5
0
02801-011
–200
02801-014
–150
Data Sheet
ADG819
TEST CIRCUITS
IDS
V1
S
RON = V1 / IDS
D
VD
VS
Figure 17. Off Leakage
Figure 16. On Resistance
ID (ON)
S
D
VD
NC = NO CONNECT
02801-018
NC
Figure 18. On Leakage
VDD
0.1µF
VIN
VDD
90%
VOUT
VS
RL
50Ω
IN
50%
50%
90%
CL
35pF
t OFF
t ON
02801-019
GND
Figure 19. Switching Times
VDD
0.1µF
VDD
VS2
VIN
D
RL
50Ω
S2
IN
VOUT
CL
35pF
VOUT
90%
0V
GND
VIN
50%
0V
50%
90%
t BBM
t BBM
QINJ = CL
VOUT
02801-020
VS1
S1
Figure 20. Break-Before-Make Time Delay, tBBM
VDD
VOUT
VOUT
VDD
VS
VOUT
CL
1nF
IN
SW OFF
VIN
SW ON
VIN
GND
SW OFF
Figure 21. Charge Injection
Rev. A | Page 9 of 16
SW OFF
SW ON
SW OFF
02801-022
RS
02801-017
VS
ID (OFF)
IS (OFF)
D
02801-016
S
ADG819
Data Sheet
VDD
0.1µF
VDD
NETWORK
ANALYZER
S
IN
50Ω
50Ω
D
VS
VOUT
RL
50Ω
GND
OFF ISOLATION = 20 LOG
02801-023
VIN
VOUT
VS
Figure 22. Off Isolation
VDD
0.1µF
VDD
NETWORK
ANALYZER
S
IN
50Ω
VS
VOUT
D
RL
50Ω
GND
VOUT WITH SWITCH
INSERTION LOSS = 20 LOG
VOUT WITHOUT SWITCH
02801-024
VIN
Figure 23. Bandwidth
VDD
0.1µF
NETWORK
ANALYZER
VDD
S1
VOUT
RL
50Ω
50Ω
D
R
50Ω
S2
IN
VS
CHANNEL-TO-CHANNEL CROSSTALK = 20 LOG
VOUT
VS
Figure 24. Channel-to-Channel Crosstalk
Rev. A | Page 10 of 16
02801-025
GND
Data Sheet
ADG819
TERMINOLOGY
tON
Delay between applying the digital control input and the output
switching on.
RON
Ohmic resistance between D and Sx.
ΔRON
On resistance match between any two channels, that is, RON
maximum − RON minimum.
RFLAT(ON)
Flatness is defined as the difference between the maximum and
minimum value of on resistance as measured over the specified
analog signal range.
IS (Off)
Source leakage current with the switch off.
ID, IS (On)
Channel leakage current with the switch on.
VD (VS)
Analog voltage on Terminal D and Terminal S.
VINL
Maximum input voltage for Logic 0.
VINH
Minimum input voltage for Logic 1.
IINL (IINH)
Input current of the digital input.
tOFF
Delay between applying the digital control input and the output
switching off.
tBBM
Off time or on time measured between the 90% points of both
switches when switching from one address state to another.
Charge Injection
A measure of the glitch impulse transferred from the digital
input to the analog output during switching.
Channel-to-Channel Crosstalk
A measure of unwanted signal coupled through from one
channel to another as a result of parasitic capacitance.
Off Isolation
A measure of unwanted signal coupling through an off switch.
Bandwidth
Frequency at which the output is attenuated by −3 dB.
On Response
Frequency response of the on switch.
CS (Off)
Off switch source capacitance.
CD, CS (On)
On switch capacitance.
Rev. A | Page 11 of 16
ADG819
Data Sheet
OUTLINE DIMENSIONS
3.00
2.90
2.80
1.70
1.60
1.50
6
5
4
1
2
3
3.00
2.80
2.60
PIN 1
INDICATOR
0.95 BSC
1.90
BSC
1.30
1.15
0.90
0.20 MAX
0.08 MIN
0.15 MAX
0.05 MIN
10°
4°
0°
SEATING
PLANE
0.50 MAX
0.30 MIN
0.60
BSC
0.55
0.45
0.35
12-16-2008-A
1.45 MAX
0.95 MIN
COMPLIANT TO JEDEC STANDARDS MO-178-AB
Figure 25. 6-Lead Small Outline Transistor Package [SOT-23]
(RJ-6)
Dimensions shown in millimeters
3.20
3.00
2.80
8
3.20
3.00
2.80
1
5.15
4.90
4.65
5
4
PIN 1
IDENTIFIER
0.65 BSC
0.95
0.85
0.75
15° MAX
1.10 MAX
0.40
0.25
6°
0°
0.23
0.09
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 26. 8-Lead mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
Rev. A | Page 12 of 16
0.80
0.55
0.40
10-07-2009-B
0.15
0.05
COPLANARITY
0.10
Data Sheet
ADG819
0.44
0.36
0.28
0.50
BALL PITCH
BALL A1
IDENTIFIER
2
SEATING
PLANE
1
0.32 NOM
A
2.38
2.18
1.98
B
0.59
0.24 MAX
COPLANARITY
TOP VIEW
(BALL SIDE DOWN)
C
0.50
BOTTOM VIEW
(BALL SIDE UP)
0.32
02-03-2012-A
1.34
1.14
0.94
0.67
0.57
0.47
Figure 27. 6-Ball Wafer Level Chip Scale Package [WLCSP]
(CB-6-1)
Dimensions shown in millimeters
ORDERING GUIDE
Model1
ADG819BCBZ-REEL
ADG819BCBZ-REEL7
ADG819BRM
ADG819BRM-REEL
ADG819BRMZ
ADG819BRMZ-REEL7
ADG819BRT-500RL7
ADG819BRT-REEL7
ADG819BRTZ-500RL7
ADG819BRTZ-REEL
ADG819BRTZ-REEL7
1
2
3
Notes
3
3
3
3
3
3
3
3
Temperature Range
–40°C to +85°C
–40°C to +85°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
Package Description
6-Ball Wafer Level Chip Package [WLCSP]
6-Ball Wafer Level Chip Package [WLCSP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
6-Lead Small Outline Transistor Package [SOT-23]
6-Lead Small Outline Transistor Package [SOT-23]
6-Lead Small Outline Transistor Package [SOT-23]
6-Lead Small Outline Transistor Package [SOT-23]
6-Lead Small Outline Transistor Package [SOT-23]
Z = RoHS Compliant Part.
Branding on these packages is limited to three characters due to space constraints.
Contact factory for availability.
Rev. A | Page 13 of 16
Package
Option
CB-6-1
CB-6-1
RM-8
RM-8
RM-8
RM-8
RJ-6
RJ-6
RJ-6
RJ-6
RJ-6
Branding2
SBC
SBC
SNB
SNB
SBC
SBC
SNB
SNB
SBC
SBC
SBC
ADG819
Data Sheet
NOTES
Rev. A | Page 14 of 16
Data Sheet
ADG819
NOTES
Rev. A | Page 15 of 16
ADG819
Data Sheet
NOTES
©2002–2012 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D02801-0-5/12(A)
Rev. A | Page 16 of 16