Circuit Note
CN-0002
Devices Connected/Referenced
Circuit Designs Using Analog Devices Products
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For more information and/or support call 1-800-AnalogD
(1-800-262-5643) or visit www.analog.com/circuit.
AD8376
Ultralow Distortion IF Dual VGA
AD9445
14-Bit, 105 MSPS/125 MSPS ADC
AD9246
14-Bit, 80 MSPS/105 MSPS/125 MSPS ADC
Using the AD8376 VGA to Drive Wide Bandwidth ADCs for
High IF AC-Coupled Applications
CIRCUIT FUNCTION AND BENEFITS
82 Ω load resistors. The 82 Ω load resistors in parallel with the
series-terminated ADC impedance yields the target 150 Ω
differential load impedance, which is recommended to provide
the specified gain accuracy of the AD8376. The load resistors
are ac-coupled from the AD9445 to avoid common-mode dc
loading. The 33 Ω series resistors help to improve the isolation
between the AD8376 and any switching currents present at the
analog-to-digital sample-and-hold input circuitry.
The circuit described in this document provides high
performance, high frequency sampling using the AD8376, a
dual, digitally programmable, ultralow distortion, high output
linearity, variable gain amplifier (VGA) and high speed ADCs.
The AD8376 is optimized for driving high frequency IF
sampling ADCs. When coupled with an ADI high speed ADC
like the AD9445 or AD9246, it provides exceptional SFDR
performance beyond 100 MSPS at its maximum gain.
The output IP3 (third-order intercept point) and noise floor of
the AD8376 essentially remain constant over the 24 dB available
gain range. This is a valuable feature in a variable gain receiver
where it is desirable to maintain a constant instantaneous
dynamic range as the receiver gain is modified. The output
noise density is typically around 20 nV/√Hz, which is
comparable with 14-bit to 16-bit sensitivity limits. The two-tone
IP3 performance of the AD8376 is typically around +50 dBm.
This results in SFDR levels of better than 86 dBc when driving
the AD9445, a 14-bit, 105 MSPS/125 MSPS analog-to-digital
converter, up to 140 MHz input frequency. There are several
configuration options available to the designer when using the
AD8376. The open-collector output provides the capability of
driving a variety of loads. Figure 1 shows a simplified wideband
interface with the AD8376 driving an AD9445. The AD9445 is
CIRCUIT DESCRIPTION
This circuit employs the AD8376 VGA to provide variable gain,
isolation, and source matching to a high speed ADC like the
AD9445. Using this circuit with the AD8376 in a gain of 20 dB
(maximum gain), an SFDR performance of 86 dBc is achieved
at 100 MHz, as indicated in Figure 2.
The AD8376 VGA should be driven differentially (for optimal
performance) by a wideband 1:1 transmission line balun (or
impedance transformer) followed by two 37.4 Ω resistors in
parallel with the 150 Ω input impedance of the AD8376. This
provides a wideband match to a 50 Ω source as depicted in
Figure 1. The open-collector outputs of the AD8376 are biased
through the two 1 μH inductors and are ac-coupled to the two
B0 TO B4
MACOM
ETC1-1-13
50Ω
1µH
0.1µF
1/2
37.4Ω
0.1µF
37.4Ω
AD8376
5V
5V
5V
L
(SERIES) 0.1µF
0.1µF
3.3V
33Ω
VIN+
82Ω
1µH 0.1µF
5
L
(SERIES) 0.1µF
AD9445
33Ω
14
14-BIT ADC
VIN–
82Ω
08154-039
5V 5
A0 TO A4
NOTES
1. ALL PINS AND CONNECTIONS TO AD8376 AND AD9445 NOT SHOWN.
CONSULT PRODUCT DATA SHEETS FOR DETAILED INFORMATION.
Figure 1. Wideband ADC Interfacing Example Featuring the AD8376 and the AD9445
Rev. A
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©2009 Analog Devices, Inc. All rights reserved.
CN-0002
Circuit Note
a 14-bit, 125 MSPS analog-to-digital converter with a buffered
wideband input, which presents a 2 kΩ||3 pF differential load
impedance and requires a 2 V p-p differential input swing to
reach full scale. The addition of the series inductors L (series) in
Figure 1 extends the bandwidth of the system and provides
response flatness. Using 100 nH inductors as L (series), the
wideband system response of Figure 3 is obtained. The
wideband frequency response is an advantage in broadband
applications such as predistortion receiver designs and
instrumentation applications. However, by designing for a wide
analog input frequency range, the cascaded SNR performance is
somewhat degraded due to high frequency noise aliasing into
the wanted Nyquist zone.
0
–1
–2
–3
(dBFS)
–4
–6
–7
–8
SNR = 64.93dBc
SFDR = 86.37dBc
NOISE FLOOR = –108.1dB
FUND = –1.053dBFS
SECOND = –86.18dBc
THIRD = –86.22dBc
–20
–30
–40
(dBFS)
3
+
4
5
6
–130
5.25 10.50 15.75 21.00 26.25 31.50 36.75 42.00 47.25 52.50
FREQUENCY (MHz)
08154-040
–140
0
244
5V
5V
AVDD DVDD
1µH
1nF
1nF
L1
L3
1/2
1nF
165Ω
AD8376
301Ω
C4
C2
CML
L5
165Ω
5
A0 TO A4
1nF
1µH
L1
L3
AD9246
AD9640
AD6655
14
CML
08154-042
50Ω
300
The narrow-band circuit shown in Figure 4 is optimized for
driving some of Analog Devices popular unbuffered input
ADCs, such as the AD9246, AD9640, and AD6655. Table 1
includes antialiasing filter component recommendations for
popular IF sampling center frequencies. Inductor L5 works in
parallel with the on-chip ADC input capacitance and a portion
of the capacitance presented by C4 to form a resonant tank
circuit. The resonant tank helps to ensure the ADC input looks
like a real resistance at the target center frequency. Additionally,
the L5 inductor shorts the ADC inputs at dc, which introduces
a zero into the transfer function. The 1 nF ac coupling
Figure 2. Measured Single-Tone Performance of the Circuit in Figure 1 for a
100 MHz Input Signal and a Sampling Rate of 105 MSPS
MINICIRCUITS
TC3-1T
1:3
272
In general, the SNR improves several dB when including a
reasonable order antialiasing filter. In this example, a low loss
1:3 (impedance ratio) input transformer is used to match the
AD8376’s 150 Ω balanced input to a 50 Ω unbalanced source,
resulting in minimum insertion loss at the input.
–110
–120
–150
132 160 188 216
FREQUENCY (MHz)
An alternative narrow-band approach is presented in Figure 4.
By designing a narrow band-pass antialiasing filter between the
AD8376 and the target ADC, the output noise of the AD8376
outside of the intended Nyquist zone can be attenuated, helping
to preserve the available SNR of the ADC.
–70
2
104
COMMON VARIATIONS
–60
–90
–100
76
Figure 3. Measured Frequency Response of Wideband Circuit in Figure 1
–50
–80
48
08154-041
–10
20
–10
FIRST POINT = –2.93dBFS
END POINT = –9.66dBFS
MID POINT = –2.33dBFS
MIN = –9.66dBFS
MAX = –1.91dBFS
–9
1
0
–5
5V
NOTES
1. ALL PINS AND CONNECTIONS TO AD8376 AND AD9445 NOT SHOWN.
CONSULT PRODUCT DATA SHEETS FOR DETAILED INFORMATION.
Figure 4. Narrow-Band IF Sampling Solution for Unbuffered Switched Capacitor ADC Inputs
Rev. A | Page 2 of 3
Circuit Note
CN-0002
capacitors and the 1 µH bias chokes introduce additional zeros
into the transfer function. The final overall frequency response
takes on a band-pass characteristic, helping to reject noise
outside of the intended Nyquist zone. Table 1 provides initial
suggestions for prototyping purposes. Some empirical
optimization may be needed to help compensate for actual PCB
parasitics. Details of designing the interstage filters can be
found in the application notes referenced in the Learn More
section.
The circuit in Figure 1 requires 1% resistors for the two 37.4 Ω
values (1/10 watt). Other resistors can be 10% (1/10 watt).
Capacitors should be 10% ceramic chips. The circuit in Figure 2
requires 1% resistors for the two 165 Ω values (1/10 watt).
Other resistors, capacitors, and inductors can be 10% values.
Excellent layout, grounding, and decoupling techniques must be
utilized in order to achieve the desired performance from the
circuits discussed in this note. As a minimum, a 4-layer PCB
should be used with one ground plane layer, one power plane
layer, and two signal layers.
All IC power pins must be decoupled to the ground plane with
low inductance multilayer ceramic capacitors (MLCC) of
0.01 µF to 0.1 µF (this is not shown in the diagrams for
simplicity). Follow the recommendations on the individual data
sheets for the ICs referenced in the Learn More section.
The product evaluation boards should be consulted for
recommended layout and critical component placement. These
can be accessed through the main product pages for the devices
(see the Learn More section).
The “A” and “B” digital inputs and ENBA, ENBB, should not be
more than 0.6 V more positive than the AD8376 power supply
or more than 0.6 V below ground. This is to prevent damaging
the internal ESD protection diodes of the AD8376. This will not
occur if the power to the logic driving the AD8376 is derived
from the same power supply that powers the AD8376. The
AD8376 is not susceptible to latch-up because it is
manufactured on a bipolar process.
Even though the AD8376 and the AD9445 (or other ADC) may
be powered from different supplies, sequencing is not an issue
because the input signal to the ADC is ac-coupled.
The individual data sheet for the ADC should be consulted
regarding the proper sequencing of the AVDD and the DVDD
power supplies (if separate supplies are used).
Table 1. Interface Filter Recommendations for Various IF
Sampling Frequencies
Center
Frequency
96 MHz
140 MHz
170 MHz
211 MHz
1 dB
Bandwidth
27 MHz
30 MHz
32 MHz
32 MHz
L1
(nH)
390
330
270
220
C2
(pF)
5.6
3.3
2.7
2.2
L3
(nH)
390
330
270
220
C4
(pF)
22
20
20
18
L5
(nH)
100
56
39
27
LEARN MORE
Kester, Walt. High Speed System Applications. Chapter 2
(Optimizing Data Converter Interfaces). Analog
Devices. 2006.
Kester, Walt. The Data Conversion Handbook. Chapters 6, 7.
Analog Devices. 2005.
Kester, Walt, James Bryant, and Mike Byrne. MT-031 Tutorial,
Grounding Data Converters and Solving the Mystery of
AGND and DGND. Analog Devices.
MT-036 Tutorial, Op Amp Output Phase Reversal and Input
Overvoltage Protection. Analog Devices.
MT-073 Tutorial, High Speed Variable Gain Amplifiers. Analog
Devices.
MT-101 Tutorial, Decoupling Techniques. Analog Devices.
Newman, Eric and Rob Reeder. AN-827 Application Note,
A Resonant Approach to Interfacing Amplifiers to SwitchedCapacitor ADCs. Analog Devices.
Reeder, Rob. AN-742 Application Note, Frequency Domain
Response of Switched Capacitor ADCs. Analog Devices.
Data Sheets and Evaluation Boards
AD8376 data sheet.
AD8376 evaluation board.
AD9246 data sheet.
AD9246 evaluation board.
AD9445 data sheet.
AD9445 evaluation board.
REVISION HISTORY
4/09—Rev. 0 to Rev. A
Updated Format ................................................................. Universal
10/08—Revision 0: Initial Version
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©2009 Analog Devices, Inc. All rights reserved. Trademarks and
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CN08154-0-4/09(A)
Rev. A | Page 3 of 3