design
ideas
Edited by Bill Travis
Make noise with a PIC
Peter Guettler, APS Software Engineering GmbH, Cologne, Germany
uilding a stable noise generator
for audio-frequency purposes requires only a few components. The
circuit in Figure 1 relies on linear-feedback shift registers and some simple software. An eight-pin Microchip (www.
microchip.com) PIC12C508 controller
(IC2) with a short program generates
pseudorandom noise at its output pin,
GP0. A single controller is sufficient for
simple applications. To obtain Gaussiandistributed noise, you can use a number
of identical PIC controllers in parallel in
a true realization of the central-limit theorem. (The central-limit theorem states
that the sum of an infinite number of
noise sources has Gaussian distribution,
regardless of the individual noise distribution of each generator.) Using an infinite number of noise generators is impractical, but 10 to 16 are sufficient in
most cases. And, because the smallest
member of the PIC family is an inexpensive chip with low current consumption,
the circuit is easy to realize.
All noise generators run the same program (Listing 1 on the Web version of
this Design Idea at www.edn.com). Perfectionists might program each PIC with
an individual initial value for the shift
register, but, because all controllers run
uncorrelated with their own internal oscillators and start out of reset at different times, this measure is unnecessary.
Op amp IC1A sums and level-shifts the
noise signals. Summing resistors R1 and
R2 must have a value of 10 k times the
number of noise generators you use. The
output signal of IC1A feeds a 3-dB/octave filter to obtain pink noise. Buffer IC1B
decouples the filter and provides low output impedance. The signal amplitude is
B
5V
approximately 400 mV p-p with a flat
spectral distribution of 20 Hz to 20 kHz.
Closing S1 or applying a low level at pin
GP4 immediately stops all noise generators and freezes the prevailing signal amplitude. You can download the PIC software from the Web version of this Design
Idea at www.edn.com.왏
Make noise with a PIC ..................................77
Circuit provides linear
resistance-to-time conversion ....................78
PC-configurable RLC resonator yields
single-output filter..........................................82
Single IC provides gains
of 10 and 10 ..............................................86
Publish your Design Idea in EDN. See the
What’s Up section at www.edn.com.
5V
10k
1
VDD
GP5/CIN
GP4/COUT
GP3/MC
IC2
GP2
PIC12C508P
GP1
8
VSS
GP0
2
3
4
5
6
7
R1
nR
R
5V
5V
ADDITIONAL
PICs
8
10k
1
GP5/CIN
GP4/COUT
GP3/MC
IC3
GP2
PIC12C508P
GP1
8
GP0
VSS
VDD
6 _
2 _
2
3
4
5
6
7
IC1A
TL072P
3 +
1
2
0.1 µF
DISABLE
220
VOUT
PINK NOISE
400 mV P-P
300
1k
5V
3.3k
nR
S1
7
4
3k
R2
IC1B
TL072P
5 +
6.8k
1 µF 0.27 µF
47 nF
47 nF
33 nF
1
NOISE
GENERATORS
Figure 1
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SUMMING AMPLIFIER
–3-dB/OCTAVE FILTER
OUTPUT BUFFER
This simple circuit generates Gaussian-distributed noise for audio applications.
August 7, 2003 | edn 77
design
ideas
Circuit provides linear
resistance-to-time conversion
S Kaliyugavaradan and D Arul Raj, Anna University, Chennai, India
esistance-based transducers, such
as strain gauges and piezoresistive
devices, find common use in the
measurement of several physical parameters. For applications in which digital
processors or microcontrollers serve for
data acquisition and signal processing,
the transducer’s response must assume a
form suitable for conversion to digital
format. It is desirable to convert the resistance change of such sensors into a
proportional frequency or a time interval
so that you can easily obtain an output
in digital form, using a counter/timer.
The circuit of Figure1 linearly converts
the sensor resistance, RS, into a proportional time period. The circuit is essentially a relaxation oscillator, comprising a
current source, a bridge amplifier, a comparator, and a flip-flop. The current, IS,
divides in the paths of R1 and R2 as if the
two resistors were connected in parallel.
Assuming ideal op amps, the circuit functions as an oscillator when RX (R4RS) is
greater than R1R3/R2.
The circuit produces waveforms at the
input and output of the comparator, IC2
(Figure 2). T1 and T2 are the time intervals
for which the comparator’s output assumes levels VS1 and VS2, respectively.
The output voltage from IC2, with its lev-
els changed via a zener-diode
circuit, serves as clock input to
a D flip-flop. From the 7474
VS1
flip-flop, you obtain a squarewave output that is high and
COMPARATOR
t
low alternately for a time peOUTPUT VOLTAGE 0
T1T2
T1
riod T4C(R2RXR1R3)/R1.
This equation indicates that
VS2
the circuit converts a change
in sensor resistance into a
proportional time period
T with sensitivity
Figure 2
T/RS4C(R2/R1).
The following salient features
of Figure 1 merit mention:
kIS
● The sensor is grounded;
you can easily vary the conCOMPARATOR
t
INPUT VOLTAGE 0
version sensitivity by varying
T1
T1T2
either R1 or R2.
● You can adjust the offset
kIS
value, T0 (about which
changes in T occur because
of a change in the sensor’s
resistance), by changing These waveforms represent the input and output of
either R3 or R4 without af- comparator IC2.
fecting the conversion sensi● Thanks to the current source, the
tivity.
● The offset voltages of the op amps al- output is largely insensitive to noise voltter T1 and T2 in opposite ways, such that ages in the line of the current source and
their overall effect on T(T1T2) is not ap- to changes that occur in VS1 and VS2.
preciable.
Consider the example of converting a
R
OFFSET ADJUST
R3
D2
D1
34.3k
SENSITIVITY
ADJUST
IS
65.4k
R1
2
3
D
6
4
5
OUTPUT
7474
7
3 +
LF 411
+
Q
V0UT
VCC
15V
IC1
2k
2 _
6
IC2
LF411
R5
Q
3
6
CLK
10k
4
D4
R4
1k
RX
Figure 1
1 µF
7
2 _
D3
FF
VCC
15V
R2
IN5287
C
VEE
–15V
RS
(SENSOR)
Pt 100)
VEE
–15V
5V
ZENER
NOTE: D1, D2, D3, AND D4 ARE IN4002s.
This simple circuit converts a resistance reading to a time period.
78 edn | August 7, 2003
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design
ideas
Pt-100 (platinum RTD) sensor in the
range of 119.4 to 138.51, which corresponds to a temperature range of 50 to
100C, into time periods of 10 to 12.5
msec. The design is simple. Because the
current through the sensor is a fraction
of IS, IS should be low enough to keep the
self-heating error to an acceptably low
level. This design uses an IN5287 current
regulator; it provides an IS of approximately 0.33 mA and has a dynamic impedance better than 1.35 M. For a better current source, you could use a circuit
based on a voltage-regulator IC. In the
next step, with suitable and practical fixed
values for R1 and C, you adjust R2 until
you obtain the needed sensitivity: 130.82
sec/. Following this step, with a fixed
R4, you adjust R3 to obtain the offset required in the output (T). Figure 1 shows
the values of components for this example. The resistors all have 1% tolerance
and 0.25W rating, and C is a polycarbonate capacitor.왏
PC-configurable RLC resonator yields
single-output filter
Saurav Gupta, New Delhi, India
OUTPUT
his Design Idea presTRANSCONDUCTANCE
S5
ents a versatile filter cirAMPLIFIER
D6 TO D9
S6
cuit for low-powerS7
consumption instrumenPC
VOUT
D2 TO D5
PORT
S8
tation that you can proR
gram from your PC using
the parallel port. The cirD2
cuit uses analog switches
1k
S1
and latches instead of digiD3
R
tal potentiometers for the
1
2.2k
S2
D4
digital control (figures 1
10k
S3
and 2). By running simple
C1
D5
VIN
100k
S4
software code on the PC,
10V
R
you can configure a single
robust design to work as a
_
lowpass, highpass, or bandR2
+
pass filter, and you can also
select the desired center fre10V
10V
quency, 0 (Listing 1). UnR3
like a similarly controllable
design (Reference 1), this
LP
C2
design is a single-outFigure 1
10V
put-at-a-time filter.
PCMany power-sensitive sys- A PC-configurable filter uses a synthesized
R5
PROGRAMMABLE
tems do not require simul- inductor and analog switches to determine
INDUCTOR
taneous-filter functions.
filter type and center frequency.
The design exploits the
fact that a series RLC resonator can pro- Figure 1, the inductor, LP, is implement- upon the state of switches S1 through S4
vide various filter functions with its ele- ed as a PC-controlled synthesized induc- (determined by PC-port data bits D2
ments. Because the design is based on an tor. The value of the inductor is through D5). The expression for the freRLC section, it is trivial to convert the de- LPC2RPR3R5/R2. Here, RP can assume quency is 0(R2/C1RPR3R5)1/2. You can
sign into a PC-controlled resonator. In any of 15 possible values, depending thus effectively select 15 frequency values.
(This design uses 12 values of practical
interest.) Data bits D6 through D9 from
TABLE 1—REPRESENTATIVE PORT SETTINGS AND FILTER PARAMETERS
the PC’s parallel port set the state of anaPort setting
Filter type/center
Hex output
log switches S5 through S8. The state of
frequency
D9
D8
D7
D6
D5
D4
D3
D2
from PC
Lowpass/9.93 kHz
0
0
1
1
0
1
0
0
X34
the switches determines the type of filHighpass/22.9 kHz
1
0
1
0
0
1
1
0
XA6
ter.
Bandpass/3.16 kHz
0
1
0
1
1
0
0
0
X58
Figure 3 shows the software-generated
Bandpass/37.3 kHz
0
1
0
1
0
1
1
1
X57
display for the circuit. This design uses a
T
P
_
+
82 edn | August 7, 2003
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design
ideas
1k
14
15
16
17
18
19
20
21
22
23
24
25
1
2
3
4
5
6
7
8
9
10
11
12
13
OC
1D
2D
3D
4D
5D
6D
7D
8D
GND
VCC
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
EN
74573
100k
IN1
D1
S1
V
GND
S4
D4
IN4
IN2
D2
S2
V
NC
S3
D3
IN3
2.2k
_
+
10k
DG308
C1
0.1 F
IN1
D1
S1
V
GND
S4
D4
IN4
IN2
D2
S2
V
NC
S3
D3
IN3
R2
100k
R3
100
C2
0.1 F
R5
1k
_
R1
4.7k
1/2
OPA2241
VIN
DG308
50
Figure 2
You must take the finite on-resistance value of
the analog switches into account in determining
the center frequency of the filter.
1/2
OPA2241
50
500
V+
V+
IN+ IOUT
Z+
V+
NC
ISET
Z
V
IN
NC
V
V
+
VOUT
500
MAX436
9.93-kHz bandpass filter for demonstration and testing. Increasing the number
of analog switches can provide a wider
range. Moreover, you could use additional switches for gain programmability. The 74573 latch provides the interface
to the PC. Table 1 shows the port/switch
settings for a few frequency and filtertype selections. Note that the analog
switches (DG308) have a finite operating
on-resistance of approximately about
110; you must take this resistance into
account when you calculate the center
frequency. For precision instrumentation, other switches are available with
operating on-resistances as low as 30 to
50. You can download Listing 1 from
the Web version of this Design Idea at
www.edn.com.왏
Figure 3
This user-friendly configuration screen allows you to determine filter type and
frequency.
84 edn | August 7, 2003
Reference
1. Gupta, Saurav, and Tejinder Singh,
“PC-based configurable filter uses no
digital potentiometers,” EDN, Jan 23,
2003, pg 76.
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design
ideas
Single IC provides gains of 10 and 10
Moshe Gerstenhaber and Charles Kitchin, Analog Devices, Wilmington, MA
eal-world data-acquisition systems require amplifying weak signals to match the full-scale input
range of an A/D converter. Unfortunately, when you configure them as gain
blocks, most common amplifiers have
both gain errors and offset drift. The typical two-resistor gain-setting arrangement found in many op-amp circuits has
serious accuracy and drift limitations.
With standard 1% resistors, the circuit
gain can be off by as much as 2%. Also,
the gain can vary with temperature, because each resistor drifts differently. You
can use monolithic resistor networks for
precise gain setting, but these components are expensive and consume valuable pc-board space. The circuits of figures 1 and 2 offer improved performance
and lower cost; they are also smaller. The
R
86 edn | August 7, 2003
single-SOIC approach
15V
is the smallest
0.1 F
Figure 1
available for this
7 VS
function, and the circuits
4
10k
require no external components. Figure 1 shows
AD628
8 100k
10k
–IN
an AD628 precision gain
VOUT
A1
+IN
5
A2
+IN
block connected to pro1 100k
–IN
vide a voltage gain of 10.
10k
The gain block itself
VREF 3
RG 6
comprises two internal
–VG 2
amplifiers: a gain-of-0.1
0.1 F
difference amplifier, A1,
VIN
followed by an uncom–15V
mitted buffer amplifier, This circuit has a precise gain of 10 and uses no external
A2. You can configure it components.
to provide different gains
by strapping or grounding the appropri- nects between the VREF pin (Pin 3) and
ground, instead of to the op amp’s inputs.
ate pins.
For a gain of 10, the input signal con- With the input tied to the VREF pin, the
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design
ideas
voltage at the noninverting input of
A1 equals VIN(100 k/110 k), or
VIN(10/11). The inverting input of A2
(Pin 6) is grounded; therefore, feedback
from the output of A2 forces the noninverting input of A2 to be 0V. The output
of A1 must then also be at 0V. The voltage on the inverting input of A1 must be
equal to the voltage on the noninverting
input of A1, so both equal VIN(10/11).
Thus, the output voltage of A2, VOUT,
equals
VOUT = VIN ×
10  100k 
× 1 +

11 
10k 
10
× 11 = 10 VIN ,
11
providing a precise gain of 10 with no external components.
The companion circuit of Figure 2
provides a gain of 10. This time, the input connects between the inverting input
of A2 (Pin 6) and ground. Operation is
similar to that of Figure 1, but A2 now in= VIN ×
88 edn | August 7, 2003
15V
verts the input signal
0.1 F
Figure 2
by 180. With the
VREF pin grounded, the
7 VS
4
noninverting input of A1
10k
is at 0V, so feedback
AD628
8 100k
forces the inverting input
10k
–IN
VOUT
A1
+IN
5
of A1 to 0V as well. BeA2
+IN
1 100k
–IN
cause A1 operates at a
10k
gain of 0.1, the output of
A2 necessary to force the
VREF 3
RG 6
–VG 2
inverting input of A1 to
0.1 F
0V is 10VIN. The two
connections exhibit difVIN
–15V
ferent input impedances.
When you drive the VREF This companion circuit to the one in Figure 1 delivers
input (Pin 3) for a gain of an accurate gain of 10.
10, the input impedance
to ground is 110 k; it is approximately efficient lower than 5 ppm/C. The 350 G when you drive the noninverting dB bandwidth is approximately 110 kHz
input of A2 (Pin 6) for a gain of 10. All with a 10-mV input and 95 kHz with a
resistors are internal to the gain block, so 100-mV input. Although 15V supplies
both accuracy and drift are excellent. are appropriate, you may operate these
These circuits have gain accuracy better circuits with dual supplies from 2.25V
than 0.1%, with a gain temperature co- to 18V.왏
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