1:2 Single-Ended, Low Cost,
Active RF Splitter
ADA4304-2
FEATURES
FUNCTIONAL BLOCK DIAGRAM
5V
5V
Ideal for CATV and terrestrial applications
Excellent frequency response
1.6 GHz, −3 dB bandwidth
1 dB flatness to 1.0 GHz
Low noise figure: 4.0 dB
Low distortion
Composite second order (CSO): −62 dBc
Composite triple beat (CTB): −72 dBc
1 dB compression point of 8.25 dBm
2.8 dB of gain per output channel
25 dB output-to-output isolation, 50 MHz to 1000 MHz
75 Ω input and outputs
Integrated output resistors
Small package size: 16-lead, 3 mm × 3 mm LFCSP
0.1µF
0.1µF
1µH
VCC
IL
VOUT1
VIN
0.01µF
ADA4304-2
0.01µF
VOUT2
0.01µF
06539-001
GND
Figure 1.
APPLICATIONS
Set-top boxes
Residential gateways
CATV distribution systems
Splitter modules
Digital cable ready (DCR) TVs
GENERAL DESCRIPTION
TA = –40°C
3
2
TA = +85°C
1
TA = +25°C
0
–1
–2
–3
–4
–5
–6
–7
–8
50
100
1000
FREQUENCY (MHz)
4000
06539-011
The ADA4304-2 is fabricated using Analog Devices, Inc.
proprietary silicon-germanium (SiGe), complementary bipolar
process, enabling it to achieve very low levels of distortion with
a noise figure of 4 dB. The part provides a low cost alternative
that simplifies designs and improves system performance by
integrating a signal splitter element and a gain block into a single
IC. The ADA4304-2 is available in a 16-lead LFCSP and operates in
the extended industrial temperature range of −40°C to +85°C.
4
GAIN (dB)
The ADA4304-2 is a 75 Ω active splitter for use in applications
where a lossless signal split is required. Typical applications
include multituner digital set-top boxes, cable splitter modules,
multituner/digital cable ready (DCR) televisions, and home
gateways where traditional solutions require discrete passive
splitter modules with separate fixed gain amplifiers.
Figure 2. Gain (S21, S31) vs. Frequency
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2007 Analog Devices, Inc. All rights reserved.
ADA4304-2
TABLE OF CONTENTS
Features .............................................................................................. 1
Typical Performance Characteristics ..............................................6
Applications....................................................................................... 1
Test Circuits........................................................................................8
Functional Block Diagram .............................................................. 1
Applications........................................................................................9
General Description ......................................................................... 1
Circuit Description .......................................................................9
Revision History ............................................................................... 2
Evaluation Boards .........................................................................9
Specifications..................................................................................... 3
RF Layout Considerations............................................................9
Absolute Maximum Ratings............................................................ 4
Power Supply..................................................................................9
Thermal Resistance ...................................................................... 4
Outline Dimensions ....................................................................... 11
ESD Caution.................................................................................. 4
Ordering Guide .......................................................................... 11
Pin Configuration and Function Descriptions............................. 5
REVISION HISTORY
5/07—Revision 0: Initial Version
Rev. 0 | Page 2 of 12
ADA4304-2
SPECIFICATIONS
VCC = 5 V, 75 Ω system, TA = 25°C, unless otherwise noted.
Table 1.
Parameter
DYNAMIC PERFORMANCE
Bandwidth (−3 dB)
Specified Frequency Range
Gain (S21, S31)
1 dB Gain Flatness
NOISE/DISTORTION PERFORMANCE
Noise Figure 1
Output IP3
Output IP2
Composite Triple Beat (CTB)
Composite Second Order (CSO)
Cross Modulation (CXM)
INPUT CHARACTERISTICS
Input Return Loss (S11)
Output-to-Input Isolation (S12, S13)
OUTPUT CHARACTERISTICS
Output Return Loss (S22, S33)
Output-to-Output Isolation (S23, S32)
1 dB Compression (P1dB)
POWER SUPPLY
Nominal Supply Voltage
Quiescent Supply Current
1
Conditions
Min
Typ
Max
1600
Unit
f = 100 MHz; see Figure 17 and Figure 18
2.8
1000
MHz
MHz
dB
MHz
@ 54 MHz
@ 550 MHz
@ 865 MHz
f1 = 97.25 MHz, f2 = 103.25 MHz
f1 = 97.25 MHz, f2 = 103.25 MHz
135 channels, 15 dBmV/channel, f = 865 MHz
135 channels, 15 dBmV/channel, f = 865 MHz
135 channels, 15 dBmV/channel, 100% modulation
@ 15.75 kHz, f = 865 MHz
See Figure 17, Figure 18, and Figure 19
@ 54 MHz
@ 550 MHz
@ 865 MHz
Either output, 54 MHz to 865 MHz
@ 54 MHz
@ 550 MHz
@ 865 MHz
See Figure 17, Figure 18, and Figure 19
Either output, 54 MHz to 865 MHz
@ 54 MHz
@ 550 MHz
@ 865 MHz
Either output, 54 MHz to 865 MHz
@ 54 MHz
@ 550 MHz
@ 865 MHz
Output referred, f = 100 MHz
4.0
4.5
4.6
26
44.5
−72
−62
−69
dB
dB
dB
dBm
dBm
dBc
dBc
dBc
54
Rev. 0 | Page 3 of 12
−15
−35.5
−13.3
−11
−22
−8
dB
dB
dB
−32
−32
−33
−30
−29
−31
dB
dB
dB
−26.7
−22
−20
−21
−15
−12
dB
dB
dB
dB
dB
dB
dB
dBm
5.25
105
V
mA
−26.7
−25.1
−25
8.25
4.75
Characterized with 50 Ω noise figure analyzer.
865
5.0
88
ADA4304-2
ABSOLUTE MAXIMUM RATINGS
Rating
5.5 V
See Figure 3
−65°C to +125°C
−40°C to +85°C
300°C
150°C
Stresses above those listed under Absolute Maximum
Ratings may cause permanent damage to the device. This is
a stress rating only; functional operation of the device at
these or any other conditions above those indicated in the
operational section of this specification is not implied.
Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
THERMAL RESISTANCE
θJA is specified for the device (including exposed pad)
soldered to a high thermal conductivity 2s2p circuit board,
as described in EIA/JESD 51-7.
Table 3. Thermal Resistance
Package Type
16-Lead LFCSP (Exposed Pad)
θJA
98
Unit
°C/W
PD (MAX) = 5.25 V × 105 mA = 551 mW
Airflow increases heat dissipation, effectively reducing θJA.
In addition, more metal directly in contact with the package
leads/exposed pad from metal traces, through-holes, ground,
and power planes reduces the θJA.
Figure 3 shows the maximum safe power dissipation in the
package vs. the ambient temperature for the 16-lead LFCSP
(98°C/W) on a JEDEC standard 4-layer board.
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
0
10
Maximum Power Dissipation
The maximum safe power dissipation in the ADA4304-2
package is limited by the associated rise in junction
temperature (TJ) on the die. At approximately 150°C,
which is the glass transition temperature, the plastic changes
its properties. Even temporarily exceeding this temperature
limit can change the stresses that the package exerts on the
die, permanently shifting the parametric performance of
the ADA4304-2. Exceeding a junction temperature of 150°C
for an extended period can result in changes in the silicon
devices, potentially causing failure.
20
30
40
50
60
70
AMBIENT TEMPERATURE (°C)
80
90
100
06539-004
Parameter
Supply Voltage
Power Dissipation
Storage Temperature Range
Operating Temperature Range
Lead Temperature (Soldering, 10 sec)
Junction Temperature
The power dissipated in the package (PD) is essentially equal to
the quiescent power dissipation; the supply voltage (VS) times
the quiescent current (IS). In Table 1, the maximum power
dissipation of the ADA4304-2 can be calculated as
MAXIMUM POWER DISSIPATION (W)
Table 2.
Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
ESD CAUTION
Rev. 0 | Page 4 of 12
ADA4304-2
13 NC
PIN 1
INDICATOR
VCC 1
TOP VIEW
(Not to Scale)
GND 5
VIN 4
12 VOUT1
11 GND
10 VOUT2
9 GND
NC 8
GND 3
GND 7
ADA4304-2
GND 6
VCC 2
NC = NO CONNECT
06539-002
14 IL
16 VCC
15 VCC
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Figure 4. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
1, 2, 15, 16
3, 5 to 7, 9, 11
4
8, 13
10
12
14
Mnemonic
VCC
GND
VIN
NC
VOUT2
VOUT1
IL
Rev. 0 | Page 5 of 12
Description
Supply Pin
Ground
Input
No Connection
Output 2
Output 1
Bias Pin
ADA4304-2
TYPICAL PERFORMANCE CHARACTERISTICS
VCC = 5 V, 75 Ω system, TA = 25°C, unless otherwise noted.
–54
10
50 Ω SYSTEM
–56
–58
8
NOISE FIGURE (dB)
CSO (dBc)
–60
TA = +85°C
–62
–64
–66
TA = –40°C
–68
TA = +85°C
TA = +25°C
4
TA = –40°C
TA = +25°C
–70
6
2
50
100
1000
FREQUENCY (MHz)
0
50
06539-005
–74
100
1000
FREQUENCY (MHz)
Figure 5. Composite Second Order (CSO) vs. Frequency
06539-008
–72
Figure 8. Noise Figure vs. Frequency
–60
60
–63
55
–66
50
OUTPUT IP2 (dBm)
CTB (dBc)
–69
–72
TA = +85°C
–75
–78
TA = +25°C
–81
TA = –40°C
45
40
35
30
–84
100
1000
FREQUENCY (MHz)
20
50
100
1000
06539-009
50
06539-007
–90
1000
06539-010
25
–87
FREQUENCY (MHz)
Figure 6. Composite Triple Beat (CTB) vs. Frequency
Figure 9. Output IP2 vs. Frequency
40
–60
–63
35
–66
30
OUTPUT IP3 (dBm)
–72
TA = +85°C
–75
–78
TA = –40°C
–81
TA = +25°C
25
20
15
10
–84
5
–87
–90
50
100
1000
FREQUENCY (MHz)
06539-006
CXM (dBc)
–69
0
50
100
FREQUENCY (MHz)
Figure 10. Output IP3 vs. Frequency
Figure 7. Cross Modulation (CXM) vs. Frequency
Rev. 0 | Page 6 of 12
ADA4304-2
4
0
TA = –40°C
3
–5
2
TA = +25°C
0
–1
–2
–3
–4
–5
–6
–15
–20
–25
–30
1000
4000
FREQUENCY (MHz)
–40
50
06539-011
100
Figure 14. Input Return Loss (S11) vs. Frequency
–30
0
–31
–5
OUTPUT RETURN LOSS (dB)
–32
–34
–35
–36
–37
–38
–10
–15
–20
–25
–30
–35
–39
1000
4000
FREQUENCY (MHz)
–40
50
06539-012
100
1000
FREQUENCY (MHz)
Figure 15. Output Return Loss (S22, S33) vs. Frequency
Figure 12. Output-to-Input Isolation (S12, S13) vs. Frequency
95
0
QUIESCENT SUPPLY CURRENT (mA)
–5
–10
–15
–20
–25
–30
–35
–40
100
1000
4000
FREQUENCY (MHz)
06539-013
ISOLATION (dB)
100
06539-015
ISOLATION (dB)
–33
–45
50
1000
FREQUENCY (MHz)
Figure 11. Gain (S21, S31) vs. Frequency
–40
50
100
06539-014
–35
–7
–8
50
–10
90
85
80
75
70
–60 –50 –40 –30 –20 –10 0
10 20 30 40 50 60 70 80 90 100
TEMPERATURE (°C)
Figure 16. Quiescent Supply Current vs. Temperature
`Figure 13. Output-to-Output Isolation (S23, S32) vs. Frequency
Rev. 0 | Page 7 of 12
06539-016
GAIN (dB)
INPUT RETURN LOSS (dB)
TA = +85°C
1
ADA4304-2
TEST CIRCUITS
RF NETWORK ANALYZER
75Ω S-PARAMETER
TEST SET
VOUT1
VIN
12
PORT 2
10
VOUT2
DUT
PORT 1
PORT 3
75Ω
06539-017
4
Figure 17. Test Circuit for S11, S12, S21, S22 Measurements
RF NETWORK ANALYZER
75Ω S-PARAMETER
TEST SET
VOUT1
PORT 2
12
VIN
75Ω
DUT
PORT 1
10
VOUT2
06539-018
4
PORT 3
Figure 18. Test Circuit for S13, S31, S33 Measurements
RF NETWORK ANALYZER
75Ω S-PARAMETER
TEST SET
VOUT1
12
VIN
PORT 1
PORT 2
DUT
10
VOUT2
75Ω
PORT 3
06539-019
4
Figure 19. Test Circuit for S23, S32 Measurements
Rev. 0 | Page 8 of 12
ADA4304-2
APPLICATIONS
The ADA4304-2 active splitter is primarily intended for use in
the downstream path of television set-top boxes (STBs) that
contain multiple tuners. It is typically located directly after the
diplexer in a bidirectional CATV customer premise unit. The
ADA4304-2 provides a single-ended input and two singleended outputs that allow the delivery of the RF signal to two
different signal paths. These paths can include, but are not
limited to, a main picture tuner, the picture-in-picture (PIP)
tuner, an out-of-band (OOB) tuner, a digital video recorder
(DVR), and a cable modem (CM).
EVALUATION BOARDS
The ADA4304-2 evaluation board allows designers to assess the
performance of the parts in their particular application. The
board includes 75 Ω coaxial connectors and 75 Ω controlledimpedance signal traces that carry the input and output signals.
Power (5 V) is applied to the red VCC loop connector, and
ground is connected to the black GND loop connector. Figure 20 is
a schematic of the ADA4304-2 evaluation board. On the
ADA4304-2 evaluation board, connectors VO1 and VO4 are
not populated.
The ADA4304-2 exhibits composite second order (CSO) and
composite triple beat (CTB) products that are −62 dBc and
−72 dBc, respectively. The use of the SiGe bipolar process also
allows the ADA4304-2 to achieve a noise figure (NF) of 4 dB.
RF LAYOUT CONSIDERATIONS
Appropriate impedance matching techniques are mandatory
when designing circuit boards for the ADA4304-2. Improper
characteristic impedances on traces can cause reflections that
can lead to poor linearity. The characteristic impedance of the
signal trace to the input and from each output should be 75 Ω.
Any ground metal on the top surface near signal lines should be
stitched with vias to the internal ground plane, as shown in
Figure 21.
CIRCUIT DESCRIPTION
The ADA4304-2 consists of a low noise buffer amplifier followed
by a resistive power divider. This arrangement provides 2.8 dB
of gain relative to the RF signal present at the input of the device.
The input and each output must be properly matched to a 75 Ω
environment for distortion and noise performance to match the
data sheet specifications. AC coupling capacitors of 0.01 μF are
recommended for the input and outputs.
POWER SUPPLY
The 5 V supply should be applied to each of the VCC pins and
RF choke via a low impedance power bus. The power bus should
be decoupled to ground using a 10 μF tantalum capacitor and a
0.1 μF ceramic chip capacitor located close to the ADA4304-2. In
addition, the VCC pins should be decoupled to ground with a
0.1 μF ceramic chip capacitor located as close to each of the pins
as possible.
A 1 μH RF choke (Coilcraft chip inductor 0805LS-102X) is
required to correctly bias internal nodes of the ADA4304-2. It
should be connected between the 5 V supply and the IL pin
(Pin 14). The choke should be placed as close as possible to
the ADA4304-2 to minimize parasitic capacitance on the
IL pin, which is critical for achieving the specified bandwidth
and flatness.
VCC
GND
C5
10µF
C1
0.1µF
L1
1.0μH
+
IL
NC
VCC
GND
ADA4304-2
VOUT2
GND
VIN
5
6
GND
11
10
C3
0.01μF
VO2
C4
0.01μF
VO3
9
7 8
06539-003
4
VOUT1
VCC
12
NC
3
VCC
GND
C2
0.01μF
2
GND
VIN
1
GND
C8
0.1µF
VCC
16 15 14 13
NC = NO CONNECT
Figure 20. Evaluation Board Schematic
Rev. 0 | Page 9 of 12
Figure 21. ADA4304-2 Evaluation Board
06539-021
06539-020
ADA4304-2
Figure 22. Evaluation Board Component Layout
Rev. 0 | Page 10 of 12
ADA4304-2
OUTLINE DIMENSIONS
3.00
BSC SQ
0.60 MAX
0.45
PIN 1
INDICATOR
TOP
VIEW
13
12
2.75
BSC SQ
0.80 MAX
0.65 TYP
12° MAX
SEATING
PLANE
PIN 1
INDICATOR
1.25
1.10 SQ
0.95
16 1
EXPOSED
PAD
0.50
BSC
1.00
0.85
0.80
0.50
0.40
0.30
9
(BOTTOM VIEW) 4
8
5
0.25 MIN
1.50 REF
0.05 MAX
0.02 NOM
0.30
0.23
0.18
0.20 REF
COMPLIANT TO JEDEC STANDARDS MO-220-VEED-2
Figure 23. 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
3 mm × 3 mm Body, Very Thin Quad
(CP-16-1)
Dimensions shown in millimeters
ORDERING GUIDE
Model
ADA4304-2ACPZ-RL 1
ADA4304-2ACPZ-R71
ADA4304-2ACPZ-R21
1
Temperature Range
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
Package Description
16-Lead LFCSP_VQ
16-Lead LFCSP_VQ
16-Lead LFCSP_VQ
Z = RoHS Compliant Part.
Rev. 0 | Page 11 of 12
Package Option
CP-16-1
CP-16-1
CP-16-1
Ordering Quantity
5,000
1,500
250
Branding
H0Z
H0Z
H0Z
ADA4304-2
NOTES
©2007 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06539-0-5/07(0)
Rev. 0 | Page 12 of 12