Circuit Note
CN-0048
Devices Connected/Referenced
Circuit Designs Using Analog Devices Products
Apply these product pairings quickly and with confidence.
For more information and/or support call 1-800-AnalogD
(1-800-262-5643) or visit www.analog.com/circuit.
AD7265
Differential/Single-Ended, 12-Bit, 3-Channel
SAR ADC
AD8022
Dual, High Speed, Low Noise Op Amp
OP177
Ultra-Precision Operational Amplifier
AD7265 12-Bit, 3-Channel SAR ADC in Differential and Single-Ended Configurations
Using the AD8022 High Speed Op Amp
CIRCUIT FUNCTION AND BENEFITS
The circuit configurations illustrated in Figure 1 shows how an
AD8022 op amp can be used to convert a bipolar single-ended
signal into a unipolar differential signal that can be applied
directly to the AD7265 analog inputs. The circuit not only
performs the single-ended-to-differential conversion but also level
shifts the output signal to match the ADC input range. The
voltage applied to Point A sets up the common-mode voltage for
each half of the AD8022. The 10 kΩ/20 kΩ divider generates
this voltage (1.67 V) from the AD7265 2.5 V internal reference.
If the on-chip 2.5 V reference on the AD7265 is to be used
elsewhere in a system (as illustrated in Figure 1 and Figure 2), the
output from DCAPA and DCAPB must first be buffered. The
OP177 features the highest precision performance of any op amp
currently available and is a perfect choice for a reference buffer.
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These driver circuits are optimized for dc-coupled applications
requiring low distortion and low noise performance. They
ensure that the maximum AD7265 performance is achieved by
providing adequate settling time, low distortion, and low output
impedance.
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CIRCUIT DESCRIPTION
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The primary negative feedback path is provided by R2 to R1,
and the gain from VIN to VA2 is set by the ratio of R2 to R1. In
this case, the ratio is 0.5. The common-mode voltage of 1.67 V
at the input of the upper half of the AD8022 produces an output
common-mode voltage at VA2 of (1 + R2/R1) × 1.67 V = 2.5 V.
Localized feedback supplied by the R3 and R4 resistors produces a
signal at VA1 that is 180° out of phase with the signal at VA2.
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+2.5V
VIN GND
R1
442Ω
R2
221Ω
+3.75V
+2.5V
+12V
27Ω
AD8022 1/2
R3
221Ω
–2.5V
R5
221Ω
R4
221Ω
A
27Ω
20kΩ
–12V
AD72651
VA2
DCAP A/DCAP B
+1.25V
+12V
10kΩ
0.47µF
1ADDITIONAL PINS OMITTED FOR CLARITY.
VA1
+3.75V
+2.5V
AD8022 1/2
+1.67V
+1.25V
VREF = +2.5V
OP177
–12V
+2.5V
0.47µF
08536-001
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In applications where the signal source has high impedance, it is
recommended to buffer the analog input signal before applying
it to the switched capacitor inputs of the AD7265. This isolates
the source from the transient currents that appear at the input
of the ADC. A dual op amp pair can be used to directly couple a
differential signal to one of the analog input pairs of the AD7265.
The AD8022 is an ideal choice for the dual op amp and has low
power (4 mA/amp), low noise (2.7 nV/√Hz @ 100 kHz), and
low distortion (110 dB SFDR @ 200 kHz). The AD7265 has a
specified minimum acquisition time of 90 ns with a VDD of 5 V.
This is the time from when the part enters track mode until the
next conversion is initiated. The op amp selected must have
adequate settling time to meet the acquisition time requirements of
the AD7265 and achieve the specified performance.
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Figure 1. AD8022 DC-Coupled Circuit to Convert a Bipolar Single-Ended Signal into a Unipolar Differential Signal
(Simplified Schematic: Decoupling and All Connections Not Shown)
Rev. A
Circuits from the Lab™ circuits from Analog Devices have been designed and built by Analog Devices
engineers. Standard engineering practices have been employed in the design and construction of
each circuit, and their function and performance have been tested and verified in a lab environment at
room temperature. However, you are solely responsible for testing the circuit and determining its
suitability and applicability for your use and application. Accordingly, in no event shall Analog Devices
be liable for direct, indirect, special, incidental, consequential or punitive damages due to any cause
whatsoever connected to the use of any Circuits from the Lab circuits. (Continued on last page)
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CN-0048
Circuit Note
LEARN MORE
When the input voltage is 0 V, VA1 and VA2 must be 2.5 V. This
requires a current in both R3 and R4 of (2.5 V – 1.67 V)/221 Ω
= 3.76 mA. The current through R5 is therefore 2 × 3.76 mA =
7.52 mA. Hence, R5 must be equal to R3 and R4 to force the
common-mode voltage at VA1 to be 2.5 V.
3B
MT-031 Tutorial, Grounding Data Converters and Solving the
Mystery of"AGND" and "DGND”. Analog Devices.
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MT-036 Tutorial, Op Amp Output Phase-Reversal and Input
Over-Voltage Protection. Analog Devices.
The AD7265 can have a total of 12 single-ended analog input
channels. The analog input range can be programmed to be
either 0 V to VREF or 0 V to 2 × VREF. Figure 2 shows a typical
connection diagram when operating the ADC in single-ended
mode, where an AD8022 is used to drive a pair of discrete
channels. The AD8021 is a high performance single op amp
that can be used as an alternative to a dual device in very high
performance systems. The absolute value of R is flexible, but it
must be chosen to achieve the desired bandwidth of the op amp.
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MT-074 Tutorial, Differential Drivers for Precision ADCs.
Analog Devices.
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MT-075 Tutorial, Differential Drivers for High Speed ADCs
Overview. Analog Devices.
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MT-076 Tutorial, Differential Driver Analysis. Analog Devices.
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MT-101 Tutorial, Decoupling Techniques. Analog Devices.
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Data Sheets and Evaluation Boards
5B
In both Figure 1 and Figure 2, the AD8022 operates on dual 12 V
supplies while the AD7265 is specified for power supply voltages
of 2.7 V to 5.25 V. Care must be taken to ensure that the input
maximum input voltage limits of the AD7265 are not exceeded
during transient or power-on conditions (see the MT-036 Tutorial).
In addition, the circuit must be constructed on a multilayer PC
board with a large area ground plane. Proper layout, grounding,
and decoupling techniques must be used to achieve optimum
performance (see the MT-031 Tutorial, the MT-101 Tutorial,
and the AD7265 evaluation board layout).
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R
+12V
R
R
OP177 Data Sheet
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REVISION HISTORY
4B
5/10—Rev. 0 to Rev. A
Updated Format .................................................................. Universal
10/08—Revision 0: Initial Version
AD72651
VA1
VA6
R
R
27Ω
1/2
3R
R
+0.625V
AD8022
+12V
VB1
VB6
DCAP A/DCAP B
+12V
+2.5V
PINS OMITTED FOR CLARITY.
OP177
–12V
+2.5V
0.47µF
08536-002
VIN2
27Ω
AD8022
+0.625V
1ADDITIONAL
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+2.50V
+1.25V
0V
1/2
3R
AD8022 Data Sheet
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VIN1
AD7266 Evaluation Board System
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+1.25V
0V
–1.25V
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AD7265 Data Sheet
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Figure 2. AD8022 DC-Coupled Circuit for Single-Ended Input Mode of Operation
(Simplified Schematic: Decoupling and All Connections Not Shown)
COMMON VARIATIONS
2B
The OP07D, an ultralow offset voltage op amp, is a lower cost
alternative to the OP177. It offers similar performance with the
exception of the VOS specification.
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(Continued from first page) Circuits from the Lab circuits are intended only for use with Analog Devices products and are the intellectual property of Analog Devices or its licensors. While you
may use the Circuits from the Lab circuits in the design of your product, no other license is granted by implication or otherwise under any patents or other intellectual property by
application or use of the Circuits from the Lab circuits. Information furnished by Analog Devices is believed to be accurate and reliable. However, "Circuits from the Lab" are supplied "as is"
and without warranties of any kind, express, implied, or statutory including, but not limited to, any implied warranty of merchantability, noninfringement or fitness for a particular
purpose and no responsibility is assumed by Analog Devices for their use, nor for any infringements of patents or other rights of third parties that may result from their use. Analog Devices
reserves the right to change any Circuits from the Lab circuits at any time without notice but is under no obligation to do so.
©2008–2010 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
CN08536-0-5/10(A)
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