EVAL-ADA4350RUZ-P User Guide UG-655 One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Evaluating the ADA4350, a FET Input Analog Front End With ADC Driver Offered in a 28-Lead 9.8 mm × 6.4 mm TSSOP The evaluation board is a 6-layer printed circuit board (PCB) designed to minimize leakage currents with its guard ring features. It accepts SMA edge mounted connectors on the inputs and outputs for efficient connection to test equipment or other circuitry. FEATURES Enables quick breadboarding/prototyping User defined circuit configuration Edge mounted SMA connector provisions Easy connection to test equipment and other circuits Guard ring to minimize leakage currents The evaluation board components are primarily SMT 0603 case size, with the exception of the electrolytic bypass capacitors (C9, C10, and C13), which are 1206 case size. GENERAL DESCRIPTION The EVAL-ADA4350RUZ-P evaluation board is designed to help users evaluate the ADA4350 offered in a 28-lead, 9.8 mm × 6.4 mm thin shrink small outline package (TSSOP). The evaluation board is a populated board that enables users to quickly prototype the best configuration of the analog front end for their systems. Figure 1 shows the component side of the bare evaluation board, and Figure 2 shows the solder side of the bare evaluation board. Figure 10 shows the ADA4350 configured as a transimpedance amplifier with multiple gains when a dual supply is used. Figure 3 and Figure 4 show the signal gain/noise gain of the board when configured as Figure 10. Figure 7 to Figure 9 show the guard ring details. Figure 11 shows the assembly drawing and Figure 12 shows the 6-layer stackup along with the dimensions for each layer. The bill of materials is listed in Table 2. 11998-001 11998-102 DIGITAL PICTURES OF THE EVALUATION BOARD Figure 1. ADA4350 Evaluation Board Component Side PLEASE SEE THE LAST PAGE FOR AN IMPORTANT WARNING AND LEGAL TERMS AND CONDITIONS. Figure 2. ADA4350 Evaluation Board Solder Side Rev. 0 | Page 1 of 8 UG-655 EVAL-ADA4350RUZ-P User Guide TABLE OF CONTENTS Features .............................................................................................. 1 Frequency Response .....................................................................3 General Description ......................................................................... 1 Evaluation Board Control ............................................................4 Digital Pictures of the Evaluation Board ....................................... 1 Evaluation Board Electrostatic Guarding ..................................5 Revision History ............................................................................... 2 Evaluation Board Schematic and Artwork.....................................6 Evaluation Board Hardware ............................................................ 3 Ordering Information .......................................................................8 Power Supplies .............................................................................. 3 Bill of Materials ..............................................................................8 Guard Ring Features .................................................................... 3 REVISION HISTORY 5/15—Revision 0: Initial Version Rev. 0 | Page 2 of 8 EVAL-ADA4350RUZ-P User Guide UG-655 EVALUATION BOARD HARDWARE The normalized transimpedance and noise gain are shown in Figure 3 and Figure 4 with compensation capacitors installed and not installed. 1000k RF = 1kΩ, CF = 15pF RF = 3kΩ, CF = 6.8pF RF = 10kΩ, CF = 3.3pF RF = 30kΩ, CF = 2.2pF RF = 100kΩ, CF = 1pF 100k GUARD RING FEATURES SIGNAL GAIN (dB) The ADA4350 evaluation board employs a two layer electrostatic guarding to minimize leakage currents from entering the TIA node. Five mil wide guard rings encircle the inverting and noninverting input components on the top copper layer (see Figure 7 and Figure 9). The guard rings connect to the internal GND copper layer with 5 mil dia vias. Each component pad that connects to the TIA inverting and noninverting inputs is connected to an internal copper trace with 5 mil dia vias (see Figure 8 and Figure 9). 10k 1k RF = RF = RF = RF = RF = 0.1k 0.01k 0.1M 1kΩ 3kΩ 10kΩ 30kΩ 100kΩ 1M 10M FREQUENCY (Hz) 11998-003 The ADA4350 has two supplies. The analog supply is used to power up all the analog circuitries while the digital supply is used to power up all the digital controls. The two supplies have separate grounds inside the chip. Table 1 shows the supply range of the analog and digital supply, the voltages to be applied to the supply pins in different configurations, and their limitations. The five feedback resistor values are approximately ½ decade apart. The five compensation capacitors are selected for maximum bandwidth and maximum gain flatness. 100M Figure 3. ADA4350 Signal Gain and Noise Gain Frequency Response This electrostatic guarding scheme provides isolation from leakage currents but adds a 35 pF parasitic capacitance to the TIA inverting node. 50 RF = RF = RF = RF = RF = 40 FREQUENCY RESPONSE 30 NOISE GAIN (dB) The ADA4350 evaluation board is configured for a simulated photodiode input. The photodiode capacitance is represented by C1, a 51 pF capacitor. The photodiode current is simulated by the input voltage Vin-N and R2, a 100 kΩ resistor. IPHOTODIODE = (Vin-N)/100 kΩ. 20 10 0 RF = 1kΩ, CF = 15pF RF = 3kΩ, CF = 6.8pF RF = 10kΩ, CF = 3.3pF RF = 30kΩ, CF = 2.2pF RF = 100kΩ, CF = 1pF –10 The total capacitance (91 pF) seen by the TIA is the sum of the ADA4350 input capacitances (2 pF + 3 pF), the photodiode capacitance (51 pF), and the parasitic capacitance of the electrostatic guarding (35 pF). 1kΩ 3kΩ 10kΩ 30kΩ 100kΩ –20 –30 0.1M 1M 10M FREQUENCY (Hz) 11998-004 POWER SUPPLIES 100M Figure 4. ADA4350 Signal Gain and Noise Gain Frequency Response Table 1. Powering Up the Analog and Digital Supplies Supply Analog Digital Supply Range (V) 3.3 to 12 3.3 to 5.5 Dual Supplies (±VS) VCC GND VEE Single Supplies (+VS) VCC GND VEE +VS −VS +VS 0 0 VCC to DGND ≥3 V Rev. 0 | Page 3 of 8 0 VCC to DGND ≥3 V UG-655 EVAL-ADA4350RUZ-P User Guide EVALUATION BOARD CONTROL This user guide focuses on setting up the evaluation board. For logic tables of the different control modes and for an in depth analysis of the circuit, refer to the ADA4350 data sheet. Manual Mode The evaluation board is configured for manual gain selection using the DIP switches. The DIP switch on position represents Logic 0. To operate manually, set the enable switch to Logic 1 (off position), and set the MODE switch to Logic 1 (off position). To select one gain, set all gain select switches, P0 to P4, to Logic 0 (on position) and select a gain by setting the corresponding gain select switch to Logic 1 (off position). 11998-005 Note that only five feedback paths (FB0 to FB4) can be accessed in the manual mode and that selecting more than one gain connects all the selected feedback resistors in parallel. SPI Control (Parallel Mode) The parallel mode works very similar to the manual mode except that five digital control lines (P0 to P4) are used instead of the manual switches. Set the enable switch to Logic 1 (off position), and set the MODE switch to Logic 1 (off position). Set the DIP switches (P0 to P4) to Logic 1 (off position), and connect the logic output of an external microcontroller or FPGA to the plated holes next to the P0 to P4 switches. A Logic 1 on each digital line selects the corresponding gain. Applying a Logic 1 to more than one line at a time connects all the selected gains in parallel. Figure 5. Location of the LabVIEW Control Panel Program 3. Open the LabVIEW control panel (see Figure 6). The control panel allows the user to open and close individual switches in the switch matrix of the ADA4350. For example, to select the FB0 feedback path, click the S0 and S6 switches, then click the Write New Configuration button. SPI Control (Serial Mode) 1. 2. Plug the Analog Devices, Inc., SDP-S controller board onto the 120-pin connector on the ADA4350 evaluation board. The SDP-S control board can be purchased from Analog Devices. The user can also use an individual SPI interface through the 5-pin SPI connector on the evaluation board. Download the LabVIEW® control panel from http://www.analog.com/ada4350-demoinstaller. Unzip the file, click setup.exe, and follow the installation prompts. If the installation is successful, the ADA4350 Evaluation icon appears under Start > Programs > Analog Devices (see Figure 5). 11998-006 Set the MODE switch and LATCH switch to Logic 0 (on position), and the ENABLE switch to Logic 1 (off position). Set all other gain select switches (P1 to P4) to Logic 1 (off position), and perform the following steps: Figure 6. Labview Control Panel Switches The gain select switches (S0 to S5) have around 350 Ω series internal resistance that appears as a resistance in series with the TIA output, while S6 to S11 has around 150 Ω switch resistances. Rev. 0 | Page 4 of 8 EVAL-ADA4350RUZ-P User Guide UG-655 EVALUATION BOARD ELECTROSTATIC GUARDING 11998-008 Note that the guard ring is employed all the way from the top copper layer through the inner layers and into the ground layer. 11998-007 The guard ring is represented by the red enclosed area around the inputs. The evaluation board uses the guard ring to minimize leakage currents entering the inputs causing offsets. Figure 8. Ground Layer Guard Ring Drawing 11998-009 Figure 7. Top Layer Guard Ring Drawing Figure 9. Guard Ring Details Rev. 0 | Page 5 of 8 UG-655 EVAL-ADA4350RUZ-P User Guide EVALUATION BOARD SCHEMATIC AND ARTWORK RF5 External amp/Filter in & outputs CN 5 CN 6 100 kΩ 1 pF 30 kΩ 2.2 pF 10 kΩ CF5 RF4 CF4 RF3 953 Ω R9 R8 CF3 RF2 R7 3.3 pF CF2 3 kΩ RF1 6 RF1 7 VIN1 8 SWB_OUT 9 SWA_OUT ADA4350 0 Ω FB4 51 pF C1 0 Ω FB5 100 kΩ FB3 R1 FB2 49.9 Ω FB0 15 pFCF0 R2 RF R6 RF0 FB1 1 kΩ Simulated Photo Diode & Inverting Input CN1 RG 6.8 pFCF1 5 4 27 1 28 2 CN 3 R1 3 3 VOUT1 49.9 Ω IN-N 10 C3 IN-P 11 Outputs IC1 Non- Inverting Input CN 4 R1 4 R3 26 VOUT2 R5 49.9 Ω REF VC C Ref Des Device(Type) ADA4350 VEE DGND VCC DVDD TSSOP-28 14 18 15 24 R1 5 R1 7 R1 6 R1 8 CN 7 R1 1 R1 9 VCC J1 L1 L2 Digikey 732-3852-1-ND VD D C9 10u F 120 6 C5 C7 C1 0 10 uF 120 6 C6 C8 R2 0 10 kΩ C1 3 10uF 120 6 C1 1 0 Ω C1 2 C2 0 Ω 0.1 uF VE E R2 1 J2 R12 10 kΩ Digikey 723-3855-1-ND R2 2 J3:85 R2 3 VE E 0.1 uF Power Supply connectors 0.1 uF CS SDI SDO External CLK LATCH J3:84 R2 4 J3:83 R2 5 J3:82 SPI Control access R2 6 J3:43 J3:58 J3:52 J3:46 J3:40 J3:36 J3:28 J3:23 J3:17 J3:11 J3: 6 J3: 4 J3:3 J3:6 3 J3:6 9 J3:7 5 J3:8 1 J3:8 6 J3:9 3 J3:9 8 J3:10 4 J3:10 9 J3:11 5 J3:11 7 J3:11 8 SPD Connector Figure 10. Schematic Rev. 0 | Page 6 of 8 VD D VDD VD D J3:11 6 J3:5 6 VD D 100 kΩ R2 8 IC2 R2 7 C1 4 0.1 uF 8 7 6 5 VDD A0 WP A1 SCL A2 SDA DGND 1 2 3 4 24LC32A-I/MS J3:7 9 J3:8 0 SPD EEPROM R2 9 100 kΩ 11998-010 IC1 Package VCM-IN R1 0 VD D Power Tabl e C4 25 CS/P4 SDI/ P3 SDO/ P2 19 20 21 22 23 16 17 SCLK/P1 13 LATCH/P0 12 EN R4 MOD E 0 Ω SWB_IN 0 Ω SWA_IN CN2 UG-655 11998-011 EVAL-ADA4350RUZ-P User Guide 11998-012 Figure 11. Component Side Assembly Drawing Figure 12. Layer Stackup Rev. 0 | Page 7 of 8 UG-655 EVAL-ADA4350RUZ-P User Guide ORDERING INFORMATION BILL OF MATERIALS Table 2. Qty 1 1 1 1 3 6 10 1 7 29 1 1 1 Reference Designator None None None None C9, C10, C13 C5 to C8, C11, C12 CF0 to CF5, C1 to C4 ADA4350 Vin_P, Vin_N, VCM-IN, Vin1, Vout1, Vout2, TIA Out R1 to R21, RF0 to RF5, RF, RG SDP connector Small SDP connector 24LC32AF Description Analog supply connector Digital supply connector 2-pin mode selector 5-pin gain selector 10 µF capacitor 0.1 µF capacitor Capacitor, user defined See the ADA4350 data sheet packaging information SMA/SMT Resistor, user defined Standard 120-pin SDP connector 5-pin SPI header SDP EEPROM Package 3-pin 100 mil header 2-pin 100 mil header 2-pin dip switch 5-pin dip switch 1206 0603 0603 28-lead TSSOP SMA/SMT R0603 MSOP ESD Caution ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality. Legal Terms and Conditions By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices, Inc. (“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal, temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term “Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI. Customer may not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board. Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written notice to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS” AND ADI MAKES NO WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES RESULTING FROM CUSTOMER’S POSSESSION OR USE OF THE EVALUATION BOARD, INCLUDING BUT NOT LIMITED TO LOST PROFITS, DELAY COSTS, LABOR COSTS OR LOSS OF GOODWILL. ADI’S TOTAL LIABILITY FROM ANY AND ALL CAUSES SHALL BE LIMITED TO THE AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable United States federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and construed in accordance with the substantive laws of the Commonwealth of Massachusetts (excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby submits to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed. ©2015 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. UG11998-0-5/15(0) Rev. 0 | Page 8 of 8