Au-Sn SLID Bonding—Properties and Possibilities
TORLEIF A. TOLLEFSEN, ANDREAS LARSSON, OLE MARTIN LØVVIK,
and KNUT AASMUNDTVEIT
Au-Sn solid–liquid interdiffusion (SLID) bonding is a novel and promising interconnect technology for high-temperature applications. This article gives a review over previously published
work on Au-Sn SLID bonding. An overview of the crystal phases and the thermomechanical
properties of the Au-Sn phases relevant for Au-Sn SLID bonding is given. A summary of the
bonding conditions used during Au-Sn SLID bonding is presented together with results from
reliability tests. Additional challenges, possibilities, and recommendations for how a reliable
high-temperature Au-Sn SLID bonding should be constructed are also discussed.
DOI: 10.1007/s11663-011-9609-z
The Minerals, Metals & Materials Society and ASM International 2011
I.
INTRODUCTION
WIDE-BANDGAP semiconductors, in particular
silicon carbide (SiC), are commonly considered as the
best alternative for electronic devices operating in harsh
environments.[1–3] SiC, which has a large bandgap
(>3 eV), a high breakdown field strength, and a high
thermal conductivity,[1] offers excellent performance in
high-temperature (HT) (up to 872 K [600 C]) and highpower applications.[1] However, a major limitation to
realizing fully the potential of SiC and other widebandgap semiconductor materials is the lack of qualified
HT packaging technology. Packaging plays a vital role
in electronic devices because it serves the purposes of
heat dissipation, mechanical support, and electrical
connection.
Commonly used interconnect technologies in microelectronic packaging include soldering, welding, and
adhesives.[4] For high-reliability applications, Au-Sn
soldering is one of the most successful technologies.[5]
Advantages compared with conventional solders and
adhesives include high corrosion resistance, high
mechanical strength, and possibility for fluxless bonding.[4,6] In standard Au-Sn solder bonding, the eutectic
composition (80 wt pct Au) is used. The eutectic Au-Sn
solder has a melting point of 550 K (278 C), which
makes the technique suitable at higher temperatures
than standard Sn-rich solders. However, the requirements for HT stability of wide-bandgap packages are
rapidly becoming more stringent. For many applications
(e.g., engine control, drilling, well intervention systems,
TORLEIF A. TOLLEFSEN, Ph.D. Student, is with the SINTEF
ICT Instrumentation, 0373 Oslo, Norway, and with the Institute for
Micro and Nanosystems Technology, Vestfold University College,
3184 Borre, Norway. Contact e-mail: torleif.tollefsen@sintef.no
ANDREAS LARSSON, Research Scientist, is with the SINTEF
ICT Instrumentation. OLE MARTIN LØVVIK, Research Scientist, is
with the SINTEF Materials and Chemistry, 0314 Oslo, Norway, and
with the Department of Physics, University of Oslo, 0318 Oslo,
Norway. KNUT AASMUNDTVEIT, Associate Professor, is with the
Institute for Micro and Nanosystems Technology.
Manuscript submitted September 6, 2011.
Article published online December 1, 2011.
METALLURGICAL AND MATERIALS TRANSACTIONS B
and space applications), stable bonds at temperatures
above 522 K (250 C) are desired. This means that
interconnect technologies with better HT stability than
the eutectic Au-Sn solder must be used.
One promising and interesting interconnect technology for HT applications is solid–liquid interdiffusion
(SLID) bonding,[7–9] also called transient liquid phase
(TLP) bonding,[10–12] isothermal solidification[13] or offeutectic bonding.[14] The SLID technique uses a binary
system consisting of two metals with different melting
points Tlow and Thigh, and it relies on the formation of
intermetallic compounds (IMC).[7] At a processing
temperature above Tlow, IMCs will form. They will
have a higher melting point than Tlow, giving bonds that
are stable above the processing temperature.[7] The
general principles of the SLID bonding process are
illustrated in Figure 1.
SLID bonding has exploited various metal systems.
Examples include Ag-In,[7] Ag-Sn,[15] Au-In,[7,9]
Au-Sn,[5,9,14–20] Cu-Sn[21–24] and Ni-Sn.[23,24] The most
frequently investigated system is Cu-Sn[21–24] where the
respective melting points are 1355 K and 510 K (1083 C
and 232 C). In this system, the final bonding consists of
a Cu/Cu3Sn/Cu layered structure, where the melting
point of Cu3Sn is 948 K (676 C).[25] This makes a stable
bond at temperatures well above the processing temperature (typically 522 K to 572 K [250 C to 300 C]).[26]
The objective of this article is to give an overview of
the published properties of the Au-Sn SLID interconnect technology. Structural and thermomechanical
properties for relevant Au-Sn phases will be described
in addition to bonding conditions and reliability. The
possibilities and challenges with Au-Sn SLID bonding
will also be discussed.
II. CRYSTAL PHASES AND
THERMO-MECHANICAL PROPERTIES
The different phases formed in electronic interconnects during fabrication and under normal service
conditions may affect the reliability of the device in
various ways. The following intrinsic material properties
VOLUME 43B, APRIL 2012—397
Fig. 2—The Au-Sn phase diagram. With kind permission from
Springer Science + Business Media: Ref. 31, Fig. 1.
Fig. 1—Schematic illustration of SLID bonding (RT, room temperature; TB, bonding temperature; Tlow, TIMC, Thigh: melting temperature).
can be relevant for the reliability: the coefficient of
thermal expansion (CTE), the existence of ductile/brittle
transitions, the elastic and plastic properties, the heat
capacity, and the electrical and thermal conductivity.[27]
Thorough knowledge about the phases present and their
intrinsic thermomechanical properties is therefore of
utmost importance for designing a reliable package.
The equilibrium phase diagram of the Au-Sn system is
shown in Figure 2. A great deal of work has been
performed during the past century to establish the
complete diagram. The first diagram was given by Vogel
in 1905[28] and was later improved by Hansen,[29]
Okamoto and Massalki,[30] Okamoto,[31] and Ciulik
and Notis[32,33] The diagram presented in Figure 2 was
compiled by Okamoto[31] and Liu et al.[34] Although this
diagram does not conflict with previous reports, the
decomposition temperatures of the b, f, and f’ phases
are still to be confirmed experimentally. Furthermore,
important properties of the phases themselves, such as
the electrical conductivity and yield strength, are also
not well established.
The Au-Sn system has three experimentally confirmed
stable phases at room temperature: f’(Au5Sn), d (AuSn),
and e (AuSn2). In addition, the b (~Au10Sn) and the f
(Au0.84-0.92 at. pct Sn0.16-0.08 at. pct) phases are stable down to 462 K (190 C),[32,33] and probably
they extend down to room temperature (still to be
398—VOLUME 43B, APRIL 2012
experimentally confirmed).[31,34] Furthermore, the g
(AuSn4) phase is stable down to 322 K (50 C).
In an Au-Sn SLID bonding system, it is important to
achieve a surplus of Au (this will be explained in Section
III). Therefore, this article will focus on the Au-rich
Au-Sn phases, i.e., the b, f, f’, and d phases.
In Table I,[35–45] the crystal structure and thermomechanical properties of relevant Au-Sn phases are summarized. The solid solution on the left-hand side of the
phase diagram has the same crystal structure as Au
(face-centered cubic[5]). This is a substitutional solid
solution of Sn in Au, where Sn atoms substitute for Au
atoms up to 6.6 at. pct in the crystal structure.[5]
Few structural and thermomechanical investigations
of the b phase have been conducted. Schubert et al.[35]
have reported it to have a hexagonal structure. It is
shown to be stable between 462 K and 804 K (190 C
and 532 C),[30,33] and it is assumed also to be stable
down to 299 K (27 C).[31–34] The b phase has higher E
(Young’s modulus) than the other Au-rich Au-Sn
phases (88 GPa[36]), whereas the hardness is approximately the same as for the f’ phase.
Massalski and King[37] determined the f phase to have
a hexagonal crystal structure. It melts at 794 K
(522 C)[31,34] and is assumed stable down to 267 K
(–5 C) (depending on Au concentration).[32,33] It has
the lowest E, G (shear modulus), and Vicker’s hardness
of the Au-rich Au-Sn phases.[32,38] This means that the f
phase has the greatest ability of the Au-rich phases to
absorb stresses thermomechanically.
In 1974, Osada et al.[39] investigated the crystallographic details of the f’ phase with X-ray and electron
diffraction, and they found it to have a trigonal crystal
structure. At approximately 462 K (190 C)[30] it undergoes a phase transition from the ordered f’ to the
disordered f phase.[38,39] The f’ phase has quite low E
and G, 62 to 76 GPa[36,38] and 22 GPa,[38] respectively.
However, Yost et al.[38] reported that the f’ phase is
brittle and unforgiving, which means that it has a low
ability to release stress by plastic deformation.
METALLURGICAL AND MATERIALS TRANSACTIONS B
Hexagonal
P63/mmc[37]
794 (522)[31]
—
20[38]
58[38]
20[38]
—
—
0,4[38]
100[32]
—
—
Brittle
Trigonal
R32[39]
462 (190)[31] 16,300[38]
18[38]
62–76[36,38]
22[38]
—
—
0,4[38]
126[32]
—
—
Brittle
N/A
N/A
550 (278)[31]
14,700[38]
16[38]
69–74[36,38]
25[38]
275[9]
5[44]
0,4[38]
—
57.3[9]
—
—
Au
Face-centered cubic[43]
F m 3 m[43]
1336 (1064)[41]
19,320[41]
14,4[41]
77,2[41]
27,2[41]
120[41]
40[44]
0,42[41]
36,5[32]
301[41]
128[41]
Ductile
Hexagonal
P63/mmc[35]
804 (532)[31]
—
—
88[36]
—
—
—
0,33[36]
124[32]
—
—
—
[35]
b-Au10Sn
f-AuSn0.18-0.10 at. pct
[37]
[39]
f’-Au5Sn
Eutectic AuSn
Hexagonal
P63/mmc[40]
691 (419)[31]
11,700[38]
14[38]
70–87[36,38]
25[38]
—
—
0,3[38]
146[32]
57[45]*
200[45]*
Brittle
d-AuSn
[40]
III.
*Measured in a thin film (height = 0.004 mm).
Solid-state phase transition.
Tetragonal
I41/amd[42]
504 (232)[31]
7290[41]
22[41]
41[41]
16[41]
220[41]
30[44]
0,33[41]
7[32]
63[41]
256[41]
Ductile
Crystal structure
Space group
Melting temperature, Tm [K (C)]
Density, q (kg/m3)
CTE (ppm/K)
Young’s modulus, E (GPa)
Shear modulus, G (GPa)
Tensile strength, (MPa)
Elongation to failure (pct)
Poisson’s ratio, m
Vicker’s hardness ()
Thermal conductivity, k (W/m*K)
Heat capacity, Cp (J/kg*K)
Material type
METALLURGICAL AND MATERIALS TRANSACTIONS B
BONDING CONDITIONS
A. Traditional Soldering vs SLID
[42]
Phase
Sn
An Overview of the Structural and Thermo-Mechanical Properties of Relevant Au-Sn Phases
Table I.
The existence of the d phase, which has a hexagonal
crystal structure, has been known for decades.[40] It melts
congruently at 691 K (419 C)[30] and has a narrow
homogeneity range, probably between 50 and
50.5 at. pct Sn.[27] Yost et al.[38] observed that the d
phase is relatively brittle and showed a tendency to crack.
The CTE for the different Au-rich AuSn phases are
between 14 and 20 ppm/K,[38,41] increasing with increasing Au-concentration.
The phase stability of the Au-Sn system has also been
investigated theoretically by density functional theory[27,46] and by the calculation of phase diagram
(CALPHAD) method.[34] First-principles calculations
on Au-Sn compounds were presented independently in
2008 by An et al.[46] and Ghosh.[27] The former study
included calculations of the relaxed crystal structures
and elastic properties of Au5Sn and AuSn.[35] Both
phases from the phase diagram, metastable phases and
‘‘virtual’’ phases (hypothetical phases without any
experimental support), were included in the latter study,
29 different phases altogether.[27] The results included
predictions of crystal structures, elastic constants, and
cohesive energies. Even if the study was performed at
the ground state (no temperature effects were included
by performing phonon calculations), the ground state
convex hull reproduced well most of the stable phases of
the phase diagram. The calculated energies of this study
may be used to create a thermodynamic database for
prediction of multicomponent phase diagrams containing Au and Sn, particularly when combined with the
CALPHAD methodology.[27] Such thermodynamic
assessments using experimental parameters have been
performed for the Au-Sn,[34] Au-Pt-Sn,[47] Au-In-Sn,[48]
and Au-Co-Sn[49] systems.
A comparison of traditional solder bonding and
SLID bonding is presented in Table II. An important
advantage with SLID compared with traditional soldering is the high thermal joint stability compared with the
relatively low bonding temperature. This opens a
window for new subsequent manufacturing steps without the need for ever decreasing process temperatures
for each step.
Diffusion in the liquid state is approximately three
orders of magnitude faster than in solid state.[9] In SLID,
a combination of solid-state and liquid-state diffusion is
used. First, the bonding surfaces are brought into contact
and heated to a temperature above Tlow (Figure 1 shows
an illustration), commencing rapidly new phases by
liquid-state diffusion. If the temperature is kept high
enough, then solid-liquid diffusion will continue to occur
until a uniform bonding layer is obtained.[9] The latter
step will take longer to complete because solid–liquid
diffusion is slower. This means that the SLID process is
more time consuming than standard soldering, but it is
faster than other interconnect and die attach techniques
like solid-state thermocompression bonding.
VOLUME 43B, APRIL 2012—399
Table II. Comparison of Traditional Soldering and SLID[13]
Process
Soldering
Advantages
Disadvantages
tolerates irregular joint dimensions
low thermal stability, TB = TR
wetting can be a problem
growth of thick IMC layers may
easy repair work by desoldering
flexible and versatile process;
SLID
cause embrittlement
acknowledged as standard tech
high thermal joint stability, TB < TR
tolerate some surface roughness because
of the liquid phase appearance
low bonding loads (0.2 to 5 MPa)
relatively short bonding times
not as versatile as conventional soldering,
flat, and mating joint surfaces
(within joint thickness) required
limited to material combinations
with favorable phase diagram
and reaction kinetics
lack of repairability
(typically minutes)
excellent joint filling over large areas
thin joints (typically 10 lm or less)
result in beneficial mechanical properties
TB, bonding temperature; TR, remelt temperature.
B. Wetting and Oxidation of Au-Sn SLID
The wetting of an Au-Sn alloy to a substrate/chip can
be difficult.[5] The main challenge is associated with
oxidation of the surfaces of Sn and Au-Sn, which
prevents contact between the bonding surfaces.[5] Several studies of solid and liquid Au-Sn alloys have
revealed a general tendency of Sn enrichment, and
succeeding oxidation, of the surface.[50–52] However,
methods to achieve complete wetting of the surfaces
exist, e.g., a scrubbing motion[53] or a static pressure[50,54] in combination with using a H2, N2, or a
vacuum environment during formation.[50,53,54]
C. Au-Sn SLID for HT Applications
Based on the Au-Sn phase diagram, several Au-Sn
phases can be appropriate for HT applications. However, when long-time stability is taken into account, the
f phase is most promising. The d phase also has a high
melting point. However, for a system with surplus of
pure Au, a d bond is susceptible to be converted into a
eutectic or near-eutectic structure over time, and lowering the melting point.[17] A f bond is not expected to
convert into lower melting point phases over time when
being in the vicinity of surplus Au, and therefore, it is
believed to have the best long-time stability of the Au-Sn
phases.[17] However, a fraction of the f bond is expected
to be converted into the b phase when used in HT
applications. This process gives a harder and more rigid
bonding layer, which probably has a lower ability to
absorb stress thermomechanically than a pure f layer.
Published work on Au-Sn SLID bonding for HT
applications is limited.[14,16–20,55] Two different processes
to perform fluxless SLID bonding were investigated in
2010.[18] Both processes used an equal amount/thickness
of Au on the substrate and chip, as follows:
Process a.i—Multilayer bonding: A multilayer Si chip
with electroplated Au (5 lm)/Sn (2 lm)/Au (0.1 lm)
was bonded to a Si substrate with an electroplated Au
(5 lm) layer (Figure 3 shows an illustration). Notice
400—VOLUME 43B, APRIL 2012
Fig. 3—Process a.i—Multilayer bonding: sketch of layer structure of
samples for bonding. (a) Layers as plated. (b) Expected structure
after bonding. 2010 IEEE. Reprinted with permission from Ref. 18,
IEEE ESTC, 2010.
that the thin (0.1 lm) Au layer is applied to achieve
fluxless bonding, which is used to prevent Sn oxidation.[16]
Process b.i—Preform bonding: A Si chip and a Si
substrate, both with an electroplated Au (5 lm) layer,
were bonded together using a 7.5-lm thick eutectic
Au-Sn preform (Figure 4 shows an illustration).
The bonding was performed in two steps[18]: First, a
flip chip bonder was used to pick and place at moderate
a temperature (393 K [120 C]) applying a force of 35 N
for 30 seconds. Second, the positioned samples were
bonded using a hotplate in a vacuum chamber and a
clamping force to ensure intimate contact. During the
second step, they used different temperature profiles,
and a final bonding time of 20 minutes. In a previous
study, variations in the bonding time (2 to 30 minutes),
combined with a bonding temperature of 622 K
(350 C), did not have any significant effect on the final
bonding.[17]
Tests to study the bond integrity were also performed.[17,18] Standard die shear tests were used to
estimate the bond strength at both room and increased
temperatures (up to 672 K [400 C]). At room temperature, the bond strength was reported to be approximately
METALLURGICAL AND MATERIALS TRANSACTIONS B
Fig. 4—Process b.i—Preform bonding: sketch of layer structure of
samples for bonding. (a) Layers as plated. (b) Expected structure
after bonding. 2010 IEEE. Reprinted with permission from Ref. 18.
26 MPa for both process a.i and b.i samples.[18] At
increased temperatures, they could not measure the
exact bond strength. Instead, they applied a constant
shear force of ~1 to 2 N on the uppermost chip during
heating from room temperature to 672 K (400 C). For
all but one tested samples, they found no delamination
or movement of the uppermost chip.[18]
The main conclusions from this work were as
follows[17,18]:
A layered bonding structure was obtained. An optical
micrograph of a typical bonding is shown if Figure 5.
Scanning electron microscopy (SEM) and energydispersive X-ray spectroscopy (EDS) were used to
identify the bonding layers to be Au/f’/Au. However,
based on the AuSn phase diagram (Figure 2) and our
previous discussion (Sections II and III), the joint
more probably is composed of Au/f/Au.
Variation in bonding time (2 to 30 minutes) has
insignificant effect on the bonding.
Both process a.i and b.i give the desired bonding
structure.
Variation in bonding temperature (572 K to 622 K
[300 C to 350 C]) has insignificant effect on the
bonding.
The obtained bonding structure is expected to be
stable over time and has potential for HT applications.
Au-Sn SLID bonding with different Au layer thickness on chip and substrate has also been investigated in
several different metallization systems.[14,19,55]
Process a.ii: A SiC chip with a three-layer stack
composed of Ti/Ti-W/Au (100 nm/200 nm/200 nm),
20-lm thick Au plating on either substrate or chip, a
20-lm thick eutectic Au-Sn preform, and a directbonded Cu (DBC) substrate with 6-lm thick electroless plated Ni:P (protected by a 0.10 to 0.20-lm
thick layer of immersion Au).[14]
Process a.iii: Same system as in case a.i but with
electrolytically plated Ni on the DBC substrate instead of electroless Ni:P.
Process a.iv: A SiC chip metalized with Ti/TaSi2/Pt/
Au (100 nm/400 nm/200 nm/100 nm), a 100-lm thick
Au foil electroplated with 4-lm Sn on both surfaces
(off-eutectic preform), and an AlN substrate metalized with Mo:Mn/Ni (5 lm)/Au (5 lm).[19]
METALLURGICAL AND MATERIALS TRANSACTIONS B
Fig. 5—Optical micrograph of cross-sectioned bonded sample
(623 K [350 C] bonding temperature, process a.i—multilayer),
where the joint was identified by EDS to be Au/f/Au. 2010 IEEE.
Reprinted with permission from Ref. 18.
Process a.v: A SiC chip metalized with Cr/Ni-Cr/Au
(200 nm/100 nm/3 lm), a 100-lm thick Au foil electroplated with 4-lm Sn on both surfaces (off-eutectic
preform), and an AlN substrate metalized with a
thick film of PtAu and Au.[19]
Process a.vi: A SiC chip metalized with Cr/Ni-Cr/Au
(200 nm/100 nm/3 lm), 8.5-lm eutectic AuSn preform, and an AlN substrate metalized with a thick
film of PtAu and Au.[19]
For processes a.ii and a.iii, a special brazing/bonding
temperature profile was designed[14]: First the samples
were soaked at 522 K (250 C) for 4 minutes to bake
out any residual moisture. Then, a 3-hour ramp from
522 K to 672 K (250 C to 400 C), followed by a hold
at 672 K (400 C) for 30 minutes, were performed to
allow Sn to diffuse into the Au layer. The process was
run in vacuum, and a 20-g weight was placed on the
assembly to create some flow of eutectic AuSn when it
melted.
For processes a.iv and a.v, a peak temperature of
672 K (400 C) was applied for 60 min with a bonding
force of 500 g. The process was run in vacuum.
For process a.vi a peak temperature of 602 K
(330 C) was applied for 5 minutes before the samples
were soaked at 552 K (280 C) for 30 minutes. This
process allowed Sn to diffuse into the thick film layers.
Also here, a bonding force of 500 g was applied, and the
process was run in vacuum.
For processes a.ii and a.iii, it was reported that a die
attach without voids was achieved. The bond strength
was found to be superb, >90 MPa (equipment limit).[14]
An energy dispersive X-ray (EDX) analysis showed that
the Sn concentration across the bonded interface was
approximately 6 wt pct (Figure 6), corresponding to the
Au-rich IMCs b, f or f’. However, there was a peak in
the Sn concentration at the chip and the substrate
interfaces, corresponding to Sn-Ti IMCs and Sn-Ni
IMC, respectively.[14]
For process a.iv and a.v the bond strength was tested
and stated to be > 70 MPa. No additional information
about the initial bonding properties was presented.
In 2011 we tested Au SLID with both equal (process
a.vii) and different thickness (process a.viii) of Au on the
substrate and chip, Au-Sn SLID bonding in two
VOLUME 43B, APRIL 2012—401
Fig. 6—Element concentration plot across a process a.ii AuSn SLID
bonding. 2007 IEEE. Reprinted with permission from Ref. 14.
Fig. 7—Sketch of expected layer structure after bonding 20. (a) Process a.vii sample. (b) Process a.vii sample. The initial thickness of the
electroplated Au layers was 5 lm on both substrate and chip in (a),
whereas it was 3 lm on the substrate and 5 lm on the chip in (b).
In both (a) and (b), a 7-lm-thick eutectic AuSn preform was used.
different Cu/Si3N4/Cu/Ni:P/Au-Sn/Ni/Ni2Si/SiC systems (Figure 7 shows several illustrations).[20] The
bonding was performed in accordance with process a.i.
A uniform, Au-rich bond interface (identified as the f
phase by EDX) was produced for both process a.vii and
a.viii samples.[20] Moreover, the bond strength was
excellent, >78 MPa (equipment limit), for both types of
samples.[20]
IV.
HIGH-TEMPERATURE RELIABILITY
AND STABILITY
Reliable performance of electronic packages for HT
applications is extremely important. For example, if the
electronic engine control in a jetliner fails to perform its
functions, then many lives would be in danger. Consequently, thorough knowledge about the failure mechanisms of the Au-Sn SLID system is essential for the
introduction of it as an interconnect technology in
future HT electronic packaging technology.
A. High-Temperature Aging
The reliability of Au-Sn SLID systems has not been
investigated extensively. HT aging tests have been
performed on process a.ii through a.vi samples.[14,19,55]
402—VOLUME 43B, APRIL 2012
Fig. 8—Die shear strength of process a.ii and a.iii samples as a function of aging at 672 K (400 C) in air. Note that a die shear strength
of 100 kgf is equal to 90 MPa (100 kgf/90 MPs was the equipment
limit). 2007 IEEE. Reprinted with permission from Ref. 14.
For process a.ii and a.iii samples, a HT aging test was
performed at 672 K (400 C).[14] The samples were
subjected to die shear testing and cross-section characterization (SEM/EDX) after storage times up to
2000 hours.[14]
The die shear test results are shown in Figure 8. No
bond strength change could be detected for process a.iii
samples (all the samples had bond strength above the
equipment limit), whereas the bond strength of process
a.iv samples degraded slightly from >90 MPa to
approximately 68 MPa.[14] Nevertheless, the crosssection analyses of the bond interface showed that there
had been considerable changes[14]:
Significant interdiffusion was found between the Cu,
Ni, Au, and Sn layers for process a.iii samples (samples with pure Ni as a diffusion barrier). Cu diffused
through the Ni layer into Au, and at the same time,
Au, Ni, and Sn diffused into Cu (Figure 9).
Ni:P (process a.ii samples) was a better diffusion
barrier than Ni (process a.iii samples) for Au and Sn
diffusion into Cu. However, Cu diffused through
Ni:P, which caused Kirkendall voids in the Cu-Ni:P
interface (because of different interdiffusion rates
through the Ni:P layer; see Figure 10).
The complex IMCs that formed during aging had
good adhesion and strength. However, in the Ni:P
samples (process a.ii samples), Kirkendall voids
caused cracks at the Cu-Ni:P interface, reducing the
shear strength compared with samples with pure Ni as
a diffusion barrier (process a.iii samples).
METALLURGICAL AND MATERIALS TRANSACTIONS B
B. Thermal Cycling
Fig. 9—SEM picture of the cross section of a process a.iii sample
after 2000 h aging at 672 K (400 C). Notice the voids at the Cu-Ni
interface and the series of IMCs formed. 2007 IEEE. Reprinted
with permission from Ref. 14.
Fig. 10—SEM picture of the cross-section of a process a.ii sample
after 2000 h aging at 672 K (400 C). Notice the cracks (Kirkendall
voids at the Cu-Ni:P interface. 2007 IEEE. Reprinted, with permission, from Ref. 14.
Process a.iv through a.vi samples were exposed to a
HT aging test at 772 K (500 C)19 for up to 2000 hours,
and then the samples were subjected to die shear testing
and cross-section characterization (SEM/EDX).
For process a.iv and a.v samples, the bond strength
decreased from approximately 60 MPa to approximately 35 MPa after 250 hours of aging, and the
strength remained relatively stable through the remainder of the test. The fracture surfaces from die shear
testing occurred in the chip metallization scheme,
indicating that the actual AuSn joint was stronger.[19]
For process a.vi samples, the bond strength remained
high for the first 1200 hours of aging (>77 MPa). After
1500 hours, there was a slight decrease in bond strength to
>53 MPa.[19] Also, the fracture surfaces from die shear
testing occurred in the chip metallization scheme.[19]
METALLURGICAL AND MATERIALS TRANSACTIONS B
Thermal cycling tests have been performed on process
a.iv. through a.viii samples.[19,20]
Process a.iv through a.vi samples were exposed to
thermal cycling (up to 1000 cycles) between 307 K and
772 K (35 C and 500 C),[19] and then they were
subjected to die shear testing and cross-section characterization (SEM/EDX).
The bond strength of process a.iv and a.v samples
decreased rapidly during thermal cycling. After 1000 cycles,
it was only 1 to 3 MPa.[19] The fracture surfaces from die
shear testing occurred in the interface between the offeutectic preform and the chip/substrate metallization.[19]
Johnson et al. performed an elemental profile across the
bonding, revealing a higher Sn concentration in the offeutectic preform-chip/substrate interfaces compared with
the rest of the joint. This higher Sn concentration resulted in
more brittle regions, which cracked because of the thermomechanical stresses induced by thermal cycling.[19]
These results indicate that it is important to have a pure
(soft) Au layer on both substrate and chip side in the final
joint (to absorb CTE induces thermomechanical stresses).
The bond strength of process a.vi samples was
significantly better (69 to 83 MPa after 1000 cycles).[19]
Here, no information about the origin of the fracture
surfaces was given.
Process a.vii and a.viii samples (shown in Figure 7)
were exposed to thermal cycling (up to 1000 cycles)
between 272 K and 472 K (0 C and 200 C),[20] and
then they were subjected to die shear testing and crosssection characterization (SEM/EDX).
The bond strength of process a.vii samples remained
unchanged (>78 MPa) during thermal cycling (note that all
the samples had a bond strength above the equipment limit,
indicating that there could be a degradation in the bond
strength not measureable with the used equipment).[20]
For process a.viii samples, there was a decrease in the
bond strength as a function of the number of thermal
cycles.[20] After 500 cycles, the strength was reduced
from 78 MPa to 68 MPa. The strength was reduced to
59 MPa after 1000 cycles. In process a.viii samples, there
was no excess Au left on the substrate side (Figure 7(b))
(confirmed by optical microscopy, SEM and EDS of
cross-sections), causing formation of brittle Au-Ni-Sn
IMCs during thermal cycling.[20] These brittle IMCs
were believed to be the primary cause of the degradation
of the bond strength.[20] Inspection of the fracture
surfaces, occurring in the Ni:P/f phase interface, confirmed this hypothesis.[20]
V.
CHALLENGES, POSSIBILITIES,
AND RECOMMENDATIONS
Although traditional Au-Sn solders have been used as
an interconnect technology in microelectronic packaging for decades, their HT applicability is relatively
unexplored. In this section, a discussion of the challenges and possibilities associated with Au-Sn SLID
interconnect technology is given. Some recommendations for how a reliable HT Au-Sn SLID bond should be
constructed are presented.
VOLUME 43B, APRIL 2012—403
A. Challenges
The properties of the different crystal phases constituting an Au-Sn SLID bonding—primarily the b and f
phases—are still not yet fully mapped out (Section II). A
limited amount of thermomechanical properties has
been published, but knowledge about important material parameters like yield strength, tensile strength,
electrical conductivity, etc. is still missing for most
phases. Mapping of these properties will be of utmost
importance for a comprehensive understanding of the
Au-Sn SLID interconnect technology.
Limited amounts of reliability tests have been performed on the Au-Sn SLID interconnect system.[14,19,20,55] During some HT aging and thermal
cycling tests, substantial growth of IMCs was observed.
They retained good adhesion and high bonding
strength. However, important properties like electric
performance and degradation were not tested. Substantial problems with obtaining reliable and stable metallization schemes on substrate and chip compatible with
Au-Sn SLID at HT were also experienced. This problem
is also known for traditional Au-Sn solder bonding.[56]
Additional investigations of reliability and substrate/
chip metallization schemes are needed if the Au-Sn
SLID interconnect technology is to be used in future HT
microelectronic systems.
B. Possibilities
Although the properties of the different crystal phases
constituting Au-Sn SLID bonding structures are relatively unknown, it is clear that the f’ phase is reported to
have good mechanical properties, good thermal conductivity, and good creep behavior.[57–59] Considering in
addition the high melting points of the Au-rich Au-Sn
phases (~772 K [~500 C]), it is evident that Au-Sn
SLID bonding has a high potential for HT applications.
The Au-Sn SLID bonding process is relatively unexplored. However, the structures described in Sections III
and IV exhibited bonds with excellent die shear strengths
compared with the requirements in Mil-Std-883 (~6 MPa
compared with, respectively, 26 MPa, >90 MPa, and
>78 MPa). The bonding process is relatively time consuming, ranging from 20 minutes[17] up to 3.5 hours,[14]
and obviously it can be optimized. The HT (up to 772 K
[500 C]) and thermal cycling (from 307 K to 772 K
[35 C to 500 C]) reliability has been shown to be good.
All in all, Au-Sn SLID bonding has appealing
properties for HT microelectronic packaging, and it
should be investigated.
C. Recommendations
Based on this literature study and the authors’ experience, the subsequent recommendations for designing a
reliable HT Au-Sn SLID bonding system can be made:
There should be a surplus of Au after bonding
because the pure Au layers can absorb the thermomechanical stresses induced by, e.g., CTE mismatches
between the substrate and the chip. The pure Au
layers can (if they are thick enough) act as a diffusion
404—VOLUME 43B, APRIL 2012
barrier between the Sn-containing bond interface and
the substrate/chip metallization.
The minimum amount of Sn required to produce a
strong bond should be used because Sn tends to
produce brittle IMCs with both Au and substrate/
chip metallization.
A substrate/chip metallization that is compatible with
the Au-Sn SLID system should be used. It should have
good thermal and electrical conductivity, good adhesion to Au, and simultaneously be a good diffusion
barrier between Au and substrate/chip metallization.
VI.
CONCLUSIONS
Au-Sn SLID bonding is a novel and promising
interconnect technology for HT microelectronic applications. It produces both reliable HT bonds (up to
772 K [500 C]) and bonds that can endure large
temperature ranges (307 K to 772 K [35 C to
500 C]). However, important properties, e.g., electrical
conductivity and tensile strength, of the IMC constituting Au-Sn SLID bonds are still unknown. The challenges associated with chip/substrate metallization
compatibility are also observed. Despite these challenges, Au-Sn SLID bonding is judged to be an excellent
candidate for HT microelectronic packaging.
ACKNOWLEDGMENTS
This work was carried out within the HTPEP
project. Funding from the Research Council of Norway
(project no 193108/S60), Badger, SmartMotor, TranSiC,
Roxar, and Norbitech is greatly acknowledged. The
authors acknowledge Dr. Maaike M. V. Taklo for her
valuable review, helping to shape this article.
REFERENCES
1. Z.J. Shen, B. Grummel, R. McClure, A. Gordon, and A. Hefner:
iMAPS HiTEC, Albuquerque, NM, 2008.
2. M.N. Yoder: IEEE Trans. Electron Devices, 1996, vol. 43 (10),
pp. 1633–36.
3. N.G. Wright, A.B. Horsfall, and K. Vassilevski: Mater. Today,
2008, vol. 11 (1–2), pp. 16–21.
4. H. Oppermann: Mater. Inf. Technol., Springer, London, UK,
2005, pp. 377–90.
5. G.S. Matijasevic, C.C. Lee, and C.Y. Wang: Thin Solid Films,
1993, vol. 223 (2), pp. 276–87.
6. S. Anhoch, H. Oppermann, C. Kallmayer, R. Aschenbrenner, L.
Thomas, and H. Reichl: IEEE/CPMT Int. Electron. Manuf.
Technol. Symp., 1998, pp. 156–65.
7. L. Bernstein: J. Electrochem. Soc., 1966, vol. 113, pp. 1282–88.
8. J.D.M. Jacobson and G. Humpston: Soldering Surf. Mount
Technol., 1992, vol. 4 (1), pp. 27–32.
9. C.L. Lee, Y.W. Wang, and G. Matijasevic: J. Electron. Packag.,
1993, vol. 115 (2), pp. 201–07.
10. Y. Iino: J. Mater. Sci. Lett., 1991, vol. 10 (2), pp. 104–06.
11. D.S. Duvall, W.A. Owczarski, and D.F. Paulonis: Weld. J., April
1974, pp. 203–14.
12. W.D. Macdonald and T.W. Eagar: Annu. Rev. Mater. Sci., 1992,
vol. 22, pp. 23–46.
13. R. Schmid-Fetzer and R.Y. Lin: Miner. Met. Mater. Soc., 1995,
pp. 75–97.
14. W.R. Johnson, C.Q. Wang, Y. Liu, and J.D. Scofield: IEEE Trans.
Electron. Packag. Manuf., 2007, vol. 30, pp. 182–93.
METALLURGICAL AND MATERIALS TRANSACTIONS B
15. J.F. Li, P.A. Agyakwa, and C.M. Johnson: Acta Mater., 2010,
vol. 58 (9), pp. 3429–43.
16. K. Wang, K. Aasmundtveit, and H. Jakobsen: IEEE Electron.
Compon. Technol. Conf., 2008, vols. 1 and 2.
17. K.E. Aasmundtveit, K.Y. Wang, N. Hoivik, J.M. Graff, and A.
Elfving: iMAPS European Microelectron. Packag. Conf., 2009.
18. K. Aasmundtveit, T.T. Luu, H. Nguyrn, R. Johannessen, N.
Hoivik, and K. Wang: IEEE Electron. System Integr. Technol.
Conf., 2010.
19. P. Zheng, P. Henson, R.W. Johnson, and L. Chen: iMAPS
HiTEC, Albuquerque, NM, 2010.
20. T.A. Tollefsen, A. Larsson, and K. Aasmundtveit: iMAPS
HiTEN, Oxford, UK, 2011.
21. N. Hoivik, H. Liu, K.Y. Wang, G. Salomonsen, and K.
Aasmundtveit: Adv. Mater. Technol. Micro/Nano-Devices Sens.
Actuators, 2010, pp. 179–90.
22. H. Huebner, S. Penka, B. Barchmann, M. Eigner, W. Gruber, M.
Nobis, S. Janka, G. Kristen, and M. Schneegans: Microelectron.
Eng., 2006, vol. 83 (11–12), pp. 2155–62.
23. S. Bader, W. Gust, and H. Hieber: Acta Metall. Mater., 1995,
vol. 43 (1), pp. 329–37.
24. P.F. Yang, Y.S. Lai, S.R. Jian, J. Chen, and R.S. Chen: Mater.
Sci. Eng. A-Struct. Mater. Prop. Microstruct. Process, 2008,
vol. 485 (1–2), pp. 305–10.
25. N. Saunders and A.P. Miodownik: Binary Alloy Phase Diagrams,
ASM, Materials Park, OH, 1990, pp. 1481–83.
26. N. Hoivik, K. Aasmundtveit, G. Salomonsen, A. Lapadatu, G.
Kittilsand, and B. Stark: IEEE Electron. System Integr. Technol.
Conf., 2010.
27. G. Ghosh: J. Mater. Res., 2008, vol. 23 (5), pp. 1398–1416.
28. R. Vogel: Z. Anorg. Chem., 1905, vol. 46, pp. 60–75.
29. M .Hansen: Const. Binary Alloys, 1958, pp. 232–34.
30. H. Okamoto and T.B. Massalski: Binary Alloy Phase Diagrams,
ASM, Materials Park, OH, 1990, pp. 433–34.
31. H. Okamoto: J. Phase Equilib. Diffus., 2007, vol. 28 (5), p. 490.
32. J. Ciulik and M.R. Notis: Electronic Materials and Processing
Congress, ASM, Materials Park, OH, 1989, pp. 57–61.
33. J. Ciulik and M.R. Notis: J. Alloys Compd., 1993, vol. 191 (1),
pp. 71–78.
34. H.S. Liu, C.L. Liu, K. Ishida, and Z.P. Jin: J. Electron. Mater.,
2003, vol. 32 (11), pp. 1290–96.
35. K. Schubert, H. Breimer, and R. Gohle: Z. Metallkd., 1959,
vol. 50, pp. 146–53.
36. R.R. Chromik, D.N. Wang, A. Shugar, L. Limata, M.R. Notis,
and R.P. Vinci: J. Mater. Res., 2005, vol. 20 (8), pp. 2161–72.
METALLURGICAL AND MATERIALS TRANSACTIONS B
37. T.B. Massalski and H.W. King: Acta Metall., 1960, vol. 8,
pp. 677–83.
38. F.G. Yost, M.M. Karnowsky, W.D. Drotning, and J.H. Gieske:
Metall. Trans. A, 1990, vol. 21A, pp. 1885–89.
39. K. Osada, S. Yamaguchi, and M. Hirabayashi: Trans. Jpn. Inst.
Met., 1974, vol. 15 (4), pp. 256–60.
40. J.P. Jan, W.B. Pearson, A. Kjekshus, and S.B. Woods: Can. J.
Phys., 1963, vol. 41, pp. 2252–66.
41. MatWeb: Material Property Data, www.matweb.com.
42. M. Wolcyrz, R. Kubiak, and S. Maciejewski: Phys. Status Solidi B,
1981, vol. 107, pp. 245–53.
43. L.P. Salamakha, E. Bauer, S.I. Mudryi, A.P. Goncalves, M.
Almeida, and H. Noel: J. Alloys Compd., 2009, vol. 479 (1–2),
pp. 184–88.
44. G. Humpston and D.M. Jacobson: Principles of Soldering, ASM,
Materials Park, OH, 2004, p. 226.
45. Y.B Yoon and J.W. Park: IEEE Trans. Comp. Packag. Technolog.,
2009, vol. 32 (4), pp. 825–31.
46. R. An, C.Q. Wang, and Y.H. Tian: J. Electron. Mater., 2008,
vol. 37 (7), pp. 968–74.
47. V. Grolier and R. Schmid-Fetzer: J. Electron. Mater., 2008, vol. 37
(3), pp. 264–78.
48. G. Cacciamani, G. Borzone, and A. Watson: CALPHAD, 2009,
vol. 33 (1), pp. 100–08.
49. H.Q. Dong, S. Jin, L.G. Zhang, J.S. Wang, X.M. Tao, H.S. Liu,
and Z.P. Jin: J. Electron. Mater., 2009, vol. 38 (10), pp. 2158–69.
50. G. Matijasevic and C.C. Lee: J. Electron. Mater., 1989, vol. 18 (2),
pp. 327–37.
51. S.H. Overbury and J. Somorjai: J. Chem. Phys., 1977, vol. 66,
pp. 3181–88.
52. T. Ichikawa: Phys. Status Solidi A, 1975, vol. 32, pp. 369–78.
53. M. Nishiguchi, N. Goto, and H. Nishizawa: IEEE Trans.
Compon., Hybrids, Manuf. Technol., 1991, vol. 14 (3), pp. 523–28.
54. G.S. Matijasevic, C.Y. Wang, and C.C. Lee: IEEE Trans.
Compon., Hybrids, Manuf. Technol., 1990, vol. 13 (4), pp. 1128–34.
55. R.W. Johnson and J. Williams: IEEE Aerosp. Conf., 2005,
pp. 2692–97.
56. A. Katz, C.H. Lee, and K.L. Tai: Mater. Chem. Phys., 1994,
vol. 37 (4), pp. 303–28.
57. G. Elger, M. Hutter, H. Oppermann, R. Aschenbrenner, H. Reichl,
and E. Jager: Microsyst. Technol., 2002, vol. 7 (5–6), pp. 239–43.
58. S. Weiss, V. Bader, G. Azdasht, P. Kasulke, E. Zakel, and H.
Reichl: IEEE Electron. Compon. Technol. Conf., 1997, pp. 780–87.
59. Y.H. Wang, K. Nishida, M. Hutter, T. Kimura, and T. Suga: Jpn.
J. Appl. Phys., Part 1, 2007, vol. 46 (4B), pp. 1961–67.
VOLUME 43B, APRIL 2012—405