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Ultra Low-voltage Floating-Gate CMOS Analog Inverter. Department of Informatics, Oslo, April 2000. Submitted to ESSIRC 2000 in Stockholm 19 - 21 Sep. REFERENCES III [17] Y. Berg, R. Jensen, J. G. Lomsadalen, H. Gundersen, and S. Aunet. Fault Tolerant CMOS Logic using Ternary Gates. Proceedings IEEE 37th International Symposium on MultipleValued Logic, 2007. [18] Y. Berg and T. S. Lande. Low Voltage Sinh Amplifier. IEEE Int. Conf. on Electronics Circuits and Systems, Cairo, 1997. [19] Y. Berg and T. S. Lande. Programmable Floating-Gate MOS Logic for Low-Power Operation. IEEE International Symposium on Circuits and Systems, 3:1792–1795, 1997. [20] Y. Berg and T. S. Lande. Rail to Rail Ultra Low Voltage Differential Input Stage. Department of Informatics, Oslo, 1997. [21] Y. Berg and T. S. Lande. Ultra Low Voltage Transconductance Amplifier. IEEE Int. Conf. on Electronics Circuits and Systems, Portugal, 1998. [22] Y. Berg and T. S. Lande. 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