C96.. A R. ..
A LOW-DRIFT TRANSISTORIZED DIRECT-CURENT
AMPLIFIER
by
James Louis Sitomer
B.E.E., City College of New York
(1959)
Submitted in Partial Fulfillment of the
Requirements for the Degree of
Master of Science
at the
Massachusetts Institute of Technology
June, 1961
Signature of Author
Departmen}
f Electrical Engineering, May 20, 1961
Certified by
'f
Thesis Supervisor
Accepted by
Chairman, (Dd-artmental Committee on Graduate SSXalet s
r'.
A LOW-DRIFT TRANSISTORIZED DIECT-CUREENT
AMPLIFIER
by
James Louis Sitomer
Submitted to the Department of Electrical Engineering
on 20 May1961 in partial fulfillment of the requirements
for the degree of Master of Science.
ABSTRACT
New packaging techniques and new semi-conductor devices
are investigated for use in a direct-current amplifier.
Three
amplifiers are designed and evaluated for use in a servo-loop
which switches the amplifier alternately from one
load
to another.
The first amplifier design evaluates the use of two silicon
planar transistors packaged in a single can for a straight d.c.
amplifier.
The second amplifier design again utilizes two silicon
planar transistors used as switches for a chopper d.c. amplifier.
The last design considers the use of a pair of field-effect
transistors in the first stage of a d.c. amplifier.
Thesis Supervisor:
Title:
Paul E. Gray
Assistant Professor of Electrical
Engineering
Acknowledgment
The author is grateful to Professor Paul E. Gray of the
Electrical Engineering Department for his guidance and advise
while acting as thesis supervisor.
Appreciation is expressed
to all members of the PIPA Development Group, Miss Ila Lee
Miller and Mr. Philip Paine of the Instrumentation Laboratory,
Massachusetts Institute of Technology.
This report was prepared under Project 53-138,
Division
of Sponsored Research, Massachusetts Institute of Technology,
sponsored by the Bureau of Ordnance, Department of the Navy,
under Contract NOrd 17366.
The publication of this report does not constitute
approval by the Bureau of Ordnance, US.
tation Laboratory of the
therein.
of ideas.
findings
Navy or the Instrumen-
or the conclusions contained
It is published only for the exchange and stimulation
Table of Contents
Page
The Problem
9
1.1
Introduction
9
1.2
The Application
9
1.3
The Specifications
9
Chapter I
The Conventional D.C. Amplifier
15
2.1
Difficulties of D.C. Amplifier Design
15
2.2
The Differential D.C. Amplifier
16
2.3
2.4
Drift in a D.C.
19
Chapter II
Differential Amplifier
Practical Design of the D.C. Differential
Amplifier
20
2.5
Temperature Effects on the First Stage
22
2.6
Performance of the Amplifier
27
The Chopper D.C. Amplifier
34
3.1
The Chopper Modulator
34
3.2
Performance of the FSP-1
39
3.3
Practical Design of the Chopper Amplifier
41
3.4
Frequency Considerations
3-5
Drift of the Chopper
43
46
The Field-Effect Transistor Amplifier
47
4.1
The Field-Effect Transistor
47
4.2
Field-Effect Transistor Amplifier
49
4.3
Temperature Compensation of the Field-Effect
Chapter III
Chapter IV
Amplifier
54
Practical Design of the Field-Effect
Differential Amplifier
56
-4-
Page
Chapter V
The Current Switch
60o
5.1
Performance of Transistors as Switches
6o
5.2
Design of the Current Switch
61
Closed Loop Dynamic Performance of the
Amplifiers
66
6.1
Evaluation of the Amplifiers
66
6.2
Performance of the FSP-2 Amplifier
66
6.3
Performance of the Chopper Amplifier
67
6.4
Performance of the Field-Effect Amplifier
70
6°5
Summaryof Performance
73
Conclusions
76
Conclusions
76
Aol
Analysis of a Single-Stage D.C. Amplifier
78
A.2
Analysis of a Differential D..C.Amplifier
79
B.1l
Analysis of a Single-Stage FE Amplifier
81
B.2
Analysis of a Differential F.E. Amplifier
82
Chapter VI
Chapter VII
7.1
Appendix A
Appendix B
84
Appendix C
.1ol
Important Characteristics of Fairchild FSP-1
Material Transistors
84
Co2
Important Characteristics of Fairchild FSP-2
Matched Transistors
84
Important Characteristics of Crystalonics
C610 Field-Effect Transistors
84
C.3
85
Bibliography
-5-
List of Figures
Figure
1.1
The Schematic Block Diagram of the System
Page
10
1.2
Signal Block Diagram
12
1.3
2.1
Transient Response of the System
Single-ended D.C. Amplifier
13
15
2.2
Differential D.C. Amplifier
16
2.3
FSP-2 Amplifier Schematic
21
2.4
Output of a Single-Stage FSP-2 Amplifier
23
2.5a
Base Characteristics of FSP-2 No. 1
24
2.5b
Base Characteristics of FSP-2 No. 2
25
2.5c
Base Characteristics of FP-2
No. 3
26
2.6a
VIM - Temperature Curve FBP-2 No. 1
28
2.6b
VBE - Temperature Curve FSP-2 No. 2
29
2.6c
VBE - Temperature Curve FSP-2 No. 3
30
2.7
Amplifier Test Circuit
27
2.8
Amplifier Temperature Drift
32
2.9
Closed Loop Test Circuit
31
2.10
Closed Loop Frequency Response of FSP-2 Amplifier
33
3.1
Chopper Amplifier Block Diagram
34
3.2
Simple Chopper
35
3.3
Transistor Chopper
35
3.4
The Differential
3.5
Voltage Offset of a FSP-1
40
3.6
Chopper Amplifier Schematic
42
3.7
Signal Block Diagram of the Chopper
44
3.8
Modulating Signal Waveform
44
3.9
Spectrum of F s (w)
45
Chopper
-6-
38
Page
3.10
Convolutionof F(n) and Fs(w)
45
4.1
The Field-Effect Transistor
48
4.2
Characteristics of the Field-Effect Transistor
48
4.3
Equivalent Circuit of the Field-Effect Transistor
49
4
Transconductance as a Function of Gate Voltage
50
4.4b
Drain Current
50
4.5
Single Stage Field-Effect Amplifier
51
4 .6a
vs. Temperature for Silicon
Conductivity
52
4.6b
Saturated Drain Current vs. Temperature
55
4.7
The Differential Field-Effect Amplifier
53
4.8
Temperature Compensation
54
4°9
Field-Effect Differential Amplifier Schematic
57
.4a
4.10
Closed
as a Function
of Gate Voltage
Loop Frequency Response of the Field-Effect
Amplifier
59
5.1
A Transistor Switch
60
5.2
Transistor Switch Characteristics
60
5.3
Inductive Compensation
61
5.4
5.5
6.o
Current Switch Schematic
Switch Transients
Closed Loop Equipment Set-up
63
64
66
6.1
FSP-2 Amplifier
6.2
FSP-2Amplifier Drift Test
69
6.3
ChopperAmplifierWaveforms
71
6.4
Chopper Amplifier Drift Test
72
6.5
Field-Effect
Amplifier Waveforms
74
6°6
Field-Effect Amplifier Drift Test
75
Ao1
Single-stage
D.C. Amplifier
78
A.2
Differential
D.C. Amplifier
79
Waveforms
-7-
68
Page
B.1
Singloetage Field-Effect Amplifier
81
Bo2
Single-Flow Graph of the Field-Effect Amplifier
81
B,3
Differential Field-Effect Amplifier
82
B.4
Signal-Flow Graph of the Differential FieldEffect Amplifier
83
-8-
ChapterI
The Problem
1.1
Introduction
Rapid development in the art of semi-conductor device manufact-
uring has given the circuit designer new solid state components with
greater stability and reliability than was possible only a short time
ago.
More and more instrumentation and control systems are being con-
structed with semi-conductor devices as the critical components.
Perhaps one of the more difficult problems of instrumentation is the
It is the purpose of this paper to in-
direct current amplifier.
vestigate the newer semi-conductor components available and apply
them to the design of a highly stable direct current amplifier.
1.2
The Application
The amplifier will be used in a feedback system which accurately
controls the current in an inductive load,
block diagram of this system.
Figure 1.1 is a schematic
To further complicate the matter, the
current will be alternately switched from one load to another.
A
highly stable source such as a standard cell can be used to supply
the reference.
The sensing resistor can be a high precision, low-
drift wire wound resistor.
system is the amplifier.
The only other critical component of the
The problem is that any drift of the ampli-
fier can not be distinguished from signal changes and, therefore, it
is desired that the drift of the amplifier referred to the input be
less than the smallest signal that the amplifier will see.
1,3
The Specifications
Defining the current in the loop that is being controlled as So}
total system performance can be expressed:
-9-
11I
Figure 1.1
Stability of controlled current
(1.1)
11
Referring to Figure 1.1 it is seen that
IRs Rin
B5
Rin
B
where Rin is the input resistance of the amplifier and since
,r
Ve
= _
Vr
,
V
=V
s
Rs Rin
Io R
+s
R
Rin
Where-Ye is the error voltage at the amplifier input it is seen that
the error signal to the amplifier depends upon its input resistance;
and also that any change in input impedance will affect the amplitude
of I.
Defining
p
",
si
i
the change due to input resistance variations can be found to be
F2
(R + B5 )2
AR
If we assume that Rin
ARp
flin
7 Rs, then
(n 2 Rin
.in
and
ARp
Ja
Rs
ARin
B
Lin
(1.2)
Bin Rin
Ep
If we associate an output resistance with the reference a similar
analysis can be made.
Defining the voltage at the input of the amplifier
as V
, it is seen that:
VR
R + Rin
Rin
R
and it is found that:
VR
RR
V
R.
'in
Rin
(1.3)
R.
in
Solving both equations (1.2) and (1.3)-for Rin.
In
Rin
R
in/in R
AY
s
Stability of the input resistance (1.4)
Stability of the sensing resistor
-11-
Rin =
in
AVR
in
Stability of the input resistance
Stability of the reference
V
(1.5)
These equations will be used to determine input resistances
necessary in the designs that follow.
For the present, consider the two transistor switches in Figure 1.1
to be ideal.
Then, for either switch position the following block
diagram is a valid representation of the system.
Figure 1.2
here the parameters are as follows:
VR
the reference voltage
Vs
the feedback voltage developed across the feedback resistor
Vo
the output voltage of the amplifier
Vp
the supply voltage
V
the drift referred to the input of the amplifier
D
Y
the total admittance of the load and the sensing resistor
Rs
the sensing resistor
Io
the controlled load current
A
the voltage gain of the amplifier
the significant break-point of the amplifier
The only inputs to the system are the voltage reference, amplifier
drift, and power supply variations.
Dynamic performance of the loop
would depend only on power supply variations and switching.
Now if
the switches are not considered ideal and have saturation voltages
that are different and if the load in both switch legs is different,
then switching will cause a step voltage change across these elements.
In terms of dynamic performance, the effect on Io is the same as for
a step change in Vp.
If switching transients are neglected, the blaock
-12-
diagram of'Figure 1.2 will hold for the switching system with Vp
containing variations due to mismatching of loads and switches.
From the block diagram of Figure 1.2 the following relationships
hold:
Io(S)
Vp(s)L=
Y
s
Y
+ AsY
1 +ARY
1+
Io (s )
s
s
+
+
+ 1
1 + ARsY
+1
(1.6)
X
1 + ARSY
where K
Considering Vp(s) to be a step voltage of magnitude V,
Io(s) is
found to be:
I() YVm
[1 -
K
(1.7)
and finding the inverse LaPlace transform leads to:
io(t)
VmY[l - (l-K)e-K/Tt]
Assume that AR S Y >>
o(t)
1
then:
[1 + AYeK/t]
m
(1.8)
ARs
'~~~s
To
t
0
0
±
Figure
-13-
1 3
The transients shown in Figure 1.3 are added to the constant
steady state value of I
and for symmetrical switching the average
value of these transients is zero.
Since the possibility for un-
symmetrical switching does exist an attempt will be made to minimize
the error due to this transient over one period To
From Figure 13
the following definitions are made:
V
Ions. = A
o.s.
AR
= Offset current
s
I
V Y
Peak transient current
e
m
Then the average current over one period is:
o
Iv
+
s
1 T
e -K dt
I
=II
Qv
+ I
+
T
Os
o
For T >-
K
-K T
(1 - e
)
I
v
Ihv
o
+I
+
os
T
eT
(1.9)
K
If the current to be controlled is 100 m.a. and the total offset
is 1 microamp, the gain can be solved for.
meters).
(Knowing the other para-
Considering the known characteristics of the system, V
can be as much as 24 volts.
With R
= 60 ohms and Y81
the gain is
found to be:
m
I o.S RS
24 -4
1X 0-6x60
-4Xl
x
06
400:000
0,oo
Allowing the average error for the transient also to be 1 microamp,
the time constant
can be found from equation (1.9).
KT 'ARYT
I 'Ie error =A
Ie av
for T
500 micro seconds
Ie
t
I
error
av
24 X A-l
5 X 10
30 m.a.
-4
so that the break frequency of the amplifier should be at fb
~
314 cps.
The previous results were determined by assuming that the transistor
switches are ideal and that they switch simultaneously.
is not exactly true.
This assumption
The effects of non-ideal switching will be discussed
in a later section.
-14-
Chapter II
The Conventional DC.
2.1
Amplifier
Difficulties of D.C. Amplifier Design
The design of transistorized d-c amplifiers has proven difficult
due to the variations in transistor parameters.
The major cause of
variation is temperature with secondary effects caused by the drift
with time of these parameters.
The critical parameters in a transistor
are the base to emitter voltage (VBE), the collector to base leakage
current (ICBO), and the d-c beta (hFE).
In a transistor amplifier,
any drift of these parameters produces outputs which can not be distinguished from outputs caused by a signal change at the input.
0
V
Figure 2.1
Figure 2.1 is a schematic of a single stage amplifier.
As shown in
Appendix A, analysis of this stage leads to the following expression.
V
V
cc
- V
LV.
A
+hfRL v
in
Where A = R s + (1 +
+hFERlEL
V BE
hFE)
-15-
+A
CBO
CBo I
(2.1)
In equation (2.1):VCC
dependent variables.
ICBO
V,
and h.
have been treated as in-
As a first order approximation, so as to under-
stand the effects of the various transistor parameters, this assumption
is valid.
VEX
hFE, ICBo depend primarily upon the base current,
junction temperature and ambient temperature.
transistor the effect of IBO
For the silicon planar
is negligible (typically less than 10-8
amperes) compared to the other parameters so that it will be neglected
for all further analysis.
Over small variations of base current hFE
can be considered essentially constant.
For the transistors studied
0
in this paper, doubling the base current changes hFE by 10% at 25°
C.
Over a limited range VBE can be expressed as a linear function of the
base current, where VE
= RBE IB .
into equation (2.1) then A
If the dependency of VBE is inserted
Rs + RBE + (1 + hLe)RE.
For the transistors
tested RBE is found to be about 2.5 K ohms. for a base current of 15
microamps.
The temperature variation
of VBE and hFE at around room
temperature is large enough to cause large error voltages at the output.
One other deficiency of this circuit is the need for a well-stabilized
power supply.
2.2
The Differential D.C. Amplifier
The shortcomings of the single-ended amplifier stage can be reduced
considerably by use of the Slaughter circuit.
representation of this circuit.
Figure 2.2 is a schematic
The analysis is
.
.
Figure 2.2
developed in Appendix A with the following result:
-16-
-h
bE1l"LI
v3 - 4 -
VO
hE2
"r2
+
+ i(
R c + R e2
1
+
R c + Rel
2[L+ -R R
(1 +
E)(v
1
2 -
where
c
l (V
V
R +R
A
WI1
J2.
(v
+ l )RL2
_i2(
-
V3 1 )
(2.3)
R
+
2
) +
(1
)
R3
+
VBEl)
vE 2 )
e i
+_i2}
+_(
(1+ .h2)](V1
'1J
i
0
RS+
R2
( + i2t
++
2
( + 1)(1 + i 2) (2.4)
Equations (2.3) and (2.4) are nearly exact; the only approximation made
is the neglecting of the output impedances of the transistors.
The out-
put impedance is normally about 50K ohms for the transistors used in the
common-emitter configuration.
Again, V
and h
have been chosen as
independent parameters so that their effects on amplifier performance
are placed in evidence.
Assuming that
Rel - Re2 = Re, and hC>>1
studyF1 FE2
'- AR
o
+ -
+
E
1hFE FE2
'
E (n2P
ReL
''
2
he
1) RL
+
l1
hF
ihE
1)r +
(V2 - V1)
iE1
" I
= EL2
=
B
2
-=
then equation (2.3) reduces to;
vl
(V2
L
h.FE
' '
(i1.
a-i2
-
e
BE1
and
2
EL
(Tw1-
VE2)
V19
925)
hE2
i
A study of equation (2-5) reveals that if VI1
- V2)
(BE
V'
" VE2
and hll
s
i2
and
if the rate of change of these parameters with respect to temperature is
also equal, then the effects of these parameters have canceled.
due to the differential action of the amplifier.
This is
Even if these parameters
are not perfectly matched, it is reasonable to expect that temperature
effects have been greatly reduced.
-17-
Power supply variations have completely
canceled out.
Use of this type of amplifier connection has eliminated
the undesired characteristics of the single-ended amplifier.
Further approximations to equations (2.4) and (2.5) will point
out useful facts necessary to the design of a differential amplifier.
Re VE
R , R
Assuming that R)
2,
V
1
then equations (2.4) and
(2.5) can be combined and reduced to:
v
FE
-
1FE2
1 i+
(2.6)
V1 )
L (V2
2
RS
R
2)
2
hFE 2 Re
1
If the transistors are perfectly balanced so that hFEl ~ hFE2 - hFE, then
Vo = RS+
(v2 - 1 )
%
R
(2.7)
which is the expression for the voltage gain of the differential amplifier
If, however, R
stage.
gain goes to infinity.
s
R
e
= 0 then it would appear that the voltage
As found in the analysis of the single-ended stage,
the assumption that VEE is independent of
this result appears because of
Appendix A shows the effect of considering the dependency of
the input.
t
r
gE
4
-
n+eOwl+
UIJU.
"ltl
VV0 =
I±LlP
ST
:
h co` ;+;
(rrc;c;ev
U
UJ
%,UL0
JLUt.LL"6
LJi
Ui
LL7,
+ho
-ForArM
Un
U1
l
ll1At
UllU
RL (2 - V1Re
(2.8)
where RBE is still defined as in section 2.1,
Another important measure of quality of a differential amplifier is
its common-made rejection (CMR).
The output, as previously defined, is
One form of unwanted signal or noise is
taken between the collectors.
This signal may
the signal that appears simultaneously at both inputs.
be due to pickup through stray wiring capacity7 or appear due to power
supply variations or to a number of other reasons,
If there are un-
balances in the amplifier, an output voltage will occur.
The output
terminals have no way of distinguishing this signal from a wanted
signal and therefore the unwanted signal should be as small as possible.
CMR can be defined as the ratio of the gain Ac
of the amplifier with
the input signals equal and apposite (differential signal), to the gain
Ad of the amplifier with the input signals equal and of the same polarity.
So that for equation (2.3) with variations due to VEE ignored and all
symmetrical resistors matched:
-18-
a n(E1 + 'E(Si + Re +1Rc) +
CMR WL
ACM'4 .
hFE
and assuming that
CMR - 4hFE1
>>
-
hF?1 -)(R
eI
RC
+ RS)
1 then
M R2
- hR 0)(e
Nh(hE2
(29)
The higher the common mode rejection, the better the amplifier will
reject common made signals.
Ideal matching of hFEts will give the best
performance but for the non-ideal case, the larger Rc, the better the
common mode rejection.
2.3
Drift in a D.C, Differential Amplifier
random
Drift in an amplifier can be divided into two categoriess
and predictable.
The latter can be traced to the variation of known
parameters such as temperature and power supply.
Once the limits of
these disturbances are known, drift performance of any
be easily determined.
amplifier can
Random drift can not be determined in advance;
it is a function of parameters that vary in a manner difficult to
describe.
It has been pointed out in section 2.2 that use of a differential
mode of amplification reduces the effects of drift considerably.
Equation (2.5) indicates that if both hFE and VEE were to have the
same rate of drift and if both values were matched for a particular
pair of transistors then surely the effects of these parameters would
The problem that exists is how to achieve this matching.
cancel.
Fairchild Semiconductor Corporation has come close to solving this
problem.
Instead of trying to match two transistors from one or more
production runs, they choose their matched transistors before they
are even placed on a header.
This selection consists of taking the
silicon dice from the same slab of the production run.
The planar
technique of diffusion allows the transistors to be selected before
encapsulation in a transistor package.
After the units have been
selected they are both mounted on the same header and sealed in the
can with six leads coming to the outside.
isolated.
The units are electrically
Clearly, thermal gradients between transistors are kept to
-19-
a minimum by this technique if the transistors are operated symmetrically
so that internal heating may be neglected.
Also, it is hoped that drifts
of the transistor parameters due to aging will be in the same direction.
For the purpose of this paper, three matched units type FSP-2
were obtained from Fairchild,
No specifications other than those
listed in Appendix C were asked for.
Performance tests to determine
the devices stability with temperature and time were conducted.
Ex-
perimental determination of some parameters of signifigance were also
determined,
2.4
The results of these tests will be discussed in later sections.
Practical Design of the Differential D.C. Amplifier
Figure 2.3 is a schemetic of a three stage differential amplifier.
Each pair of transistors is a FSP-2.
In the first stage the common resistor has been replaced by transistor Q5 with its associated circuitry.
The zener diode in the base
circuit of Q5 assures that nearly constant collector current flows.
Therefore, Q5 is operated in the common base mode, causing its output
impedance to be high and as has been shown this will improve the common
mode rejection.
The collector resistors are +1% tolerance low tempera-
ture coefficient resistors with their values chosen so that 10 volts
appears at each collector when 1 milliamp of collector current flows.
This current was chosen to take advantage of the higher hFE at this
value and to keep the load impedance of this stage from being too large.
Generally, it is true that the noise should be a minimum at a lower
current, but the tests later showed that noise was not a significant
factor,
A potentiometer is used to balance out any mismatches in the
circuit.
Under operating conditions, the voltage at inputs 1 and 2
is 6 volts and the output voltage is 85 volts.
This neccessitates
raising the voltage level at each successive stage.
The second stage design is similar to the first with the exception
that emitter resistors are used so that loading of the first stage is
not too large and a resistor is used for the emitter coupling.
The third stage converts the differential signal to a singleended signal by taking the output only at the collector of Q6 and
shorting out the resistor in the collector circuit of 05.
-20-
0
CZt.
1-
m,
Q o
i lil
0
o
0
4.
0IC
0
I
0.
'iure 2z
Figure 2.3
- 21-
The supply voltages are all taken from a tapped, zener regulated
supply.
The addition of the zener diodes further helps to regulate
the voltages supplied to each stage.
Capacitor C1 is provided to limit the upper cut-off frequency and
its effect will be discussed in a later section.
Feedback is incorporated in the amplifier in order to lower the
Feedback also
gain to the value determined in the specifications.
helps to accomplish closed loop stability and to limit the effect
of hFE variations on gain from unit to unit.
2.5
Temperature Effects on the First Stage
Tests to determine temperature dependency were run so that per-
formance of the FSP-2 transistors could be evaluated.
The results of
the tests also were studied to see if transistor performance could be
estimated by simple test procedures,
Temperature control was accomplished by use of a Delta Temperature
Chamber that can control to 10 Centigrade.
The use of liquid CO2 to
cool the chamber quickly allowed tests to be run in a short time at
temperatures below ambient as well as at elevated temperature.
The
output of the first stage was monitored using a Hewlett Packard Microvolt ammeter.
Figure 2.4 is a graph of the output variation as a function of
temperature for the three FSP-2s,
The voltage gain of the stage
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Unit 2 has a temperature
coefficient, referred to the input of this amplifier, of only 8.16
microvolts/oC. at 27°C.
this range.
It also shows the most linear variation over
Units 1 and 3 exhibit greater temperature coefficients at
270 C but at higher temperatures there are bands where the coefficient
is less than that of unit 2
three transistor-pairs.
in Figure 2.5 a, b, c.
There are marked differences in the
A graph of the base characteristics is shown
The base to emitter voltage of unit 1 follow
very closely, except at high base currents.
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there is a.heating of the transistors due to the large collector
currents flowing.
about -2mv per °C.
curves.
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The change is evident in the dropping off of the
Since the hFE's are not perfectly matched, the power
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dissipated in the transistors is not equal due to the different
collector currents.
This would cause some of the mismatch, but it
is believed that the greatest contributing factor is AVBE.
unit 2 nor 3 has its hFEt s exactly matched, but the VE
does not occur at higher base currents.
very closely over all base currents.
differential
Unit 2 appears to be matched
It is also true that this unit
had the best temperature coefficient.
1 and 30 microamps.
Neither
Unit 3 is poorly matched between
These data would suggest that unit 2 had the best-
matched characteristics, and this was borne out by previous tests.
Figures 2.6a, b, c show the variation of VE
as a function of
temperature at a constant base current and collector voltage.
is very close agreement for all three units.
There
Unit 3 is the only one
showing any marked differences.
2.6
Performance of the Amplifier
With the amplifier operating open loop, data would be hard to obtain
because of the high gain.
The voltage gain of the amplifier is greater
than 1 million and therefore feedback is used to lower the gain so that
measurements may be made more easily.
one test setup that was used.
10,000 amplifier.
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,q',,·r
lIl
a
i
I
Figure
-30-
2. 6 c
r
t
i
i
Ii
.
six volt battery was a standard cell.
With unit 2 in the first stage,
the temperature drift of the amplifier is shown in Figure 28.
The
drift was in close agreement with the expected drift of the first stage alone.
For power supply variations of +10,
the worst off-set occurred when
both the +120 volt supply and the -30 volt supply decreased to +108 volts
and -27 volts.
The variation referred to the input was 75 microvolts,
Tests for frequency response and long-time drift were taken in the
test setup of Figure 2,9.
This is the system loop without switching and
wer levels.
also operating at lower power
12 milliamps.
The current being controlled is
Over a fifteen hour period, the peak to peak drift was less than
10 microvolts with the amplifier at constant temperature,
4V0 V
6v
500.5K
1
$oo.-I%
Figure 2.9
Without the capacitor across the input to the second stage, the
system oscillates at a frequency of 320 K.C.
Since this is a three
stage amplifier, this might be expected due to its high gains
Figure
2.10 shows the effect of this capacitor upon the frequency response.
As the capacitor is increased in value, the damping of the system is
also. increased as is evidenced by the reduction of the peaking.
The
cross-over slope is -12 db/octave so that this system looks like a
second-order system at lower frequencies.
A measure of stability of
a system is its phase margin, and for a second-order system a good
approximation is:2
pm
(2.10)
'A
-31-
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-33-
.. c ll ..
w I
I tI
- - - - -
- -
-
-
. . L ...
. . . .I
I . .
Ir
661&66.66666W
I I
Where
is the damping coefficient.
From standard curves of second-
order systems, it is found for curve C that
is .25
so that
pm
28.5°.
This indicates that it will take another 28450 phase shift to make the
system go absolutely unstable.
For comparison, curve A has about 9
margin.
2Deltoro V and Parker, Principles of Control Systems Engineering
Dept. o Electrical Engineering, UoCDoNYo
L'..
-33a-
phase
Chapter III
The Chopper D.C. Amplifier
3.1
The Chopper Modulator
It has been pointed out that the most difficult design problem in
"straightv d.c. amplifiers is the drift of parameters.
problem is the use of a chopper modulator.
A solution to the
The modulator shifts the in-
formation from being centered around zero frequency to being centered
This-shift in frequency allows the signal
around some carrier frequency.
to be amplified by conventional a.c. amplifier techniques.
Due to the
capacitive coupling of an a.c. amplifier, VBE and hFE drifts are not amplified by successive stages and are thus negligible as long as the
amplifier remains in its linear region,
After amplification, the signal
is demodulated.
Figure 3.1 is a simple block diagram of a chopper amplifier.
The
input signal is modulated by the carrier signal wc which is produced by
the oscillator.- After amplification the signal is demodulated by the same
oscillator so that synchronism is maintained.
V
Vo
Figure 3.1
-34-
r-
As shown in Figure 32
switch.
the chopper modulator is a synchronized
In practice this is very often a mechanical switch which has
the advantage of being a passive device that comes very close to having
zero impedance when closed and infinite impedance when open.
When the
switch is open the input appears unattenuated at the output terminals;
when closed, the output is zero.
The limitations of the mechanical chopper
are its short lifetime, limited switching speed, and its size.
An answer
to these shortcomings is to use a transistor switch.
Vo
R%.~
--
4I
t
-IC
IL
Figure 3.2
Transistors operated as switches do not suffer from any of the mechanical
chopper deficiencies but, instead, have their own particular drawbacks.
Figure 3.3 shows a simple transistor chopper along with its equivalent
circuit.
The switch is considered ideal.
V
is the voltage from collector
lC
,
vin
I
_LFLF
(h)
(6)
Figure33
-35
to emitter when the switch is closed with R s being the dynamic resistance.
kprepresents
-When the switch is open the current
the leakage current.
It
is assumed that the driving source is positive enough to drive the transistor
If we consider the switch open, then
into its saturation region.
oRLR
v RL
e
VIn
elL
.-
%1I +
I
(3.1)
p
and for the switch closed
vfL
R
Vp - E
RC
Vin +V. M.RR-
RS
Vo= A
'h
Ip
(3,2)
A
where
I~ R3s +RL c
(303)
C
It is clear that the output voltage is a function of the transistor parameters VpI I,
and Rs.
These parameters are functions of the operating
conditions and of temperature for any transistor,
Clearly, then, the drift
If we consider that EL>> RC
problem has not been completely solved.
(3.4)
Rcp
Vo M Vin
for the switch closed.
then
A lowering of Rc would decrease the effect of Ip,
but this would also lower the impedance seen at the input terminals to the
chopper.
If, also, RLT> S', 1>>
V-V
o
C
SR, then
+V -RIsp
3-5)
in +p
for the switch closed.
Therefore, even if
the effect of V
limit the magnitude of the signal that could be detected.
would
For a typical
I will
p
usually be less than 100 milli-microamps at 250 C and s will normally be
silicon transistor V
is in the order of 100 millivolts or more.
P
less than 200 ohms.
and I the transistor is often
P
p
operated in the inverted connection, the roles of collector and emitter
In order to reduce the magnitude of V
are interchanged.
The advantages of this mode of operation are reduced
offset voltages and leakage currents.
An approximate expression for the
offset voltage in the normal connection isl
kT 1
V
1
kT 1
(l+ 1
--. .. n
1 Sperry Semiconductor Division "Chopper Transistors" Technical
Application Bulletin No. 2107 November 1960.
-3O-
(3.6)
I
where
k - Boltzmannls constant 1.38 X 10- 23 joule/°K
T - temperaturedegrees Elvin
q - electric charge 1.6 X 10 ' 19 coulombs
*I- forward current transfer ratio measured near the saturation region
with collector and emitter reversed in the common base configuration
(inverse alpha).
PI- inverse beta near the saturation region
If the expression for the offset voltage in the inverse connection is found,
it is
Where
kT I 1
"P-n
Pi
l n +
k
q)
q
q
..
N
(37)
N and )N are the normal alpha and beta near the saturation region.
Normally PI is much less than
and
m
=
2 then
PI
VPN
N so that VpI is lower than VpN.
If AN
=
50
1 , a considerable reduction.
20
A relationship can also be expressed for IP
so that for the normal
1 -
connection
1--OB I
+N
(38)
and for the inverse connection
-.1 -aO
1 -DC
Z^
In
Where Il
.I Bo.L
+ 9I
EB
(39)
1 +ja
is the collector to base cutoff, current and IEBO is the emitter
to base cutoff current.
Again, it is seen that the inverted connection has
a distinct advantage since ·.(NIEB
= OIICB0,
Therefore', the ratio of offset
currents is
PI
1 +I
i;
1 +
iEd o
1 +
0CBO 1
The dynamic resistance f
I
E
I
CotN
1
25
can also be described for the normal and in-
verted connections with the following approximate results.3
Rs
kT
i N
(3.10)
2INB
2~I!PNi+i
IS(l+.0o
BI
2IBid
3Ibid
-37-
(3.11)
where IB is the base drive.
There is little difference in the order of
magnitude for either connection, although RSI will be slightly lower than
RSN.
RS is also a function of base drive.
A method of further reducing the effects of Vp and
two transistors in the manner indicated in Figure 3,4.
is to connect
This is a differ-
ential chopper mode where both transistors are turned on and off simultaneously.
The input signal Vin is equal to V 1 - V 2 and the output signal
Vo is equal to V 3 - V 4 .
If RLl X RL2
L
V L 2+ RC2 2
V
vI RL
RLL+ R1
1
R
It is seen that for the switches open
-1
%,C2
vo 3 EE + RC (V-V)
1 -2
+
C2 - -L2
L
+ R 1
BI I
2 +RCLP2
then
v
(
1
_)
(310)
v_ ,,.,
V.,.,
%r
-
- 'W,
t,
a
16,
I
V/L
(6)
(')
Figure34
Any error due to the offset current is constrained to the difference
between transistor leakage currents which for a matched pair of transistors
may be made quite low.
Vo,
f,__
sl
RL
RCl Rsl
-
.
Al
For the switches closed
11L2Rs2
"Ll c I
%L2 Rc2
-vA-P 2 : V2+ 'L cvpl_ A ,
vp2
2 Rc2 Rs2
i pI+
EL2
- Ip2
2~~~~~~~~'~-38-
(3.11)
where L
RL1 Rsl
1 + RL1 Rl + R1 Rcl
4J RL
Rs2 + RL2 Rc2
2
and for RlE
Y0
R2
RL, RcL
-V2) +
A(V,
+
Rs 2 Rc2
Rc2
Rc R
(VP,
Rs2
P2)
Rs
(IPl
1
A
P2)
(3.12)
Errors with the switch closed due to Vp and Ip are again constrained to
differences.
A matched pair of transistors used for a chopper application brings
up many problems such as those mentioned in Chapter 2.
tend to be the major source of trouble.
the same technique discussed before:
Drifts of Vp and Ip
A solution to the problem is to use
two transistors in a single can. Fair-
child has available silicon planar transistors selected primarily for chopper
application.
In this case only five terminals are brought out of the device.
The transistors have common collectors as shown in Figure 3,4a.
The device
is called a FSP-1.
3.2
Performance of the FSP-1
By using a Tektronix transistor curve tracer it was determined thatPN
is about 50 and that
I is about 2 for two separate units (four transistors)
tested, so that the ratios developed in section 31
nitude.
amperes.
are of the proper mag-
Fairchild lists the maximum value of IEBO at 250C of 10 X 10-9
Using equation (3-9) it is found that IpM
So if RL>7>R
=
-377 X 10-9 amperes.
and if EL = 100K then the maximum offset due to leakage current
on one side of the chopper of Figure 3,4(b) would be only 37-7 microvolts.
Since differences are used in the differential chopper, this offset due to
leakage can be ignored when the switch is open.
Fairchild claims a maximum offset voltage of 100 microvolts at IE
and IB
300 microamps.
0.
Since it is conceivable that emitter current might
be flowing in the differential chopper, tests were conducted at emitter
currents of 13
milliamps, 110 microamps and 10 microamps to determine the
effect of temperature upon the offset voltage.
Figure 3,5 shows the results
of experimental data obtained using a Delta Temperature chamber to control
temperature.
At the high current AVp has a slope of 10 microvolts per °C
-39-
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!II
. Figure 3 5
whereas at lower currents this is decreased appreciably.
For a current
of 110 microamps there is actually a region in which the differential
voltage is essentially constant over ten degrees.
It also appears that
at lower currents the transistor offset voltages change at different
rates so that the temperature coefficient changes sign.
From this data
it would seem that the current should be kept below or around 100 microamps for minimum effect of VpI if emitter current must flow in the circuit.
Another consideration of importance is the frequency of chopping.
Up to this point, the capacitance of the chopper has been neglected.
The
collectors of the transistors have a capacitance of about 25 picofarads
maximum.
When the transistor is turned off the capacitance must be charged.
If the rise time of a circuit is defined as the time that it takes the output to rise from one-tenth to nine-tenths of its final value then it is
found that the rise time is 4
tr
2.2 RC
(3-13)
If the input signals are at a six volt level with respect to ground, then
Rc should be about 50K in order to operate at the desired current level.
For this value of resistance the rise time is 2.75 As.
To minimize errors
due to changes in rise time with aging and drift of components it 'is necessary to chop at a low enough frequency so that the rise time is short
compared to half the period of the chopper frequency.
chosen is 1 K.C.
The chopping frequency
This allows the rise time to be slightly more than 1/2%
of the half period,
It is reasonable to expect that RC will not drift more
than 10% in value so that the total change of rise time should be less than
1/20% of the half period.
3-3
Practical Design of the Chopper Amplifier
Figure 3.6 shows one possible chopper amplifier design.
The design
is divided into five sections.
The oscillator is a simple astable multivibrator designed to oscillate
at 1 K.C.
The output swings from approximately 14 volts positive to 5
volts negative, delivering about 600 microamps to the FSP-1 transistors
and 140 microamps to the 2N697 demodulator.
The chopper is the differential configuration discussed earlier.
Since the transistors are on only half the time, the impednace is 50K
Millman and Taub "Pulse and Digital Circuits" Chapter 2 P
New York 1956
-41-
41 McGraw Hill Co.
4
lI
I
Figure 3.6
- 42-
'1
when the switch is closed and infinite when the switch is open.
resistors are used for the reasons discussed in Chapter 1.
Stable
The diodes
used in the base-collector circuit are protective devices and limit the
reverse voltage to the breakdown of the IN660 diodes, about 500 millivolts.
The capacitors are added in the base circuit in order to improve the turnon switching time.
The first stage of the a.c. amplifier is a differential to singleended stage.
As in the d.c. amplifier the differential stage has the
advantage of high common mode rejection.
The small signal beta of the
2N336 is about 100 so that use of a lOK in the emitter branches of the
input stages allows a high input impedance.
is about five.
The gain of the first stage
The second stage is direct-coupled to the first, thereby
allowing the second stage bias scheme to be as simple as possible
A
high voltage gain is accomplished by using a TI 474 high beta transistor.
The small signal beta is about 150 at the bias level used.
A low im-
pedance emitter follower output is used to drive the demodulator.
Internal
d.c. drifts within the amplifier will not be coupled to the demodulator
because of the capacitive coupling.
The demodulator stage uses a synchronized switch to sample the output.
The action is similar to the modulator action, except that errors caused
at this stage by offsets are not as significant as at the input, since any
offset here is divided by the preceeding gain when referred to the input
as drift.
The switch section drives a filter with a break frequency
below 10 cps.
The filter then drives an output d.c. stage with a control
to set the output at 85 volts for a zero differential input.
3.4
Frequency Considerations
In order to illustrate more completely the effect of the chopper
frequency on the bandwidth, a frequency domain analysis on a chopper
Figure 37
model will be done.
is a block diagram of a chopper amplifier.
Consider that the bandwidth of the amplifier is large enough to pass
fl(t) completely.
The form of f(t)
the Faurier transform is
-43-
is as shown in Figure 3.8, so that
F (n)
=
T f(t)e-jnwlt dt
0
e-jnwlt dt
sin(nwl T/4) e -jnwlT/ 4
1
2
where T
1
(3.14)
nwT4
l()
--
P, (-~
fS (jo
4
I,\ l
-C{(*1
-M
"i-1
pro(t)-PO (°)
Figure 3,7
If the input signal is considered to have a rectangular spectrum with
bandwidth of 2ws as shown in Figure 39
then Fl(w) can be found by con-
volution of Fm(n) and Fs(w) so that
F1 (w) x
Fm( ) Fs(
(3 15)
-UE)d tY
The convolution is done graphically in Figure 310.
It is seen that if
2ws) W1 , then there is overlapping of the spectra and distortion will
occur since a filter could not be built to extract the information.
t
ao
Figure 3.8
Fs (W
i
I
IT
,I
-
a
WS
1
,
II
EI
,
r
(MJ
Figure 3.9
, I
I
or
36u,
_
I
1
aw,
1
i
r
l
-
-
a
I.)
!
I
I
-:>'5b '"s
F (-
I
2 E
IHE
n
I
LI
--
w
'i
E
w
r
,7
w
a.I-lo
- 1
l
.
-
I It
:I
4, W
-0
317
Figure 3.10
-45-
-
I
.,s
1,z.5 -9
-
I
·I
IT
-
L1
,
,J
I
Since the chopper amplifier is operating at 1KC
the filter cut-
off was purposely made low enough to filter out any high frequency components in the signal, so that the current being controlled in the system
will have a minimum of high frequency noise.
The chopper amplifier
designed will not meet the transient specifications of the system but
since the purpose of this paper is to achieve a low-drift amplifier, the
design was tested.
The transient specifications can be met by utilizing
the chopper amplifier in a chopper-stabilized amplifier 3 using a d.c,
amplifier or by using another a.c. amplifier in parallel with the chopper
amplifier to increase the bandwidth.
3-5
Drift of the Chopper
A forty-seven hour drift test..of the chopper amplifier described
run using the test setup of Figure 31.
was
The amplifier had an average
drift of less than ten microvolts when allowed to operate at room temperatureo
The temperature variation was probably about 4°C during the run of
the test.
3
Okada.:,
Rt.
"Stable Transistor Wide-Band D-C Amplifiers" Communication
and Electronics March 1960 Page 26
-46-
Chapter IV
The Field Effect Transistor Amplifier
4,1
The Field Effect Transistor
Recently a device called a field-effect transistor has appeared on the
market.
Although not involving minority charge movement as does the con-
ventional transistor, it will be referred to as a transistor throughout
this paper.
It was originally proposed by Shockley in 1952 with much of
In 1953 Dacey and Ross1 constructed the
his original transistor work.
first few units on the basis of Shockley's equations.
These transistors
appeared to operate according to predictions, yet very little was done with
them.
Figure 4.1 is a representation of the field effect transistor.
By
applying a negative potential to the gate leads, the resistance of the
channel can be controlled.
Keeping the drain voltage constant allows
the following definition of transconductance:
am
VD constant
(.l)
If the drain current is plotted as a function of drain voltage with the
gate voltage as a parameter, the family of Figure 42
results.
There is
a striking similarity to a pentodeo
Dacey and Ross have shown the following relations to be true.
The
resistance of the channel is:
L
°RO~~
where:
1
'
L
2a
Z
2(3;~(4.2)
conductivity of the n-type material
length of the channel
the channel thickness
the channel width
lacey G. and Ross, I.M. Unipolar Field Effect Transistors, Proc. of the IRE
1953 Vol. 41 Page 970-
-47-
I
SOUKCE
Figure 4.1
ls
VA
L o
x
It
H
V
oL
w
z
i:
ta
0
WO
D
Figure 4.2
_ 48_
lrva \R
t-A.oF
Vi) VeLT .2
The pinch-off voltage is:
= qNa 2 /2K
W
c
qN
Where:
K
(4-3)
magnitude of the fixed donor charge density
= dielectric constant
TW then the transconductanceis gmo[l -
If VD - V G
(
VG
- !G
(4.4)
1/2]
0
26a
Where gm o
which is the maximum transconductanceo
--
V5
V4
current is
I G
I
[
+W
(3
2
W
0
g
where IDO
The saturation drain
(45)
)]
0O
which is the maximum current.
The input impedance of the field effect transistor is essentially that of
a back-biased p-n junction and is normally in the order of lO0 megohms for
silicon.
The output impedance is usually greater than 1 megohm.
Figure 4-3
is a circuit model of the transistor that will hold over a wide frequency
r
range
GR
IN
Figure 4.3
here
Cll
35 mmf, C 2 1
7 mmf, C2 2
2 mmf.
It can be seen that a field-
effect transistor can be handled in much the same manner as a pentode tube.
4.2
Field-Effect Transistor D.C. Amplifier
The design of an amplifier2 using a field-effect transistor is basically
simpler than a conventional amplifier design but some care must be taken to
utilize fully the characteristics of the device.
Equation (4.4) describes
the transconductance as a function of the gate voltage V
if VD - V
Wo
The transistor will be used under normal operating conditions so that V G
This would forward-bias the gate to
will never be allowed to go positive.
2 The only commercial supplier of field-effect transistors at the present is
is Crystalonics, Inc., All the following tests were performed on devices
obtained from this company. A list of the significant characteristics can
be found in Appendix C.
-49-
source junction and consequently limit the device's use as an amplifier.
For all VG negative, equation (4.4) can be plotted as a function of V G
as shown in Figure 404a.
9I
90
l
WA
Figure 44a
gm is a maximum when V G = 0 and goes to zero when V G
W0 .
Therefore, for
maximum gain it would appear that the bias should be operated at zero or
slightly negative.
The second critical factor in the design is the saturation drain
current.
Equation (4.5) also expresses this quantity as a function of VG -
Figure 4.4 shows this relationship graphically.
uration current occurs
for V G = 0
Clearly the maximum sat-
The curve of Figure 4.4a is the deriva-
tive of the curve of Figure 4.4b.
Ivc
10
W
o
Figure 4.4b
-50-
T
The d.c.
The circuit of Figure 4.5 is a single stage amplifier.
- IDG RL.
output voltage is V
If Vin - VBB
0, then
IDG
t IDOO
small variations, the small-signal equivalent model of'Figure 43
used.
For
can be
Ignoring the capacitors and assuming that all impedances are large
compared to IR and RL, the change in output is
Vo
-gm RL AVin
(4.6)
\C
v'c
V's
Figure 4.5
It can be seen that if a large voltage gain is desired, both gm and RL
should be large.
Normally, the higher gm is, the higher the drain current
will be and in order to operate in the linear portion of the characteristics
Vcc will have to be large.
sired and if
n
For example, if a voltage gain of 100 is de-
1000 micromhos, then RL
x
100 K, so that for IDG
1 m.a.
a supply voltage of about 130 volts would be required to operate in the
saturated region.
With this high a supply voltage, care must be taken that
the drain-to-gate voltage does not exceed the breakdown voltage.
Another important point in the d.c. amplifier design is that both gm
and IDG are temperature dependent.
found
i
dg
m
dT
From equation 4.4, for V G
2a
2a
L -dT=
0 it is
(4.7)
The temperature dependency of 'gm is due mainly to the effects of temperature
on conductivity.
Experimental work 2 has been done which expresses conductivity
as a function of temperature.
At temperatures below 300 0 K the temperature
dependency of the conductivity is controlled by the impurity content as
shown in the sketch of Figure 4.6a. Pure intrinsic silicon has a positive
Cornell, Esther Mo "Properties of Silicon and Gemanium" Proc. of the I.R.E.
1952 Vol. 40 Page 1333.
-51-
'1
temperature coefficient but as the doping increases, the temperature
coefficient actually changes sign.
As found from the data sheet dis-
tributed by Crystalonics, the temperature coefficient of gm is negative and
therefore
the device is being used in the extrinsic region.
Since data
on the conductivity ere not obtained from Crystalonics at the writing of
this paper, only experimental determination of the temperature coefficient
was possible.
I-
U
2
0
IL
0
0
0-j
1lW6
G
\/TeMP
Figure 4.6
dD
From equation (4.5)
the devices tested Wo
for Va
0
it is found that
DG =
dg
d
For
is approximately 15 volts, so that the temperature
coefficient of IDG is about three times that of the transconductance.
Figure 4.6bis a graph of the change in IDG as a function of temperature
for a typical C610 field-effect transistor.
The measured temperature
coefficient is -.845% per °C. A differential d.c. amplifier configuration
would be superior to the single-ended stage.
Drifts in saturation current
between stages would tend to cancel one another.
stage is shown in Figure 4.7.
A simple differential
The circuit can be biased so that the source
-52-
voltages of both transistors are close to the d.c. level of the signals
V 1 and V2 .
V 1 and V 2 must also be kept from going positive with respect
to the source.
If the circuit and the transistors are perfectly balanced
the differential voltage V 3 - V4 will be zero.
be:
3G2
RL2
-
IDG
RL1'
V3
V4
where
g
gm V2
where gm
gm
g2' RL
For imbalances it will
The small signal gain is found to be: 3
_
4
s
(4.8)
iRL
+n
E1
RL
RL2'
= RS
RS1 P RS2
12.
Figure 4.7
The differential field-effect amplifier offers some advantages over
the conventional transistor differential amplifier.
is much higher for the field-effect amplifier.
The input impedance
This is an important
consideration for the system in which this amplifier will find use.
There is no VHE drift term to consider but instead a IDG drift term.
The drift voltage due to a tIDG is referred to the input of the amplifier
-53-
by dividing ADG
~AT2 -2
by gm.
From the curve of Figure 4.6, it is found that
oC at 25.5°C.
For these transistors gm
c
200 micromhos, so
AV
that
AVB
G-
10 mv/°C.
A typical silicon transistor has a
of about
-
-2.5mv/°C, so it is seen that the field-effect transistor has a slight
-disadvantage in this respect.
Both gm and hFE changes with respect to
temperature depending upon the drain current and collector current in the
transistors.
From the typical curves given by Crystalonics
at a drain current of 1.5 m.a. and at 250 C.
gmn
-A25%/
C
At the same collector current
and temperature for a 2N338 transistor, Ah_
55*/oC
The field-effect
has a very slight advantage.
4.3
Temperature Compensation of the Field-Effect Amplifier
In order to achieve temperature stability in a field-effect transistor
amplifier, it is necessary to temperature compensate.
Matching of transistors
should help considerably but since the units are in two cans, temperature
gradients will undoubtedly exist.
a differential amplifier.
Figure 4.8 shows one scheme of compensating
The resistor R T is temperature sensitive.
input to the amplifier is zero, then the following relationships hold:
Vo i I2 R2 - Il(Rl +
)
and if only the eff'ets of temperature are considered,
dVo R2 dI
T
dT
I
1
1
-Figure 4.8
-54-
1
T
IdT
If the
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If the amplifier is originally balanced for To with R 1 + RT
dV
I1
Z 2 = I and if it is desired that
x 0, then
R
dI
I
R and
R2
(4.9)
dRT
dT
where
dI
dI2 - dI1
dT
dT
If the temperature sensitive resistor has a positive temperature coefficient
then
must also be positive.
In the actual case this can be accomplished
dI
by interchanging the transistors if dT is negative. In order to have some
idea of the order of magnitude involved some typical data was taken.
R = 100K
I
.25 m.a. and dT
0,
was found to be
With
2 microamps per °C
In order to satisfy equation (4.9) the temperature coefficient of RT must be
80 ohms per
C.
This coefficient was obtained from unmatched transistors;
it is expected that matched transistors might do better.
balance reflects to the input as a 1 mv/C
4.4
This current im-
voltage imbalance.
Practical Design of the Field Effect Differential Amplifier
Figure 4.9 is a schematic of a differential amplifier using a pair
of field effect transistors in the first stage.
field-effect transistors is
3 ma.
The drain current in both
For input voltages of 6 volts the
common sources will be at 6.2 volts, thereby backbiasing the transistors
by -.2 volts.
The temperature compensation is accomplished by means of a
network in one of the drain branches of the amplifier.
Control of the
temperature coefficient is accomplished by means of the 10K potentiometer.
The 51R6 thermistor has a temperature coefficient of -4.4% per
25°C.
Its absolute value is about 100Ko
C at
For a parallel network of a
standard resistor and a thermistor the temperature coefficient can be
found to be
dR
P
dT
Where R
P
2
R
(R + FT
d
T(410)
dT
is the parallel combination of the standard resistor R and the
thermistor RT .
Use of a negative coefficient thermistor necessitates
selection of the transistor location so that temperature coefficients
will cancel.
-56-
'l
0
'4
.
0
(0
4
4
CE
It
I
d
0
!A
Figure 4.9
- 57-
I
i
I
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±.LUuLtlDUbUU.U
a4[7
4'
Li
-_nA_
Ub5Lu
aZ
curLre-t±j.Ut
WL
as for the conventional d.c. amplifier.
=n .2-Isuurc
L lnte
:
|SA
ce
sheL
malnner
The remainder of the amplifier
uses standard resistors and the design is similar to that discussed in
Chapter 2
FSP-2 units were used for the final two stages.
The test set-ups were identical to those described in Chapter 2,
In
order to accomplish temperature compensation the entire amplifier was
immersed in a denatured kerosene bath that was controlled by a Gebrueder
Haake temperature controller.
This allowed temperature to be controlled
to within 0.1°Co
Figure 4.10 shows the frequency response of the field-effect transistor
amplifier.
The capacitor across the input to the second stage is a .01
microfarad capacitor chosen so that the predominent break point is at about
100 cps.
The peaking that occurs at 22 KC.
is due to the significant
break points of the second two stages.
A drift run at a constant temperature for a period of fifteen hours
showed drifts less than 100 microvolts.
-58-
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·59
Chapter V
The Current Switch
5.1
Performance of Transistors as Switches
It has been assumed until now that the transistor switches described
in Chapter I are perfect.
In the actual case there are delays associated
with the turn-on and turn-off times of the.transistor.
a typical common-emitter switch.
Figure 51
shows
The response of the collector current to
hen a base current large
a step base current is shown in Figure 5.2.
enough to saturate the transistor is applied the time from to until the
II~~p1________~
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Figure 5.1
R1
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A
rr
N
Figure. 5.2
collector current reaches 10% of its steady state value is the delay
time td.
The rise time, tr, is as defined previously from 10% to 90%
of the steady state value.
When the base current is returned to zero,
the transistor does not respond immediately but is delayed a time ts,
the storage time,.from t
to.90% of the steady state current.
The time
from the 90% to 10% of steady state current is the fall time tf.
f'
-60-
The delay time is a function of the reverse bias applied before
switching and the time required for the carriers to diffuse across
the base region.
Since the d.c. beta is a function of the emitter
current, the delay time is also a function of the rate of the increasing
d.c. beta as the emitter current increases.
The rise time is a function of the alpha-cutoff frequency, the
amount of base drive and the dc
The larger the base drive, the
beta.
shorter the rise time.
.When the transistor is saturated the collector voltage falls below
the base voltage, thereby forward biasing the collector-base junction.
The collector
The collector then injects a charge into the base region.
current can not begin to decrease until this stored charge is swept away.
This is the cause of the storage time,
The storage time is a function of
the length of time the transistor is on, hFE, the inverse alpha, and the
drive-on and drive-off currents.
The fall time is similar to the rise time and depends upon the
frequency response of the transistor.
off currents.
Figure 51
It also depends upon the drive-
If the voltage driving the base through resistor RB in
is allowed to go negative, the turn-off current will go nega-
tive until the transistor is turned off.
5.2
Design of the Current Switch
It has been mentioned that the load being switched is an inductive
The switching of an inductive load would cause problems due to
load.
high voltage transients which may cause transistor voltage breakdowns.
Another problem might be closed loop instability.
One solution to the
problem is compensation of the inductive network,
Figure 5.3a shows
I
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If
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Figure 5-3
-61-
ff-\
the uncompensated network having an inductance L and a resistance R,
The admittance of this network is
R1
sL
The network may be complemented
so that the admittance seen across its terminals is a pure conductance
1/R.
of
The complement of the RL network is an RC network with an admittance
1
R + 1/sC
L
where C w -R
ive for all frequencies,
.
With the compensation the network is resist-
When the switch is turned off the energy stored
in the capacitor and inductor is dissipated in the two resistors.
The
circuit is critically damped so that the decay current through the inductor
will have a critically damped exponential wave form.
Use of the compensated
network allows the design to be made without consideration of inductive
transients.
Figure 54
is a schematic diagram of the current switch.
two transistor switches (Q3 and
The
4) in series with the load are driven
from the two driver transistors (Q5 and Q6), which in turn are driven by
the flip-flop pair (Q7 and Q8).
The flip-flop is a bi-stable multivibrator
driven by negative pulses in a complementary mode.
The frequency of oscil-
lation is therefore determined by the pulse source.
The two driver transistors are driven just slightly into saturation.
Also,
tspeed-upw capacitors are used in order to decrease the rise time
of Q5 and Q6 by allowing a large transient base current to be drawn.
The
capacitors are variable trimming capacitors; the reason for their use will
be explained shortly.
Since the transistors are not driven deeply into
saturation, storage time is decreased.
The switch transistors Q3 and Q4 are driven by Q5 and
is turned off, Q3 is driven on.
The base current for
6*
When Q5
3 is determined
by the +120 volts, the 8K resistor and the emitter voltage.
Since the
d.c* amplifier controls the voltage across the 60 ohms to be 6 volts,
100 milliamperes will flow through the switch,
For this circuit R
ohms, so that the voltage at the emitter of Q3 is 81 volts.
the base current to be 75
750
This causes
milliamperes, driving the transistor just
slightly into saturation, thereby decreasing the storage time.
Wlhen
Q5 is turned off the emitter is slightly reverse biased by use of the 200
ohm resistor.in the emitter branch.
4 and Q6 operate in an identical
manner.
Transistors Q1 and Q2 are connected in a Darlington connection.
output of the dc.
amplifier is connected to the base of Q1.
-62-
The
The input
C.
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Figure 5 -63-
I
t
f;
'
impedance seen at the base terminals is approximately hFE1 hFE2 R
where hFEl is the d.c. beta of Q1 and hFE2
the d.c. beta of Q2. For
the transistors used the input impedance is approximately one megohm
which is sufficiently high to cause a negligible effect upon the d.c.
amplifier gain.
Transients caused by switching will cause an error in the average
current being controlled by the d.c. amplifier, which senses the voltage
across the 60 ohm resistor.
delays discussed earlier.
The transients are caused by the various
For example, it can be seen that the current
flowing through Q3 is delayed in time from the triggering pulse by the
delays of Q7, Q5, and Q3 itself.
and on respectively.
The three transistors turn on, off,
Clearly, the delays are due to the turn-on times
(td + tr) of transistors Q7 and Q3 and to the turn-off time (t s + tf)
of transistor Q5,
While this sequence of events is occurring, the com-
plementary sequence is occurring for transistors Q8 , Q6, and Q4.
Three
separate limiting cases can occur as shown in Figure 55.
eel
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Z.
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l
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The delays have been greatly exaggerated in respect to the switching
frequency so that their effect can be more easily shown.
Case 1 is the desired effect,
Although the delays may occur in
the transistors, the effect on the sampled waveform, which is the sum
of the two emitter currents of Q3 and 4., is a constant if the rise
time and fall times are equal and if they occur simultaneously (assuming
the same type wave form for each).
This case is unlikely.
Case 2 in Figure 5-5 shows the effect of one transistor turning
on before the other has turned off.
This assumes that the response of
the d.c. amplifier is too slow to sense the change.
The illustration of the third case in Figure 55
if one transistor turns off before the other turns on.
shows what occurs
For this case,
the amplifier can not respond since the loop is open for this brief period.
For this circuit without the .47 microfarad capacitor across the 60
ohm resistor experimental results indicated that case 3 was the actual case.
Using a Tektronix 545 oscilloscope to record the waveform across the 60 ohm
resistor it was found that there was a negative pulse of slightly less than
a micro-second duration.
Since the pulse went completely six volts neg-
ative, this showed that one transistor turned off completely before the
other turned on.
Two schemes were used to minimize the pulse,
First
the 'tspeed-upt capacitors of transistors Q5 and Q 6 were made adjustable
so that the rise times of the transistors could be varied.
This allowed
better balancing of the delays to both transistor switches.
The ranges
of the capacitors were determined experimentally by observing the oscilloscope pattern.
The second scheme used was correcting of a .47 microfarad
capacitor across the 60 ohm
resistor.
The filtering action was sufficient
to cause the pulse to be decreased to less than 100 millivolts.
Since the
frequency break-point of this filter is at about 5000 cps, the effect upon
the d.c. amplifier performance is negligible.
-65-
Chapter VI
Closed Loop Dynamic Performance of the Amplifiers
6,1
Evaluation of the Amplifiers
The three amplifiers designed in this paper were tested in the
complete closed loop.
The tests included the effects of switching
frequency and of load imbalances upon the drift stability of the loop.
Figure 6.0 shows the complete test set-up for each amplifier.
With this arrangement all the necessary information was obtained.
PULSE
GEN.
I
Figure 6.0
6.2
Performance of the FSP-2 Amplifier
With
the FSP-2 amplifier connected in the loop about 15 microamps
of base current is drawn at each input.
-66-
The use of internal feedback in
II
For this
the amplifier tends to increase the dynamic input impedance.
amplifier the input impedance is greater than 10OK4
The output impedance of the amplifier is the parallel combination
of the 51K output resistor and the output impedance of final stage transistor.
The total impedance is in the order of 25K, which is sufficiently low so
that the switch does not load the amplifier,
The photographs in Figure 6.1 show the dynamic performance of the
amplifier while switching 1600 times a second.
Figure 6.1a is the out-
put of the amplifier with the switch loads matched to give an offset of
less than
Because the amplifier is underdamped, ringing of the
5 volts.
Figure 6b
output occurs for every switching time.
an approximate 25
shows the effect of
volt mismatch of loading upon the amplifier output.
The positive pulse occurring just before the drop in level is caused by
both transistor switches being off simultaneously.
the sensing resistor is shown in both Figures 6.c
in
fwitc.hina
lvr
ncav
n not
ortn
be notied
The voltage across
The difference
and 6.1d.
on the Tektronix scone when the load
is mismatched but the difference between levels is iOO microvolts as measured
on the d.c. microvolt meter.
error in the average current.
This is equivalent to about a 1.6 microampere
The negative pulse caused by both switch
transistors being off simultaneously can be seen in Figure 61c.
The last
photograph, Figure 6.1d is an enlarged view of the transient.
Random drift is a difficult parameter to define for a d.c. amplifier
since it can consist of a constantly increasing error and also an error
that oscillates at random frequencies,
Figure 6.2 is a four hour section
There is a consistent noise level
of a drift-test on the FSP-2 amplifier.
of about 10 microvolts.
microvolts.
There is also a peak to peak drift of about 40
The transients of sometimes 200 microvolts can be attributed
chiefly to line surges and temperature control transients.
There appears
to be no constant drift over this short time interval and this section is
taken from a 24 hour test in which every 4 hour section is essentially the
sameO
6.3
Performance of the Chopper Amplifier
As mentioned earlier, the input impedance of the chopper amplifier
50K with switch closed.
The input current into the amplifier is 120
-67i
O
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oEle
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Cu N
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Id
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00
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Figure 6.1
-68-
.
vt
Figure 6.2
-69-
microamperes when the transistor switches are closed or an average of
Since the resistors used in the chopper are highly-
60 microamperes,
stable components, the drift of input impedance should be small.
The output impedance of the chopper is approximately 20K and is
therefore small enough so that the switch does not appreciably load the
amplifier.
is a collection of
Figure 63
amplifier.
63a.
waveforms taken from the chopper
The output voltage at the chopper output is
hmrn in Figure
The transients are caused by the current switch and on the scale
of this photograph the chopper transients are not noticable.
Figure 6.3b
is the waveform across the sampling resistor with the loads matched.
It is noticed that the frequency response is too low, as was mentioned
earlier, by the long time constant (about 30 microseconds)- that is shown
in Figure 6.3c. The effect of the lower gain is seen in the photograph
of Figure 6.3d.
The load had'
been mismatched to 25
volts with a differential of 40 millivolts occurring
between levels at the sensing resistor.
This corresponds to an error of
about 330 microamps in the controlled current.
The noise pulses that appear
at switching are caused by feedthrough of the triggering pulse from the
pulse generator.
A section of a twenty-four hour drift test is shown in Figure 6.4.
There iskan obvious drift of about -100 microvolts per hour.
It should
be pointed out, however, that as the test progressed the drift reversed
direction from time to time so that the drift was not constant over the
entire 24 hours.
volts ridingon
6.4
There is also a peak to peak noise of about 100 microtop of the drift.
Performance of the Field-Effect Amplifier
The field-effect amplifier has the advantage of having a very high
input impedance, so there are no input stability problems with which to
contend.
Since the output stage of the amplifier is identical to that of the
FSP-2 amplifier, the output impedance is also in the order of 25K.
Figure 6,5 shows the waveforms at the amplifier output and across
the sensing resistor.
The photograph of Figure 65a
is the output of
0m
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-71-
o
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Figure 6..4
-72-
the amplifier for the loads matched to within 100 millivolts.
graph of Figure 65b
The photo-
shows the same output when the loads are mismatched
to 600 millivolts.
There was no noticable effect upon the waveform of
the sensing resistor which is shown in Figure 6.5c. The transient that
occurs at switching is shown expanded in Figure 6.5d.
As expected, the
waveform indicates that the loop is under-damped.
A four hour section of the drift test is shown in Figure 6.6.
The
transients occurring approximately every two minutes are caused by the
turning on of the temperature controller.
about 50 microvolts.
The constant noise level is
It is seen that the drift over four hours was in
the order of 50 microvolts for this sample.
As was the case for the other
amplifiers, this drift would change direction from time to time.
6.5 Summary of Performance
The table below summarizes the performance of the three amplifiers.
FSP-2
Chopperd.c.
Straight D.C.
Amplifier
1
___
_
_
__ __
Input Impedance
Output Impedance
Transient Response
Freq, Response
(closed loop)
Short term drift
____
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-73-
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100 vhr
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> 10 Meg.
Meg,
I
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5
_______
50K or)l00
20K
I
25K
.
Field-effect
d.c. Amplifier
Amplifier
Amplifier
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25K
Underdamped
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-75-
Chapter VII
Conclusions
7.1
Conclusions
The objective of this paper was to investigate the most recent semiconductor devices on the market and evaluate their use in a low-drift
direct-current amplifier.
All three techniques investigated have met
with some measure of success,
The FSP-2 straight d.c. amplifier has presented the simplest answer
to the problem.
The design itself is not critical and components are
limited to only those necessary to achieve acceptable performance.
The
two-in-one approach has shown that a 'straight' d.c. amplifier can be
constructed with as low as 5 microvolts per °C temperature drift without
any special temperature compensating circuits and without close tolerance
selection of transistors.
If transistors are to be selected for stability
with temperature variations, it appears that a comparison of the base
characteristics along with hFE matching might result in very good temperature stability of a differential amplifier.
The field-effect transistor has also proven its feasability for d.c.
amplifier design.
The major source of difficulty is the temperature
dependency of the transcenductance and the drain current.
Although it
was thought that matching of these parameters for transistors used in
the first stage of a differential amplifier might improve the temperature
coefficient of the amplifier, this was not found to be the answer.
As
pointed out previously, the mechanisms controlling the temperature dependency of the conductivity are complicated, so that the solution to
this problem is not completely evident.
It is expected that as the state
of the art advances for the field-effect transistor, better temperature
stability will be 'achieved. Nevertheless, the amplifier can be compensated
for these temperature variations, and good performance can be the result.
_76-
It is also felt that the high input impedance of the field-effect
transistor is an important factor, and for this reason the device is
superior to a conventional transistor for many dc.
amplifier applications.
The chopper amplifier was the poorest of the three amplifiers but
not because of the chopper transistors.
It was found that the two-in-one
approach works very well for minimization of offset errors.
Because of its
complexity it is believed that the chopper approach is reasonable only
when size is not a problem,
-77-
Appendix A
A.1
Analysis of a Single-Stage D.C. Amplifier
Figure A.1 is a schematic representation of a single-stage amplifier
along with its associated signal flow graph.
NleE
:E.
\I'
Vir
Ve
m
Figure k.1
If YEE is considered an independent source, the output is
FE
FERL
Vo
VCC -
S
1
(1 +
IBO
RS
Rin +
in
VE
+
1 +-R
Is
(1 + h )[-ICBORL](A.1)
Considering VBE to be a dependent variable adds another loop in the flow graph
as shown by the dotted branch RE.
With this addition the third term on the
right side of equation (A.1) vanishes and the determinent of the network changes,
so that
·
~~~
Re
·
_
e
a = +RS
~
+
-78-
~
,·
RBE
~
X
J+ S
k
'
J
A.2
Analysis of a Differential DC.
Amplifier
Figure A.2 is the schematic representation of a differential D.C.
amplifier along with its associated signal flow graph.
The effects of
Ico have been neglected, as has the output impedance of the transistors.
If VBE is considered to be independent, solution of the flow graph for
V 3 results in the following equation.
Vo
N
-
Rele.,
V
-RL)
R si
l3
I
c
VcC
-
C
er I
1
1ZSL
-
- R 2/kjs Z
Figure A.2
-79-
Lz
hFEJL (v1 - V 1 )
v3 vcc-
R
A
hEl
+
(1
+
[
2
hE2 )
+
+C
A
.
2
)]
(v 2 - VE2)
(A, 3)
where
A~-"
1 +RC +
[l+
e
-
+(
++ 1
1 2
)
%
~slR e2
R l.2 (
If hEl,
+ hFEl)( + hF.2 )
RC>> R
,'
RC>> R 2
Vz VCEc2
(A.4)
then equation (A-3) can be reduced to
+
(V2 - V
VBE - BE2)
vhF RS2+ F2 R31 + hF1 h
2
Re e 2 )
(
In a similar matter the expression for V 4 can be derived, so that
VV-V
-4
hE1
V 3
h.---
2 (1 +L2 )(v2 --v +
'
El RS2 ¥2
l
$
hE1h
2
V2)
(Rel
If the transistors are perfectly matched and if RL1
Rel
Re2 m Re, then
_
+
Re2
RL2
RL,
..(A.6)
-[ 1
S 2 = PRS
(V2
_
- V1)(A7)
_
If VEE is considered to be a dependent variable, then the two additional
loops of the flow-graph in Figure A,2 are added.
be found that
1+S
where
E2E
+e
,hE R '(v - V )
where
RM1 - -M2
*
-
-
-80-
If this is done it can
(A.8)
Appendix B
B.1
Analysis of a Single-Stage F.E.
Amplifier
Figure B.1 is a schematic representation of a single-stage fieldeffect amplifier and its associated small-signal equivalent circuit.
The flow-graph for this circuit is shown in Figure B,2.
In order to
simplify the analysis the impedance from source to drain has been
neglected along with the input and output capacitances.
graph R 1 =
In the flow
+ Ri
I.
IMcc
RL
'RS
4
TO
Ie
Figure B.1
Vf
Vo
Figure B.2
-81-
Solution of the flow-graph for the output voltage leads to
g
o
R
Vo
=
R
R
R
L
(1 + e) + e R
1
(
A
o%
o 1 V
I(B.1)
.
in
where
A.=1 + e(1R+
gm R)
1
+
L + Re
R
o
+R
L ( 1 + 2g Ri)
R.R
R R
o
(B.2)
I
i
If both R i and Ro are large compared to all other resistors in the
circuit, then equation (B.1) reduces to
V
B.2
-g
m
(B.3)
Analysis of a Differential F.E. Amplifier
The equivalent circuit of the field-effect transistor shown in
Figure B.3
neglects all impedances of the transistor since these are
all large compared to the circuit impedances.
in Figure Bo4.
Solving for V 3 , it is found that
A
\
v,
The signal flow gtaph is
\3
V4
Re?,
C
Figure B. 3
-82-
shown
V
=
[ 1
m.l1
-
+ Re2)]
g
A
3where
m2 RL RC V2
+ gml
(Bo4)
where
+
A = 1 + gm-1(Rel
+
RC)
gn2 (Re2 + RC)
gm2 r
Re2 + 2gm
+ gml gm2 Rel
Re
(B.5)
Similarly, V4 can be solved for so that the differential
-
V2 -
(
gm2 RL2 V2 - gml RL V1 + gm gm2 R
o =3
output voltage is
V1)
4
gi
-Rel) V2
gm2 FRI2 (c
(Rc
+ Re 2 )
V1]
(B.6)
If the circuit is balanced so that RL1 = RL2 = R,, Rel = Re2 = Re then
R
+ 2)+g g2 ( +Re)
1+(R
e+R)(gmg
C + R)(V
RL (gm2 V2 - GM1 Vl) + gm gm2 RL
Also, if gml
=
gm is
gm2
2
V)
(B.7)
ubstituted into equation (B.7), then it can
be factored so that
+ Re)]
1
L[ +gm
- = RL[
+ Re)] (v 1 - V2 )
V - (1+ gmRe)[l + g(2R
(B.8)
which is simply
-
V
1 +gm
me
(V 1
(B.9)
- v2 )
I
.'"
.o
-r
-t-----
*1~~~~~~~
US.
574
' iI
--
i
RC
9^-
ge
51
- V4
2.-O
Figurd B.4
-83-
L,
QLZ
o \t
3
Appendix C
C.1
Important Characteristics of Fairchild FSP-1 Matched Transistors
300
Maximum offset voltage 100
V at IB1 and 2
.6 m a at VEB
1
Typical emitter to base cutoff current
Typical collector to base cutoff current 0.6
Collector to emitter voltage 20V
C.2
IC = 0.
or 2 = 5V
=
IE=O.
25V
IB - 0.
at ICE 1 and 2 = l.Oma
VCE = 5V.
Important Characteristics of Fairchild FSP-2 Matched Transistors
Minimum D.C. current gain 30 at IC = 1 m.a.
VCE
Typical collector cutoff current 0.8 m a at VCB = 25V at IC
Maximum base voltage differential 30 my
10V.
IE = 0.
1 m.a. VCE = 5Vo
D.C. beta ratio between 0.9 and 1.1 at IC = 1 m.a.
C.3
O.
El and 2
m a at VCBl or 2
ICE1 or 2 = 1 ma
D.C. Beta ratio between 0.9 and 1.1
a
-
VCE - lOV.
Important Characteristics of Crystalonics C 610 Field-Effect
Transistors
Maximum pinch-off voltage
Transconductance
20 volts.
between 100 and 400
micromhos at drain voltage of
of 24 volts.
Maximum saturated drain current
Maximum gate current
1 m.a. at drain voltage of 24 volts.
0.1 microamps at gate to source voltage of -40 volts.
Bibliography
1.
Conwell, Esther Mo, "Properties of Silicon and Germanium"
Proceedings of the I.RoE., 1952 Vol. 40 page 1333.
2.
Dacey, G. and Ross, I.M., "tUnipolar Field-Effect Transistors",
Proceedings of the I.R.E., 1953 Vol. 41 page 970.
3.
Gunion, A.R., A Transistorized Operational Amplifier for Time-
Shared Analog Computer, Master's Thesis, MIT Course V
1960.
4.
Mason, S. and Zimmerman, H., Electronic Circuits, Signals, and
Systems, John Wiley and Sons, N.Y. 1960.
5.
Millman, S. and Taub, H., Pulse and Digital Circuits, McGrawHill Book Co., N.Y. 1956.
6.
Shea, R.F., Transistor Circuit Engineering, John Wiley and Sons,
N.Yo 1957
7.
Shive, J.N., The Properties, Physics and Design of Semiconductor
Devices, Do Van Nostrand Co., Inc., Princeton, NoJ. 1959.
8.
Texas Instrument Application Notes, Transistors as Switches,
October 1959.
-85-