Berkeley
Two-Port Noise Analysis
Prof. Ali M. Niknejad
U.C. Berkeley
Copyright c 2015 by Ali M. Niknejad
1 / 26
Equivalent Noise Generators
vn2
Noisy
Two-Port
i2n
Noiseless
Two-Port
Any noisy two port can be replaced with a noiseless two-port
and equivalent input noise sources
In general, these noise sources are correlated. For now let’s
neglect the correlation.
2 / 26
Equivalent Noise Generators (cont)
Noisy
Two-Port
observe
output
noise
Noiseless
Two-Port
noise
only
f (vn2 )
Noisy
Two-Port
observe
output
noise
vn2
open input
i2n
equate
noise
vn2
i2n
equate noise
short input
The equivalent sources are found by opening and shorting the
input.
Noiseless
Two-Port
noise
only
f (i2n )
3 / 26
Example: BJT Noise Sources
vr2b
rb
i2b
Cµ
r
C
+
v
gm v
ro
i2c
If we leave the base of a BJT open, then the total output
noise is given by
io2 = ic2 +
or
in2 =
ic2
2
2 2
ib
= in2
2
+ ib2 ⇡ ib2
4 / 26
BJT (cont)
If we short the input of the BJT, we have
io2
⇡
2 2
gm
vn
✓
=
Z⇡
Z⇡ + r b
2
◆2
2
=
vn2
(Z⇡ + rb )2
vr2b
+ ic2
(Z⇡ + rb )2
Solving for the equivalent BJT noise voltage
vn2 = vr2b +
ic2 (Z⇡ + rb )2
vn2 ⇡ vr2b +
2
ic2 Z⇡2
2
5 / 26
BJT Generators at Low Freq
at low frequencies...
vn2 ⇡ vr2b +
ic2
2
gm
vn2 = 4kTBrb +
in2 =
2qIC B
2
gm
2qIc
6 / 26
Role of Source Resistance
Rs
Vs
vn2
i2n
Noiseless
Two-Port
If Rs = 0, only the voltage noise vn2 is important. Likewise, if
Rs = 1, only the current noise in2 is important.
Amplifier Selection: If Rs is large, then select an amp with low
ii2 (MOS). If Rs is low, pick an amp with low vn2 (BJT)
For a given Rs , there is an optimal vn2 /in2 ratio. Alternatively,
for a given amp, there is an optimal Rs
7 / 26
Equivalent Input Noise Voltage
vn2
Rs
Vs
Noiseless
Two-Port
i2n
Let’s find the total output noise voltage
vo2
=
(vn2 A2v
+
=
vR2s A2v )
(vn2
+
✓
Rin
Rin + Rs
in2 Rs2
+
vR2s )
◆2
✓
+
✓
Rin
Rin + Rs
Rin
Rin + Rs
◆2
◆2
Rs2 in2 A2v
A2v
8 / 26
Noise Figure
Rs
2
veq
Noiseless
Two-Port
Vs
We see that all the noise can be represented by a single
equivalent source
2 = v 2 + i 2R 2
veq
n
n s
Applying the definition of noise figure
F =1+
2
veq
Namp,i
=1+
Ns
vs2
9 / 26
Optimal Source Impedance
Let vn2 = 4kTRn B and in2 = 4kTGn B. Then
F =1+
Rn + Gn Rs2
Rn
= 1 + Gn Rs +
Rs
Rs
Let’s find the optimum Rs
dF
= Gn
dRs
Rn
=0
Rs2
We see that the noise figure is minimized for
s
r
Rn
vn2
Ropt =
=
Gn
in2
10 / 26
Optimal Source Impedance (cont)
The major assumption we made was that vn2 and in2 are not
correlated. The resulting minimum noise figure is thus
Fmin = 1 + Gn Rs +
Rn
Rs
r
r
Rn
Gn
= 1 + Gn
+
Rn
Gn
Rn
p
= 1 + 2 Rn Gn
11 / 26
Fmin
Consider the di↵erence between F and Fmin
F
Fmin = Gn Rs +
Rn
Rs
2
p
Rn Gn
Rn
Gn Rs2
Rs p
(1 +
2
Rn Gn )
Rs
Rn
Rn
!
✓
◆
Rn
Rs 2
2Rs
=
1+
Rs
Ropt
Ropt
=
Rn Rs
=
Rs Ropt
= Rn Rs |Gopt
2
1
Gs |2
12 / 26
Noise Sensitivity Parameter
Sometimes Rn is called the noise sensitivity parameter since
F = Fmin + Rn Rs |Gopt
Gs |2
This is clear since the rate of deviation from optimal noise
figure is determined by Rn . If a two-port has a small value of
Rn , then we can be sloppy and sacrifice the noise match for
gain. If Rn is large, though, we have to pay careful attention
to the noise match.
Most software packages (Spectre, ADS) will plot Yopt and
Fmin as a function of frequency, allowing the designer to
choose the right match for a given bias point.
13 / 26
BJT Noise Figure
We found the equivalent noise generators for a BJT
i2
2qIC B
vn2 = vr2b + c2 = 4kTBrb +
2
in2 = ib2
gm
gm
The noise figure is
F = 1+
4kTrb +
2qIC
2
gm
4kTRs
+
2qIC Rs2
rb
1
gm Rs
= 1+
+
+
4kTRs
Rs
2gm Rs
2
According to the above expression, we can choose an optimal
value of gm Rs to minimize the noise. But the second term
rb /Rs is fixed for a given transistor dimension
14 / 26
E
rc
scalable length
emitter
C
base
collector
BJT Cross Section
B
rb
The device can be scaled to lower the net current density in
order to delay the onset of the Kirk E↵ect
The base resistance also drops when the device is made larger
15 / 26
BJT Device Sizing
We can thus see that BJT transistor sizing involves a
compromise:
The transconductance depends only on IC and not the size
(first order)
The charge storage e↵ects and fT only depend on the base
transit time, a fixed vertical dimension.
A smaller device has smaller junction area but can only handle
a given current density before Kirk e↵ect reduces performance
A larger device has smaller base resistance rb but larger
junction capacitance
16 / 26
Correlated Noise Sources
Let’s partition the input noise current into two components, a
component correlated (“parallel”) to the noise voltage and a
component uncorrelated (“perpendicular”) of the noise
voltage
in = ic + iu
where we assume that < iu , vn >= 0 and
i c = Y C vn
We can therefore write
veq = vn (1 + YC ZS ) + ZS iu
17 / 26
Noise Figure of Two-Port
Which is a sum of uncorrelated random variables. The
variance is thus the sum of the variances
2 = v 2 |1 + Y Z |2 + |Z |2 i 2
veq
s u
C S
n
This allows us to immediately write the noise figure as
F =1+
vn2 |1 + YC ZS |2 + |Zs |2 iu2
vs2
Let vn2 = 4kTBRn , iu2 = 4kTBGu , and vs2 = 4kTBRs . Then
F =1+
Rn |1 + YC ZS |2 + |Zs |2 Gu
Rs
18 / 26
Optimum Source Impedance
If we let Yc = Gc + jBc , Ys = Zs 1 = Gs + jBs , it’s not to
difficult to show that the optimum source impedance to
minize F is given by
Bopt = Bs = Bc
r
Gu
Gopt = Gs =
+ Gc2
Rn
The minimum acheivable noise figure is
q
Fmin = 1 + 2Gc Rn + 2 Rn Gu + Gc2 Rn2
For Gc = 0, this reduces to our previously derived expression.
19 / 26
Minimum Noise Fmin
Very similar to the uncorrelated case, we have
F = Fmin +
Rn
|Ys
Gs
Yopt |2
This equation stats that if the source impedance Ys 6= Yopt ,
the noise figure will be larger by a factor of the “distance”
squared times the factor Rn /Gs .
A good device should have a low Rn so that the noise match
is not too sensitive.
20 / 26
FET Common Source Amplifier
Rs
Vs
2
vR
g
Rg
Cgs
Cgd
+
vgs
gm vgs
ro
id
RL
Consider the following noise sources:
Rs
vs2 = 4kTBRs
Rg
vg2 = 4kTBRg
Rch
id2 = 4kTBgd0 B
RL
iL2 = 4kTBGL
21 / 26
Total FET Drain Noise
Summing all the noise at the output (assume low frequency)
2
io2 = id2 + iL2 + (vg2 + vs2 )gm
Which results in the noise figure
F =1+
=1+
vg2
vs2
+
id2 + iL2
2 v2
gm
s
Rg
gd0 + GL
+
2
Rs
Rs gm
22 / 26
FET Noise Figure (low freq)
Assume gm = gd0 (long channel)
=1+
Rg
GL GS
+
+
2
Rs
gm R s
gm
If we make gm sufficiently large, the gate resistance will
dominate the noise.
The gate resistance has two components, the physical gate
resistance and the induced channel resistance
RG = Rpoly + Rch =
1W
1 1
R⇤ +
3 L
5 gm
The factors 1/3 and 1/5 come from a distributed analysis
(EECS 117). They are valid for single-sided gate contacts.
23 / 26
FET Layout
To reduce the gate resistance, a multi-finger layout approach
is commonly adopted. As a bonus, the junction capacitance is
reduced due to the junction sharing.
24 / 26
CS Noise at Medium Frequencies
Rs
Vs
2
vR
g
Rg
+
vgs
Cgs
gm vgs
ro
id
RL
If we repeat the calculation at medium frequencies, ignoring
Cgd , we simply need to input refer the drain noise taking into
account the frequency dependence of Gm
Gm = gm
=
1/(j!Cgs )
1/(j!Cgs ) + Rs + Rg
gm
1 + j!Cgs (Rs + Rg )
25 / 26
CS Noise (cont)
The drain noise is input referred by the magnitude squared
|Gm |
2
2
= gm 2 (1 + ! 2 Cgs
(Rs + Rg )2 )
So the noise figure is simply given by (neglect the noise of RL )
F =1+
Assume that Rs
noise is given by
F1
Rg
2
+
1 + ! 2 Cgs
(RS + Rg )2
Rs
↵
Rg (good layout). The “high” frequency
2 R2
! 2 Cgs
s
=1+
=1+
↵ gm RS
↵
✓
!
!T
◆2
gm Rs
26 / 26