HD28
.M414
8'^
|OCT 191989
ALFRED
P.
WORKING PAPER
SLOAN SCHOOL OF MANAGEMENT
"A Product Design Problem
in Semiconductor Manufacturing"
Florin
Avram
and
Lawrence M. Wein
NOT
Sloan School Working Paper #3075-89-MS
August 1989
MASSACHUSETTS
TECHNOLOGY
50 MEMORIAL DRIVE
CAMBRIDGE, MASSACHUSETTS 02139
INSTITUTE OF
"A Product Design Problem
in Semiconductor Manufacturing"
Florin
Avram
and
Lawrence M. Wein
MIT Sloan School Working Paper
August 1989
#3075-89-MS
OCT
1 9 1989
A PRODUCT DESIGN PROBLEM
IN
SEMICONDUCTOR MANUFACTURING
Florin Avrani
Department of Mathematics, Northeastern University
and
Lawrence M. Wein
Sloan School of Management, M.I.T.
Abstract
We
consider the product design problem of allocating the chip sites on a semiconduc-
tor wafer to various types of chips.
in sets (a specified
facility is to
number
maximize the average production rate
a reliable fashion.
A
facility sells chips to its
of several different types of chips),
rication process, in particular
sign,
The manufacturing
random
yield, poses
stochastic analysis
and to measure the improvement
traditional single-type wcifer.
The
in
is
of sets.
customers
and the objective
of the
Variabilitj' in the wafer fab-
a major obstacle in producing sets
employed to develop an
in
effective wafer de-
performance of the multi-type wafer over the
analysis reveals that multi-type wafers regularize the
production flow of non-defective chips of each type and cause these flows to be positively
correlated, both of which help to improve performance.
A
numerical example
that illustrates the analysis and demonstrates the design's effectiveness.
August 1989
is
provided
A PRODUCT DESIGN PROBLEM
IN
SEMICONDUCTOR MANUFACTURING
Florin Avrani
Department of Mathematics, Northeastern University
and
Lawrence M. Wein
Sloan School of Management, M.I.T.
It is
well-known that reducing variability
in
mance. Some of the conventional waj's to reduce
production systems
will increase perfor-
variability include the reduction of set-up
times, greater use of preventive maintenance in lieu of lengthy
machine breakdowns, the
regulation of job releases, the cross-training of personnel, and the use of statistical process control. This
paper provides an example from the semiconductor industry where the
design of the product can also reduce variability, and hence improve performance.
The key
step in semiconductor manufacturing
is
wafer fabrication, which consists of
the production of disc-like wafers about four to six inches in diameter.
the wafer
is
same
surface of
partitioned into chip sites in a grid-like fashion, and each wafer typically has
between 20 and several hundred
the
The
type.
Such wafers
technological developments
will
is
Traditionally,
all
chips on a given wafer are of
be referred to as single-type wafers.
now permit
same wafer. This development
allocate the chip sites
chips.
different types of chips to
However, recent
be produced on the
the catalyst for the wafer design problem:
on a wafer to the various types of
chips.
The
how does one
resulting wafer will be
referred to as a multi-type wafer.
This paper addresses two issues concerning the wafer design problem. The
is
to find an effective design for a multi-type wafer,
improvement
in
performance a multi-type wafer
1
and the second
is
to assess
first issue
how much
offers over a single-type wafer. In order to
define the performance
measure used
environment of the particular
this
environment
analysis
is
in this paper,
facility that
we
will first describe the
manufacturing
motivated this study; however, we believe that
typical of large semiconductor manufacturers. Moreover, although the
stimulated by a specific industry, some of our results apply to more genreal
is
production settings.
Because of the complexity of the technology and the fast-changing nature of the semiconductor industry, the yield of non-defective chips in wafer fabrication can be low and
very erratic.
Average yield rates can vary from several percent up to eighty or ninety
percent, dependiivj; r,poT;
^lie m.'3t'tnty
on wafers, and wafers are produced
and
fifty.
and complexity
in lots,
of <:he product.
where the
lot
Chio'^ pvc
size is typically
made
between
five
In this paper, three different possibihties for producing defective chips will be
explicitly considered:
an entire
lot
can be defective, an entire wafer in a non-defective
lot
can be defective, and finally an individual chip on a non-defective wafer can be defective.
As
will
site
be described in Section
1,
the yield of a particular chip type in a particular chip
depends upon both the location of the chip
In the
site
on the wafer and on the type
manufacturing environment under study, customers order chips
a set of chips consists of a specified
our particular application, a
number
set of chips are
of chip.
in sets,
where
of chips for each of several chip types.
In
required to build a circuit board, and thus
the customers are unable to assemble a circuit board until they receive a set of chips.
The
variability in yield described in the previous
paragraph makes
manufacturer to provide reliable delivery performance to
The wafer
fabrication facihty, or fab,
queues (see Kelly
[4]),
and the
is
its
modeled here as
ol>jective of the design
it
difficult for
the chip
customers.
a
problem
network of quasi-reversible
is
to
maximize the long-run
expected average number of non-defective sets produced by the wafer fab. This objective
will get the sets of chips to the
which
is
customers faster and
an overriding objective
in the
turing facility under consideration
will
hence increase customer
service,
semiconductor industry. The particular manufac-
makes chips
2
for several types of boards; however, in
order to gain insight into the natvire of the problem,
one multi-type wafer for use
in
we
restrict
our analysis to designing
assembling one type of board.
In order to produce a wafer of a particular design using traditional photolithographic
equipment, a mask
set
for a particular design
is
Therefore, the chip
be produced that dictates the circuitry design that
first
A mask
appear on the wafer.
set.
must
on the order of $20,000, and thus once a mask
set costs
produced,
desirable to produce
it is
problem described
site allocation
problem, as opposed to a dynamic control problem.
the lithographic process, then
there
is still
mask
sets
ar-r
design in this
way
in
is
K electron beam
truly a static design
machines are used
in
problem being considered by the designers
each of several hundred
Instead,
it
site.
The main
is
to
constraint that restricts the
not technological in nature, but informational. To keep track of which
in a constructive way,
is
sites
on a wafer (and then to use
such as for process control)
more
is
Our
considered too large an informational
analysis remains essentially
allocates chip sites or rows to the chip types,
problem as one of allocating chip
sites.
and we
will
is
in
each of
unchanged whether one
continue to refer to the design
To summarize, the problem considered
to allocate the chip sites (to various chip types) on a wafer that
in a highly stochastic
this information
desirable to just keep track of which chip type
ten or twenty rows on a wafer.
is
is
not necessary for wafer production. However,
allocate the rows of a wafer to a particular chip
burden.
earlier
mask
wafers with that
decision has been described as one of allocating the chip sites on a wafer
to the various chip types. Currently, the
is
many
set
the need in this case for a simple and effective mechanism to design the wafers.
The design
chip type
will
is
in this
paper
to be mass-produced
environment (a network of queues with three manners of defects)
with the objective of maximizing the long-run expected average number of non-defective
sets
produced.
This appears to be the
first
process flow of finished goods.
our knowledge
is
Singh
et al.
study that has related the design of a product to the
The only paper
[5].
They
related to the wafer design problem to
allocate the chip sites of a single wafer
3
among
cliip
types in order to maximize the probability that a non-defective set can be produced
from one wafer. Unlike our study, they assume that the yield of a chip type
is
a Bernoulli
location.
number
random
They
variable that depends only on the chip type
how
also determine
of wafers
produced
is
in a chip site
and not on the
site
the probability of completing a set increases as the
increased. Although the design derived there
may maximize
the probability of obtaining a single set from a single (or several) wafers, the resulting
wafer,
if
mass-produced,
may
not be effective in the long-run because each chip type
may
not be produced (after accounting for defectives) in the same proportions a^ the demand.
Consic'^ifir^ the cost involving ir
for the
making
a
mask
^et.
and the
fac; that the lnne-n.ir;
computer boards appears to be steady, the long-term view
demand
more appropriate
is
for
our setting.
A
deterministic analysis that considers only long-run averages
is
employed
in Section
2 to address the wafer design problem. There are two cases to analyze, depending
assumption made with regard to yield of wafers on a
Let
chip.
fi^k
upon the
equal the probability
that a type k chip allocated to site 5 on a non-defective wafer will be non-defective.
there exists positive
k.
numbers
Cg
and
^i^
such that
//jj.
=
Cgfj^ for all sites 5
H
and types
then the yield will be called multiplicative; otherwise, the yield will be referred to as
non-multiplicative. Although the yield was thought to be multiplicative in our setting,
know
of no published data analysis that addresses this issue.
The wafer design problem
variable Xgk
is
is
the fraction of site
formulated as a hnear program in Section
s
2;
the decision
devoted to type k chips; thus, the integrality constraint
that each site consists of a single chip that
The
we
of a single type
is
zero-one constrained version of the proposed
LP
is
ignored in our formulation.
will lead to
an
effective
and
feasible
wafer design; however, ignoring this integrality constraint allows for a tractable stochastic
analysis. Since there are typically
many more
sites
than chip types, very few of the optimal
Xak variables will have values other than zero or one. Thus, the performance of the integer
and non-integer solutions
will
be very
close,
4
and the LP solution could be implemented
directly for the
row allocation problem currently under consideration, without the
fear of
causing an information "explosion".
The
results of the deterministic analysis are the following:
under multiplicative yield
(non-multiplicative, respectively) the multi-type wafer will perform the
same
as (better
than, respectively) the traditional single-type case (under the appropriate mix of wafers
entering the fab). Furthermore, imder multiplicative yield, there are
mal designs. Thus, under the multiplicative
yield assumption that
practice, the naive deterministic analysis cannot distinguish
designs, or between the best iriulti-type wafer
A
stochastic analysis
is
employed
number
random
yield.
of non-defective sets completed
for renewal processes
is
A
We
Slepian inequality (see Slepian
minimum
account the variability
derive the point process
up to time
i
for
an arbitrarily-
In each case, the central Hmit
used to reduce the asymptotic (as
point process to the analysis of the
possible wafer
singlf'-type wafer.
designed multi-type wafer and for the single-type wafer.
theorem
possible opti-
believed to hold in
is
among many
in Section 3 that takes into
inherent in the queueing network and in the
that counts the
and the
many
of a multivariate
t
-^ oo) analysis of the
normal random
variable.
then employed to show that a particular multi-
[6]) is
type wafer will perform better than the single-type wafer, and to give sufficient conditions
under wliich one multi-type wafer design
condition
is
will identify
used to develop a surrogate objective function for the
an
effective wafer design.
production up to time
proportional to
The
dominate another design. This dominance
will
t
We
also
show that the
LP
in Section 2 that
difference in cumulative set
between a multi-type policy and the single type policy
is
directly
\/i.
stochastic analysis shows that
duced, and hence to maximize the
if
one wants to maximize the number of sets pro-
minimum
of a multivariate normal,
it
is
desirable to
have the covariance matrix of the multivariate normal contain large off-diagonal elements
(that
is,
positive correlation
among
the elements) and small diagonal elements. Under the
traditional single-type wafer policy, the resulting departure streams of non-defective chips
5
of each type are independent
and thus the covariance matrix has zeroes on the
ofF-diagonal,
whereas the muUi-type wafer leads to a covariance matrix that has positive ofF-diagonal
The reason
elements.
for the positive correlation
is
that entire wafers
and
wafers can be defective. Furthermore, the single-type wafer policy leads to
entire lots of
much lumpier
departure streams of non-defective chips of each type (departures of a particular type occur
whenever a non-defective
lot
of wafers of that type exits the fab) than under the multi-
type wafer pohcy (where each non-defective wafer of each non-defective
some non-defective chips
of each type),
lot
may
contain
and hence the corresponding covariance matrix has
larger diagona' elements.
In addition to offering an effective multi-type wafer design, the stochastic analysis
developed in Section 3 can also be used to plan production.
the algorithm of Clark
correlated)
mean
to approximate the
[2]
normal random
of the
In particular, one can use
minimum
of a set of (possibly
variables. This will allow the production planner to predict the
cumulative production of sets as a function of the rate at which
into the fab. Thus, a simple one-dimensional search can
lots of wafers are released
be used to find the appropriate rate
of lot releases that will attain a specified average output rate of sets.
A
naive deterministic
analysis of the production rate, which uses only average yields, ignores the time that
completed
cliips
wait to form sets, and hence overestimates the production rate of sets for
a given input rate, thereby leading to
tool
is
poor customer
not specific to the problem at hand.
variable yield that can be
modeled
service.
This production planning
For any stochastic production system with
as a quasi-reversible
network of queues, we can estimate
the cumulative production of sets as a fiuiction of the start rate of individual units that
make up
the set.
In Section 4. a numerical study
is
undertaken to assess the effectiveness of the proposed
multi-type wafer design and meas\ire
The numerical example
its
relative
assimies that yield
is
advantage over the single-type wafer.
multiphcative, and a simulation model
is
used to measure the production rate of sets for the single-type policy and several multi6
type policies.
The numerical
results
show
that, after roughly 70,000 sets
were completed,
the single-type policy had only produced SS.7% of the naive deterministic estimate of
the production rate, whereas the proposed multi-type design had produced 98.6% of the
Other multi-type
deterministic production rate.
policies
among
deterministic production rate, axid thus choosing
produced
the solutions to the
Slepian inequality has only a marginal effect on performance.
analysis did provide an accurate estimate (typically within 2
of the observed cumulative production in the single-type
stochastic analysis
is
at over
96%
of the
LP
via the
However, the stochastic
— 3%
of the simulated values)
and multi-type
Thus the
cases.
impact of a multi-type wafer design
a useful tool to assess the relative
and to plan production under any wafer design.
It
interesting to contrast the results of the detenninistic
is
Although the naive deterministic analysis
yield case,
it is
offers
an
more importantly,
analysis.
effective design in the non-multiplicative
not detailed enough to distinguish
multiplicative yield case and,
and stochastic
is
among many competing
designs in the
imable to detect the large difference
in
performance that exists between the single-type and multi-type wafers. Thus, although
the deterministic analysis of yields can be useful,
performed here
remdom
will
urge
rest
it is
our hope that the stochastic analysis
archers and practitioners to delve deeper into the problems of
yields in manufacturing, as
opposed to only analyzing
yields in terms of long-run
averages.
of
1.
The Model
A
wafer consists of
n-i
type
wafer fab
1
is
chips,
772
S
chip sites, indexed by
type 2
chips,...,
and
rtj^-
5
=
1,
...,
S,
and a
type A' chips.
set of chips is
As mentioned
being modeled as an open network of quasi- reversible queues.
composed
earlier, the
We
assume
that the network possesses a stationary distribution (which amounts to assuming that the
network
is
not loaded
stationary distribution.
up
to or
The
beyond
its
capacity),
and that
it
is
initialized
with
its
individual customers in the queueing system represent a lot
7
of wafers,
and the nodes
particular,
of the queueing network represent the workcenters in the fab. In
assumes that, under a multi-type
tiiis
policy, lots of multi-type wafers (all of
which have the same design) arrive to the queueing system according to a Poisson process
with rate
A.
For the single-type pohcy, type k
have
lots (i.e., lots consisting of wafers that
only type k chips on them) arrive according to independent Poisson processes with rate
fk\, for k
we
=
1,
...,
A',
where fk
is
the fraction of lots that are of type
derive the fraction fk that causes the average
produced to be
will
be assumed
in the
f-'^r
same
number
k.
In the next section
of non-defective type k chips
This mix of entering
relative proportions as ni,...,n/\-.
the basis of comparison, and the resulting production policy
lots
Vv-ill
be
referred to as the single- type policy.
Readers are referred to Chapter 3 of Kelly
[4]
for a definition
works of quasi-reversible queues. One possible scenario
number
of identical machines, the machines at each workcenter have the
each workcenter.
FCFS
and
same exponential
(first-come first-served)
For the single-type policy, type k lots have their
terministic route through the workcenters of the fab,
of net-
that each workcenter consists of a
is
processing time distribution, and individual lots are served
at
and examples
own
arbitrary de-
for the multi-type wafer policy,
all lots
have the same arbitrary deterministic route through the fab. As
Section
3,
will
be seen
in
the only performance measures of the queueing network that are required in our
study are the various departure processes.
For both the single-type and multi-type policies,
wafers
is
service,
defective with probability
all
independent of
will
all
be assumed that each
other
and routing information. This type of defect can occur
s£ an oven,
wafers,
5,
it
where the entire
and a wafer
lot
is
processed at once.
in a non-defective lot
other wafers in the
lot.
Tliis
is
Each
lots,
at a
and
lot of
of the arrival,
batch operation, such
lot consists of
L
identical
defective with probability p, independent of
type of defect can occur
when
wafer- by- wafer operations
are performed.
Let
Y'ak
be a random variable that takes on the value of one
if
a type k chip allocated
to site s of a non-defective wafer
(When
non-defective, and takes on the value of zero otherwise.
considering the problem of allocating rows of wafers, the variable
values larger than one.)
Hsk and
respectively.
(7^1^,
independent for
defective chips
The random
where
is
=
fik
Friedman
=
5
Then
the expected value and variance of
It will
1,...,S
Y^i; will
be given by
and k
=
1,..., A'.
Let Y^
=
5Z,=i ^sk be the number of non-
on a non-defective type k wafer (a wafer consisting only of type k
X]^_j
//»*:
and al
=
example) have
for
X^,=i ^Ik-
Many
and
studies (see Stapper
cr^,
[8]
chips).
respectively,
and Albin and
verified that the defects generated in wafer fabricaLion
tend to cluster, causing the variance of the random variable
n:iuch larger
can take on
be assumed that the random variables Ysk are mutually
variable Yk has expected value and variance given by ^k
[1],
1\,^
Y'k
to
be very high, sometimes
than the mean.
The assumption
analysis; however,
it
multi-type policies.
of
independence across
sites of
a wafer
is
not crucial to our stochastic
does allow for a convenient comparison between the single-type and
Moreover, this does not appear to be an overly stringent assump-
an entirely defective wafer has already been
tion, especially considering that the effect of
captured.
Recall that the decision variable for the wafer design problem
fraction of site
.s
[0,t]
under the single-type (respectively, multi-type)
goal
is
is
to solve the wafer design problem,
2.
The
policy.
to choose x^t to
is
process F{t)
maximize hm,_oc
and to compare
optimal design with ]init^oo t~^ F[N{t)], which
under the
which
is
the
number
have departed from the fab during the time interval
dependent, and the wafer design problem
Our
Xgk,
Let N{t) (respectively, F{t)) be the
allocated to type k chips.
of sets of non-defective chips that
is
is
design-
t~^ E[F{t)].
lim^-^oo i~^F[F{t)]
under an
the corresponding performance measure
single- type policy.
Deterministic Analysis
In this section, a deterministic analysis
9
is
undertaken that ignores any variablility
—
in the
'
production process and in the yield process, and looks only at long-run average
values.
We
begin with the single-type case, and then proceed to the multi-type case. The
single-type case
is
considered primarily as a basis for comparison against the multi-type
case.
In the single-type case, each lot of wafers consists of only a single chip type. In order
to analyze the performance of
tliis
case, a
product mix must be specified; that
is,
the
proportion of lots that are released into the fab that are of a given chip type.
Recall
non-defective type k chips are required to form a set, and the average
number
that
nic
of non-defpclive chips
on average,
it
on
a
non-def?ctive type k wafer
Uk for
is
/:
=
1
K. Therefore,
takes n^/ fik non-defective type k chips to form a set, and thus the average
fraction fk of starting lots that are of type k should be
^.i^^-
=
/.
(2.1)
Notice that the average total number of non-defective wafers of
form a
all
types that
it
takes to
set is Ylk=ii^^k/ fJk)-
In the multi-type case, the product design problem can be formulated as the linear
program (LP)
1
max min
T,k
{
l<k<h
771-
^
"S^ Hsk^sk}
(2.2)
'^—
K
subject to
/^
*.
where Xsk denotes the fraction of
The multi-type
=
1
xsk
>
0,
for
=
.s
(2.3)
1,...,5,
(2.4)
site 5 that is allocated to
type k chips.
case will be further distinguished between the multiplicative case and
The expected
the non-multiplicative case.
exists a set of
^ai
=i
5 nonnegative
Hsk
=
constants
Cs
c^fjk for all
yields
/j^jt
summing
.<!
=
10
1, ...,
will
to
be called multiplicative
if
there
one such that
S]k
=
1,
...,
A'.
(2.5)
If
condition (2.5) does not hold, then the yields will be referred to as non-multiplicative.
Since X^g_i Cg
=
1, it
follows that the term
a non-defective type k wafer,
The two
/Vjt
appearing in (2.5)
which was defined
it
factors that affect the expected yield ^sk are the circuit density of type
becomes more
difficult to
As the
versus location surface
is
circuitry of a chip
rehably produce the chip. Also, for
more apt to
are certain parts of the wafer that are
assumes that these two
independent fashion
this condition
test this
in
tells
The
yield
us that some sites
and
location, behave in an
determining the resulting yield of a type k chip in
was thought to hold
in
our setting,
it is
assumption when possible. See Stapper
(2.5) holds, then
LP
max
yield
and
(2.2)-(2.4) can
clear that
[7]
site s.
one wants to
Although
collect
and references therein
for
data
more
location.
be rewritten as
(2-G)
y
y,i,k
Condition
regardless of the chip type.
sites,
factors, circuit density
on the complicated relationship between
When
chip types, there
donut-shaped, with the lowest probability of success occuring in
achieve inherentlj- higher yields than other
(2.5) effectively
all
A-
becomes more
yield non-defective chips.
the middle and at the periphery of the wafer. This yield surface
and
the expected yield for
in Section 1.
chips and the location of site s on the wafer.
dense,
is
s
subject to
\
y
s
—
<
Cg^sk
for k
=
1, ...,.
1
K
^x,, =
1
for.s
=
(2.S)
l,...,S,
*r=l
>
:csk
Let
TT
(2.7)
=
(tti,
and
...,
TT/^)
and
')
=
(2.8), respectively.
(2.9)
0.
(71, ...,7s)
be the dual variables corresponding to constraints
Then the dual LP
is
S
mm
in 5^7.
(2-10)
3=\
subject to 7,
>
^'^^^""^
iov s
11
=
l,...,S;k
=
l,...,K,
(2.11)
Y.^k = h
(2.12)
it=i
^k
If
the constraints (2.11) are
>
0.
summed
(2.13)
over s
=
1,
...,
S, then
we obtain the relaxed dual LP
s
minVi,
(2.14)
s=l
S
subject to
y"7^ > ^^^
=
for k
1,...,A',
(2.15)
*
3=1
K
Y.^k =
(2.16)
l.
>0,
TT,
(2.17)
which can be rewritten as
mm
ni,
max
(2.18)
i<k<K nk
K
=
subject to J^TTjt
k=\
TTjt
The
solution n* to this
LP
>
(2.19)
1,
(2.20)
0.
is
K
= "''^"'^~'forJl- =
-(E-
<.
and thus the optimal objective function value
l,...,7^,
to the relaxed dual
Therefore, an optimal solution to the original dual
LP
(2.21)
LP
(2.10)-(2.13)
is
{^k=i[nk/ ^ik))
is tt*
and
A'
i:
Since
tt^
>
for h
=
= Cs{V'^)~'iovs =
all
binding in the optimal
l,...,A,
(2.23)
the A' primal constraints (2.7) are
1, ....A',
(2.22)
\,...,S.
solution. Since the set of equations
^Vc.x., = (V^)-^forA- =
s=\
k=\
K
^x,;. = Ifor
k
=
.s
\
12
=
1,...,5,
(2.24)
are rediiiidaiit. there
aiT,
in general
many
solutions to the primal LP.
Thus we have proven
the following.
Proposition
all
Notice that (a)
tells
mix
(2.2)-(2.4) is (X^t=i(^*;//u
))
,'
(2.1), the
not unique.
us that the optimal
equal to (X^;t=i("*//^'^'))
uct
LP
the constraints in (2.7) are binding; and
(c) the solution to (2.2)-(2.4) is
is
(2.5),
optimal objective function value of the
(a) the
(b)
Under condition
1.
average
number
of sets
from a non-defective wafer
Recall that under the single-type policy under prod-
•
number
of non-defectiv? wafers rf^qr.ired to obtain a
=:pt
wa?
Thus, under the multiplicative yield assumption, there appears to be no
^;._j(njt//-'A)-
advantage in using multi-type wafers. This
various chip types behave similarly across
is
because the relative expected yields of the
sites.
However,
this deterministic analysis ig-
nores the variabilij' in the production process and the queueing of chips that takes place
The
before they are assembled into sets.
lem, and will indeed
show that there
is
next section will take a closer look at this prob-
a significant difference
between the single-type and
multi-type policies. Furthermore, the analysis in the next section
which of the many solutions to the
Before finishing this section,
tive
assumption that
better in
some
sites
is
feasible for
which
is
the
LP
(2.2)-(2.4)
sites relative to
non-multiplicative case
is
the non-multiplica-
other chip types. Observe that
.>.
=
l,...,S-k
=
1,...,A',
(2.25)
and achieves the objective function value (X^,=i("j/^'j
))
'
as the single-type case. Thus,
The optimal objective function value of LP
2.
under the single-type
LP under
In this case, certain chip types can perform
for
same performance
Proposition
us return to the original
"^^'"^
= /^=
choosing
(2.2)-(2.4) will yield the best design.
(2.5) does not hold.
than other
a-,;.
let
LP
will aid us in
(2.2)-(2.4)
under the
greater than or equal to the corresponding performance measure
policy.
13
3.
Stochastic Analysis
The
stochastic analysis in this section assumes that the multipUcative assumption
(2.5) holds.
However,
in the non-multiplicative case, a similar analysis
compare the performance
of the optimal multi-type policy
to the single type policy.
If
(i.e.,
can be used to
the solution to (2.2)-(2.4))
LP
there happens to be multiple solutions to the
in the non-
multiplicative case, then the analysis can also be used to help decide which solution will
lead to better performance.
Single-Type
3.1
Poiic;,'.
We
bf>gin this :>ection
—
Recall that under this policy, lots of type k
by cmalyzing the single-type
1,...,A' enter the fab
pendent Poisson processes with rate /^A, where fk was defined
an open network of quasi-reversible queues,
non-defective type k lots from the fab
pound Poisson process Dk{t)
= ^,=i
Since the fab
in (2.1).
=
Wi, where Wi,i
(1
—
q)fk^-
Our assumptions
= ^^^
is
a com-
aie independent
and
variables with parameters £, the lot size,
and
1, ...,Ak{t),
Let Nk{t) be defined by
p, the probability of a non-defective wafer.
Nk(t)
is
follows that the departure stream Ak{t) of
Poisson with rate
random
identically distributed (iid) binomial
—
according to inde-
imply that the departure process of non-defective type k wafers
in Section 2 also
1
is
it
policy.
^—J >
0, for
k
=
A',
1
(3.1)
no-
where y\
For k
=
,i
=
!,...,!?<..(/),
1,...,A',
it
are iid
random
follows that E[Nk(t)]
=
variables having the
at
and
Var[A'jt(/)]
=
same distribution
sit,
as Yk-
where
{l-q)\Lil-p)
and
'1
=
11k-
^^\
\Lil- Pyi +
^^iL{\
Furthermore, notice that the A' processes {Nk{t),t
pendent.
14
-
P)P
> 0},k =
+
L'{1
- pYf,i
1,...,A", are
I
.
(3,3)
mutually inde-
Recalling that
of sets
njt
type k chips are required to form a
produced by time
is
t
mini<t</v-
[A''jt(/)J
,
where
[x\
—
For simplicity, we choose to analyze the process N*(t)
set,
it
number
follows that the
denotes the integer part of
which
mini<j.</^- Nkit),
x.
will lead
to a negligible error since
min \Nk{t)\-N*(t)\<liovallt>0.
(3.4)
I
It
follows by the central limit theorem for renewal processes that, for k
Nkit)
-
at
^,
=> Ajt as
j:
—
<
=
1,
...,
A',
^
cx),
>
^
(3.5)
y/t
where A't
~
^'(0. si),
normally distributed with mean zero and vaiicince
i.e.. A';, is
^^., aiivi
=> denotes convergence in distribution. Thus,
<
lim Pr{N*(t)
+
x\fi
ai)
=
\
- hm TT Pr{Nk{i) > xVi +
k
at)
:3.6)
=\
= (i-n('-*(^)))where $
is
(S'-)
the cumulative distribution function of the standard normal.
Thus we can
analyze the asymptotic performance of the single-type policy by studying the
A' independent
normal random
Notice that
relatively
s^.
in (3.3)
few chips in a
variables; this point will
decreases as
increases,
77;-
be pursued further
minimum
in
of
Section 3.4.
and thus the chip types that have
tend to cause the burstier, or more variable, departure
set will
streams, since these chip types will not be produced very frequently.
3.2.
type policy.
lots
Multi-Type Policy. A
By
similar analysis will
from the queueing network
= ^,=1
to the multi-
the quasi-reversibility assumption, the departure process of non-defective
is
a Poisson process A{t) with rate A(l
the departure process of non-defective wafers
D{t)
now be apphed
W'j,
where
variables with parameters
H',,
?
=
L and
is
given by the
—
q).
Therefore,
compound Poisson
l,...,A{t), are again binomially distributed iid
I
—
p.
E[D{t)]
process
random
Thus,
=
X{1
-
15
q)L{l
- p)t
(3.8)
and
= HI -
Var[I>(<)]
Recall that the wafer design
A",
1
where x^k
is
q)t[L{l
- p)p + L^l - P?].
defined by the decisions Xgk,s
is
(3.9)
=
1,...,5,
and
the fraction of site 5 allocated to type k chips. Define the
=
k
random
variables Vgk by
il^
=
Vsk
=
for 5
1,
...,
S;k
=
\,
...,
K.
(3.10)
nk
Then
these mutually independent
random
variables,
^-^^^-^
and Var[F,,]
which are dependent upon the design,
have
E[V,k]
-
^^^.
=
=
Define Tk
Yjs=i
^
'«'-'
^^ *^^*^
s
= 5]
E[Tk]
Let F(t)
=
(Fi(/),...,FA.(f))
variables distributed as Tk/.
It
follows that E[Fk{t)]
Sji-f for j
^
k,
(3.11)
nj^
rik
=
:^
s
and Var[r,]
be defined by Fk{t)
=
Then mini<jt<A' [•f"fc(OJ
bkt, Var[F^.(f )]
=
=
J]
2
^2
:i^.
EJ^i^^I''' ^^^ere
is
the
Eu-^ for k
number
=
1, ...,
(3.12)
T^.''
of sets
A',
are iid
random
produced by time
and Cov[F,(/),
Fkit)]
=
where
s
bk
=
A(l
- q)L{l-p){y
^
S
+
A(l
2
f:iMiliL),
(3.13)
"'^
2
- q)[Lil-p)p + L'{l-p)']{J2 ^^^^^)\
(3.14)
and
S
^^k-Hl-q)[L(l-p)p +
LHl-p?]{Y.^){Y.-^^Ik
Recall that one of the goals of this section
case (2.5), an effective design x^k from
S
among
16
is
the
(3.15)
to choose, for the multiplicative yield
many optimal
solutions to the dual
LP
In the rest of this section,
(2.2)-(2.4).
LP
(2.2)-(2.4)
under condition
we
will restrict ourselves to designs i^jt that solve
However, as noted
(2.5).
performed under the non-multiplicative yield
Proposition
for k
—
1,
...,
limit
where a
A',
is
LP
=
(fej
theorem
,
..., 6fc ),
in (3.13) satisEes bk
=
a
defined in (3.2).
which equals
(a,
a)
...,
1(a), (2.1), (3.2),
by Proposition
3,
and
(3.13). |
and we have, by the central
for renewal processes,
^
Z ~
deHned
(2.2)-(2.4), then bk
F(i)' -bt
where
can be
case.
This follows directly from Proposition
Proof.
Let 6
Ifx^k solves
3.
earlier, a similar analysis
which
A^(0, T.),
covariance matrix S, where
Letting F*{i)
=
is
=»
is
as
<
-^ oo,
(3.1G)
normal random variable with mean zero and
a multivariate
S
Z
defined in (3.14)-(3.15).
mm\<,k<h' Fk(i) and denoting the kth component
of
Z by
Z;-,
we
have
Urn
Pr{F*{t)<x\/i + at)^
1
- Pr(
mm
Z^ >
x).
(3.17)
Thus, the asymptotic performance of the multi-type policy can be analyzed by studying
the
minimum
3.3.
A
of Slepian's
of A'
dependent normal random variables.
Comparison of
lemma
Proposition
Policies.
(see Slepian [6]) that
4.
Let
X
=
We
is
(Xk) and
begin this section by stating a generedization
due to Kahane
Z =
[3].
(Zk) be normal
K — dimensional
vectors
such that
E[X,Xk]<E[Z,Zk]i((j,k)eA,
E[XjX,] > E[ZjZk]
if (j,A-)
E[XjXk] = E[ZjZk]
if (j,
17
e B,
k)^AW B.
(3.18)
Let f{x
=
)
f{xi,...,Xk) be a function defined on
df
with second derivatives satisfying
>
if
{j,k) e A,
<0
if
(i,A-)
dxjdxk
df
R^
dxjdxk
6 B.
(3.19)
ThenE[f{X)]<E[f{Z)].
With the
aid of the Slepian inequahty,
we
will provide a multi-type
poHcy that out-
performs the single-type policy.
Proposition
Provf.
For
5.
j
/
k. Iljk
Ti:i> itsi;!: Jollovvs fioiu
>
and
is
independent of the design Xsk-
Proposition l(b} and (3.15).
B
Let us again consider the design
defined in (2.25).
Proposition
matrix
satisfies
^^k <
Proof. From
--kk
-
2
s^
For the design Xsk defined in (3.20), the corresponding covariance
6.
sj.
(3.3)
X{1
=
for k
and
-
—
1,...,A'.
(3.14)
q)[L{l
we have
- p)p + LHl - pf] f
1
^^
+ Ml-,)Lil-p)(Y^C-i^)
The
first
term on the righthandside
is
1
:\
(3.21)
).
non-positive since X^,=i(^j/a'j)
^
^k/ftk-
Under
design (3.20),
.2
„2
3
s=l \
^k
k
J
2/1
/U-"itE;=l("j//^j'
^
1
>
'
and hence the second term on the righthand
side of (3.21)
18
is
<
also non-positive
0.
(3.22)
Proposition
Under design
7.
,.
Hm
B
—^^ >
E[F*{t)]
-^
,.
lim
E[N*it)]
^
!-^.
3.23)
This follows from central limit theorems (3.5) and (3.16), and Propositions
Proof.
4-6,
(3.20),
where, in Proposition
4,
the set
A
corresponds to the diagonal elements and the set
=
corresponds to the ofF-diagonal elements, and f{x\^...^Xf^)
Although design (3.20) outperforms the single-type
able multi-type design.
design, one wants to
make
Prc-positions 4
(2.2)-(2.4),
it
follows
and
5, it is clear
it is
|
..., a-;^-).
not necessarily a desir-
that in order to find an effective
the diagonal terms Tjkk of the covariance matrix of F{i) as small
In particular, since n'^
as possible.
LP
By
policy,
min(xi,
X^s=i
-i^
sk^sk
is
from (3.14) that the terms
a constant for
nl"^ Yfs=\
designs that solve
all
^Ik^lk^^
=
1'
•••.
A'
need to
be made as small as possible.
We now
propose two mathematical programs (that
differ
tions) that should lead to effective, not optimal, designs.
straint set (2.4)
and
(2.23)-' 2.24),
only by their objective func-
Both programs have the con-
which has the same form as the constraints of a trans-
portation problem; this constraint set guarantees that a feasible solution will be an optimal
solution to
LP
(2.2)-(2.4).
The two
objectives are
--EE^^^
(3.24)
and
min max
V^^iJ^.
5=1
(3.25)
^
Although objectives (3.24) and (3.25) may both lead to an
(3.25) will lead to a
effective design, objective
problem with non-linear constraints, which
than the quadratic program generated by objective (3.24).
the popular assumption that Y^k are Bernoulli
19
random
It
will
be harder to solve
should be noted that under
variables for
all 6
=
1,...,S
and
k
=
1,...,A'
(and the yield
and
If
is
E^
the variables
were
x^jt
math programs
asymptotic
(i
—
>
t
)
normal random
an iterative approximation
(it is
normal random
these estimates by c^
and
f.
still
(3.7)
=
and
c.
Csfk),
depend on
x^jt,
and hence
and
(3.17).
it
follows that an
variables.
[2]
Using
his approximation,
minimum
has developed
moments
=>
mm(Ai,
of
we can estimate
Zj^)] and, for the sake of concreteness, let us
by
of sets
denote
(3.5) that
...,Xk) as
r
—
>
oc,
(3.2
1
)
c^y/i
+
at.
(3.28)
C:Vi
+
at.
(3.29)
be estimated by
and E[F'(i)]
will
—
(3-26)
2) technique to calculate the
Notice that the quantity at appearing in (3.28) and (3.29)
Cj-
Cg^ki^
we can estimate E[N*(t)] by
Similarly, E[F*{t)] can
of E[N'{t)]
=
variables, hi particular, Clark
c-, respectively. It follows
r=
for large
fisk)
can be performed by studying the
exact for A'
^h')] and E[vmn{Zi
£'[min(A']
—
and F*{f), which are the cumulative number
for the various policies,
of A' (possibly dependent)
and thus
but the second term would
oo) analysis of A'*(f
of A'
/is/t(l
are not trivial in this case.
produced up to time
minimum
=
term on the righthand side of (3.26) would
Asymptotic Performance Analysis. By
3.4.
the
1,
a^^^
^Ec.xL-4E^^-^.-
=
integer, the first
all
be a constant by Proposition
the
multiplicative), then
be negative
if
is
the deterministic estimate
there was no variability in the production system.
(recall that
A"
and Z have mean
zero),
it
follows that the
naive deterministic analysis overestimates the actual cumulative production of
20
Since
sets.
The
difference in expected cumulative production
type policy grows in proportion to
and
\/i,
between a multi-type policy and the
approximated by
is
{c^-c,)Vi.
(3.30)
Thus, although the average production rates of the two policies both converge to
difference in the cumulative production
4.
A
being addressed
we
the
between the two pohcies diverges.
present a numerical example that
data from an actual
=
o,
Numerical Example
We now
A'
single-
is
As mentioned
V)ased
is
on disguised, but representative,
in the Introduction, the
problem currently
to allocate rows of a wafer to various chip types.
Our example has
facility.
4 chip types and ten rows, but to keep consistent with past notation and terminology,
will refer to the
rows as
sites,
fraction of a particular row that
A
made up one type
set is
=
4 chips, and so n^
20" rule to hold here:
yield
assumption
(1,
25%
=
(.05
10.
Readers should interpret Xak as the
allocated to type k chips.
chip,
1.3,20) for k
one type 2 chip, three type 3 chips, and twenty type
=
1, ...,4.
It is
and the related data
.05
.07
uncommon
not
of the chip types account for
(2.5) holds
c,
1
is
=
and thus S
80%
for the universal "80-
of the set.
The
multiplicative
is
.09
.09
.11
(3G
72
48
.13
.13
.14
.14)
(4.1)
and
/;i
Recall that
The
figk
lot size
=
L =
Cgfj.^
=
can be greater than one since
20, the probability of
defective wafer in a non-defective lot
is
a defective
p
=
.12,
CO).
.s
(4.2)
indexes an entire row of the wafer.
lot is ^
and the
=
.05,
the probability of a
arrival rate A of wafers,
which
does not affect our analysis, equals one. Finally, the transpose of the matrix of variances
21
a;^
given by
is
_
~
2
'^''^
The
policy
is
2
40
45
4
4
24
3
38'
4
42
15
40
44
12
30
12
18
15
20
4
10
18
30
2
44
4
18
20
20
4
14
14
4
20
40
40
4
4
6
20/
calculation (2.1) of the fraction of starting lots fk of type k for the single- type
given by
=
(4/63
2/63
48/63).
9/63
(4.4)
The
Five different policies were tested in our simulation experiment.
'ynp policy Menotec' by SINGLE
m
Table
and k
=
One
The design
6.
*;
(2.25),
first
policy
lots arc released
The
in''':
where Xsk
=
fki for s
=
1,...,10
were derived by solving mathematical programs.
last three designs
that solves the quadratic
program
(3.24), (2.4), (2.23)-(2.24) will
be denoted
the design that solves the program (3.25), (2.4), (2.23)-(2.24) will be
MINMAX. The
last
design solves
A'
S
2
z.k
2
(4.5)
^
k=l s=l
subject to (2.4). (2.23)-(2.24). This design, which will be denoted by
it
the
policies are multi-type
maxVy^l^
ni
f-^ ^-^
because
is
Recall that this design was proven superior to the single-type design in
MINSUM, and
denoted by
(PROP)
the proportional design
1,...,4.
Proposition
by
is
where type
I),
The other four
the fab according to the product mix in (4.4).
policies.
(4.3)
I
A-
?ing!?
^
should lead to an ineffective design,
(2.24), thus enabling us to assess the
among
MAXSUM,
was tested
the designs that solve, (2.4), (2.23)-
range of performance
among
different
mult i- type
wafer designs.
For
all five policies
tested, 100 independent runs
were made, each consisting of 2000
time units. For each policy, the cumulative production at times
and 2000 were
Table
I.
collected, along with
In Table
II,
95%
confidence intervals.
we present the percentage improvements
type policies over the single-type policy
at
time
99
t
=
2000.
t
The
in
=
250, 500, 1000, 1500,
results are displayed in
performance of the multi-
The cumulative production
at
time 2000
is
would occur
also expressed in this table as a percentage of the ideal production rate that
in a deterministic
environment.
CUMULATIVE PRODUCTION AT TIME
POLICY
t
=
250
f
=
500
t
=
1000
t
=
1500
t
=
2000
SINGLE
67S9(±356)
1565S(±467)
33146(±687)
49894f±969)
67792(±1150)
MAXSUM
S58G(±214)
17897(±290)
3652G(±396)
55116(±529)
735S0(±C18)
PROP
9229(±126)
18671{±179j
37240(±259)
55S34(±303)
74325(±335)
MINMAX
947G(±13S)
18815(±193)
37425(±253)
56275(±300)
75251(±350)
MINSUM
9526(±133)
18871(±171)
37633(±225)
56375(±296)
75342(±354)
TABLE
The
in
results
I.
Cumulative Production of Sets
show that the two proposed multi-type
cumulative production
at
time
MINMAX
and
MINSUM,
difference in cimiulative production
it
among
appears that any solution to the
effective in increasing the
an 11% improvement
=2000. Notice that percentage improvements are much
t
higher for lower time values, and are as high as
proposed pohcies,
policies offer
LP
production of
40%
at
time
f
both outperform
=
250.
Although our two
MAXSUM,
the multi-type poHcies
is
the percentage
relatively small. Thus,
(2.2)-(2.4) in the non-multiplicative case will
sets.
Therefore,
among
be
these policies, the designer
should probably allow other factors, such as ease of design, to dictate the wafer design
decision.
In particular, the
constraint set,
such as
and
MINMAX
and
MINSUM
solutions are interior points of the
so have mostly non-zero elements, whereas other less effective objectives,
MAXSUM (or MAXMIN) lead to more easily implemented extreme point solutions.
23
PERCENTAGE
POLICY
PRODUCTION AS
IMPROVEMENT OVER
A PERCENTAGE
SINGLE-TYPE POLICY
OF UPPER BOUND
SINGLE
88.7%
MAXSUM
8.5%
96.3%
PROP
9.6%
97.2%
MINMAX
11.0%
98.5%-
MINSUM
11.1%
98.6%
TABLE
II.
Comparison of Cumulative Production of Sets
at
Time
t=:2000.
However, the performance of the muUi-type policies seem even more impressive when
expressed as a function of the deterministic upper bound.
production at only
71%
of the deterministic rate at time
deterministic rate at time
t
the deterministic rate at
=
best multi-type
t
=
pohcy (96.3%.
2000, whereas the
The
t
MINSUM
=
single-type pohcy achieves
250 and only 88.7% of the
policy produces at 98.6% of
2000. In this light, the improvement from the worst to the
to 98.6%)
is
quite significant.
Although our analysis has been restricted to the case of one multi-type wafer design, an
important consideration
if
is
the marginal improvement in performance that can be attained
several distinct wafer designs were used to satisfy the
demand
release decisions of the various multi-type wafers does not
for sets.
If
the dynamic
depend on any state-dependent
information such as the resulting yields, then the upper bound on the performance of such
a policy
is still
that very
little
the deterministic production rate.
Therefore,
we conclude from Table
can be gained by using an additional wafer design, and thus
that the cost of a second
mask
set
it is
unlikely
would be covered by the marginal improvement
production. Moreover, recall that with electron
24
beam
technology, there are no
II
mask
in
sets,
and
a different multi-type design could be used for each lot of wafers entering the fab.
Table
is
II
suggests that very
little
used to satisfy demand with
production
will
be sacrificed
this technology, unless a
more
if
a single multi-type wafer
intelligent
(dynamic, state-
dependent) release policy were implemented with several (or many) distinctly designed
wafers.
TIME
t
=
2o0
t
=
500
t
=
1000
t
=
1500
t
=
2000
SIMULATED
TIME
References
[1]
Albin,
S. L.
tions in
[2]
J.
(1988).
IC Fabrication. To appear
Clark, C. E. (1961).
Research
[3]
and Friedman, D.
Kahane,
9,
in
The Greatest
The Impact
Management
of Non-Poisson Defect Distribu-
Science.
Random
of a Finite Set of
Variables. Operations
145-162.
J. -P.
(1986).
Une
Ineqalite
du Type de Slepian
et
Gordon sue
les
Processus
Gaussiens. Israel Journal of Mathematics 55, 109-110.
[4]
Kelly, F. P. (1979). Reversibility
and Stochastic Networks. Jolm Wiley and Sons, New
York.
[5]
Singh,
of
M.
R.,
Abraham, C.
T.,
Components When Yield
and Akella, R. (1988). Planning
is
Random.
Fifth
IEEE
for
Production of a Set
CHMT International
Electronic
Manufacturing Technology Symposium Proceedings.
[6]
Slepian, D. (1962).
The One-Sided
Barrier Problem for Gaussian Noiso. Bell System
Technical Journal 41, 463-501.
[7]
Stapper, C. H. (1985). The Effects of Wafer to Wafer Defect Density Variations on
Integrated Circuit Defect and Fault Distributions.
IBM Journal
of Research and De-
velopment 29, 87-97.
[8]
Stapper, C. H. (1986).
The
Defect-Sensitivity Effect of
of Solid-State Circuits SC-21, 193-198.
27
Memory
Chips.
IEEE
Journal
.52
Date Due
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