Laboratory Experiments for a Wireless Communications
Course
by
Robert Williams Cox, IV
S.B., Massachusetts Institute of Technology (2001)
Submitted to the Department of Electrical Engineering and Computer Science
in partial fulfillment of the requirements for the degree of
Master of Engineering in Electrical Engineering
at the
MASSACHUSETTS INSTITUTE OF TECHNOLOGY
May 2002
@
Massachusetts Institute of Technology 2002. All rights reserved.
Author..........
.......
/ ...............................
Department of Electrical Engineering and Computer Science
April 10, 2002
Certified by...
Steven B. Leeb
Associate Professor of Power Engineering
Thesis Supervisor
Accepted by..
k-
.... .....
.
..
.
..
.
...
e..
.....
.
...... ..
..
........
Arthur C. Smith
Chairman, Department Committee on Graduate Students
OF TECHNOLOGY
JUL 3 1 2002
LIBRARIES
2
Laboratory Experiments for a Wireless Communications Course
by
Robert Williams Cox, IV
Submitted to the Department of Electrical Engineering and Computer Science
on April 10, 2002, in partial fulfillment of the
requirements for the degree of
Master of Engineering in Electrical Engineering
Abstract
This thesis presents a set of laboratory exercises for teaching novice engineers the fundamentals of radio frequency (RF) circuit design. Experiments are presented which teach
continuous-time techniques for modulation and demodulation. Typical receiver and transmitter topologies are investigated using numerous circuit examples.
Thesis Supervisor: Steven B. Leeb
Title: Associate Professor of Power Engineering
3
4
Acknowledgments
I would like to thank Professor Steven Leeb for his advising and assistance over the course
of this project. Without him, many of the opportunities which now lay before me would be
nothing but empty dreams. Professor Leeb amazes me, as his enthusiasm and patience are
matched only by his insight.
I also owe a great deal to two of my LEES cohorts, namely John Rodriguez and Chris
Laughman.
Without their help, I would probably still be shouting numerous obscenities
over the many shortcomings of another popular word processing tool. In particular, I owe
quite a bit to Laughman, for not only did he introduce me to Jack, but he also has taught
me a great deal about how to approach complex problems.
Of course, it would be impossible for me to forget the many friends and roommates that
I have had over the past 5 years. All of them have helped me quite a bit during my time
in this place. Those who deserve special mention are Eric Sandness, Zach Bodnar, Daniel
Serna, and Alex Park.
One person who merits special mention is my wife-to-be, Karyn Van Veen. Not only has
Karyn put up with a lot because of me, she has also been very patient during the creation
of this document. For that, and her unwavering love and support, I am eternally grateful.
Lastly, I would like to thank my family. Although all of its members have had an impact
on my life, no one has had a role like that of my mom. Despite the fact that she will never
read another line after this one, not a single drop of ink would be on this page right now if
she hadn't been in my life. This thesis is dedicated to her.
5
6
Contents
1
2
Introduction
. . . . . . . . . . . . . . . . . . . . . . . . .
17
. . . . . . . . . . . . . . . . . . . . . . . . . . .
17
1.1
Motivation
1.2
Outline
Laboratory One: Passive Compon ants and Amplifiers
2.1
2.2
2.3
2.4
3
17
An Introduction to the Inductor
fiers19
. . . . . . . . . . . . . . . . . . . . . . . .
3.2
19
2.1.1
A First-Order Model of the Inductor . . . . . . . . . . . . . . . . . .
19
2.1.2
Two Practical Inductor Ex amples
20
. . . . . . . . . . . . . . . . . . .
Parallel Resonant Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . .
22
2.2.1
Underdamped Example 1 . . . . . . . . . . . . . . . . . . . . . . . .
23
2.2.2
Underdamped Example 2
... .. . . .. . .. . .. . .. . .. .. .
25
2.2.3
Overdamped Example 1
... . .. . .. . .. . .. . .. . .. .. .
28
2.2.4
Overdamped Example 2
.. .. .. . .. . .. . . .. . .. .. . ..
30
Series Resonant Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
31
. . . .. .. .. . .. . .. . . .. . .. .. . ..
32
. . . . .. .. .. . .. . .. . .. . .. . .. .. .
35
Low Frequency Transistor Amplifi ers . . . . . . . . . . . . . . . . . . . . . .
36
2.4.1
36
2.3.1
Underdamped Case
2.3.2
Overdamped Case
A Common-Emitter Exam ple . . . . . . . . . . . . . . . . . . . . . .
43
Laboratory 2: Amplitude Modulation
3.1
19
Exploring AM . . . . . . . . . . . . . . . . . . . . . . . . . .
43
. . . . . . . . . . . . . . . . .
43
3.1.1
Double-Sideband AM
3.1.2
Full-Carrier Double-Sideband AM
. . . . . . . . . .
44
3.1.3
Comparison of DSB AM and Full-Carrier DSB AM .
46
Demodulation of AM Waves . . . . . . . . . . . . . . . . . .
47
7
3.3
3.4
4
3.2.1
Demodulation of DSB AM Signals . . . . . . . . . . . . . .
48
3.2.2
Demodulation of Full-Carrier DSB Signals . . . . . . . . . .
53
3.2.3
A Basic Audio Amplifier . . . . . . . . . . . . . . . . . . . .
53
Tuned Amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . .
53
3.3.1
Design of the 450kHz Tuned Amplifier . . . . . . . . . . . .
57
3.3.2
Measured Values from the
A Simple AM Transmitter . . . . . . . . . . . . . . . . . . . . . . .
Laboratory Three: The Superheterodyne AM Receiver
4.1
The Superheterodyne Receiver
4.2
Transformers
4.3
4.4
5.2
. . . . . . . . . . . . . . .
. . . . . . .
61
. . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . .
62
Motivation for Discussing Transformers
. . . . . .
. . . . . . .
62
4.2.2
Models of the Parallel Resonant Autotransformer .
. . . . . . .
64
IF Am plifiers . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . .
67
. . . . . . . . . . . . . . . . . .
. . . . . . .
67
M ixers . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . .
71
4.4.1
. . . . . . .
71
First IF Amplifier
The Single Transistor BJT Mixer . . . . . . . . . .
77
The Emitter-Degenerated Common-Emitter Amplifier
. . . . . . . . . . . .
77
78
5.1.1
Design Process for the Emitter-Degenerated Common-Emitter Circuit
5.1.2
Measured Values for the Emitter-Degenerated Common-Emitter Circuit 82
Impedance Transforming Circuits . . . . . . . . . . . . . . . . . . . . . . . .
82
5.2.1
L-M atch Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
83
Class A Power Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
84
5.3.1
Design of the Class A Circuit . . . . . . . . . . . . . . . . . . . . . .
85
Class C Power Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
87
Laboratory Five: Introducing Feedback into Communications Systems
91
6.1
More Parallel Resonant Networks . . . . . . . . . . . . . . . . . . . . . . . .
91
6.1.1
Model of the Tapped Capacitor Circuit
. . . . . . . . . . . . . . . .
91
6.1.2
Example Circuit Using a Tapped Capacitor . . . . . . . . . . . . . .
92
Common-Base Oscillators . . . . . . . . . . . . . . . . . . . . . . . . . . . .
93
5.3
5.4
6
61
Laboratory 4: Power Amplifiers
5.1
58
4.2.1
4.3.1
5
ctlual 450Hz Tuneu Amp1ifier
6.2
8
6.3
7
9
Oscillation in Transistor Circuits . . . . . . . . . . . . . . . . . . . .
94
6.2.2
The Hartley Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . .
95
6.2.3
Colpitts Oscillator
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
101
Common-Collector Oscillators . . . . . . . . . . . . . . . . . . . . . . . . . .
103
6.3.1
Analysis of the Common-Collector Oscillator
. . . . . . . . . . . . .
105
6.3.2
Common-Collector Oscillator Example . . . . . . . . . . . . . . . . .
105
Laboratory 6: Modern Receiver Architectures
107
7.1
. . . . . . . . . . . . . . . . . . . . . . . . . . .
107
7.2
8
6.2.1
Tuned Amplifiers Revisited
7.1.1
Problems With the Common-Emitter-Based IF Amplifier
. . . . . .
107
7.1.2
Design of the Common-Collector, Common-Base Cascade Circuit . .
108
M ixers Revisited . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
110
Laboratory 7: Phase-Locked Loops
113
8.1
The PLL as an FM Demodulator . . . . . . . . . . . . . . . . . . . . . . . .
113
8.2
The PLL as a Frequency Synthesizer . . . . . . . . . . . . . . . . . . . . . .
114
119
Conclusions
9.1
The Meaning of Radio-Frequency . . . . . . . . . . . . . . . . . . . . . . . .
119
9.2
One Possible Implementation of an RF Design Course . . . . . . . . . . . .
120
9.3
Future Work
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
120
9
10
List of Figures
2-1
Geometry of the ferrite torroid used as the core in the first inductor example.
20
2-2
A parallel resonant circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . .
23
2-3
A 50kHz parallel resonant circuit.
. . . . . . . . . . . . . . . . . . . . . . .
24
2-4
Pole-zero mapping for the narrowband 50kHz parallel resonant network. . .
26
2-5
Frequency response magnitude of the narrowband 50kHz parallel resonant
netw ork. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
26
2-6
Narrowband 450kHz parallel resonant network.
. . . . . . . . . . . . . . . .
27
2-7
Overdamped 50kHz parallel resonant circuit.
. . . . . . . . . . . . . . . . .
28
2-8
Pole-zero mapping for the overdamped 50kHz parallel resonant circuit. . . .
29
2-9
Magnitude of the frequency response of the overdamped 50kHz parallel resonant circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
29
2-10 Overdamped 450kHz parallel resonant circuit. . . . . . . . . . . . . . . . . .
30
2-11 Series resonant circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
31
. . . . . . . . . . . . . . . . . .
32
2-12 Narrowband 50kHz series resonant circuit.
2-13 Pole-zero mapping for the broadband 50kHz series resonant network.
. .
.
34
2-14 Magnitude of the frequency response of the narrowband 50kHz series resonant network. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2-15 Broadband 50kHz series resonant network.
. . . . . . . . . . . . . . . . . .
34
35
2-16 Magnitude of the frequency response of the broadband 50kHz series resonant
network. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
37
2-17 Pole-zero mapping of the broadband 50kHz series resonant network. ....
37
2-18 Basic common-emitter topology.
38
. . . . . . . . . . . . . . . . . . . . . . . .
2-19 Small signal model of the basic common-emitter circuit.
3-1
. . . . . . . . . . .
39
Frequency spectrum of a DSB AM signal. . . . . . . . . . . . . . . . . . . .
44
11
3-2
Block diagram of the simple DSB AM modulator. The two inputs come from
two different HP33120A signal generators. . . . . . . . . . . . . . . . . . . .
44
3-3
Output of the simple DSB AM modulator . . . . . . . . . . . . . . . . . . .
45
3-4
Frequency spectrum of a DSB AM signal. . . . . . . . . . . . . . . . . . . .
46
3-5
Block diagram of the simple full-carrier DSB AM modulator. The two inputs
come from two different HP33120A signal generators .............
46
3-6
Output of the simple full-carrier DSB AM modulator.
47
3-7
Block diagram of the DSB demodulation process.
VDSB
. . . . . . . . . . . .
is the received sig-
nal, vc is the local oscillator signal, and vM is the recovered copy of the
m odulating signal.
3-8
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Block diagram of the DSB modulator/demodulator system. The two inputs
come from two different HP33120A signal generators . . . . . . . . . . . . .
3-9
48
Output of the DSB AM demodulator with
#
= 0..
. . . . . . . . . . . . . .
49
50
3-10 A simple DSB AM demodulator system with an integrator included to introduce a 90' phase shift between the carrier signal and the local oscillator
signal. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
50
3-11 Block diagram model of the simple integrator used to add a 90' phase shift
to the carrier signal in the simple DSB system.
3-12 Output of the DSB demodulator system with
#
. . . . . . . . . . . . . . . .
. . . . . . . . . . .
52
. . . . . . . . . . . . . . . . . . . .
54
3-14 Output of the full-carrier DSB demodulator . . . . . . . . . . . . . . . . . .
54
3-13 A typical full-carrier DSB demodulator.
-*
90..
51
3-15 A full-carrier DSB demodulator made to follow the lower envelope of an AM
wave. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
54
3-16 Output of the full-carrier DSB demodulator made to follow the lower envelope
of an AM wave. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3-17 Audio amplifier used to listen to demodulated signals.
55
. . . . . . . . . . . .
55
3-18 450kHz tuned amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
56
3-19 Schematic of the simple transmitter circuit.
. . . . . . . . . . . . . . . . . .
59
4-1
Block diagram of a basic superheterodyne receiver. . . . . . . . . . . . . . .
62
4-2
Block diagram of the typical mixer showing an RF input, a local oscillator,
and an IF output.
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
12
62
4-3
a)Frequency spectrum of the local oscillator signal, b)Frequency spectrum of
the RF signal, c)Frequency spectrum of the mixer output. . . . . . . . . . .
63
4-4
A parallel-resonant network driven through a tap on the inductor.
. . . . .
64
4-5
Model of the autotransformer with a tuned secondary. . . . . . . . . . . . .
64
4-6
Another model of the autotransformer. . . . . . . . . . . . . . . . . . . . . .
65
4-7
Parallel resonant autotransformer driven through the center tap. The voltage
source v,(t), which has a source resistance Rs, can be modeled as a current
source using Norton's theorem.
4-8
4-9
. . . . . . . . . . . . . . . . . . . . . . . . .
66
Second autotransformer model with secondary impedances reflected into the
prim ary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
67
First IF amplifier stage in the Graymark 536 AM radio. . . . . . . . . . . .
68
4-10 General small signal model of the first IF amplifier stage.
. . . . . . . . . .
69
. . . . . . . . .
69
. . . . . . . . . . . . . . . . . . . . .
72
4-11 Simplified small signal model of the first IF amplifier stage.
4-12 A single transistor BJT mixer circuit.
5-1
Common-emitter amplifier with emitter degeneration.
5-2
Ebers-Moll model of the common-emitter amplifier with emitter degeneration. 79
5-3
Admittance parameter model of the emitter-degenerated common-emitter
. . . . . . . . . . . .
78
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
81
5-4
Block diagram of the negative feedback provided by the emitter resistor. . .
81
5-5
A down-converting L-match circuit . . . . . . . . . . . . . . . . . . . . . . .
83
5-6
Original parallel resonant network used in the L-match example.
. . . . . .
84
5-7
Final realization of the band-pass/L-match combination. . . . . . . . . . . .
84
5-8
A typical RF Class A power amplifier. . . . . . . . . . . . . . . . . . . . . .
85
5-9
A low-power RF Class C power amplifier.
. . . . . . . . . . . . . . . . . . .
87
5-10 Output voltage of the Class C amplifier. . . . . . . . . . . . . . . . . . . . .
89
5-11 Collector current in the Class C amplifier. . . . . . . . . . . . . . . . . . . .
90
6-1
A circuit using a capacitive divider . . . . . . . . . . . . . . . . . . . . . . .
92
6-2
Equivalent circuit model of the capacitive transformer. . . . . . . . . . . . .
92
6-3
The example tapped capacitor circuit.
93
6-4
A typical grounded-base transistor oscillator. This particular circuit is known
am plifier.
. . . . . . . . . . . . . . . . . . . . .
as a Colpitts oscillator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13
94
6-5
Hartley oscillator found in the Graymark 536 AM radio kit. . . . . . . . . .
95
6-6
A typical three-winding transformer. . . . . . . . . . . . . . . . . . . . . . .
96
6-7
Model of the typical three-winding transformer. . . . . . . . . . . . . . . . .
96
6-8
Small-signal model of the Hartley oscillator. . . . . . . . . . . . . . . . . . .
97
6-9
Simplified small-signal model of the Hartley oscillator. . . . . . . . . . . . .
97
6-10 Block diagram of the Hartley oscillator when operating in the small signal
regim e. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6-11 Root-locus plot for the Hartley oscillator.
98
. . . . . . . . . . . . . . . . . . .
99
6-12 A simplified large signal model of the Hartley oscillator. . . . . . . . . . . .
100
6-13 A simplified small signal model of the Colpitts oscillator . . . . . . . . . . .
102
6-14 A simplified large signal model of the Colpitts oscillator. . . . . . . . . . . .
103
6-15 A common-collector oscillator circuit.
104
. . . . . . . . . . . . . . . . . . . . .
6-16 Negative resistance model of a common-collector oscillator circuit. The negative resistance represents the energy supplied by the transistor which cancels
the loss in the network.
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
104
7-1
IF amplifier formed using a common-collector, common-base cascade. . . . .
108
7-2
Small signal model of the transistor Q2 . . .
110
7-3
The example 4-quadrant multiplier stage.
. . . . . . . . . . . . . . . . . . .
111
8-1
Block diagram of the LM565 PLL. . . . . . . . . . . . . . . . . . . . . . . .
113
8-2
Loop filter used in the FM demodulator. . . . . . . . . . . . . . . . . . . . .
114
8-3
Schematic of the FM demodulator circuit. . . . . . . . . . . . . . . . . . . .
116
8-4
Phase-locked loop model with a divider in the feedback path. . . . . . . . .
116
8-5
Schematic of the 100kHz frequency synthesizer. . . . . . . . . . . . . . . . .
117
14
..
. . . . . . . . . . . . . . ..
List of Tables
2.1
Dimensions of the ferrite core used in the first inductor example.
. . . . . .
21
2.2
Second order parameter values for parallel resonant circuits. . . . . . . . . .
23
2.3
Component values used in the underdamped 50kHz bandpass filter. ....
23
2.4
Components used in the underdamped 450kHz parallel resonant network.
27
2.5
Components used in the overdamped 50kHz parallel resonant network. . . .
28
2.6
Components used in the overdamped 450kHz parallel resonant network. . .
30
2.7
Important series resonant circuit parameters.
. . . . . . . . . . . . . . . . .
31
2.8
Components used in the broadband 50kHz series resonant network. ....
32
2.9
Components used in the broadband 50kHz series resonant network. ....
35
2.10 Design specifications for the common-emitter circuit with Ic = 5mA. .....
38
2.11 Resistors used in the common-emitter circuit with Ic = 5mA. . . . . . . . .
38
2.12 Design specifications for the common-emitter circuit with Ic = 1mA. .....
40
2.13 Resistors used in the common-emitter circuit with Ic = 1mA. . . . . . . . .
40
3.1
Signals used to test the simple DSB modulator/demodulator system. .....
3.2
Components used in the DSB demodulator with a 90' phase shift.
3.3
Components used in the first full-carrier DSB demodulator example. ....
54
3.4
Components used in the second full-carrier DSB demodulator example. .
56
3.5
Specifications for the 450kHz tuned amplifier . . . . . . . . . . . . . . . . .
56
3.6
Components used in the 450kHz tuned amplifier. . . . . . . . . . . . . . . .
57
3.7
Measured -values from the actual 450kHz tuned amplifier. . . . . . . . . . .
58
3.8
Components used in the simple AM transmitter.
. . . . . . . . . . . . . . .
59
4.1
Values of the components used in the Toko RMC-402-503N coil . . . . . . .
65
4.2
Values of the components used in the first IF amplifier.
67
15
. . . . .
. . . . . . . . . . .
49
51
4.3
Values of the components used in the single transistor mixer.
. . . . . . . .
774
5.1
Specifications for the emitter-degenerated common-emitter amplifier. . . . .
78
5.2
Resistors used in the bias network of the emitter-degenerated common-emitter
am plifier.
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.3
Design specifications for the low-pass L-match circuit.
5.4
80
. . . . . . . . . . . .
83
Values of the components used in the Class A example.
. . . . . . . . . . .
86
5.5
Values of the components used in the Class C example.
. . . . . . . . . . .
88
6.1
Parameters used in the capacitive transformer model.
. . . . . . . . . . . .
92
6.2
Values of the components used in the tapped capacitor example.
6.3
. . . . . .
93
Component values used in the Hartley oscillator example.
. . . . . . . . . .
95
6.4
Parameters used in the three-winding transformer model.
. . . . . . . . . .
96
6.5
Values of the three-winding transformer model parameters for the transformer used in the Hartley oscillator example. . . . . . . . . . . . . . . . . .
6.6
97
Comparison between the predicted amplitudes and the actual amplitudes in
the Hartley oscillator example.
. . . . . . . . . . . . . . . . . . . . . . . . .
101
6.7
Values of the components used in the example Colpitts oscillator circuit. . .
101
6.8
Comparison between the predicted amplitudes and the actual amplitudes in
the Colpitts oscillator example. . . . . . . . . . . . . . . . . . . . . . . . . .
103
6.9
Component values used in the common-collector oscillator.
105
7.1
Design specifications for the common-collector, common-base cascade IF am-
. . . . . . . . .
plifier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.2
109
Component values used in the common-collector, common-base cascade IF
amplifier.
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
109
8.1
Specifications for the FM demodulator system.
. . . . . . . . . . . . . . . .
115
8.2
Values of the components used in the FM demodulator system. . . . . . . .
115
8.3
Values of the components used in the 100kHz frequency synthesizer. . . . .
117
16
Chapter 1
Introduction
In today's world, the demand for wireless communications systems is at an all time high,
particularly because of the development of cellular telephones. According to [1], the cellular
market is now the world's largest electronics industry, and it is only expected to grow as
wireless manufacturers look to expand their data communications capability to provide the
world with a wireless Internet.
1.1
Motivation
The tremendous growth of the wireless market has sparked an industry-wide need for engineers who are skilled in the area of radio frequency (RF) circuit design. Unfortunately,
however, the undergraduate electrical engineering curriculum at MIT and at many other
schools focuses primarily on low frequency design, which is often devoid of the challenges
faced by RF engineers.
This thesis provides several groups of laboratory exercises that
could be used to form the basis of an introductory course on wireless engineering.
1.2
Outline
The exercises presented in this thesis are intended to provide a blanket overview of communicationsrelated circuits. Thus, this document covers several broad topics, including continuous-time
modulation and demodulation techniques, tuned amplifiers, mixers, power amplifiers, and
oscillators.
Each chapter in this document focuses upon a different area of RF design, and all of
17
the exercises in a particular chapter are intended to teach that one particular subject.
Chapter 2, which presents exercises intended to prepare students for their study of RF
design, discusses the fundamental topics of passive filter networks and transistor amplifiers.
The exercises discussed in Chapter 3 are intended to introduce students to modulation,
information recovery, and tuned amplifier design. It is hoped that a study of the circuits
presented in this chapter will equip students with all of the tools they need to analyze basic
radio receivers and simple, continuous-time modulation schemes.
Following completion
of the exercises described in Chapter 3, students should be ready to construct a simple
communications system. That system, which in this case is a superheterodyne AM radio
receiver, is the topic of Chapter 4. Chapter 5 is concerned with the design of power amplifiers
(PAs) for use in transmitters. Additionally, Chapter 5 also addresses the topics of power
gain and temperature-independent biasing, two issues of fundamental importance to the
RF designer. Chapter 6 presents several exercises intended to teach students the utility
of feedback. In particular, this chapter focuses on the use of feedback in the design and
implementation of single transistor oscillator circuits. Chapter 7 considers higher quality
implementations of the IF amplifiers and mixers studied in Chapter 4. Chapter 8 culminates
the discussion of feedback interlaced throughout this thesis by introducing two RF systems
implemented with phase-locked loops (PLLs). The ninth and final chapter of this document
briefly discusses how to integrate all of the exercises mentioned herein into one coherent
and practical course.
18
Chapter 2
Laboratory One: Passive
Components and Amplifiers
The most basic requirement of any communications system is the ability to separate the
signals of interest from all other signals. Designing circuits to fulfill this specification requires a thorough understanding of both passive frequency selective networks and transistor
amplifiers. Because it is expected that many students will have little experience with either
of these topics, the first set of laboratory exercises should introduces the fundamentals of
both.
2.1
An Introduction to the Inductor
Most common IC processes do not include inductors, so many undergraduate courses focus their attention upon circuits with only resistors and capacitors. Consequently, many
undergraduates do not have a solid understanding of the inductor. Inductive elements are
ubiquitous in communications systems, so in order to be adequately prepared to study RF
circuit design, students must become familiar with them.
2.1.1
A First-Order Model of the Inductor
The first order model of a real inductor has an ideal inductance, L, in series with a parasitic
resistance, r.
In any practical design, both quantities must be known.
Unfortunately,
however, they can be difficult to predict because they can vary significantly with frequency,
core material, inductor geometry, and many other factors ([6]).
19
A simple process for determining the inductance of a coil is presented in [6]. Unfortunately, that process is only reliable if the magnetic field created by the inductor is uniform
around a closed path with a fixed cross-sectional area. For many practical inductors, that
criterion does not hold. In those cases, finite element analysis must be employed in order
to make an accurate prediction of the coil's inductance ([6]).
Determining the resistance of an inductive component requires understanding all of its
possible sources of power loss. Reference [6] indicates several loss sources in an inductor,
but the only one that will be considered here is the series loss of the wire. As long as the
wire's skin depth is larger than its radius, then the series resistance due to this conductor
loss can be calculated from the formula,
rs =
1wire
u-Awire
(2.1)
where 1 wire is the length of the wire and Awire is its cross-sectional area.
2.1.2
Two Practical Inductor Examples
The best way for students to learn about inductors is to have them wind several of their
own. This section describes two practical exercises in which students do just that.
Inductor wound on ferrite torroid
Since coils wound on ferrite torroids have minimal leakage flux, the first example inductor
created for this project was wound on a ferrite torroid (p
=
125po
) (Figure 2-1).
The
dimensions of the core used here are listed in Table 2.1.
Ry
D
Figure 2-1: Geometry of the ferrite torroid used as the core in the first inductor example.
20
Table 2.1: Dimensions of the ferrite core used in the first inductor example.
Dimension
Value (mm)
Width (D)
10.46
Inner Diameter (R 2 )
Outer Diameter (Ri)
22.35
35.81
It is proven in [18] that the inductance of any coil wound on a torroid is
L
pN
2D
27r
ln
R1
R2
.
(2.2)
Thus, since the inductor wound here is comprised of 10 turns of 21 AWG wire, it should
have an inductance of 17.2pH. As expected, the coil's measured inductance at 1kHz, which
is 16.8pH, is very close to its predicted value.
When determining the resistance of the coil in question, measurements had to be taken
at a frequency low enough to guarantee that the radius of the wire was greater than its skin
depth. The frequency chosen was 1kHz. At that frequency, Equation 2.1 predicts that the
resistance should be 0.017Q. In reality, the resistance at 1kHz is 0.019Q.
Inductors wound on a pencil
The second set of example inductors constructed for this project were solenoids comprised of
a number of turns of 21AWG wire wound on a pencil. Unlike in the previous example, these
inductors are essentially of the air-core variety, so they do not have well-defined flux paths.
That fact is important because it implies that the only way to predict air-core inductances
with great accuracy is to use finite element analysis. Since such computational methods
are beyond the expected scope of any undergraduate course on wireless communications,
this section will simply underscore the fact that Ampere's law only provides an accurate
prediction of inductance in the case where the coil's length, l1, is much greater than its
radius, rc.
Assuming that the same amount of flux links each winding of a solenoid, its inductance
should be given by
L =L-poN 2Ac(23
,(2.3)
ic
21
where A, is the area enclosed by a single turn of wire and l is the length of the coil ([18]).
In the case where the solenoid only has a few turns, the amount of flux linking each turn
is quite different, so the approximation becomes quite inaccurate, as we will see. As N
increases, however, the flux will begin to become more uniform in the center of the coil, and
the approximation will become highly accurate.
In the first air core example, 6 turns of 21AWG wire were wound on a pencil. In this
case, then
1
c
=
2
Nrwire = 4.338mm and r, = 3.5mm. 1 Thus, since l is of the same order
of magnitude as r,, the inductance predicted from Equation 2.3 (i.e. 401nH) is much less
than the inductance measured at 1kHz (i.e. lpH).
In the second air core example, 100 turns of 21AWG wire were wound on a pencil. In
this case, then, l
= 72.3mm
>> r, = 3.5mm, so Equation 2.3 produces a much better
approximation. In fact, the predicted inductance value here is 6.69pH and the measured
inductance value is 7pH, so the total error in this case is only about only about 4.4%.
In both of the above air core inductors, the resistance was also measured at 1kHz
and compared to a prediction provided by Equation 2.1. According to that equation, the
resistance of the 6 turn inductor at 1kHz should be 0.01Q, and the resistance of the 100
turn inductor at 1kHz should be 0.092Q.
The measured resistances, which are 0.014Q
and 0.11Q, respectively, are reasonably close to their measured values. The differences are
probably the result of proximity effects.
2.2
Parallel Resonant Circuits
With a basic understanding of the first order inductor model, students should be ready to
investigate several passive filter networks commonly encountered in RF systems. One such
network is the parallel resonant circuit.
Parallel resonant circuits are extremely useful in RF systems because of their ability
to be used as narrowband filters. Communications systems typically require such filters to
separate the small range of frequencies containing the information of interest from signals
at all other frequencies.
Although parallel resonant circuits can be used to perform the functions of a narrowband
filter, they can only do so if their component values are properly chosen. In particular, that
'According to [6], reai,
= 0.3615mm for 21AWG wire.
22
means the components must be chosen such that the circuit is underdamped (i.e. ( < 1,
Q > 1/2) ([3]). Table 2.2 presents a listing of the most useful second-order parameters for
parallel resonant systems.
Table 2.2: Second order parameter values for parallel resonant circuits.
Parameter
Q
Q
Value
wL
RV
1
1
The following sections include several example parallel resonant circuits which use resistors, capacitors, and inductors (Figure 2-2). Since these examples highlight the differences
between the underdamped and overdamped cases, they serve as perfect exercises to use
to teach narrowband filter design to students with a limited knowledge of second order
dynamics.
T
C
L
VOUT
R
Figure 2-2: A parallel resonant circuit.
2.2.1
Underdamped Example 1
The first parallel RLC circuit that was built for this thesis was designed to be an underdamped system with a 50kHz resonant frequency and a
Q
of 20. The layout of the circuit
is shown in Figure 2-3, and the values of all of its components are listed in Table 2.3.
Table 2.3: Component values used in the underdamped 50kHz bandpass filter.
Component
Value
L
1.012mH
Rsource
Rind
C
1OOkQ
16Q
lOnF
23
Rsource
L
'\V VS
C
Vout
Rind
Figure 2-3: A 50kHz parallel resonant circuit.
It is important to note that the circuit shown in Figure 2-3 has neither an explicit
parallel resistance, nor an input current source. It can be shown, however, that over the
very narrow range of frequencies around resonance, this circuit is a very close approximation
to the purely parallel resonant circuit shown in Figure 2-2 ([3]).
Modeling the circuit of Figure 2-3 with a purely parallel resonant circuit requires two
simplifications. First, the input circuit comprised of V, and Rsource can be replaced with its
Norton equivalent so that the circuit has a current source drive. Second, around resonance,
the series resistance of the inductor, Rind, can be replaced with an equivalent parallel
resistance, which is given by
RL = Rind(Q2 + 1) ~ RindQ2.
(2.4)
This fact, which is true for all lossy, reactive components, is discussed at great length in
[3, 7].
After making the above simplifications, it is possible to derive a transfer function for
the circuit shown in Figure 2-32. Around resonance, that transfer function is
SVou;(jw)
Zw)
=
J(jW)
_
=
wL
1 - W2LC +3xW
(2.5)
Thus, at w = wo, the circuit appears to be purely resistive. In this particular circuit, the
resistance at resonance is given by the parallel combination of Rsource and
Q2Rind. The
value of that equivalent resistance is 5.73kQ.
2
The transfer function about to be derived is from the input current, I(3w), to the output voltage,
Vt (jw). All of the analysis presented for the parallel resonant circuits in this chapter is done with respect
to this transfer function.
24
According to the preceding analysis, if this circuit is driven with a
lOVpeak-to-peak
volt-
age source (i.e. a 100pApeak-to-peak current source), the expected value of Vo
0 t at resonance
is 5 7 3 mVpeak-to-peak. According to measurements, Vott is actually
56 8
mVpeak-to-peak and
the resonant frequency is 49kHz
As mentioned at the outset, the circuit described in this section is meant to be underdamped. It is, in fact, since its
Q
is 19.5 and its ( is 0.026. Figure 2-4 shows the pole-zero
plot for the circuit, which clearly indicates that it is highly underdamped.
Since this circuit is a narrowband filter, the bandwidth between its half-power frequencies should be sufficiently narrow. The magnitude of the circuit's frequency response shows
that this is indeed the case (Figure 2-5). Experimentally, measurements indicate that the
actual half-power frequencies are located at 47.65kHz and 50.45kHz. The resulting band-
width is 2.8kHz.
Before moving on, it is important to note that two useful bandwidth formulas exist for
high-Q circuits such as this one. The first of those, which is shown in [7, 5], is that the
half-power frequencies of parallel resonant circuits are located at 2R1C above and below w,.
The other formula, which relates the circuit's bandwidth and resonant frequency to its
Q,
is
Bandwidth =
O.
(2.6)
Q*
For this circuit, the bandwidth estimate provided by the
R
relation is 2.59kHz, while
the bandwidth estimate provided by Equation 2.6 is 2.54kHz.
2.2.2
Underdamped Example 2
Another underdamped filter example was constructed at 450kHz using the 6.5pH inductor
wound in Section 2.1.
Again, the circuit is driven by a 100pApeak-to-peak current source
provided via Norton's theorem by V, and Rsource. As in the previous example, this circuit
does not have an explicit parallel resistance (Figure 2-6).
Unlike the previous example, this circuit does not simply rely on the inductor and
input source for its parallel resistance. In fact, it also relies on the series resistance of the
capacitors.
Like the series resistance of an inductor, however, the series resistance of a
capacitor can be transformed to an equivalent parallel resistance. Just as for inductors,
25
x 105
.-
3
2
0
E
-1
-2
x-
-3
-4'
-4
'
-3
'
-2
'
'
0
Real Axis
-1
I
1
'
2
I
3
4
x 104
Figure 2-4: Pole-zero mapping for the narrowband 50kHz parallel resonant network.
tiUUUI
I
I
I
5000}
'0 4000
-C
0
C
R 3000
C
-0
(D
E 2000 }
10001
0
20000
40000 50000 60000
Frequency (Hz)
100000
Figure 2-5: Frequency response magnitude of the narrowband 50kHz parallel resonant network.
26
Rsource
C
L
C2
VS
Vout
Rc,
R C2
Rind
Figure 2-6: Narrowband 450kHz parallel resonant network.
Table 2.4: Components used in the underdamped 450kHz parallel resonant network.
Component
Value
L
Rind
C1
C2
6.57pH
0.557Q
9.41nF
0.2428P
9.61nF
Rc2
Rsource
0.2458Q
1OOkQ
RC1
that parallel resistance can be calculated from Equation 2.4 using measurements of the
capacitor's series resistance and its
Q.
At low frequencies, this parallel resistance is quite
large, so it can be ignored, as it was in the previous circuit. Here, however, it is on the
same order of magnitude as the parallel resistance of the inductor, so it must be included
in the analysis. A complete listing of the values of all of the components used in this circuit
is provided in Table 2.4.
Following the necessary simplifications, it can be shown that around resonance, the
network in Figure 2-6 has a transfer function given by Equation 2.5.
Therefore, just as
in the previous example, the circuit should be purely resistive at resonance. Including the
parallel resistances of both the inductor and the capacitor, the circuit has a a total parallel
resistance of 506Q at resonance. Thus, the output voltage at that frequency should be
50. 6 mVpeak-to-peak. Its measured value is 51mVpeak-to-peak-
Like the previous circuit, this one is narrowband, as its
Q
is 27.2. Using the measured
resonant frequency (448kHz), Equation 2.6 predicts that the bandwidth is 16.5kHz. Measurements show that this is an excellent approximation to the actual bandwidth, which was
27
determined to be 17kHz
2.2.3
.
Overdamped Example 1
An overdamped parallel RLC circuit was built at 50kHz using the same inductor and capacitor used in the first underdamped example. This circuit is driven by a
76 9
PApeak-to-peak
current source provided via Norton's theorem by V, and Rsource (Figure 2-7). All of the
component values used in this filter are listed in Table 2.5.
Rsource
VS
C
L
RL
Figure 2-7: Overdamped 50kHz parallel resonant circuit.
Table 2.5: Components used in the overdamped 50kHz parallel resonant network.
Component
Value
L
C
1.012mH
1OnF
RL
Rsource
1200
13kQ
Unlike the two previous examples, this circuit has an explicit parallel resistance, RL,
which was chosen so that the circuit is overdamped (i.e.
120Q load resistor, the circuit has
Q
= 0.385 and (
=
Q
< 0.5 and ( > 1). With the
1.3. Figure 2-8 indicates the locations
of poles and zeros of this overdamped system.
Previously, it was mentioned that overdamped systems are broadband. That fact was
experimentally verified here, as the measured values of the half power-frequencies are 16kHz
and 134kHz, respectively.
The magnitude of the frequency response of this broadband
network is shown in Figure 2-9.
Before moving on, it is important to note that overdamped systems such as this one
have widely spaced poles. Because of that fact, approximate relations can be derived to
3
The measured half-power frequencies are 441kHz and 458kHz.
28
1
0.8-
0.6 0.4
-
0.2
-
to
0 -.
E
-0.2
-0.4
-0.6
-0.8
-1
-7
-5
-6
-4
-3
Real Axis
-1
-2
0
x 1
Figure 2-8: Pole-zero mapping for the overdamped 50kHz parallel resonant circuit.
100
80
60
E1
40
20
s
S
10,
10
S
10!
10
Frequency (Hz)
Figure 2-9: Magnitude of the frequency response of the overdamped 50kHz parallel resonant
circuit.
29
Table 2.6: Components used in the overdamped 450kHz parallel resonant network.
Component
Value
L
C1
C2
RL
6.57pH
9.41nF
9.61nF
1.1Q
-source
160Q
determine the locations of those poles. According to [3], those relations are the following:
R
Pi
=
7K
(2.7)
and
P2
C.
=
(2.8)
For this particular circuit, Equation 2.7 indicates that the first pole should be located at
18.8kHz, while Equation 2.8 indicates that the second pole should be located at 132.6kHz.
Measurements demonstrate that both of these equations produce reasonable estimates for
the locations of the actual system poles (i.e. 16kHz and 134kHz).
2.2.4
Overdamped Example 2
An overdamped parallel RLC circuit was built at 450kHz using the same inductor and capacitor used in the second underdamped example. This circuit is driven by a 6 2 mApeak-to-peak
current source provided via Norton's theorem by V, and Rsource (Figure 2-10). Using the
component values listed in Table 2.6, the circuit has
Q
= 0.059 and ( = 8.34.
Rsource
V
C1
C2
L
RL
Figure 2-10: Overdamped 450kHz parallel resonant circuit.
30
Vout
Just as in the case of the overdamped 50kHz parallel RLC circuit, this network is also
a broadband filter with widely spaced poles.
The circuit's low frequency pole, which is
predicted by Equation 2.7 to be located at 26.6kHz, is actually located at 28kHz. Unlike
its low frequency counterpart, however, the high frequency pole in this circuit is difficult
to find. Equation 2.8 predicts that it should be found at 7.6MHz, but, due to the selfresonance of C 1 and C 2 , the output voltage actually begins to rise again around 7MHz.
As a result, a more complicated circuit model is required to study this circuit accurately at
high frequencies.
2.3
Series Resonant Circuits
Another narrowband filter that is commonly found in communications systems is the series
resonant circuit (Figure 2-11). Just as in the parallel resonant case, series resonant circuits
are only narrowband if they are underdamped ([17]).
Table 2.7 lists all of the important
second-order parameters of series resonant networks.
L
C
'\V VS
RL
Vout
Figure 2-11: Series resonant circuit.
Table 2.7: Important series resonant circuit parameters.
Parameter
Value
2
yL
Just as in the case of parallel resonant systems, students should understand the differences between underdamped and overdamped series resonant networks. Two examples
follow which highlight those differences.
31
2.3.1
Underdamped Case
The first series RLC circuit that was built for this thesis was designed to be an underdamped
system with a 50kHz resonant frequency and a
Q
of 5 (Figure 2-12). The circuit is driven
by a 2 0peak-to-peak voltage source. All of the component values are listed in Table 2.8.
Rsource
L
gRind
+
C
_Vcap
Rcap
RL
RL
Vout
Figure 2-12: Narrowband 50kHz series resonant circuit.
Table 2.8: Components used in the broadband 50kHz series resonant network.
Component
L
Value
1.012mH
C
1OnF
Rsource
50Q
Rind
16Q
Rcap
1_
RL
1.1Q
The transfer function of the circuit shown in Figure 2-12 is
V7out(s)
__
s_________
L
_(S)-
Vin(s)
s2
s Rtl+
'
(2.9)
where RTotal = Rsource + Rind + Rcap + RL. Thus, just as in the parallel resonant case, the
circuit appears to be purely resistive at resonance. At the resonant frequency, the network
has an attenuation factor given by
32
Using a 50kHz,
2
Vout(jw)
RLoad
Vin (3w)
RTotal
(2.10)
0Vpeak-to-peak input sinusoid, the attenuation factor was determined to
be 0.015, which is extremely close to the value of 0.0161 predicted by Equation 2.10.
As mentioned previously, the circuit described in this section is meant to be underdamped. It is, in fact, since its
Q
is 4.67 and its ( is 0.107. The pole-zero plot for the
circuit is shown in Figure 2-13.
Since this circuit is a narrowband filter, the bandwidth between its half power frequencies should be sufficiently narrow.
Figure 2-14 shows that this is indeed the case.
Measurements indicate that the actual half-power frequencies are located at 45.5kHz and
57.5kHz, resulting in a 12kHz bandwidth.
Just as in parallel resonant systems, relationships exist which predict the bandwidth of
the series resonant circuit. It is shown in [7, 17] that the bandwidth of such networks can
be calculated using the formula
Bandwidth = W.
(2.11)
Q
That relation is experimentally verified here, as it predicts that the bandwidth of this circuit
is 10.7kHz.
Reference [17] shows that a key feature of series resonant circuits is that, at resonance,
the magnitude of the voltage across the capacitor, Vcap, is
|Vcap(jwo)| =
V7jn(jw 0 )
= QVin.
V j
WORT otaiC
(2.12)
In this circuit, the measured voltage across the capacitor at 50kHz is 9 0Vpeakto-peak. As
predicted by Equation 2.12, that value is roughly
Q
times greater than Vin.
Because the magnitudes of the reactances of both the capacitor and the inductor are
equal at resonance, the voltage across the inductor should also be
QVin at w = wO. The
measured maximum inductor voltage in this circuit is only about 87.2Vpeak-to-peak, however,
as its 16Q series resistance causes a significant reduction of the voltage across it.
33
A.
x 10,
3 -
-
2
00
E
-K-1
-2
-3
-3.5
-3
-2.5
-2
-1.5
Real Axis
-1
-0.5
0
x 10,
Figure 2-13: Pole-zero mapping for the broadband 50kHz series resonant network.
nnin
..
0.016
0.014
E0.012
0>
0.01
a 0.008
E 0.006
0.004
0.002
105
104
Frequency (Hz)
Figure 2-14: Magnitude of the frequency response of the narrowband 50kHz series resonant
network.
34
2.3.2
Overdamped Case
The second series RLC circuit that was built for this thesis was designed to be an overdamped system with a 50kHz resonant frequency and a
component values listed in Table 2.9, the circuit has
Rsource
Q
Q
< 0.5 (Figure 2-15). Using the
= 0.354 and (
=
1.41.
L
Rindl
C
'VVin
Rcap
RL
+ Vout
Figure 2-15: Broadband 50kHz series resonant network.
Table 2.9: Components used in the broadband 50kHz series resonant network.
Component
Value
L
C
1.012mH
1OnF
Rsource
50Q
Rind
16Q
Rcap
1Q
RL
820Q
Since this circuit is overdamped, its frequency response is overdamped, its frequency response is broadband (Figure 2-16). This fact was experimentally verified using a 10Vpeak-topeak
input drive at a frequency of 50kHz. With that input, the filter was found to have its halfpower frequencies located at 15.8kHz and 147kHz.
Just as in the case of overdamped parallel resonant networks, formulas exist which
predict the approximate locations of the the 2 poles of the overdamped series resonant
35
network. According to [3], the low frequency pole, which is dominated by the capacitance,
can be approximated using the relation
,
Pi =
RC'
(2.13)
while the high frequency pole, which is dominated by the inductance, can be approximated
using the relation
R
P2
L.
(2.14)
Equations 2.13 and 2.14 are experimentally verified here, as they predict that the two halfpower frequencies should be located at 17.9kHz and 140kHz, respectively (Figure 2-17).
2.4
Low Frequency Transistor Amplifiers
Because the wireless communications course is intended for undergraduates, it is expected
that the average student will be unfamiliar with the intricacies of transistor amplifier design.
Transistor amplifiers will be an important element of the wireless communications course,
however, so one of the first tasks accomplished must be to familiarize students with them.
Since simple low-frequency amplifiers such as the common-emitter circuit have slightly
simpler topologies than the RF amplifiers discussed later in this thesis, it seems reasonable
to expect that low-frequency amplifiers will serve as a better introductory tool.
2.4.1
A Common-Emitter Example
One amplifier topology with which all students should become familiar is the commonemitter circuit. Because of its straightforward design and its similarity to several of the RF
amplifiers discussed later in this thesis, it is an excellent tool to use to teach students the
basic elements of amplifier design. A wealth of information on this extremely useful circuit
is available in [5, 4, 13].
The example common-emitter circuit discussed in this section is shown in Figure 2-18.
The circuit's simple biasing scheme was chosen to demonstrate the degree to which an
unstable bias point can cause the actual performance of an amplifier to deviate from its
designed performance.
Two examples follow which use this circuit to meet two different
36
1
0.9
0.8
0.7
0.6
g0.5
0.4
0.3
0.2
0.1
I
10c
I
102
10
I
10
I
10
10
Frequency (Hz)
Figure 2-16: Magnitude of the frequency response of the broadband 50kHz series resonant
network.
1
1
0.80.60.40.2o
0-
- -x -- -
- -
- - - - - - - - - - - -
- -
-
-
-0.2-0.4-0.6-0.8-1
-8
-7
-6
-5
-4
Real Axis
-3
-2
0
-1
x 10
Figure 2-17: Pole-zero mapping of the broadband 50kHz series resonant network.
37
sets of specifications.
VCC
VCC
L
B
Rs
'
OVOUT
vs
Cs
Figure 2-18: Basic common-emitter topology.
Common-emiiter design with Ic = 5mA
The first common-emitter circuit built for this thesis was designed to meet all of the specifications listed in Table 2.10. The circuit was constructed using a 2N3904 NPN transistor
and the resistor values indicated in Table 2.11.
Table 2.10: Design specifications for the common-emitter circuit with Ic = 5mA.
Specification
Value
Av at 1kHz
> 100
Voltage Swing at 1kHz
> 12 Vpeak-to-peak
Ic
~15mA
___
V________15V
Table 2.11: Resistors used in the common-emitter circuit with Ic = 5mA.
Value
470kQ
1.091kQ
1.5kg
Resistor
RB
Rs
RL
38
The first consideration in the design of this amplifier was biasing. In order to design
the circuit's bias network, three values had to be determiaed, namely 3,
According to [14], at Ic = 5mA, the value of
VBE,ON
VBE,ON,
and RB.
3 is approximately 170A/A and the value of
is approximately 700mV. Knowing those values, RB was chosen using the equation
IC
VCC - -- RB
(2.15)
= VBE,ON.
With the transistor properly biased, the next step in the design process was to set
the voltage gain. According to the simplified small signal model of the circuit shown in
Figure 2-19, the voltage gain is
Av =--
R
.
Rs + r,
(2.16)
Thus, with Ic = 5mA and 8 = 170A/A, RL must be greater than 1.163kQ for the circuit
to be able to achieve a voltage gain greater than the 100V/V specification.
Rs
9mV7C
+
'V Vs
V,
RL
n
Vout
Figure 2-19: Small signal model of the basic common-emitter circuit.
The voltage swing specification also places constraints on the value of RL. In order for
the output voltage to be able to vary more than 1 2 Vpeak-to-peak, RL must be increased
beyond the minimum value required to achieve the desired gain. With RL set to 1.5kQ, the
circuit should be able to meet safely both specifications (i.e. Av = 129V/V and voltage
swing > 12VPeak-to-peak).
In the actual implementation of the circuit, the measured value of the DC collector
current is 4.59mA, but with RB = 470kQ as chosen here, the actual current should be
5.17mA. This discrepancy indicates that the values for 6 and
are only rough estimates.
measured
VBE,ON
value
VBE,ON
obtained from [14]
More importantly, since the measured current value and the
(~ 700mV) indicate that the actual value of 1 is approximately
39
183A/A, it is clear that only slight / variations can produce large changes in the circuit's
overall performance.
With a
23
mVpeak-to-peak input drive at 1kHz, the measured output voltage obtained
from the circuit is
2 6
. Vpeak-to-peak. Thus, the actual gain is 113V/V, indicating that the
prediction of 129V/V is fairly reasonable.
With IC = 4.59mA, the output voltage should be able to vary from
7cc
to approxi-
mately 400mV. In fact, that is approximately the range through which the circuit's output
voltage was found to vary.
Common-emiiter design with Ic = lmA
Using the layout shown in Figure 2-18, a second common-emitter circuit was constructed
to have Ic = lmA. The specifications for that amplifier are listed in Table 2.12, and the
resistor values used are listed in Table 2.13.
Table 2.12: Design specifications for the common-emitter circuit with Ic = lmA.
Specification
Value
Av at 1kHz
Voltage Swing at 1kHz
> 35
>
2
~
IC
__
__
__
_
peak-to.peak
__
__
1mA
_15V
Table 2.13: Resistors used in the common-emitter circuit with Ic = 1mA.
Resistor
Value
RB
1.5MQ
1kQ
1.5kQ
Rs
RL
Once again, it is wise to approach this circuit by first examining the bias conditions.
Just as in the previous example, Equation 2.15 provides a means for choosing the value
of the bias resistor, RB. According to [14], the value of
11OA/A. Thus, given the specifications,
RB
3 at Ic = 1mA is approximately
should be 1.5MQ.
In the AC regime, the model for this circuit is identical to the one discussed in the
previous section. Thus, if the load resistance is kept equal to 1.5kQ, the voltage gain should
40
be 42V/V and the output voltage should be able to reach approximately
3
Vpeak-to-peak-
Just as in the previous example, the highly sensitive biasing technique used here causes
the values of the actual amplifier parameters to vary from their design values. For example,
according to measurements, the actual collector current is 1.2mA. Additionally, the voltage
gain as measured with a 5 mVpeak-to-peak input voltage at 1kHz is 51.2V/V
4
4
.
1f the actual bias current is taken into account, Equation 2.16 predicts that the gain of the amplifier
should be approximately 48.5V/V.
41
42
Chapter 3
Laboratory 2: Amplitude
Modulation
In the majority of communications systems, the information of interest is located in the
audio frequency range. Unfortunately, however, the Earth's atmosphere rapidly attenuates
signals in that range ([11]).
The atmosphere will propagate high frequency signals over
long ranges, however, so communications systems typically transmit information by a modulation process that uses the information signal to vary some aspect of a high frequency
carrier waveform.
This chapter explores several exercises intended to introduce one such
modulation technique, namely amplitude modulation (AM).
3.1
Exploring AM
Amplitude modulation, which is used in many applications, including commercial radio
broadcasting systems, cellular telephones, and satellite communications systems, exists in
several varieties. The two types of AM that will be investigated here are double-sideband
(DSB) AM and full-carrier double-sideband AM.
3.1.1
Double-Sideband AM
A DSB waveform uses an information signal, known as the modulating signal, to vary the
amplitude of a carrier. When using a carrier signal Ac cos(wet) and a modulating signal
43
Am cos(wmt), DSB AM signals are of the form,
VDSB(t) =
AmAc Cos(wmt) cos(wct)
=
AmAc cos((wc
-
wm)t) + AmAc cos((w +wm)t)-
(3-1)
AM waves of this type are known as DSB signals because their frequency spectrum contains
information at both W, - wm and at w, + wm (Figure 3-1).
XP)
-Wc
~ Wm
-Wc + Wn
Wc-wm
Wc+Wm
Figure 3-1: Frequency spectrum of a DSB AM signal.
An excellent means for teaching students about DSB AM is to have them create their
own waveforms using two signal generators and a suitable multiplier (Figure 3-2). A simple
modulator was created for this thesis using two HP33120A signal generators and an AD633
four-quadrant multiplier. With Vm = cos(27r103t) and V = 5 cos(27r10 5 t), the output of the
system is as shown in Figure 3-3. The output amplitude is 0.5V because the AD633 divides
its output by a factor of 10.
AD633
X.
VDSB(t)
vc(t)
--
'V
M(t)
Figure 3-2: Block diagram of the simple DSB AM modulator. The two inputs come from
two different HP33120A signal generators.
3.1.2
Full-Carrier Double-Sideband AM
Full-carrier double-sideband amplitude modulation is the typical form of AM used in commercial broadcasting ([11]). This form of AM uses a DSB waveform with an unmodulated
44
0.5
. I I,
I
0.4
0.3
0.2
I
0.1
0
0
0D
CO
0
-0.1
-0.2
I
-0.3
-0.4
1
I
I
0
0.2
0.4
0.6
0.8
Time (Seconds)
1
x 10-
Figure 3-3: Output of the simple DSB AM modulator.
copy of the carrier added to it. Thus, full-carrier DSB AM signals take the form
v(t)
=
Ac(1+m cos(wmt)) cos(wet) = A, cos(wct)+Acm cos((wc-wm)t)+Acm cos((wc+wm)t),
(3.2)
where m is a quantity known as the modulation index ([17]). For reasons that are discussed
in [17, 11, 16], m is typically constrained to be in the range 0 < m < 1. The frequency
spectrum of a full-carrier DSB waveform is shown in Figure 3-4.
Students can create their own full-carrier DSB signals using the summing block provided
by the the AD633 multiplier (Figure 3-5). In this system, students can study how to change
the percent modulation by varying the amplitude of the modulating signal. The output of
this system with VM(t) = cos(27r(2 x 10 3 )t) and vc(t) = cos(27r10 5 t) is shown in Figure 3-6.
45
X(W)
f. 4f
_WC -
WM
-WC
-W'
- fl
Wc -Wm
+ Wm
Wc
WC+ Wm
Figure 3-4: Frequency spectrum of a DSB AM signal.
AD633
OFCDSB(t)
vC(t)
V
V(t)
Figure 3-5: Block diagram of the simple full-carrier DSB AM modulator. The two inputs
come from two different HP33120A signal generators.
3.1.3
Comparison of DSB AM and Full-Carrier DSB AM
At first glance, it is not clear why there would be a need to add the carrier to a DSB signal
to create a full-carrier DSB signal. Of course, there exist situations in which the use of DSB
AM is impractical because of its complicated and relatively expensive receiver architecture
(See Section 3.2.1).
Such is the case in commercial radio, where full-carrier DSB AM is
used in order to allow for the mass production of inexpensive receivers ([11]).
Although full-carrier DSB AM systems are often practical because of their simpler and
cheaper receiver requirements, they can also be impractical in many situations because they
waste a tremendous amount of power. According to [16], the time-averaged power contained
in a full-carrier DSB AM wave is
P
1 T
PowerFCDSB = I fo VFCDSB~J
4A2dt
2+
A m2
4
((3-3)
3.3
The first term in the above equation, which represents the time-averaged power carried by
46
0.8
0.6
0.4
0.2
0
0.
(D
Co
0
-0.2
-0.4
-0.6
-0.8
0.2
0
0.4
1
1
0.6
0.8
Time (Seconds)
1
X 10-3
Figure 3-6: Output of the simple full-carrier DSB AM modulator.
the unmodulated carrier, contains at least 2/3 of the signal's total power. That power is
essentially wasted, and such waste cannot be tolerated in any application where power is a
major concern.
3.2
Demodulation of AM Waves
As mentioned in Section 3.1, the processes used to recover information from the two different types of amplitude modulated waves are very different. The following two examples
highlight those differences.
Both of the demodulation strategies implemented below are
fully described in [17, 7]
47
3.2.1
Demodulation of DSB AM Signals
At first glance, the demodulation process required for DSB AM seems relatively straightforward. In fact, if the receiver can produce a copy of the carrier, all that is required to
demodulate is to multiply the received signal by the replica of the carrier and to low-pass
filter the result (Figure 3-7). Of course, for that scheme to work, the receiver's copy of the
carrier must have the same frequency and phase as the original. Copying the frequency
of any waveform is not difficult, but copying its phase is. Perfect phase synchronization is
important, however, because a phase offset can cause the demodulated signal to be significantly attenuated. If the replicated carrier is offset from the actual carrier by some arbitrary
angle 0, the output of the DSB demodulator is
vo(t) =
AA
2
0
cos(#) cos(wmt) +
Ar Ao
2
cos(2wet +
),
(3.4)
where A, is the amplitude of the received DSB wave and A,, is the amplitude of the duplicate
carrier ([11]).
As
#
varies from zero, the amplitude of the demodulated signal is reduced.
If # becomes 900, the demodulated signal completely vanishes.
Low-Pass
Filter
VM(t)
vc(t)
Figure 3-7: Block diagram of the DSB demodulation process. VDSB is the received signal,
vc is the local oscillator signal, and vM is the recovered copy of the modulating signal.
The following example illustrates the importance of phase synchronization in DSB demodulators. Although the example does not use a demodulator which forces phase lock, a
complete DSB receiver would. Phase lock is not mentioned here because it is too complicated to introduce to students in their second laboratory exercise.
DSB recovery with
#
=
0'
A simple DSB demodulator with no phase offset issues is shown in Figure 3-8. The received
DSB signal,
VDSB(t),
is the output of the modulator constructed in Section 3.1.1, and the
replicated carrier signal, which is known as the local oscillator wave, is provided by the
48
same generator that provides the carrier to the modulator. In this way, the local oscillator
signal is definitely phase-locked to the carrier of the transmitted wave. All of the signals in
this system are listed in Table 3.1.
AD633
AD633
VDSB
VM (t)
\
1.1 kQ
(t)
V
VLO(t)
68nF 1
[vo(t)
-77(t)
v
Figure 3-8: Block diagram of the DSB modulator/demodulator system. The two inputs
come from two different HP33120A signal generators.
Table 3.1: Signals used to test the simple DSB modulator/demodulator system.
Signal Name
VM(t)
Signal Used
5 cos(27r1OOt)
VC (M
VLO (t)
VDSB(t)
vO(t)
1. 5 cos (27r 105 t)
1.5 cos(27r105t)
.75 cos(27rlOOt) cos(27r10 5 t)
.055 cos(27rlOOt)
The output of this simple demodulator is shown in Figure 3-9.
If the factor of 10
attenuation added by the AD633 is included in Equation 3.4, then that equation correctly
predicts the system's output amplitude, which is approximately 55mV.
DSB recovery with < approaching 90'
Figure 3-10 shows a demodulator system using the same basic structure as the one analyzed
in the previous section. In this case, however, an integrator has been added to shift the phase
of the carrier by nearly 90' before using it as the local oscillator input to the demodulator.
In this way, this system demonstrates the possible effects of a demodulator whose local
oscillator signal is not synchronized with the carrier. The values of all of the components
used in this circuit are listed in Table 3.2.
49
0.15
0.
I
I
I
I
I
I
I
0.014
0.016
I
0.1
0.051
0
0
0
-0.05-
-0.1
-0.15-
-0.2-
0
0.012
0.01
0.008
Time (Seconds)
0.006
0.004
0.002
Figure 3-9: Output of the DSB AM demodulator with
R,
R2
RF
+A
0.018
#
0.02
= 00.
C
----
VIN
AD633
R3
LF411
R4
VLO
R5
2
VOUT
AD633
VC
TVM
/\
Figure 3-10: A simple DSB AM demodulator system with an integrator included to introduce a 900 phase shift between the carrier signal and the local oscillator signal.
50
Table 3.2: Components used in the DSB demodulator with a 900 phase shift.
Component
Value
50Q
50Q
R1
R2
R3
8.2kQ
R4
1.1kQ
R5
.L1kQ
1OnF
68nF
C1
C2
CF
3.3nF
The feedback model of the integrator is shown in Figure 3-11. Use of a block diagram
is necessary here because the gain of the LF411 op-amp is too low at 100kHz (i.e.A(jw) ~
30dBt - 1350) to be considered infinite ([15]). From Black's formula, the transfer function
of the integrator can be written as
Vou
_
Vin
where and B 1
=
RIN(sCRF+1)
and B 2
-B
2 As
1+ B1As'
= R
F
CRFR
At 100kHz, Equation 3.5
indicates that the actual gain of the circuit is approximately 4.41 and that the actual phase
shift is approximately 830. Compare this to the gain and phase shift predicted assuming
that the op-amp has infinite gain at all frequencies (i.e. 4.8229Z 90.030).
Vi
-A
B1
V0
V
B2
Figure 3-11: Block diagram model of the simple integrator used to add a 900 phase shift to
the carrier signal in the simple DSB system.
In addition to the integrator, there are two other new features which have been included
in this demodulator. The first is the high-pass filter formed by C1, R 3 , and R 4 which is
used to remove the DC offset produced by the integrator. Additionally, the output of the
51
integrator/high pass filter system is fed into the resistive divider formed by R 3 and R 4 .
With
VIN(t)
= 3 cos(27r10 5 t), the voltage across R 4 will have the same amplitude as the
local oscillator signal in the previous example, but it will be phase shifted by nearly 90'.
With
VIN(t)
= 3 cos(27r105t) and VM(t) = 5 cos(27r10 2t), the output of the DSB demod-
ulator with the integrator is shown in Figure 3-121. It is important to note that the phase
shift has significantly reduced the output amplitude. In fact, Equation 3.4 indicates that
the output of this system should be reduced by a factor of cos(83 0 ) from the value of the
output in the previous example. A comparison of the outputs shown in Figures 3-9 and 3-12
shows that this is approximately true.
0.06
I
I
II
1.
0.04
0.02
1.1_11
~111.1
0
)
I
I
II ,I
lI I 1I
Itfl
.1.111
111
1
U
0
0,
ri
.I I-
IllI
1 1
-0.02
I
-0.04 -
-0.OE
0
0.005
0.01
0.015
0.02
0.025
0.03
0.035
0.04
Time (Seconds)
Figure 3-12: Output of the DSB demodulator system with q -+
900.
'Please note that the actual carrier signal applied to the modulator is vc(t) = 2VIN(t) due to the
divider formed by R, and R 2 . Thus, VDSB(t) and VLO(t) in this system have the same amplitudes as the
corresponding signals in the previous example.
52
3.2.2
Demodulation of Full-Carrier DSB Signals
The typical means of demodulation in full-carrier DSB systems is shown in Figure 3-13. The
simplicity of this demodulator is immediately obvious, as it uses only three components.
Its operation is well documented in numerous texts, including [7, 17, 16], so it will not be
discussed here.
For this project, two full-carrier DSB AM demodulators were constructed. The first,
which uses the topology shown in Figure 3-13, was constructed using the components listed
in Table 3.3. This circuit was designed to meet the guidelines given in [17]. The output of
this system when excited by the input 2.5(1 + .5 cos(27r10 3 t)) cos(21r(455 x 10 3 )t) is shown
in Figure 3-14.
The second full carrier DSB demodulator built for this thesis is shown in Figure 3-15.
This circuit, which uses the components listed in Table 3.4, follows the lower envelope of an
AM wave. Such demodulators are useful in radios employing automatic gain control. The
output of this system when excited by the input 2.5(1 +.5 cos(27r10 3 t)) cos(2r(455 x 10 3 )t)
is shown in Figure 3-16.
3.2.3
A Basic Audio Amplifier
In addition to building the AM demodulators introduced in this section, students should
also build a simple audio amplifier so that they can listen to their demodulated signals. The
amplifier used here, which employs the LM386, is shown in Figure 3-17.
3.3
Tuned Amplifiers
In many discrete AM radio designs, common-emitter amplifiers with tuned LRC loads are
used as intermediate frequency (IF) amplifiers (Figure 3-18). In the United States, such amplifiers are designed to have a center frequency of 455kHz and a bandwidth of 10kHz. The
voltage gain magnitude of these amplifiers is much like that of the low-frequency commonemitter discussed in Chapter 2, except that RL is replaced by IZ(Jw)I.
At resonance,
however, the gain reduces to exactly that of the common-emitter. That gain expression is
repeated here for convenience:
IAv(.wo)I
=
53
r, + Rs
.RL
(3.6)
AI
RL
L
+
Figure 3-13: A typical full-carrier DSB demodulator.
Table 3.3: Components used in the first full-carrier DSB demodulator example.
Component
2
I
I
Value
RL
33M0
CL
10nF
I
I
.0
.0
0.005
0.006
I
I
I
.0
.0
.0
0.007
0.008
0.009
I
1.8
1.6
1.4
0 1.2
0
0.0-.0
.0
.0
0.003
0.004
0.8
0.6
0.4
0.2
----
0 0.001
0.002
0.01
Time (Seconds)
Figure 3-14: Output of the full-carrier DSB demodulator.
L
+
Vin
V~T
R
L
L
+
Vout
Figure 3-15: A full-carrier DSB demodulator made to follow the lower envelope of an AM
wave.
54
*m
m...II..
II
-
-
-
-
-
0
-0.2
-0.4
-0.6
-0.81
0
-1
)
0)
0
-1.2
-1.4
-1.6
-1.8
-2
0
0.5
1.5
1
2
Time (Seconds)
I
2.5
3
3.5
4
x 10-3
Figure 3-16: Output of the full-carrier DSB demodulator made to follow the lower envelope
of an AM wave.
22gF
22iiF
+ |820U
+
Vin
-2.2nF7
1Og
/
+
22gF
LM386
Figure 3-17: Audio amplifier used to listen to demodulated signals.
55
Table 3.4: Components used in the second full-carrier DSB demodulator example.
Component
RL
CS
VCC
Value
680Q
22nF
VCC
T
C
RB
R
L
RL
C
SS
+
VOUT
Vs
VS
RE
E
-
Figure 3-18: 450kHz tuned amplifier.
A simple tuned amplifier was constructed for this project using the narrowband 450kHz
parallel resonant circuit from the previous chapter. This amplifier was designed to meet
all of the specifications listed in Table 3.5, and it is comprised of the components listed in
Table 3.6.
Table 3.5: Specifications for the 450kHz tuned amplifier.
Specification
Value
Av at 450kHz
Bandwidth
> 30V/V
< 20kHz
5mA
15V
Ic
Vcc
56
Table 3.6: Components used in the 450kHz tuned amplifier.
Component
Value
RB
390kf2
510Q
1091Q
506Q
6.57pH
19.02nF
0.27pF
0.27pF
RE
RS
RL
L
C
CE
Cs
3.3.1
Design of the 450kHz Tuned Amplifier
The biasing scheme used in this amplifier, though less susceptible to 3 variations than that
used in the common-emitter circuit in Chapter 2, is still not as reliable as the method to
be discussed in Chapter 5. In the current scheme, an emitter resistor, RE, is used so that
Ic is set from the relation
Vcc
-
IC
RB-- - VBE,ON
)3
=
(3.7)
ICRE-
Using Equation 3.7, RB and RE were chosen so that Ic would be approximately 5mA. At
that level of DC current, [14] indicates that the 2N3904 transistor has
VBE,ON
~
#F
~ 170A/A and
700mV.
As previously mentioned, the tuned load in this amplifier is the same as that used in
the 450kHz underdamped filter example in Chapter 2. Since the total parallel resistance of
that circuit at resonance was found to be about 506Q, Equation 3.6 indicates that the gain
of the circuit should be approximately 41V/V. Because this gain exceeds the specifications,
there is no need to include any explicit parallel resistance.
The other major design specification for this circuit is its bandwidth. In Chapter 2, it
was indicated that the tuned load used here has a bandwidth of 17kHz, and there is no
particular reason why that value should change once the circuit is used as the tuned load
in this amplifier.
It is worth noting that the actual capacitance of the resonant load includes the output
capacitance of the transistor. That value, which is
57
Cot = C
1+
\
gM 1),
9r + 7;F,
appears in parallel with C ([5]). In this circuit, Cout
(3.8)
< C, so it can be ignored. This fact
is noted here, however, because C 0 st becomes quite significant in many tuned amplifiers 2
3.3.2
Measured Values from the Actual 450kHz Tuned Amplifier
The measured parameter values from the actual tuned amplifier circuit are listed in Table 3.7. All of these values were recorded using an input with an amplitude of 2.3mV and
a frequency of 449kHz. Each value is as close to its prediction as can be expected.
Table 3.7: Measured values from the actual 450kHz tuned amplifier.
3.4
Specification
Value
AV at 450kHz
Bandwidth
> 38V/V
< 17kHz
IC
4.5mA
Vcc
15V
A Simple AM Transmitter
After having studied amplitude modulation in such great detail, it is likely that students
will want to use it for a practical purpose. For that reason, this section introduces a very
simple AM transmitter.
The transmitter circuit described here is a series resonant circuit driven by an HP33120A
signal generator configured to deliver a 10Veak-to-peak amplitude modulated signal with a
carrier frequency of 700kHz. (Figure 3-19). This transmitter is particularly useful because
the series RLC circuit provides voltage gain at resonance.
Using the components listed in Table 3.8, this transmitter circuit is resonant at approximately 701kHz and its overall Q is approximately 7.07. Due to the voltage-amplifying
qualities of series resonant networks 3 , the voltage developed across either of the reactive
2
3
See Section 4.3.
See Section 2.3.
58
Rsource
Vin
L
A\V
Rind
C
VOWi
Figure 3-19: Schematic of the simple transmitter circuit.
Table 3.8: Components used in the simple AM transmitter.
Component
Value
L
C
89pH
480pF
50
Rsource
Ri_
elements at resonance is approximately
7
5.4Q
0. 7 Vpeakto-peak. It is important to note that the
measured inductor voltage is slightly lower, however, because of its 5.4Q series resistance.
Since the resonant frequency of this system is in the AM band, it is possible to detect the
system's output signal on any AM radio in the same room. For this reason, it is expected
that students will find this extremely simple exercise very interesting.
59
60
Chapter 4
Laboratory Three: The
Superheterodyne AM Receiver
Once students have become acquainted with passive components, amplifiers, and modulation, it is possible for them to finally begin building a real communications system. The
perfect choice for this first system is the superheterodyne AM radio, as it is both simple
and enlightening. This chapter explains the concept behind the superheterodyne receiver,
and it presents one typical implementation of such a system.
4.1
The Superheterodyne Receiver
Receivers that use the superheterodyne principle have fixed frequency amplifiers, and they
shift incoming RF signals into the frequency band of those amplifiers.
Thus, the super-
heterodyne receiver avoids the need for several variable frequency amplifiers that the user
must tune to the frequency of the incoming signal ([17]).
A block diagram of the typical
superheterodyne receiver is shown in Figure 4-1.
The frequency conversion process in the superheterodyne receiver is the result of multiplying the incoming RF signal by a locally generated sine wave (Figure 4-2). This conversion
shifts the frequency spectrum of the transmitted waveform to some pre-specified intermediate band (Figure 4-3). All of the amplifiers in the system are then tuned to the center
frequency of the intermediate band, which is known as the intermediate frequency (IF). In
the United States, the IF for commercial AM systems is 455kHz and the IF for commercial
FM systems is 10.7MHz ([17]).
61
.RF
Amp
X.IF
Amp
.Demodulator
Audio
-Stage
Local
Oscillator
Figure 4-1: Block diagram of a basic superheterodyne receiver.
RF in
IF out
X(OW)
Y(jW)
L(jw)
Local
Oscillator
Figure 4-2: Block diagram of the typical mixer showing an RF input, a local oscillator, and
an IF output.
The following sections present several examples of key superheterodyne subsystems,
including transformers, IF amplifiers, and mixers.
4.2
Transformers
IF amplifiers used in economical AM radios are often constructed using small transformers.
Since most undergraduate students have little or no experience with those components, this
section develops a basic exercise to help them understand transformer models.
4.2.1
Motivation for Discussing Transformers
Before delving into the transformer example, it is helpful to understand why transformers
are useful in the first place. The best way to do so is to take another look at the tuned
amplifier analyzed in the previous chapter.
At first glance, the tuned amplifier of Section 3.3 seems as if it might be a likely candidate
62
a)
L(jw)
-WLO
WLO
-WRF
WRF
b)
jw
c)
W
-WLO
-
WRF
-WLO
+
WRF
WLO
-
WRF
WLO
+
U"RF
Figure 4-3: a)Frequency spectrum of the local oscillator signal, b)Frequency spectrum of
the RF signal, c)Frequency spectrum of the mixer output.
for use as an AM IF amplifier. Unfortunately, however, the capacitor in such a circuit must
be kept at a reasonably small value so that its
Q
does not become so small that its parallel
resistance affects the overall gain and bandwidth of the amplifier'. Clearly, removing the
effects of the capacitor's resistance is advantageous because it removes a large amount
of possible variation in the performance of the amplifier.
Once C is set based on that
constraint, however, the value of L is also fixed because WIF
=
-
Often, though, this
produces an inductance value at which it is both expensive and unreasonable to wind a
high-Q coil. What is desired, therefore, is to find a cost-effective way to obtain a tuned load
with a small capacitor and a large inductor. One way to do so is to use a transformer.
The usefulness of a transformer in solving the above problem can be seen from the circuit
in Figure 4-4. The center-tapped inductor in that circuit effects an impedance change so
that the inductance seen by the current source is much smaller than the actual inductance
of the transformer winding. Thus, the use of the transformer allows for a high-Q, high
inductance coil which is much more reasonable than the high-Q, low inductance coil that
would be required otherwise.
'Typical values for these quantities would be a gain of 70V/V and a bandwidth of 10kHz.
63
C
L+
+
vo2(t)
L~
01
(t
iin(t)
L,
Figure 4-4: A parallel-resonant network driven through a tap on the inductor.
Transformers of the type used in AM IF amplifiers, which are known as autotransformers,
are typically wound on a small, adjustable ferrite slug and contained in a small metal
package.
Two different circuit models for the autotransformer in these components are
examined in the following section.
4.2.2
Models of the Parallel Resonant Autotransformer
There are several valid models used to simplify the circuit shown in Figure 4-4 to an equivalent parallel resonant network. Reference [3] describes one such model, which is shown in
Figure 4-5. To use that circuit, all of the following quantities must be determined:
1. The coupling coefficient, k
2. The inductance of the primary, L,
3. The inductance of the secondary, L 2
4. The voltage division ratio, n =
= k
L
5. The mutual inductance between the primary and secondary, M 12 = k/L
1L 2 .
(1 -k2 )L 2
+
iin(t)
I+
rp+
vo 1(t)
nVo2(t)
niin(t)
'\V
L2
C
SC
Figure 4-5: Model of the autotransformer with a tuned secondary.
64
R
vo2(t)
It is important to note that the model of the parallel resonant autotransformer proposed
above is only valid if
QT = woRLO > 1-
(4.1)
The physical meaning of QT is explained in detail in [3].
[3] also proposes the autotransformer model shown in Figure 4-6. That model, which is
only valid if k ~
1, can be often be more useful than the model described previously. It
is thus the task of the designer to choose the proper autotransformer model based on the
circumstances of the particular application.
n:1
Vo1()
C
L2
Vo2(t)
Figure 4-6: Another model of the autotransformer.
Parallel resonant autotransformer example
The example parallel resonant autotransformer examined in this section is similar to that
typically encountered in an AM IF amplifier. The values of the components used in this
circuit are listed in Table 4.1.
Table 4.1: Values of the components used in the Toko RMC-402-503N coil.
Component
Value
L,
105piH
L2
652pH
C
185pF
According to measurements taken with a
3
Vpeak-to-peak, 455kHz input voltage, the
value of n for this circuit is 0.397. Thus, given the values of Li and L 2 listed in Table 4.1,
k is 0.988 and M 12 is 258.5pH.
Like the first underdamped parallel resonant circuit described in Chapter 2, this circuit
derives its parallel resistance from that of the inductor. According to measurements, that re-
65
sistance is approximately 204kQ (i.e. QL ~ 110, Rind ~ 16.9Q). Thus, QT is approximately
105, so both autotransformer models are valid here.
In order to demonstrate the usefulness of the autotransformer models, it is helpful
to study a circuit which uses them.
Figure 4-7 shows the coil examined above when
driven by a current source provided by v,(t) and R.
I3.3p Apeak-to-peak (i-e. vs(t) =
20
In this circuit, an input current of
peak-to-peak and Rs =l.5M)
excites a 1.Upeak-to-peak
voltage across the secondary. This is close to the value predicted by the first model discussed
above, which is
Vo2
=
Q2 Rind
V
=
1.0
8
L
Rs
(4.2)
Veak-to-peak.
Rind
C
Vo 2 (t)
++2
Vs(t)
V1
(t)L
Figure 4-7: Parallel resonant autotransformer driven through the center tap. The voltage
source v,(t), which has a source resistance RS, can be modeled as a current source using
Norton's theorem.
In many applications, it also useful to know the voltage developed across the primary
side of the transformer. In that case, we use the model of Figure 4-6 and reflect C, Q2Rind,
and L 2 across the ideal transformer using the relation
Z'= n2Z.
(4.3)
With that simplification, the circuit can be redrawn as shown in Figure 4-8.
With the same input current as above, the voltage measured across the primary is
approximately
46 5
mVpeak-to-peak.
This is close to its predicted value which is
=
Vl=RS
2Q2 Rind = 429mV.
66
(4.4)
Rs
01
(t) n2 L2
C/n 2
n
2R
V
Figure 4-8: Second autotransformer model with secondary impedances reflected into the
primary.
4.3
IF Amplifiers
With an understanding of autotransformers and tuned amplifiers, students should finally
be ready to construct their own IF amplifiers. The circuit analyzed here, which students
will use in their own AM radio, is taken from the Graymark 536 AM radio kit described in
[93.
4.3.1
First IF Amplifier
The first IF amplifier that students will use in their AM radio is shown in Figure 4-9.
This circuit is built with a 2N3904 transistor, and it is powered by a 9 Volt power supply.
The voltage division ratio for the autotransformer (n) is 0.78 and the voltage division ratio
for the input transformer (ni) is 0.028. The components used in this circuit are listed in
Table 4.2.
Table 4.2: Values of the components used in the first IF amplifier.
Component
Value
L
CL
RB
612tH
200pF
470kQ
RE
1.2kg
22nF
10pF
CE
CB
The biasing scheme used in this circuit is similar to that used in the tuned amplifier
in the previous chapter. Thus, biasing will not be discussed here except to say that Ic is
approximately 5.31mA. At that level of current, gm will be approximately 204mQ- 1 .
Calculating the gain and bandwidth of the AM IF amplifier requires a careful analysis
67
V "Ic
Vcc
L
RB<
L
1:n 1
+0
VOUT
Vs
P
]B
RE
CB
CE
Figure 4-9: First IF amplifier stage in the Graymark 536 AM radio.
of its small signal model (Figure 4-10)2. In order to make the analysis easier, it is helpful to
include two key simplifications in that model. In particular, it is wise to simplify the circuit
so that it does not have any transformers. Thus, the tuned load formed by CL, L, and
RL can be reflected into the primary of the autotransformer using the model discussed in
Section 4.2'. Additionally, v, can be reflected into the secondary of the input transformer
using the relation,
Vs = nivs,
(4.5)
where ni is the effective turns ratio of the input transformer. Following these simplifications,
the small signal model of the circuit can be redrawn as shown in Figure 4-11.
From the circuit shown in Figure 4-11, it is possible to begin the small signal analysis of
the IF amplifier. The subsequent two sections complete this analysis for two very different
cases. In the first, the amplifier is examined when CE = 0, and in the second, the amplifier
is examined when CE = 22nF.
2
3
Rs is the measured output resistance of the input transformer at 455kHz.
RL is the equivalent parallel resistance of the inductor.
68
C1,
Rs
1:n,
-0+
L j9CL
ro
VM
T
Vs
RE
Vout
E
I1
IRc
Figure 4-10: General small signal model of the first IF amplifier stage.
C,1
Rs
n~v
r,
+
C,
gV
11
L r:
-R
-
--
n2 L
r
E
E
2R
]CL/n
Vout
+
Va
i
IRc
Figure 4-11: Simplified small signal model of the first IF amplifier stage.
Analysis with CE = 0
We first study the tuned amplifier when CE = 0. In that case, there is only an emitter
resistor, so the magnitude of the overall gain of the circuit is
Av = n1GmRout,
where GM
=
(4.6)
1+gmRE and R0 st = r0 (1 + gmRE) 1 n 2RL4 . For Ic = 5.31mA, [14] indicates
that ro is approximately 25kg. Thus, the gain should be 2.42V/V.
Since this circuit's load is a parallel tuned circuit driven by the current source gmvi, it
is possible to determine the overall bandwidth using Equation 2.6. Using that relation, the
4
In this case, the input resistance of the transistor is large enough that the source resistance can be
ignored.
69
bandwidth of this circuit can be written as
BW =
Given the measured values of R,t
2
27rRoutCL'
(47)
and CL, the bandwidth should be 4.89kHz.
According to measurements taken with vs = lVpeak-to-peak, the actual voltage gain at
455kHz is approximately 2.4V/V and the actual bandwidth is approximately 4.8kHz.
Analysis with a 22nF ceramic emitter capacitor
Using the ceramic emitter capacitor provided with the Graymark 536 AM radio kit, the
effect of the emitter resistor, RE, becomes negligible. Unfortunately, however, the emitter
capacitor is still not quite acting as a short circuit, making a gain calculation quite complicated 5. This difficulty in determining the gain is further compounded by the fact that
there is some non-negligible amount of feedthrough provided by Ct.
Given the complicated model for the IF amplifier operating in the small-signal regime,
it is impossible to obtain an accurate gain calculation without a full analysis of the circuit
shown in Figure 4-11. From that model, it is possible to write the following node equations:
fllo
V=
Rs
-- +
0vot
Iro
x
[1
IRS
1L+
RL
+ sC + I
SC,
I
Va
11
rj.
Va
a - vo
0 tsC,
- + gr
ro
(4.8)
rr
I
+ vx [gm - sC, ,
(4.9)
and
0 =V,
-+gm
1rr
Solving the above equations for v0,t
-Va
riii1
-+-+
rjr
ro
1
ZE
+gm
I
v0 t
+
ro
.
(4.10)
indicates that the actual gain of the circuit should be
approximately 56.84V/V. According to measurements taken using an input voltage with
an amplitude of 50mV, the output voltage was found to have an amplitude of 2.8V. Thus,
the measured gain is 56.448V/V.
It is important to note that both C,, and
5
The measured impedance, ZE,
6
CE
significantly detune the collector load'.
of the emitter capacitor at 455kHz is 4.38Q - 317.39Q.
Measurements indicate that CE and C1 reduce the resonant frequency by approximately 10kHz.
70
Since the inductor is variable, however, it is possible to retune the amplifier to 455kHz.
Although this retuning operation does slightly alter the gain of the amplifier, its effect is
not significant.
4.4
Mixers
The circuits that perform the frequency translation of RF signals are known as mixers.
These systems are inherently non-linear, as the eigenfunction property constrains the output
of linear, time-invariant systems to contain only the spectral components present in their
input signal ([11]). Since mixers are non-linear, the frequency spectrum of their output will
contain a great deal of harmonic content. Thus, a band-pass filter is required at the mixer's
output in order to ensure that the proper signal is passed to the IF amplifiers.
4.4.1
The Single Transistor BJT Mixer
The first mixer circuit that students will construct is the simple, single transistor BJT mixer
shown in Figure 4-12. This mixer has two inputs, a locally generated sine wave, va(t), and
an incoming RF signal, Vb(t). These inputs produce a base-emitter voltage, VBE, which is
given by
VBE = VBE + Va (t) + Vbt) = VBE + Va cos(wat) + Vb cos(wbt),
where VBE is the DC bias component.
(4.11)
With this base-emitter voltage, the transistor's
collector current can be written as
ic
where a
=
and b =
=
Ise
VT
=
Ise
VT
eacos(wat)+bcos(wbt),
(4.12)
9.
The frequency conversion performed by the single transistor BJT mixer can be seen
from a Fourier series expansion of Equation 4.12. This expansion is shown in detail in [2].
The result, which is given in terms of the modified Bessel functions In(a) and Im(b), is that
ic has four sets of spectral components. They are the following:
1. A DC component,
Ic = Ise
71
VT
Io(a)Io(b),
(4.13)
VCC
VCC
LL
RB
+
Vb
VOUT
/\v
RE
CB
0
E
~Va
Figure 4-12: A single transistor BJT mixer circuit.
2. Components at the input frequency w, and its harmonics nwa,
in(t) = 2Ise
VT
Io(b)In (a) cos(nwat),
(4.14)
3. Components at the input frequency Wb and its harmonics mWb,
im(t) = 2Ise
VT
Io(a)Im(b) cos(mwbt),
(4.15)
4. Components at the sum and difference frequencies Wa ± Wb and their associated harmonics nwa ± MWb
va-
inm(t) = 2Ise
VT
In(a)Im(b)[cos(nwat - mobt) + cos(riwat + mobt)].
(4.16)
Understanding the mixing process in a single transistor BJT mixer
The desired output frequency of the BJT mixer constructed for this thesis is the first
difference frequency,
Wa - Wb,
which is known as the lower sideband. The band-pass filter in
the circuit shown in Figure 4-12 is tuned to that frequency so that the spectral components
72
of ic at other frequencies will not appear at the output. Since students will use this circuit
as a tool to convert RF signals to IF signals in an AM receiver, the desired difference
frequency is 455kHz.
For the optimal operation of this circuit, the DC component of the collector current, Ic,
must not be affected by changes in the amplitude of either of the two input signals. In this
case, the input va(t) is the output of a local oscillator, which has a constant amplitude and
thus does not affect
1
c. Since the other input, Vb(t), is an incoming RF signal, it will have
an unpredictable amplitude. Of course, that amplitude will normally be extremely small
since the signal is a directly received RF input. That fact is important because as stated
in [17], it is a general property of modified Bessel functions that
lim Io(b) = 1.
b-+O
(4.17)
Thus, changes in the amplitude of Vb(t) will not affect Equation 4.13, and IC will remain
relatively constant.
Assured that the bias current will have a fixed value, we turn our attention to the
component of interest, namely the lower sideband. The amplitude of that component can
be written from Equation 4.16 as
I,, = 2 Ise
Ii(a)Ii(b).
vT
(4.18)
That result can simplified, however, using the DC collector current relation given in Equation 4.13. The result of that substitution is to reduce I, to
2ICI, (a)Ii (b)
Io(a)Io(b)
(4.19)
According to [17], Equation 4.19 can be simplified if
is approximated by the linear
term of its Taylor series (b)
. Assuming that b is kept less that 0.4 Equation 4.19
can be rewritten as
Ill =
Since b =
21
bI (a)
2 Io (a)'
Il can be further reduced to
I,
73
(4.20)
=
According to [17],
Vb
Ii(a)
(4.21)
Vrn
Ii(a 1
lim=1, T o1(a)
a-+oo I2(b)
which implies that if local oscillator amplitude is sufficiently large (i.e.
(4.22)
on the order of
100mV), the amplitude of the lower sideband current can be further simplified to
Ill
~ gmvb.
(4.23)
Equation 4.23 is an important result because it implies that the mixer's output at the
lower sideband frequency should have an amplitude
Vot = I11RL = gmRLVb.
(4.24)
Thus, the mixer has a conversion gain at the lower sideband frequency which is given by
Gm = gmRL.
(4.25)
Implementation of a single transistor BJT mixer
The single transistor mixer circuit constructed here is taken from the Graymark 536 AM
radio kit. That circuit, which uses the topology shown in Figure 4-12, is implemented using
the component values listed in Table 4.3.
Table 4.3: Values of the components used in the single transistor mixer.
Component
Value
L
C
RB
RE
CB
CE
612pH
200pF
470kQ
1.5kQ
0.01PF
0.047pF
The mixer examined here was tested using Vb = 100mVpak-to-peak and
Va = 100mVpeak-to-peak.
Since the input transformer has an effective turns ratio equal
74
to 0.1, the value of the of the input applied to the base of the transistor is actually
10mVpeak-to-peak.
Thus, both of the inputs meet the stipulations placed upon them in
the previous section.
An examination of the output of the single-transistor mixer indicates that its performance deviates quite a bit from predictions. Most notably, its conversion gain is much lower
than expected ', and the magnitudes of output signals at frequencies other than 455kHz
are fairly significant. These problems, which are discussed at great length in [3], are the
two major reasons why single transistor mixers are rarely found in modern systems.
Several different factors contribute to the problems experienced by the single transistor
mixer. Most importantly, the series resistance of the local oscillator output has the effect
of smoothing the non-linearity upon which the entire mixing process is based. A detailed
description of this process, which is similar to the addition of an emitter resistor in an
emitter-coupled pair, is discussed in [3].
Another important reason why the single transistor oscillator is far from ideal is that
there is a significant amount of local oscillator feedthrough. This is intuitively reasonable
considering that the transistor is essentially acting as a common-base amplifier to the local
oscillator input. This problem of insufficient local oscillator isolation is discussed in detail
in both [3] and [7].
Despite the shortcomings of the single-transistor mixer, it is a useful circuit found in
many classical AM receivers such as the Graymark 536 AM radio kit. Chapter 7 presents
an improved mixer design which uses a 4-quadrant multiplier.
7
Using va and vb as specified above, the measured conversion gain was 170V/V.
tion 4.25, it should be approximately 4700V/V.
75
According to Equa-
76
Chapter 5
Laboratory 4: Power Amplifiers
To this point, most of the attention in this thesis has been focused upon circuits commonly found in receivers. Of course, transmitters are an equally important part of wireless
communications systems, so it is important that they receive their just attention. Correspondingly, this chapter focuses upon the design of one of the most important elements of
a transmitter - the power amplifier. Additionally, this chapter also discusses biasing and
matching circuits, two topics of paramount importance in power amplifier design.
5.1
The Emitter-Degenerated Common-Emitter Amplifier
One common element in all of the amplifier circuits discussed so far is the use of an unstable
bias point. It is imperative, however, that students learn how to produce a stable DC bias
point because the gain of many transistor amplifiers is directly dependent on Ic, a quantity
that can vary significantly over the large temperature differentials in which circuits used in
personal communications systems must operate (i.e. --30C to 1250C) ([4]).
In order to learn how to counteract the effects of temperature to produce a stable
collector current, students will examine the circuit shown in Figure 5-1. This circuit makes
use of negative feedback in order to produce relatively small changes in the value of Ic as
temperature varies from 25 0 C to 1250C ([5]).
A detailed explanation of the stabilization
process performed by this circuit can be found in [5] and [12].
The specifications placed upon the performance of the common-emitter amplifier discussed here are summarized in Table 5.1.
77
VCC
RB1
Rs
VCC
RL
cc
+
A^
VOUT
Vin
RB2
RE
Figure 5-1: Common-emitter amplifier with emitter degeneration.
Table 5.1: Specifications for the emitter-degenerated common-emitter amplifier.
Specification
Power
VCC
5Volts
A, at 1kHz
> 50V/V
Voltage swing
5.1.1
Value
6mW
>
7
50mVeak-to-peak
Design Process for the Emitter-Degenerated Common-Emitter Circuit
The first step in the design process for the amplifier shown in Figure 5-1 is to select the DC
bias currents so that the quiescent power dissipation meets the 6mW specification with a 5
Volt power supply. The appropriate amount of bias current is set by selecting proper values
for the biasing resistors RB1,
RB2,
and RE. This task can be accomplished by replacing
the resistive divider created by RB1 and RB2 with its Thevinin equivalent. That circuit has
an open-circuit voltage given by
VB=
RB2
RB1 + RB2
and an equivalent resistance given by
78
VCC
(5.1)
RTH = RB1 11 RB2.
(5.2)
Using these quantities and the Ebers-Moll model of the BJT shown in Figure 5-2, both [5]
and [12] show that an emitter-degenerated common-emitter circuit has a collector current
given by
_
OF (VB
-
(53)
VBE)
RTH + (0 +l)RE
VCC
RL
RTh
f3*1B
V
Figure 5-2: Ebers-Moll model of the common-emitter amplifier with emitter degeneration.
Since the above design equations contain several undetermined quantities (i.e. RE, RTH,
and VB), they make the process of determining Ic quite tedious. Fortunately, [5] outlines a
simple technique for determining those quantities. With a desired Ic equal to 900PA, that
process yields the resistor values listed in Table 5.21.
The resistor values listed in Table 5.2 provide an amplifier whose collector current is
relatively immune to the effects of temperature. This fact is best verified by calculating
the current at 1250C and comparing it to the current at 250C. According to [14], it is
reasonable to assume that at 1250C,
VBE will decrease to about 500mV.
OF
will increase to approximately 170A/A and that
Substituting these values into Equation 5.3 yields
'The quantities listed in Table 5.2 are not the exact resistor values calculated using the above methods.
Instead, for ease of design, the resistances were all rounded to the nearest standard value. The effect of this
change in the actual circuit is discussed in the next section.
79
Table 5.2: Resistors used in the bias network of the emitter-degenerated common-emitter
amplifier.
Resistor
Value
RB1
39kQ
RB2
RE
2-2kg
51kQ
IC = 996pA, which is only about 10 percent higher than the predicted value of Ic at 250C.
This change is much more acceptable than what is achievable using alternative biasing
methods, which would produce variations of nearly 100 percent over the same temperature
range ([5]). These less acceptable biasing methods have been discussed in Section 2.4 and
Section 3.3.
The next step in the design process is to set the voltage gain of the amplifier to a value
that exceeds the specification given in Table 5.1. Since the common-emitter amplifier with
emitter degeneration is approximately unilateral, the best way to set its gain is to use the
two-port admittance-parameter model shown in Figure 5-3. According to [4], that model
has 3 parameters, namely RIN, ROUT, and Gm. For this particular circuit, [4] shows that
the input resistance is given by
RIN = rj + ( + 1)RE
(5.4)
and that output resistance is given by
ROUT = RL,
(5.5)
The remaining quantity, Gm, is best determined from a model for the negative feedback
provided by the resistor RE.
This feedback is modeled in the block diagram shown in
Figure 5-4. Applying Black's Formula, we find that
G
out
9M
1 + gmR L
m Vin
(5.6)
Knowing all of the admittance parameter values, the voltage gain of the emitter degenerated
amplifier can be specified as
80
AV-
RIN
GmRoUT,
RIN + Rs
(5.7)
where Rs is the source resistance.
+
Vin
R
m
+
R
GmV.
in
Ir
n
out
Vout
Figure 5-3: Admittance parameter model of the emitter-degenerated common-emitter am-
plifier.
Vin
+
mout
1/R
Figure 5-4: Block diagram of the negative feedback provided by the emitter resistor.
Equation 5.7 shows that the gain of the common-emitter amplifier with emitter degeneration is much lower than the gain of a typical common-emitter amplifier 2. This reduction
is the result of the feedback provided by RE. Fortunately, it is possible to negate the effects
of negative feedback at the small-signal level by placing a large capacitor, CE, in parallel
with RE to incrementally ground the emitter at high frequencies.
Using an emitter bypass capacitor, the circuit will have a gain given by Equation 2.16,
which is repeated here for convenience:
AV =
B-/RL
Rs + RL
(5.8)
With Ic = 900pA, 6 will be about 110A/A, so in order for the gain to exceed the 50V/V
specification, RL must be at least 2.14kg.
2
See Section 2.4
81
Before setting the value of the load resistance based solely upon gain considerations,
it is important to make sure that the circuit is able to meet the output voltage swing
specification. By choosing RL to be 2.3kQ,
VCE
will be
VCE = VCC - ICRL - ICRE = 950mV,
(5.9)
so the output voltage should be able to achieve an amplitude of 700mV before the transistor
saturates. Since the gain specification is also met with RL = 2.3k , the load resistance was
set to that value. For more information on designing amplifiers with specifications on the
output voltage amplitude, see [5].
5.1.2
Measured Values for the Emitter-Degenerated Common-Emitter
Circuit
In the actual circuit built for this exercise, the measured collector current is approximately
932pA.
This is a reasonable value since the actual resistors used in the bias network are
not exactly the same as those predicted using the methods discussed in [5].
In order to experimentally determine the gain of the amplifier at 1kHz, an input voltage
having a peak-to-peak value of 10mV was applied to the circuit. With that input, the output
voltage was measured to be 590mVpak-to-peak, indicating that the amplifier's low-frequency
gain is 59V/V.
The output voltage swing of the emitter-degenerated amplifier was found to be approximately
99
5mVpeak-to-peak.
Although this is lower than expected, it is a reasonable
measurement because the value of IC in the actual circuit is slightly higher than expected.
At the actual collector current value (i.e. 932pA), VCE is 769mV, indicating that the output voltage should only be able to swing about 500mV below its quiescent value before the
transistor saturates. This is approximately what was observed in this circuit.
5.2
Impedance Transforming Circuits
In the low frequency circuits typically encountered by undergraduate students, the amount
of power gain is almost never an issue. Thus, many undergraduate courses pay the subject
very little attention. This is unfortunate, however, because at radio frequencies, power gain
is a fleeting commodity. In fact, to obtain a reasonable amount of output power in the RF
82
domain, the designer must often construct an impedance transforming network ([7]). This
section addresses the design of such circuits.
5.2.1
L-Match Circuits
The impedance-transforming network examined here is known as an L-match circuit, which
happens to be one of the simplest and most straightforward impedance-matching networks
available to the designer (Figure 5-5). A complete treatment of this circuit can be found in
[7].
CM
Lm
RIN
RL
Figure 5-5: A down-converting L-match circuit.
The L-match network investigated here is intended to transform a 40Q resistance to a
5Q resistance. Such a conversion is typical of what might be required at the output of many
modern, low-power transmitters. The design specifications for this circuit are summarized
in Table 5.3.
Table 5.3: Design specifications for the low-pass L-match circuit.
Specification
fo
RL
Rin
Value
1.35MHz
40Q
5Q
In this example, we begin with a band pass network designed to resonate at 1.35MHz
(Figure 5-6). At that frequency, the input resistance is simply RL, which is 40Q. In order
to reduce the effective input resistance of the band-pass network to 5Q at resonance, an Lmatch circuit was added. Given the difference between the actual input resistance and the
desired input resistance, the process outlined in [7] indicates that the L-match inductance
should be 1.78pH and that the L-match capacitance should be 62.5nF. The layout of the
complete circuit is shown in Figure 5-7.
83
RS
0
1
I i
Vin /\v
Vn1
L1
Jj
%
RL
L
+o
Vout
Figure 5-6: Original parallel resonant network used in the L-match example.
CM
Vin
/\
I
1
L1
LM 3
RL
Figure 5-7: Final realization of the band-pass/L-match combination.
In the actual implementation of the band pass/L-match combination, the L-match capacitor and inductor used were not exactly the same as the values computed above. The
L-match capacitor, which is known as CM in Figure 5-7, is actually 50nF. The L-match
inductor, which is known as LM in Figure 5-7, is actually 1.9 pH.
Since LM is wound on a
1
pencil, however, it is easy to adjust its inductance.
According to measurements taken with a 2 0Vpeak-to-peak input signal, the voltage across
the actual circuit at resonance is
2
.85Vpeak-to-peak. Since the source resistance is 50,
this
measurement indicates that the input-resistance of the L-match network is approximately
8.4
5.3
at resonance.
Class A Power Amplifier
Depending upon the levels of efficiency and linearity required for a particular transmitter,
the designer is faced with several choices for the topology of the power amplifier (PA). This
section examines the Class A PA, which, due to its high degree of linearity, is commonly
encountered in many low-power transmitters.
84
5.3.1
Design of the Class A Circuit
Upon first glance at the Class A power amplifier circuit shown in Figure 5-8, the average.
student will probably think that there is little difference between the Class A PA and the
typical small signal amplifier. While it is true that the two circuits are topologically similar,
they are not at all intended for use in the same applications. The reason for this is that the
amplitude of the input drive voltage in a PA is typically much larger than it is in a small
signal amplifier.
This difference is important because it causes the signal portion of the
collector current in a PA to become a significant percentage of the transistor's bias current
([7]). Because of that fact, small signal models are really not appropriate in the analysis of
power amplifiers.
VCC
Vcc
T
RB1
Lc
B
Rs
CI
Vin
i
R
/\VF
R B2
VOUT
1
R E
+
E-
Figure 5-8: A typical RF Class A power amplifier.
In a Class A PA circuit, the transistor is biased so that it operates in its linear (i.e.
forward-active) region for all levels of the input drive voltage. Of course, since this circuit
is essentially a common-emitter, the relationship between the input drive voltage and the
output current will only remain linear for small variations in the input voltage. Fortunately,
the high-Q output circuit provided by C1 and L, assures that there will be little distortion
in the actual output voltage despite large swings in the input voltage.
As stated previously, Class A power amplifiers are biased so that they operate in the
forward-active region.
In the example circuit, such biasing was accomplished using the
85
thermally-stable technique described in Section 5.13. The values of all of the components
used in the example circuit are given in Table 5.4.
Table 5.4: Values of the components used in the Class A example.
Specification
LC
L1
Value
600pH
2.96pH
C1
4.7nF
16kQ
2.7kQ
180O
RB1
RB2
RE
Rs
50Q
0.33pF
cc
6.8nF
100pF
CB
CE
Power output and efficiency of the Class A circuit
The primary design concern in a power amplifier is the maximum achievable output power.
In other words, the designer is concerned with the maximum amount of power that can be
delivered to the load without saturating the transistor or causing it to cutoff.
In this particular case, the power is limited by the fact that the transistor will cutoff
when the collector current falls to zero. Since the collector current is given by the equation,
ic(t) = IC + irf cos(Wct),
(5.10)
if ic ever goes to zero, then it must be true that the amplitude of its signal component
is greater than the magnitude of its DC component. In this circuit, measurements indicate that the parallel resistance of the inductor L, is approximately 1.35kg and that the
actual DC bias current is 8.55mA. Thus, the maximum output voltage is approximately
23
Vpeak-to-peak and the maximum achievable output power is
2
Pout,max _ ou"Max = 49mW.
2RL
3
The intended bias current in the initial design of the Class A PA was 8mA.
86
(5.11)
An important figure of merit used in power amplifier design is efficiency, which is defined
as
Power Transferredto the Load
Quiescent Power
(5.12)
In this case, the power supply voltage is 15 Volts, so the total quiescent power is VJc
128mW. Since the maximum output power is 49mW, the overall efficiency of this stage
is about 38%. Although this number is slightly lower than the theoretical maximum for
a Class A PA, it is not off by much, indicating that the major downfall of the Class A
amplifier is poor efficiency. For more information on this subject, see [7].
Class C Power Amplifier
5.4
Another possible power amplifier circuit is the Class C amplifier shown in Figure 5-9. The
components used in actual Class C test circuit discussed here are listed in Table 5.5.
VCC
Rs2
Vm
v
VCC
Cs2 RB1
RB2
-
_CE'
~
Lc
CB
-
+
Rs
VC
CL
Cs
L
v0 u
RB
Figure 5-9: A low-power RF Class C power amplifier.
The particular advantage of Class C amplifiers is that they are capable of much higher
87
Table 5.5: Values of the components used in the Class C example.
Specification
LC
L1
Value
600pH
2.96pH
CL
4.7nF
llkQ
11kg
1.1kQ
50Q
RB1
RB2
RB
Rs
Rs2
50Q
CB
1OnF
Cs
Cs2
15nF
47pF
CE
0.1pF
efficiencies than Class A amplifiers. The major reason for this difference in efficiency is that
the Class C circuit, unlike its Class A counterpart, is not biased such that the transistor
conducts even with no applied input signal ([7, 17]). Instead, the Class C circuit is designed
so that the transistor conducts less than 50% of the time when driven by an AC input.
According to [17], it is possible to define a conduction angle, 2#, to be that fraction of
a period in which the transistor operates in its forward-active region. In a Class C circuit,
then, 2q is some value between 0 and 7r. It is shown in [7] that the efficiency of a Class C
stage can be written in terms of the conduction angle as
2# - sin(2)
4(sin() - # cos(2))
Class C amplifiers are particularly useful as AM modulators, especially in high power
systems where high efficiency is a must. A Class C circuit such as the one shown in Figure 5-9
operates as an AM modulator because the effective power supply voltage seen by the output
transistor is
V0 0
V0 0
2 (1 + Vm(t)) = 2 (1 + m cos(Wmt)).
(5.14)
Under saturation limited conditions, that voltage is exactly the maximum amplitude of the
circuit's output voltage. So, if the signal vc(t) is of the form cos wet, the overall output
voltage of the Class C circuit will be of the form
88
__ __
- i=- -A
(5.15)
Vt = VC C (1 + m cos(wmt) cos(wct)).
2
In this particular case, the output voltage in response to the inputs vm(t) = 3. 5 cos(27r2 x
10 3 t) and vc(t) = 2.5 cos(27rl.35 x 10 6 t) is shown in Figure 5-10.
10 ,1 . .
I
I
0.2
0.4
.,I.
I
II
0.6
0.8
8
6
4
2
0n
0
0
-2
-4
-6
-8
-IV
0
Time (Seconds)
1
x 10'
Figure 5-10: Output voltage of the Class C amplifier.
It is important to note that the Class C amplifier shown in Figure 5-9 is highly efficient.
Figure 5-11 shows the collector current in the actual circuit. That figure indicates that the
conduction angle, 2q, for this particular circuit is 1.6965radians. With that conduction
angle, Equation 5.13 stipulates that the overall efficiency of this amplifier is 93%, which
represents a dramatic increase from the Class A case.
89
1A-
x 10-
12-
10-
8E
ID
6I
I
j
4-
2JL.IUI..
0
I.'
IVI
0~
-21
Fu0.5
1
1
0.
1.I
1.5
.
2
2.5
3
Figure 5-11: Collector current in the Class C amplifier.
90
.0
4
x 10-,
Chapter 6
Laboratory Five: Introducing
Feedback into Communications
Systems
Feedback is a technique useful in numerous electronic applications, and RF systems are
no exception. One particularly common feedback-based circuit found in communications
circuits is the oscillator. This chapter examines several common RF oscillator circuits which
employ positive feedback.
6.1
More Parallel Resonant Networks
All of the oscillator circuits described in this chapter use some sort of tapped passive component. Chapter 4 examined one such component, the autotransformer. This section extends
the analysis started there to the tapped capacitor circuit, which is frequently encountered
in RF integrated circuits.
6.1.1
Model of the Tapped Capacitor Circuit
Under certain conditions, the capacitive divider network in the circuit shown in Figure 6-1
can be replaced by a transformer model. That model, which is described in detail in [3], is
shown in Figure 6-2. The critical parameters in the model are summarized in Table 6.1.
91
C1
L
Vo1
Rvoo2
C2
Figure 6-1: A circuit using a capacitive divider.
1:n
+ 0
Vo1
+
L
CD
R
vo2
Figure 6-2: Equivalent circuit model of the capacitive transformer.
According to [3, 17), the model of Figure 6-2 is valid as long as QE >
11. Since that
condition is normally true, the capacitive transformer model proves to be quite useful.
6.1.2
Example Circuit Using a Tapped Capacitor
The example resonant circuit with a tapped capacitor which was created for this project is
shown in Figure 6-3. The components used in this circuit are listed in Table 6.2.
The example tapped capacitor circuit examined here is driven by a 1. 8 mApeak-to-peak
input current source provided using vs
= 2 0Vpeak-to-peak
and Rs = 11kQ. At resonance,
the circuit will look purely resistive, so at the given input drive level, the voltage measured
'QE
is the
Q of the circuit when driven with a current source at the output and a short-circuit at the
input.
Table 6.1: Parameters used in the capacitive transformer model.
Parameter
n = Y- I
Value
V"I
Cl {_
(C1(+2
C
QE
WOM0 +
92
C2)R
Rs
C1
L
Vs
Vo1
T
R
C2
V o2
Figure 6-3: The example tapped capacitor circuit.
Table 6.2: Values of the components used in the tapped capacitor example.
C2
Value
10nF
10nF
L
3pH
R
Rs
10Q
11kQ
Component
C1
across the input source should be
Vol
-v.s
R_
= 7 3 mVpeak-to-peak
(6.1)
-
The actual measured voltage at resonance was approximately
68
mVpeak-to-peak which is
reasonable if the equivalent parallel resistance of the inductor is included in the analysis 2*
6.2
Common-Base Oscillators
It is widely known that any closed-loop system with a transfer function whose denominator
equals zero at some frequency wo will exhibit oscillations at that frequency. This fact is
extremely useful in RF systems, where there is always a need to synthesize sine waves. This
section examines several simple circuits where feedback is exploited for this purpose.
2
In this case, Rina =
0.5Q and QL
= 52, so the equivalent parallel resistance of the inductor is 1352Q.
93
6.2.1
Oscillation in Transistor Circuits
For a linear feedback network to exhibit constant-amplitude sinusoidal oscillations at a
frequency w0 , it must be true that the system's poles lie exactly on the imaginary axis at
that frequency. If the poles are even slightly off the axis, the oscillations will either decay
or grow exponentially.
Practical oscillators circumvent this problem by using right-half
plane poles and non-linear elements that force those poles back toward the imaginary axis
([7, 13]).
An oscillator circuit which uses a non-linear element to limit its amplitude is shown in
Figure 6-4. As soon as this circuit is energized, its output will grow in amplitude. Since
the circuit's output voltage is fed directly back to its input terminal (i.e. the emitter), the
growth of the output will force the amplitude of the circuit's input to grow beyond several
k.
q
As that happens, the transistor's non-linear ic - VBE characteristics will reduce its
transconductance until the point at which the oscillations reach a constant amplitude and
the system poles lie exactly on the imaginary axis ([13]).
VCC
VCC
L
VCC
RL
RB
CB
-l
RE
0
Figure 6-4: A typical grounded-base transistor oscillator. This particular circuit is known
as a Colpitts oscillator.
The above qualitative analysis of the circuit shown in Figure 6-4 indicates that a linearized, small signal model of an oscillator circuit is only helpful in determining the startup conditions.
Once oscillations have started, a more accurate analysis uses describing
functions that properly model the transistor's non-linear characteristics in the presence of
large-signal inputs. All of the circuits which follow are analyzed in both regimes.
94
6.2.2
The Hartley Oscillator
The first oscillator circuit that students should study uses the relatively simple Hartley
topology shown in Figure 6-5. The circuit discussed here, which is taken from the Graymark
536 AM radio kit, uses the component values listed in Table 6.3.
VCC
VCC
VCC
Cl
RB
C2
CI
RE
Figure 6-5: Hartley oscillator found in the Graymark 536 AM radio kit.
Table 6.3: Component values used in the Hartley oscillator example.
Component
Value
RB
RE
470kQ
5.6kg
C1
C2
4 - 76pF
0.01pF
03
0.01pF
Before delving into a full discussion of the Hartley oscillator, it is wise to first say a
few words about its tuned load, which uses what is known as a three-winding transformer
(Figure 6-6).
A useful model for such components, which is described in detail in [3], is
shown in Figure 6-7. The important parameters in that model are summarized in Table 6.4.
95
v01 L1
+
- i
L3
Vo2
Vo 3
R3
Figure 6-6: A typical three-winding transformer.
La
S
1'
(M12/L2)Vo2
-C
A
L2
1:n
(M12/L2)i1
R3
V03
Figure 6-7: Model of the typical three-winding transformer.
Small signal analysis of the Hartley oscillator
From the schematic of Figure 6-5, it is possible to draw the small-signal, two-port model
of the Hartley oscillator (Figure 6-8).
In the model used here, Ri" represents the input
resistance of the transistor in the common-base configuration, which is
R
+1
r1r
1
gm
(6.2)
Additionally, the model ignores all of the transistor's parasitic capacitances, and it treats
the capacitors C2 and C3 as short circuits.
Table 6.4: Parameters used in the three-winding transformer model.
Parameter
Value
n
L
L2
QT'
QE
La
_________
WoCR 3 (n
wL3 1 k )
Li (1 - k 12 ki3
k
23
96
0
Mv,
vtank
L2
L,
L3
T
0
/gM1
k
I
Figure 6-8: Small-signal model of the Hartley oscillator.
In order to complete the small signal analysis of the Hartley oscillator, several steps
must be taken to simplify the transistor's tuned load. According to [3], the load can be
analyzed using the model shown in Figure 6-7 as long as QE > 10 and k23QT'QE > 100 3.
Using the transformer model and introducing the equivalent parallel resistance of L 2 and
C using the quantity RL, the small signal circuit can be redrawn as shown in Figure 6-9.
Table 6.5 indicates all of the important transformer parameters for this circuit.
1:n
(M 1 2 /L 2 )gmv 1
vtankL
C1
L2
L
9m V
Figure 6-9: Simplified small-signal model of the Hartley oscillator.
Table 6.5: Values of the three-winding transformer model parameters for the transformer
used in the Hartley oscillator example.
Parameter
L,
Value
L2
2.9pH
358pH
L3
0.225pH
n
0.025
MU
QL2_
QE
0.099
18.6
From Figure 6-9, it is possible to begin a block diagram analysis of the oscillator. That
3
In this circuit, QE > 10 but k23QT' QE < 100. Despite this fact, the three-winding transformer model
is still accurate to within a few percent.
97
block diagram, which is shown in Figure 6-10, has two components, G(s) and H(s). G(s)
is simply the voltage gain of the circuit shown in Figure 6-9, which is
G(s)
where Req is simply
| Ri.
Vtank (S)
V(s)
L2msL
s 2 L2 C1 +
+ s,
2
2+1(6.3)
+ 1
(
H(s) relates Vank to 1, so it must be true that H(s) = n.
Using G(s) and H(s), it is possible to write the loop gain of the system as
L(s)
=
KsL
s2 L 2 C 1 + S2
Req
(6.4)
+ 1'
where K = gngm-
Vtank
V,
G:s)
-- H(S) 1
Figure 6-10: Block diagram of the Hartley oscillator when operating in the small signal
regime.
The root-locus plot for the oscillator system is shown in Figure 6-11. The plot indicates
that the closed-loop poles do indeed cross the imaginary axis. The value of K for which
this happens is exactly
1
RL is approximately 95kQ,
. Given that Ic in the actual circuit is about 900piA and that
is approximately 32.lpQ-
1
. Since the actual value of K
was set to 85.7pQ-1, the system will have poles in the right half plane. Recall that this is
exactly what is desired to ensure that oscillations will begin.
Describing function analysis of the Hartley oscillator
As mentioned previously, once oscillations have started in any transistor oscillator circuit,
the amplitude of the input will be too large to describe the operation of the transistor using
only the linear term from the Taylor expansion of its collector current equation. Thus, in
general, large signal inputs require that the ic equation be completely expanded to include
higher-order terms. This section discusses how that expansion is performed, and it describes
how the results of that expansion can be useful to the designer.
98
Root Locus
6-
4 --
2-
T,)
E
-2 -
-4 -
-6 2
0
8
6
4
10
x 16
Real Axis
Figure 6-11: Root-locus plot for the Hartley oscillator.
In the case of a large sinusoidal input, the transistor's collector current is given by
ic =Is exp
i~z
kT
qVj cos(w t)
exp
kT
(6.5)
As seen in Chapter 4, expanding an equation such as this one can be quite complicated.
Fortunately, however, if the transistor is driving a high-Q load, only the fundamental component of the collector current need be considered. In that case, an average large-signal
transconductance can be defined in terms of modified Bessel functions. That transconductance is given by
2Ii(x)
Gm = M I(X)
where x =
q
(6.6)
and I,(x) is a modified Bessel function of order n. The development of
99
Equation 6.6 is described in great detail in [3].
The simplified large signal model of the Hartley oscillator circuit is shown in Figure
6-12. In that model, the transistor's input resistance has been defined as
5-, which is the
effective linear loading that the transistor applies to the tuned load 4. A complete derivation
of this equivalent linear resistance is given in [3].
1:n
(M
2
/L 2 )GmV1 g
1/Gm V1
LRL
tankLC
Figure 6-12: A simplified large signal model of the Hartley oscillator.
The loop gain of the large signal system is nearly equivalent to that of its small signal
counterpart.
The only difference is that gm must be now replaced by Gm.
Thus, for
sustained oscillations at the frequency w,, it is necessary that
L(3w0 ) = n
(
GmReq = 1.
12
(L2)
In this case, Req is the parallel combination of -
(6.7)
and RL.
At this point, two steps are required to determine the oscillation amplitude.
First,
Equation 6.7 must be rearranged to state that
Gm =
(6.8)
RL
n(( M1)
- n)
and second, it is necessary to find the value of x for which Equation 6.8 is true. Unfortunately, doing so is extremely inconvenient because it requires the use of reference books to
determine how Gm varies as a function of x. Luckily, however, [7] shows that in the case of
very large inputs (i.e. V greater than 5 or 6 kT),
Gm can be approximated using the DC
q
bias current,
1
c, and the amplitude of the fundamental component of the input voltage.
That simplified relation is
Gm =
2Ic
V
.
(6.9)
4
Since this is a simplified model similar to the one shown in Figure 6-9, the input resistance has been
placed in the secondary of the transformer. In general, however, it would not be placed there.
100
Substituting Equation 6.9 into Equation 6.8, we find that the output amplitude must
given by the equation,
V = 2n(
n)IcRL,
12)
(6.10)
(L2
in order for the circuit to be able to oscillate at wo.
With the values of
z, n, IBIAS,
and RL used here, V should be approximately 316mV, which is reasonably close to the
measured value of 325mV. Table 6.6 presents a comparison between the predicted value
and the actual value of each of the relevant voltages in the Hartley oscillator circuit.
Table 6.6: Comparison between the predicted amplitudes and the actual amplitudes in the
Hartley oscillator example.
6.2.3
Voltage
Predicted Value
Actual Value
V1
316mV
325mV
Vtank
12.64V
13.25V
Colpitts Oscillator
Another common oscillator circuit uses the topology shown in Figure 6-4. That circuit,
which is known as a Colpitts oscillator, is much like its Hartley counterpart.
The only
difference between the two circuits lies in the fact that they use a different tapped element.
This section studies a Colpitts oscillator constructed using the components listed in
Table 6.7. Since the Colpitts circuit is so similar to the Hartley circuit, much of the analysis
is the same and will thus be presented in an abbreviated manner.
Table 6.7: Values of the components used in the example Colpitts oscillator circuit.
Component
Value
RB
RE
C1
C2
L
740kQ
5.1kQ
O.79nF
6.86tH
CB
0.l5pF
3nF
101
Small signal analysis of the Colpitts oscillator
The simplified small signal model of the Colpitts oscillator under study is shown in Figure 613. In that circuit, the tapped capacitor has been simplified using the model discussed in
Section 6.1. The Colpitts small signal model also includes the equivalent parallel resistance
of the inductor, RL, and the emitter resistance, RE, both of which are significant in this
case.
Due to the similarity between the Colpitts small signal circuit and the Hartley small
signal circuit, it is possible to write the loop gain in this systems as
L(s) =
(6.11)
ngmsL
s2LC + sL+1'
where R
RL. At resonance, L(s) simplifies to
=
L(jw)
= ngm (RL
n2gm
(6.12)
R
n2
Rearranging Equation 6.12, we find that the minimum transconductance required to guarantee start-up is given by
±n2 RE'
n(1 - n)
(6.13)
M > R-'
In this case, n = .21 and RL = 5.5kQ, so Equation 6.13 indicates that gm must be larger
than 1.15mQ-1 in order for oscillations to begin. Since the actual value of 1 c in this circuit
is 1.3mA (i.e. gm = 50mQ-1), start-up is not a problem.
1:n
9mv1
4. Vtank
-
C
T0
L
:JI
1/9m
RE
IR
1
Figure 6-13: A simplified small signal model of the Colpitts oscillator.
Large signal analysis of the Colpitts oscillator
Just as in the Hartley example, it is also possible to define a large-signal model for the
Colpitts oscillator. The model for this circuit is shown in Figure 6-14. In this case, the loop
102
gain at resonance is
1G
L(jw0 ) = nG, ( RL
12
(6.14)
) =L
so using equation Equation 6.9, the output amplitude can be written as
V = 2n(1 - n)Ic RL 1 RE)
(6.15)
Table 6.8 presents a comparison between the predicted amplitudes of all of the voltages
in the circuit and the respective measured value of each.
1:n
GmVi
Vtank
C
L
1/Gm V1
Figure 6-14: A simplified large signal model of the Colpitts oscillator.
Table 6.8: Comparison between the predicted amplitudes and the actual amplitudes in the
Colpitts oscillator example.
6.3
Voltage
Predicted Value
Actual Value
V1
Vtank
2.26V
10.762V
2.43V
10.55V
Common-Collector Oscillators
In addition to the common-base oscillators examined in the previous section, there are
several oscillator configurations which use a common-collector topology. One such circuit
is shown in Figure 6-15.
The typical means of analysis of common-collector oscillator circuits uses the negative
resistance technique developed by Gouriet ([17]). In that approach, the oscillator circuit is
viewed as an ideal LC resonator in which there is no resistance. This model is appropriate
if there is a source supplying an amount of energy equal to that dissipated in the actual
tuned circuit. In this case, that energy is supplied by the transistor.
103
VCC
RC
RB
VOUT
CB
c
+,
0
I
L
C2
II
RE
Figure 6-15: A common-collector oscillator circuit.
Energy replacement in an oscillator can be viewed as a negative resistance in series with
the tuned circuit as shown in Figure 6-16. If that negative resistance perfectly cancels the
loss of the resonant network, the system will have poles on the imaginary axis and it will
oscillate at the resonant frequency.
L
-R
Rind
c
Figure 6-16: Negative resistance model of a common-collector oscillator circuit. The negative resistance represents the energy supplied by the transistor which cancels the loss in
the network.
104
6.3.1
Analysis of the Common-Collector Oscillator
The simplest way to conduct a negative resistance analysis of the common-collector oscillator
circuit is to examine the impedance facing the inductor L. If it is true that
that -sC2
1
SCI
< Rin and
< RE, [17] shows that the impedance, Zi, facing the inductor is
W2 CC2
C1
2
(6.16)
Using that value, it is possible to consider the series combination of sL + Rind and Zi
as shown in Figure 6-16.
If the negative part of Zi exactly cancels the series loss of the
inductor at resonance, the system will exhibit oscillations at the resonant frequency. Thus,
the condition for sustained oscillation is that
Gm
GmC
Rind =
(6.17)
w2C1C2*
6.3.2
Common-Collector Oscillator Example
The common-collector oscillator constructed for this project uses the topology shown in
Figure 6-15. The values of the components found in this circuit are listed in Table 6.9.
Table 6.9: Component values used in the common-collector oscillator.
Component
RB
RC
Value
10kQ
270
C2
16.7kQ
10nF
10nF
L
CB
Cc
1.5pH
100nF
15nF
RE
C1
When energized, the oscillator circuit examined here was found to oscillate at 1.41MHz.
This is approximately what is expected since the resonant frequency of the tuned network
is given by
1
One important fact worth noting in this circuit is that it is possible to predict the
amplitude of the oscillations using the stability condition given in Equation 6.17. Substi105
tuting Equation 6.9 into Equation 6.17 and rearranging, we find that the amplitude of the
fundamental component of the input voltage, V1, is given by
V
2IC
2 I
RindwoC1C2
(6.18)
.
Using the measured values of Ic, Rind and w 0 5 , Equation 6.18 predicts that V should be
229mV. According to measurements, the actual value of V is 208mV.
5
The measured value of Ic is 630pA and the measured value of
106
Rind
is
0.7Q.
Chapter 7
Laboratory 6: Modern Receiver
Architectures
To this point, all of the receiver circuitry discussed in this project has primarily been taken
from classical amplitude modulated systems. In this chapter, the focus changes, however,
as several circuits are presented which use more modern designs. In particular, this chapter
focuses on a common-collector, common-base cascade version of an IF amplifier and on a
4-quadrant multiplier implementation of a mixer.
7.1
Tuned Amplifiers Revisited
In the first receiver topology discussed in Chapter 4, the standard amplifier cell used was
a common-emitter circuit with a tuned load. For many sound reasons, however, use of
such an amplifier can be a poor design choice. This section details some of those reasons,
and it discusses one circuit commonly used to circumvent the shortcomings of the tuned
common-emitter amplifier.
7.1.1
Problems With the Common-Emitter-Based IF Amplifier
In order to grasp the problems inherent in a common-emitter based IF amplifier, it is wise
to revisit the discussion of those circuits that was presented in Chapter 4. We recall that
in the case without an emitter bypass capacitor, the amplifier had a low gain and a narrow
bandwidth, but an easily analyzed form. In the case where the emitter bypass capacitor was
included in the circuit, the gain and bandwidth improved, but the design problem became
107
more difficult, however, as both complex emitter degeneration and capacitive feedthrough
entered the picture. Thus, in order to achieve a great deal of gain without having to exert
a tremendous amount of design effort, we must look to a different amplifier topology.
In addition to the complexity imposed by its design, the common-emitter has another
very serious potential problem - instability. That is, if the transistor's input is driven by
a tuned load, as is common in many receivers, oscillations can occur. This phenomenon,
which is examined in detail in [12], is the result of capacitive feedthrough.
Thus, even
though instability is not much of a problem at 455kHz, it is a significant issue in higher
frequency systems since feedthrough increases with frequency.
In order to avoid the problems stated above, it is best to look to an amplifier topology
in which the effect of C, is minimal. Thus, we turn our attention to the common-collector,
common-base cascade circuit shown in Figure 7-1.
Vcc
vcc
C
Rs
L
Cs
1:n
Q
v, ~,VOUT
Vi
RB2
/vRB1
---
Q3
RB4
CB
V
RB3
RE
-ee
-ee
Figure 7-1: IF amplifier formed using a common-collector, common-base cascade.
7.1.2
Design of the Common-Collector, Common-Base Cascade Circuit
The common-collector, common-base cascade circuit examined here, which was designed
to meet the specifications given in Table 7.1, uses the topology shown in Figure 7-1. The
components used in this circuit are listed in Table 7.2.
The example amplifier discussed here was biased using the method described in Section
108
Table 7.1: Design specifications for the common-collector, common-base cascade IF amplifier.
Specification
Av at 455kHz
Value
> 4000
Bandwidth
10kHz
Isupply
< 8.5mA
Vee
15V
Ve e
-15V
Table 7.2: Component values used in the common-collector, common-base cascade IF amplifier.
Component
Value
Rs
RB4
RE
50Q
30kQ
16kQ
7.5kQ
30kg
510Q
CB
0.lp F
Cs
C
0. 1p F
200pF
RB1
RB2
RB3
5.1. The bias resistors RB2, RB3, and RE were chosen so that the current flowing in the
current source transistor
(Q) would be 8mA, and the current flowing in the the common-
collector and common-base transistors should be 4mA. The measured value of the supply
current in this circuit was 7.9mA.
Determining the gain of the common-collector, common-base cascade is a far simpler
matter than calculating the gain of the tuned common-emitter. The best way to approach
the calculation in this circuit is to proceed in two steps. The first of those is to determine
the gain of the common-collector transistor (Qi). It is shown in [8] that the gain from the
base of that transistor to its emitter is
Ve
Vin
n(83+1)gm
Rin+(68+1)gm'
where Rin is the effective input resistance presented by the transformer and n is the effective
transformer turns ratio. Given that Rin ~ 50Q, gm ~ 0.171Q- 1 , and 0 ~ 170, the gain of
109
this stage should be approximately n. In this circuit, the value of n is 0.045.
Determining the gain from the input of the common-base transistor to the output is a
slightly more difficult matter. To calculate that quantity, we examine the small signal model
shown in Figure 7-2. An analysis of that circuit shows that the gain of the common-base
transistor (Q2) is given by
vot
_
Ve
RL(gmro + 1)
ro+ RL +rTx
(7.2)
where RL is the parallel resistance of the inductor. Thus the overall gain of the amplifier
should be
Vo0 t
Vin
_
nRL(gmro + 1)
(7.3)
ro+RL+r
Using the Toko RMC-402-503N coil examined in Chapter 4 as the tuned load (i.e. RL
204kQ), the gain of the common-collector, common-base cascade should be approximately
230.76V/V.
n
Vn
ro
9mV,n
L
L
L
Vout
Figure 7-2: Small signal model of the transistor Q2According to measurements taken with a 100mVpeak=to-peak input voltage with a frequency of 455kHz, the actual gain was found to be 230V/V.
7.2
Mixers Revisited
As discussed in Chapter 4, the single-transistor BJT mixer used in many classical AM
radio designs is not quite optimal. A better mixer circuit, which is based on a 4-quadrant
multiplier cell is shown in Figure 7-3.
An extensive discussion of such multiplier-based
110
mixers can be found in [4].
AD633
L
V0
Vc %'IV
C-1
II
Vm
vout
-
Figure 7-3: The example 4-quadrant multiplier stage.
The primary advantage of the 4-quadrant multiplier is derived from the fact that there
is a very high amount of isolation between the multiplier's input terminals and its output
terminal. A complete discussion of the advantages of this circuit over the single transistor
BJT mixer are discussed at great length in [7].
According to measurements taken using v,(t) = 5 cos(27r545 x 10 3t) and vm(t) = 5 cos(2710 6 t),
the output voltage measured across the parallel resonant circuit was found to be a reasonably pure sinusoid at a frequency of 455kHz.
111
112
Chapter 8
Laboratory 7: Phase-Locked Loops
The phase-locked loop (PLL) is one circuit element that has come to have a major impact
on modern communications systems.
PLLs appear in numerous applications, such as in
FM demodulators, frequency synthesizers, and synchronous detectors. They have become
so common in modern systems that no course on RF circuits should ignore them.
This chapter outlines some very basic experiments with an LM565 PLL IC that can be
used to teach students how to use phase-locked loops (Figure 8-1). This chapter will not,
however, attempt to give any examples that teach PLL design. Detailed information on the
design and application of PLLs can be found in [7, 17, 4].
Phase
01
Detector
--
Loop
Filter
VCO
Figure 8-1: Block diagram of the LM565 PLL.
8.1
The PLL as an FM Demodulator
Because they can excellently track the frequency variations of a frequency modulated input
signal, PLLs are often used as FM demodulators ([17]). Of course, the PLL is only useful as
an FM demodulator when it remains locked on its input signal. Thus, the most important
aspect of any PLL-based FM demodulator is the ability of the loop to remain in lock for
113
02
all conditions of modulation.
Understanding what it means for the loop to remain in lock requires a careful analysis
of the PLL's dynamics. With the loop filter shown in Figure 8-2, [10] indicates that the
LM565 has a closed loop transfer function given by
where
T1
= R 1 C1 and
T2
02(S)
KOKD(sT2 + 1)(T1 + T2)
01(s)
s2
+s12+Or2KOK + KOKp
9
= R 2 C 1 . Applying the final value theorem to Equation 8.1 shows
that there is a steady state error that results from a step change in the input frequency (i.e.
a ramp change in the input phase). If that steady-state phase error becomes larger than
900, lock will be lost. Thus, the 565 loop must be carefully designed so that the phase error
does not go beyond 900 for any modulation condition.
R
VPD,out
2
VVCOn
Figure 8-2: Loop filter used in the FM demodulator.
Reference [10] outlines a process for designing sinusoidal FM demodulators with the
LM565 so that the peak steady-state phase error remains less than 90'. For an FM system with the characteristics listed in Table 8.1, that process results in the creation of the
demodulator shown in Figure 8-3. The values of the components used in that circuit are
listed in Table 8.2
8.2
The PLL as a Frequency Synthesizer
Frequency synthesis is an excellent application of the phase-locked loop. The model of a
PLL which is intended for such a purpose is shown in Figure 8-4. It is clear from this model
that the frequency division factor in the feedback path ensures that the output frequency is
114
Table 8.1: Specifications for the FM demodulator system.
Specification
Center Frequency (w,)
Maximum Deviation
Deviation Ratio (m = g)
Value
300kHz
±8%
4.8
10kHz
-3dB Bandwidth
Table 8.2: Values of the components used in the FM demodulator system.
Component
Value
CIN
1nF
lnF
Cs
54nF
1nF
330
C1
CO
R2
Ro
0 - 50kQ
560Q
RIN
N times the the input frequency. Thus, with a large N, it is a simple matter to synthesize
a very high frequency signal.
In the example frequency synthesizer discussed here, an LM565 has been used to create
a 100kHz output signal from a 10kHz input signal. Because the LM565 does not have
an on-chip divider, the circuit uses a DM74C90 decade divider IC in the feedback path.
Additionally, a high-frequency, AD8055-based buffer has been added after the VCO output
so that the divider is driven from a low-impedance point.
The final circuit is shown in
Figure 8-5, and the values of all of its components are listed in Table 8.3.
115
-VEE
CIN
L
1
+ 0RIN
VIN
RIN
RIN
2
2
M
3
5
4
5VCC
10
5
C
CO
98
7
16
R2
RI
C
C
1,
VOUT
Figure 8-3: Schematic of the FM demodulator circuit.
01-
Phase
Detector
I
Loop
Filter
-+
VC-
Divide
By N
Figure 8-4: Phase-locked loop model with a divider in the feedback path.
116
0
-VEE
CIN
+ O-dfI
VIN
RIN
RIN
-L
1
L
2
M
3
5
6
5
4
10
5
CIN
VCC
6
9
17
8
I
CI
14 11 10
DM74C90
1 2 3 5 6 7
+1
RB
VCC
it-
VCC
Figure 8-5: Schematic of the 100kHz frequency synthesizer.
Table 8.3: Values of the components used in the 100kHz frequency synthesizer.
Component
Value
CIN
100nF
1nF
lOOnF
680pF
110
Cs
C1
Co
RB
RO
Rol
RIN
0 - 50kQ
lkQ
1-kQ_
117
118
Chapter 9
Conclusions
This thesis has presented a potpourri of communications-related circuits. This chapter attempts to explain how to use these circuits to form the laboratory portion of an introductory
course on RF systems.
9.1
The Meaning of Radio-Frequency
Before delving into a discussion of how to form a class from this thesis, it is important to
step back and look at just what is meant by the term "radio-frequency." The experienced
engineer is quick to note that such a term is typically reserved to describe circuits operating
at much higher frequencies than those encountered here. Despite that fact, the circuits
presented in this thesis are all based on the same concepts used in true RF systems. It is
those concepts, not the actual circuits, that this thesis is attempting to introduce.
The reason for avoiding radio frequencies in this project was one of practicality. Circuits
operating at radio frequencies are greatly affected by parasitic capacitance.
Thus, such
circuits are usually built on printed circuit boards (PCBs). Of course, the logistical and
financial chaos that would result from the use of PCBs for seven labs in an introductory
course is obvious. For that reason, the operating frequencies were kept low enough that all
circuits could be reliably constructed on a breadboard.
119
9.2
One Possible Implementation of an RF Design Course
The seven sets of laboratory experiments presented previously have been specifically chosen
and deliberately ordered. The experiments begin by assuming that students understand
only the basic topics encountered in introductory circuit analysis courses. After that point,
the experiments become progressively more difficult.
The underlying goal of this entire project has been to present circuits that students
can easily design and analyze on their own. Where possible, great effort has been made to
focus upon design over analysis. In those circuits where design is clearly an option, a set of
specifications has been presented. Those specifications could easily be given in a laboratory
handout. Students would be expected to use those specifications to create circuits similar
to the examples presented here.
In the cases where design is not a very strong option, the focus has been placed upon
analysis.
This is true in numerous applications, such as in the AM radio experiments
presented in Chapter 4. In these exercises, it is wise to tell students exactly what to build
and to ask them to analyze their final circuits so that they can explain their measurements.
That process should ensure that even the best students are thoroughly challenged.
Whether through design or through analysis, a study of the circuits presented here
should perform the task of making students better engineers. For that reason, this thesis
has not been entirely focused on concepts used only in RF systems.
For example, this
document has discussed transistor amplifier design, second-order system implementation,
and feedback analysis. Hopefully, a course based on the circuits presented here will only
whet the appetite of many young electrical engineering students.
9.3
Future Work
Although the circuits discussed in this document could easily provide most of the material
for a an introductory RF course, more work is needed to form a complete introduction. In
particular, this thesis has not dealt at all with the important topic of antennas.
The rationale for including antennas is two-fold. First, there is the obvious reason that
no student should leave an RF course without a fundamental understanding of how to
broadcast signals from a transmitter to a receiver. The other reason, however, is not quite
so obvious, and it is only seen by taking a quick look at the physics of an antenna. Since
120
electromagnetic theory dictates that the simplest antennas be at least a quarter wavelength
long, students would have to be working with true radio frequency signals in order to make
antennas of a reasonable length. Thus, a lab intended to introduce antenna concepts would
also present the opportunity to introduce students to circuits operating at frequencies above
100MHz.
121
122
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