Real-time 3-d Localization using
Radar and Passive
Surface Acoustic Wave Transponders
by
Jason Michael LaPenta
@
Submitted to the Department of Media Arts and Sciences,
School of Architecture and Planning
in partial fulfillment of the requirements for the degree of
Masters of Science
at the
MASSACHUSETTS INSTITUTE OF TECHNOLOGY
August 2007
~
2007. All rights reserved.
Massachusetts Institu f ecinzo
A uthor ...........................
Depart'ment of Media Arts and Sciences,
School of Architecture and Planning
Agnt
Certified by.
1 1 th,
2007
.................
Professor Joseph A. Paradiso
MIT Media Laboratory
ThesiyuuefvW
Read by.
Prof4sor Henry I. Smith
Department of Electrical Engineering & Computer Science
I
..
TfiesisReade
Read by.
Principal Research Scientist V. Michael Bove, Jr.
MIT Media Laboratory
The s Reader
Accepted by.......
I
MSSCHPUSETS NSTITE
OF TECHNOLOGY
4I 2007
RSEP
LIBRARIE
iUi
.....
D V,.b Uy .R
Chairperson, Departmental Committee on Graduate Students
Program in Media Arts and Sciences
ROTCH
2
Real-time 3-d Localization using
Radar and Passive
Surface Acoustic Wave Transponders
by
Jason Michael LaPenta
Submitted to the Department of Media Arts and Sciences,
School of Architecture and Planning
on August 1 1 th, 2007, in partial fulfillment of the
requirements for the degree of
Masters of Science
Abstract
This thesis covers ongoing work into the design, fabrication, implementation, and
characterization of novel passive transponders that allow range measurements at short
range and at high update rates. Multiple RADAR measurement stations use phaseencoded chirps to selectively track individual transponders by triangulation of range
and/or angle measurements. Nanofabrication processes are utilized to fabricate the
passive surface acoustic wave transponders used in this thesis. These transponders
have advantages over existing solutions with their small size (mm x mm), zero-power,
high-accuracy, and kilohertz update rates. Commercial applications such as human
machine interfaces, virtual training environments, security, inventory control, computer gaming, and biomedical research exist.
A brief review of existing tracking technologies including a discussion of how their
shortcomings are overcome by this system is included. Surface acoustic wave (SAW)
device design and modeling is covered with particular attention paid to implementation of passive transponders. A method under development to fabricate SAW devices
with features as small as 300nm is then covered in detail. The electronic design of
the radar chirp transmitter and receiver are covered along with the design and implementation of the test electronics. Results from experiments conducted to characterize
device performance are given.
Thesis Supervisor: Professor Joseph A. Paradiso
Title: MIT Media Laboratory
4
Biography
Jason LaPenta received his B.S. in Electrical engineering from the University of Illinois in UrbanaChampaign (UIUC) in January of 2001. He specialized in control systems and worked at a research assistant on vision tracking projects. While
at UIUC, Jason's summers were spent interning at
Philips Semiconductors (Zhrich, Switzerland), Boeing (Seattle, Washington), and Procter and Gamble
(Cincinnati, Ohio). After graduation, Jason worked
for five years in the control systems group at MIT Lincoln Laboratories on such
projects as the Mars laser communication experiment.
Jason left Lincoln Laboratory in 2005 to pursue graduate research at the MIT
Media Laboratory in the Responsive Environments Group headed by Professor Joseph
Paradiso.
While that demands of graduate school leave little free-time, when available Jason
enjoys Underwater Hockey, caving, kayaking, sailing, and woodworking.
6
Acknowledgments
This thesis, and all the wonderful opportunities I have had at MIT were possible
because of my adviser Professor Joe Paradiso, the Responsive Environments Group,
and the Media Laboratory community. Without professor Paradiso's commitment
to this project, especially obtaining the substantial resources necessary, none of this
work would have been possible. I would like to especially thank Professor Paradiso
for all of the hard work put into this project.
Microfabrication would have been an insurmountable obstacle without the generous support and dedication of the faculty, scientist, students, and staff of the Experimental Microfabrication Laboratory (EML), Nanostructure Laboratory (NSL),
and Research Laboratory of Electronics (RLE). From the very first day I stepped
into a fabrication laboratory, knowing absolutely nothing about applied fabrication,
Kurt Broderick patiently mentored me through every step of fabrication to realize
my first operational devices. I want to thank all the people at the the Nanostructures
Laboratory, who demonstrated a truly exceptional level of collaboration, helpfulness,
and openness that I'm am very lucky to have been a part of. Laboratory directors
Professor Karl Berggren and Professor Hank Smith provided invaluable insight into
many of the fabrication problems I encountered. Their hard work and dedication provided the laboratory, tools, and environment of collaboration essential to fabricating
my high-frequency devices. James Daley worked very hard to keep all the temperamental laboratory machinery running smoothly and promptly provided me with all
the supplies and processing I needed. Many long hours were spent by Mark Mondol
checking and writing my designs using the VS-26 SEBL tool and teaching me to use
the Raith-150 SEBL tool. Whenever I had a quick question, Tim Savas would drop
what he was doing to answer and show me the proper methods. In consulting with
Tim I learned a lot about practical fabrication considerations that are only learned
in application. There are too many students who helped me in NSL to mention here,
though I greatly thank all of them and the NSL community.
Daniel Smalley, a friend and fellow Media Arts and Sciences graduate student, gave
an enormous amount of advice during our many discussions of our similar projects. I
would like to thanks Daniel for the countless hours of conversation through which his
suggestions and insights saved even more hours of work. A special thanks to Roshni
Cooper, the undergraduate research assistant whose hard work implementing the user
interface and FPGA code allowed me to focus on fabrication while collecting data.
And I especially thank my wife Cindy for all she has done during the most demanding time of my life.
Contents
1
2
23
Introduction
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. .30
1.1
Analysis
1.2
M otivation. . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . .
34
1.3
Related Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
35
39
Surface Acoustic Wave Devices
. . . .
2.1
Properties of Lithium Niobate.. . . . . . . . . . . . . . . .
2.2
Modeling........ . . . . . . . . . . . .
2.3
D esign . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . .
. . . . . . . ...
42
43
48
57
3 Micro-Fabrication
3.1
Mask Design and Layout . . . . . . . . . . . . . . . . . . . . . . . . .
3.2
Substrates.
3.3
Substrate Preparation and Cleaning...... . . . . .
3.4
Lithography..... . . . . .
.
...........................
. . . . . . . . . . . .
. . .
62
. . ...
69
. ...
71
. . . . . . . . .
74
. . . . . . . . . .
76
3.4.1
Photoresists........ . . . . . . . . . .
3.4.2
Coating . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
77
3.4.3
Contact Lithography . . . . . . . . . . . . . . . . . . . . . . .
78
3.4.4
Conformable Vacuum Mask Lithography
3.4.5
Scanning Electron Beam Lithography . . . . . . . . . . . . . .
9
. . . . . . . . ...
79
80
3.4.6
Exposure
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.4.7
Resist Developing...... . .
. . . . . . . . . . . . . . . .
3.5
D escum
3.6
Deposition...................
... .... .
3.7
Lift-off and Etching
. . . . . . . . . . . . . . . . . . . . . . . . . . .
3.8
Mounting/Packaging...... . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . ..
. . . . . . . . .
4 Electronic Design
85
86
88
90
96
99
4.1
System Architecture........... . . . . . . . . . . . .
. . ..
102
4.2
Analog Components and Test Equipment.. . . . . . . . .
. . . . .
106
4.3
Impedance Matching............ . . . . . . . . . . . . .
. .
111
4.4
SAW Filter Measurements......... . . . . .
4.5
SAW Transponder Measurements..............
4.6
FPGA Hardware Description........... . . .
4.7
Softw are . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . .
.. .
. . .
113
. ..
115
. . . . ..
116
5 Testing and Characterization
6
82
123
127
5.1
SAW Device Ox2C9 . . . . . . . . . . . . . . . . . . . . . . . . . . . .
127
5.2
SAW Device Ox2E8 . . . . . . . . . . . . . . . . . . . . . . . . . . . .
133
5.3
SAW Device OxOE3 . . . . . . . . . . . . . . . . . . . . . . . . . . . .
135
Conclusion
137
Bibliography
141
A Lithography Masks
151
A.1
Mask 1 Generation Scripts....... . . . .
A.2 Mask 2 & 3 Generation Scripts..... . . . .
10
. . . . . . . . . . . . .
151
. . . . . . . . . . . .
178
B Fabrication Processes
B.1 Device Fabrication Process Details
B.1.1
Cleaning. . . . . . . . . . . .
189
. . . . . . . . . . . . . . . . . . . 189
. . . . . . . . . . . . . . . . 189
B.1.2 Lithography . . . . . . . . . . . . . . . . . . . . . . . . . . . . 191
B.1.3 Lift-Off and Etching . . . . . . . . . . . . . . . . . . . . . . . 194
B.1.4 Vacuum Mask Fabrication . . . . . . . . . . . . . . . . . . . . 196
B.1.5 Raith 150 Operational Procedure . . . . . . . . . . . . . . . . 198
C OAI documentation
205
C.1 Housing Drawings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 205
C.2 Mask Chuck Drawings . . . . . . . . . . . . . . . . . . . . . . . . . . 214
D Auxiliary Electronics
217
E FPGA VHDL/C/XPS
227
F MATLAB Source Code
257
12
List of Figures
1-1
Notational diagram of three measurement stations tracking a single
SAW transponder....... . . . . . . . . . . . . . . .
. . . . . .
25
1-2 Hypothetical SAW transponder to illustrate the approach taken for
identification and common mode rejection. The IDTs are shown with
phase-shift encoding.
1-3
. . . . . . . . . . . . . . . . . . . . . . . . . .
26
Illustrates the signal flow of RF received and transmitted signal and
27
surface waves, along with the effects of the signal processing. ....
1-4 Macro illustration of signals received by measurements stations at different locations (not to scale either in time or magnitude).
1-5
. . . . . .
28
Digitization scheme for enhanced low-cost identification and timing.
Each digital channel, a or b, represents the thresholded receive signal
at a particular cutoff.
1-6
. . . . . . . . . . . . . . . . . . . . . . . . . .
28
. . .
29
Time measurement to peak of the correlated signal... . . .
1-7 Illustrates the time-of-flight of the interrogation pulse being returned
by a multipath object and a transponder. . . . . . . . . . . . . . . . .
30
2-1
Simplified diagram of basic SAW transponder functional components[1]. 40
2-2
Saw correlator with corresponding code and output pulse waveform.
"time / position" is the waveform over time at a single point between
IDTs, or the waveform over position between IDTs at a particular time.
41
2-3
Illustration of the crystal cut of a 128 -RY wafer[2], with an X-Flat,
from Crystal Technologies Inc...... . . . . . . . . .
2-4
.... ...
. . . . ..
43
SAW filter made with mask 1. Device Ox2C9, 25 finger pairs that are
200pm long........................
2-6
42
Illustration of the crystal cut of a Y wafer [2], with a Z-Flat, from
Crystal Technologies Inc............
2-5
. . . . . . .
.... ..
. ..
44
MATLAB simulation of the normalized impulse response of a 323MHz
SAW band-pass filter shown if figure 2-5... . . . . .
. . . . . . .
45
2-7
Result of an impulse through device Ox2C9 as recorded on an oscilloscope. 47
2-8
Parameters for the design of a SAW IDT in this project.
2-9
The three types of SAW reflectors were implemented on mask 1.
. . . . . . .
. .
48
50
2-10 Narrow-band output correlator with n = 5 Barker code illustration. .
50
2-11 Narrow-band output trace for figure 2-10.
51
. . . . . . . . . . . . . . .
2-12 Narrow-band output correlator with code [1, 1, 1, 0,1 1,1,1,1, 1] utilizing one finger-pair encoding............ . . . . .
. . . . .
52
2-13 Narrow-band correlator response for device fabricated on mask 3, shown
in figure 2-12. Generated with nb.m in appendix F.
. . . . . . ..
52
2-14 Wide-band output correlator illustration with n = 5 Barker code with
two finger-pair encoding....... . . . . . .
. . . . . . . . . . . .
53
2-15 Wide-band output trace for figure 2-14.
. . . . . . . . . . . . . . . .
53
. . . . . . . . . . . . . . . . . . . . . .
54
2-16 Wide-band output correlator.
2-17 Wide-band correlator response for device fabricated on mask 3, shown
in figure 2-16. Generated with wb.m in appendix F....
. . . . ..
54
2-18 Dual narrow-band transponder with a Barker code of length five with
a five finger encoding....... . . . . .
. . . . . . . . . . . . . . .
55
2-19 Dual narrow-band transponder's simulated waveform. The "rx signal"
was transmitted by the measurement station and is what the input IDT
sees. The "first response" and "second response" are the waveforms
from each output IDT. . . . . . . . . . . . . . . . . . . . . . . . . . .
55
2-20 Simulation including the effect of surface waves originating from the
output IDTs of the transponder shown in figure 2-18.....
. . ..
56
3-1
Simplified one-step lift-off process. . . . . . . . . . . . . . . . . . . .
60
3-2
Simplified wet-etch process.
61
3-3
Artwork for mask 1 showing a die section.
. . . . . . . . . . . . . . .
63
3-4
Typical layout of a device on Mask 1. . . . . . . . . . . . . . . . . . .
63
3-5
Artwork for mask 2.
65
3-6
Artwork for mask 3 version 2. Bond-pads and leads are on a different
. . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . .
layer than the devices...... . . . . . . . . . . . . . . . . . .
. .
68
3-7
Artwork for mask 3 version 3. . . . . . . . . . . . . . . . . . . . . . .
69
3-8
Micrography of PMMA scum on a quartz light-field mask with chrome. 73
3-9
Typical lithography process steps used in this project. SEBL or contact
printing can be used to transfer a pattern to the photoresist. ....
75
3-10 Spin curve of 3 parts Anisole to 1 part PMMA 950k All. . . . . . . .
77
3-11 Fringe patterns resulting from imperfect contact between mask and
substrate while under vacuum and illuminated with a green monochromatic light. This shows the OAI 77mm chuck with a top-down rubber
gasket over the mask. The mask was 1mm quartz and the substrate
was a 77mm silicon wafer...... . . . . . .
. . . . . . . . . . .
.
80
3-12 Simplified diagram of a SEBL tool. The detector is used for imaging
test particles that are used to adjust for focus, aberration, stigmation,
and write field alignment.
. . . . . . . . . . . . . . . . . . . . . . . .
81
3-13 Micrographs of field stitching problems. . . . . . . . . . . . . . . . . .
82
3-14 Exposure test features allow inspection of focus, dose, and development
parameters...................
...
. . . . . . . . ...
83
3-15 Micrograph of a dose matrix written in 100nm of PMMA on Quartz.
Exposed with the Raith 150 SEBL tool.
. . . . . . . . . . . . . . . .
83
3-16 The top micrograph shows clearing problems with PMMA on Quartz.
The bottom two exposure show improperly cleared (left) and properly
cleared (right) 4im grating of PMMA on Silicon. The darker areas are
PMMA and the light areas are substrate. These exposures were made
with the OAI deep-UV exposure tool in NSL.
. . . . . . . . . . . . .
84
3-17 Developed exposure/developing test features showing the degree of
over/under developing. The left panel shows underdeveloped clearing
problems, and the right panel shows overdeveloping. The center panel
show ideal exposure, with the two boxes coming into perfect contact.
3-18 Changes in width of 1.1pm lines due to developer temperature.
. . .
85
86
3-19 Exaggerated illustration of the effect on resist profile from RIE or
plasma asher descum processes. The top figure is the photoresist profile
after development and before any descum step . . . . . . . . . . . . .
87
3-20 Etch depth vs. time of 106nm PMMA on Si in 02 plasma asher using
50W power and 0.305psi average pressure. Thickness measured with
an ellipsometer.................
. . . . . . . . . . . ...
88
3-21 Results from 2sec of 02 plasma asher and RIE descum methods. The
figures show Cr on Quartz and Cr on PMMA before the liftoff step.
10nm of PMMA were taken off with the 02 asher. 7nm of PMMA
were taken off with the RIE............
.... . . .
. ...
3-22 Effect of off-angle deposition on side-wall coating. . . . . . . . . . . .
89
89
3-23 Micrograph of a problem encounter when depositing 40nm Cr onto
100nm of PMMA on an SiO2 wafer using the NSL evaporation tool. .
90
3-24 Undercut allows solvent to dissolve photoresist and remove metal overlay. 90
3-25 Damage likely resulting from too much sonication (> 1min) during
lift-off. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
92
3-26 Incomplete liftoff problems as a result of too much chrome being deposited. Shows 500nm line-widths with 210nm of chrome on quartz.
The desired thickness of chrome was 100nm. The PMMA thickness
was 250nm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
93
3-27 SEM of bridging caused by poor profile and photoresist that was too
thin for the thickness of metal deposited. . . . . . . . . . . . . . . . .
93
3-28 Illustration of lift-off problems when the metal on top of the photoresist
bridges to the metal on the substrate. . . . . . . . . . . . . . . . . . .
94
3-29 SEM showing a wafer after deposition and before lift-off. The images
of the 100nm gold particles in the bottom left are given as a reference
for im age quality. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
94
3-30 Micrograph showing a patch of incomplete lift-off due to inspection by
the SEM before liftoff to take the image shown in figure 3-29. ....
95
3-31 Test patterns of Cr on Quartz and Cr on PMMA on Quartz. Same
sample as shown in figures 3-29 & 3-30.
. . . . . . . . . . . . . . . .
95
3-32 Show the change in image contrast before and after the etch has been
completed. PMMA was used as a photoresist on top of chrome and
quartz. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
96
3-33 SAW test devices mounted to a package, wire-bonded, and soldered to
a test P C B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4-1
Conceptual measurement station transceiver block diagram.
98
. . . . . 100
4-2
Measurement station FPGA and transmitter block diagram. . . . . . 102
4-3
Photo of NECL clock generator (part number PRL-174ANT-1350) and
NECL to LVPECL logic level translator (part number PRL-460ANLPD). 103
4-4 Photo of Xilinx ML405 evaluation board........ .
. . . . ...
104
4-5 Illustration of signal conversion from digital to RF. . . . . . . . . . . 105
4-6 Photo of analog components from Mini-Circuits@. . . . . . . . . . . . 108
4-7 323MHz antennas made from 16-AWG copper wire and an SMA connector. Used for preliminary isolated indoor tests.
4-8
. . . . . . . . . . 110
RF Network Vector Analyzer test setup for reflectance and impedance
measurements............ . .
. . . . . . . . . . . . . . . ...
111
4-9 Simple L matching network [3, 4]. . . . . . . . . . . . . . . . . . . . .111
4-10 Measured Smith chart on the RF Network Vector Analyzer of a SAW
transponder........... . . . . . . . . . . . . . . .
. . . . . . 112
4-11 RF Network Vector Analyzer test setup for Transmittance measurements. 113
4-12 Measured transmission chart of a SAW filter on the RF Network Vector
Analyzer. Notice the anti-resonance artifact, which is ignored for this
work............. . . . . .
. . . . . . . . . . . . . . . . ...
114
4-13 Setup for transient measurements of a SAW filter using an oscilloscope. 114
4-14 Test setup for SAW transponder measurements. . . . . . . . . . . . . 115
4-15 SAW transponder measurements using antennas. . . . . . . . . . . . . 115
4-16 Block diagram of FPGA PowerPC processor configuration. . . . . . . 119
4-17 Top level block diagram of chirp2 VHDL code. . . . . . . . . . . . . . 120
4-18 VHDL code organizational block diagram of the "chirp2" peripheral
implementing the rocketIO multi-gigabit-transceiver and support FPGA
cores... ...............
...
..
. . .. . .......
4-19 chirp-ui.pl User interface program written in PERL..
.. ...
. . ...
121
124
5-1
Drawing of SAW filter device Ox2C9 . . . . . . . . . . . . . . . . . . . 129
5-2
Frequency response from 50MHz to 1GHz. The pass band is at
322.249MH z. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
5-3
Pass-band bandwidth shown as ~ 20MHz . . . . . . . . . . . . . . . 130
5-4 Smith chart before impedance matching circuit. . . . . . . . . . . . . 130
5-5
Smith chart after impedance matching circuit with 27nH and 10pF. . 131
5-6
Internal reflection between two IDTs in device Ox2C9. . . . . . . . . . 131
5-7
Example of inter-finger reflections within a single IDT. . . . . . . . . 132
5-8
Drawing of SAW filter device Ox2E8 . . . . . . . . . . . . . . . . . . . 133
5-9
The sloped frequency response is due to electromagnetic feed-through[5].
134
5-10 Impulse response of SAW filter Device Ox2E8. The number of cycles
has been labeled (1,10,and 20). Channel Z2 is the zoomed view of
Channel C 2.
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
5-11 Drawing of SAW filter device OxOe3 . . . . . . . . . . . . . . . . . . . 136
5-12 The four cycle chirp response of device OxOE3.
Channel Z3 is the
zoomed view of the first reflection on Channel C3. . . . . . . . . . . . 136
B-1 Illustrates the process for making devices by first writing a pattern to a
1mm quartz mask master, then transferring the pattern using contact
lithography to a conformal mask, and finally patterning the lithium
niobate substrate to make the desired devices. . . . . . . . . . . . . . 196
C-1 OAI deep-UV aligner radiation shield.
Made from Standard Cast
Acrylic, 0.236inch thick Clear with Bronze Tint, McMaster part numbers. 8505K921, 8505K941, and 8505K951. . . . . . . . . . . . . . . . 206
C-2 OAI 3inch chuck assembly. . . . . . . . . . . . . . . . . . . . . . . . . 214
C-3 OAI 3inch chuck assembly. . . . . . . . . . . . . . . . . . . . . . . . . 215
D-1 Analog test board. Holds SAW test package, low-noise amplifiers, and
power regulators...... . . . . .
. . . . . . . . . .
. . . . . . . . 217
D-2 Closeup of one low-noise amplifier channel. . . . . . . . . . . . . . . . 217
D-3 PCT top-side silkscreen.............. . . . . . . . .
D-4 PCB top-side metal layer..... . . . . .
. . . . 218
. . . . . . . . . . . . . . 218
List of Tables
1.1
Comparison between widely used localization systems and SAW transpon-
der [6, 7, 8, 91. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
36
3.1
Steps to convert a file to .kic for use on the VS-26. . . . . . . . . . .
66
3.2
Processing costs and time estimates to process one mask with lift-off.
This does not include meteorology......... . . . . . . .
.. .
3.3
Suppliers and specifications of substrates used. *Amorphous SiO2 .
4.1
Components used in this project that were purchased from MiniCircuits
67
.
70
... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
5.1 Specifications for device 0x2C9
. . . . . . . .
5.2 Specifications for device Ox2E8
. . . . . . . . 133
5.3 Specifications for device OxOE3
. . . . . . . . 135
B.1 Alconox" cleaning procedure.
128
. . . . . . . . . . . . . . . . . . . . . . 189
B.2 Ultrasonic cleaning with Acetone. . . . . . . . .....
. . . . . . .
190
B.3 Piranha cleaning procedure. . . . . . . . . . . . . . . . . . . . . . . . 190
B.4 RCA or standard clean 1 (SC-1) procedure.
B.5 Photoresist coating procedure.
. . . . . . . . . . . . . . 190
. . . . . . . . . . . . . . . . . . . . . 191
B.6 Exposing using the EML high-resolution MJB3 aligner.
. . . . . . . 192
B.7 Exposing using the NSL OAI. . . . . . . . . . . . . . . . . . . . . . . 192
B.8 PMMA development procedure.. . . . . . . . . . . . . . .
. . . . 193
B.9 NR7-1000P development procedure. . . . . . . . . . . . . . . . . . . . 193
B.10 Lift-off of PMMA.
. . . . . . . . . . . . . . . . . . . . . . . . . . . . 194
B.11 Lift-off of NR7-1000P............. . . . . . . . . . .
. . . . 194
B. 12 Etching chrome to fabricated a patterned mask..... . . . . .
B.13 Process steps for making a conformal mask.
. . 195
. . . . . . . . . . . . . . 197
D.1 Parts list for test board. . . . . . . . . . . . . . . .
. . . . . . . . 219
Chapter 1
Introduction
Unhindered localization of objects is desirable for many applications from human
computer interaction to product tracking to security. Many researchers and companies
have sited tracking of people with special needs, prisoners, or workers in hazardous
situations as useful applications of localization[10].
What this project proposes is
the use of Surface Acoustic Wave (SAW) devices engineered in a particular fashion to
function as transponders for a distributed radar tracking network. The radar network
would track the location of the SAW transponders in 3-d with an update rate on
the order of 10kHz with 10cm accuracy. Improvements over these estimations are
conceivable in an optimized implementation. A patent application covering the work
in this thesis was filed on March
7 th,
2006 under the title "Real-time ranging and
angle measurements using Radar and Surface Acoustic Wave Transponders."
This thesis covers all of the work completed to date on this project. While ranging
results have not yet been obtained, a lot of important progress and experience has been
garnered. About two to four months of work remains before initial results are ready.
The approach taken for the overall system is covered. The transponder design progress
that has been made to date is given as well as future plans for investigation. Micro-
CHAPTER 1. INTRODUCTION
fabrication of the devices is extensively covered, however processes for 1.1pm linewidths have not yet been attained (we are only two to three weeks from fabrication
of working 1.1pm devices). The development of a measurement station is underway.
The FPGA programs, firmware, and approach are described in detail. Analog RF
circuits have been constructed, and recent results will be discussed. There is some
work that was done for this project that will not be discussed and is as follows;
An analog time-to-digital converter was designed and built, but is impractical and
unsuited for time-of-flight ranging in this project.
Analog circuits were built to
generate a chirp before the FPGA was available. A low-noise amplifier was designed,
analyzed, extensively simulated, and built; the details of this amplifier have been
left-out because the design is being debugged.
There are two major components of this system; the SAW transponder and the
radar measurement station.
A SAW transponder reflects a short pulse of received RF energy back to the measurement station as a phase-encoded pattern of data. An arrangement of correlators
and impedance-modulated reflectors on the surface of the SAW transponder return
encoded data patterns back to the antenna for retransmission to the measurement
station. Several published techniques for selection, identification, and encoding of
data with the tags will be applied as well as some novel designs. [11, 12, 13]
SAW devices were originally developed in the 1960's[5, 14, 15]. Their function is
based on the principle of generating surface acoustic waves in a piezoelectric substrate.
SAW devices are extensively used as passive narrow-band-pass filters in commercial
communications equipment such as cellular telephones. Innovation continues with
the use of SAW devices for RF-ID applications[12, 16, 17, 10]. The unique properties
of SAW devices theoretically makes them an ideal technology for this novel real-time
tracking solution.
Radar has been utilized for decades to track a multitude of targets such as aircraft, weather patterns, and cars. Active transponders assist radar identification by
responding with an encoded signature. This allows the radar to determine exactly
what object is being tracked. Transponders are used in almost all airplanes to aid air
traffic controllers in identification [18, 19].
V
Antenna
measurement
station
transponders
optional
measurement
stations
return
(x,,Y,.z,)
signals
interrogation
signal
X
a
Figure 1-1: Notational diagram of three measurement stations tracking a single SAW
transponder.
Each radar measurement station will measure time-of-flight and/or angle of arrival
of the signal returned by the SAW transponder, figure 1-1.
Simple triangulation
calculations are performed on the data from three or more measurement stations to
localize a tag. Only one measurement from all of the measurement stations, either
time-of-flight or angle-of-arrival, is necessary to localize. However, using more than
the minimum necessary signals will improve accuracy.
For the simplified system
described in this work, the location of the measurement stations must be fixed and
known by the algorithm.
Figure 1-2 shows a simplified saw tag with phase encoding used to illustrate the approach we intend to take. The inter-digital transducers (IDTs) convert the electrical
CHAPTER 1. INTRODUCTION
Figure 1-2: Hypothetical SAW transponder to illustrate the approach taken for identification and common mode rejection. The IDTs are shown with phase-shift encoding.
energy into a surface wave (details will be covered in chapter 2). A SAW transponder must be selective to a particular signal, thus the phase encoding. To enhance
signal-to-noise and reduce background radar clutter, a built-in delay between the
received signal and retransmitted signal must be implemented. A mechanism must
also be provided to compensate for effects of temperature on the surface velocity of
the SAW device. In this example three different IDTs implement the phase encoding.
The codes for this example are very short (five and six bits in length). An actual tag
would have up to 128bit code lengths. This particular tag has different receive and
transmit codes.
The distance between the IDTs builds in a delay between when the radar signal
is received and retransmitted. In this case, IDT 1 has been designed to be selected
by the radar chirp from the measurement station, while IDTs 2 & 3 do not correlate
to this signal. Because the distance between IDT 1 and IDT 2 is different than the
distance between IDT 1 and IDT 3, and the propagation speed is the same, the time
between them may be used to take out common mode surface velocity variations.
ADT
-v
c
received signal
7
r~%,
dominant surface signal
SAW wave from coded lODT/
,,~7
~AWtransponder
second transmitted signal
first transmitted signal
Figure 1-3: Illustrates the signal flow of RF received and transmitted signal and
surface waves, along with the effects of the signal processing.
The various signal processing at the different places along the transponder are
illustrated in figure 1-3. For the following discussion secondary reflections and uncorrelated signals are not accounted for. Chapter 2 will cover secondary reflections as
well as other higher-order effects. The signal received by the transponder's antenna
from the measurement station in this example is a Barker code[5, 14]. A Barker code
correlated by the proper IDT will create a SAW pulse with unity side-lobes. Other
codes are generated pseudo-randomly and the simulated and selected for acceptable
side-lobe attenuation[14]. In this case only IDT 1 correlates to this received code.
IDTs 2 & 3 do not correlate and launch only a small surface wave. When the surface
wave launched by IDT 1 reaches IDT 2 & 3 the transponded signal is transmitted as
a convolution of the surface wave and the phase encoded IDTs. This waveform is represented below their respective IDTs. In this case the same waveform is transmitted
28
CHAPTER 1. INTRODUCTION
by both IDTs, but they may have different encodings if desired.
4-
interrogation chirp
primary measurement station
secondary measurement station
time
Figure 1-4: Macro illustration of signals received by measurements stations at different
locations (not to scale either in time or magnitude).
The transmitted and transponded signals may be received by multiple measurement stations. Each additional measurement station would relay the station's position and the time measured from the interrogation chirp to the received signals to the
primary measurement station. Figure 1-4 shows the temporal waveforms from two
measurement stations. The primary measurement station in this example is further
away from the transponder than the secondary measurement station.
analog signal
a. b
digital a.
t=ta
time
Figure 1-5: Digitization scheme for enhanced low-cost identification and timing. Each
digital channel, a or b, represents the thresholded receive signal at a particular cutoff.
Figure 1-6: Time measurement to peak of the correlated signal.
The approach taken to accurately measure the time delay is illustrated with figures
1-5 & 1-6. The waveform will be measured by clipping and digitizing the received
signal at high-speed.
The digitized waveform will be captured using the multi-
gigabit-receiver (covered in section 4.6). In this example, one digitization channel is
used to capture data at two times, represented by (a.) and (b.) in figure 1-5. The
digitized waveforms are then auto-correlated to the expected waveform as calculated
using a SAW transponder model[20].
The correlated output waveform may look
like the one presented in figure 1-6. The correlated waveform will have a peak and
that time displacement measurement will be used to derive the time-of-fight for
triangulation. Pseudo-random transponder codes will be selected for auto-correlated
signals that have significant correlated peaks to allow for improved signal-to-noise
performance. The time measurements from the different digitized channels will be
approximated into one measurement by averaging the results. Of course, what is
achievable in practice depends on many factors, some of which are the signal-tonoise ratio of the sampling circuitry, operating environment, multipath effects, and
interference of other tags.
CHAPTER 1. INTRODUCTION
1.1
Analysis
(1340ns)
(1005ns)
(670ns)
a gm
station
ili
ili
object
tag1
(335ns)
Om
multi-path
(670ns)
loom
distance(time)
200m
Figure 1-7: Illustrates the time-of-flight of the interrogation pulse being returned by
a multipath object and a transponder.
The following is a simple analysis of the requirements and expected performance
of the proposed system. The limiting factors for how fast a tag's position can be read
is the maximum distance to a tag and the read-out
/
read-in time. For a maximum
range of 100m, the round trip time for a pulse is 2 - 100m C = 670ns, where c is the
speed of light. To allow for background radar clutter to dissipate, a delay is added
to the maximum round-trip time. For all signals within 200m to dissipate, we need
a total delay of lps before the SAW transponders return the signal. Thus the total
delay between the time the radar chirp is transmitted and the return signal is received
must be at least 1.3ps. A 32-bit code at 2.4GHz will take 13ns and considering the
returned signal is a 64-bit convolved waveform, the total time for both is only 40ns.
Using three measurement stations with one transmitting and two listening, a single
update can take place in 1.4pis, or at a rate of 700kHz. This is a very impressive 3-d
localization rate in terms of available technology. Resolution improvements could be
attained by integrating the result over time.
The demonstration system will be shifting received data in at a rate of 2.4GHz.
Two phase-locked multi-gigabit-transceivers (explained in section 4.6) channels will
be used to double the sampling rate, thus satisfying Nyquist to achieve 2.4GHz
1.1.
ANALYSIS
overall. A very stable clock with 100ppm stability over half an hour drives the receiver,
which has no significant effect on range measurements. The peak-to-peak clock jitter
is
2 0 ps,
which results in an error of 3mm. Given the round-trip time to and from the
target is measured, a factor of two advantage is realized. The best achievable range
resolution given the hardware available to us would then be:
1
1
f
2.4-109
2c- = 2 - 3.8 - 108
= 6.25cm
(1.1)
Temperature effects on the surface wave velocity of the transponder is a concern.
The properties of LiNbO3 , including temperature dependent effects, will be discussed
in more detail in chapter 2. For the purposes of this example, a typical SAW substrate has a characteristic surface velocity of 3992m/s and temperature coefficient
of 75ppm/C. Effect due to temperature changes may be compensated for through
measurement and calibration.
To analyze the performance improvement with temperature measurement compensation consider the dual reflector configuration.
The amount of error for the
will be calculated first as a comparison for the com-
uncompensated design,
euncomp,
pensated error, ecomp.
For the 100m maximum range, a delay of di = 670ns will
be required (Refer to figure 1-7). As a starting point, a d 2 = 100ns delay between
the temperature measurement dual reflectors will be chosen. Assuming a temperature discrepancy between the measurement station and the SAW transponder to be
terror
= 10"C(a very conservative estimate), the approximate error in the distance
measurement would then be;
dv
= Vsubterrortcoeff
= 3992-
=3s
10"C - 75 P
(1.2)
CHAPTER 1. INTRODUCTION
Where
Vsub
is the substrate surface velocity of 128 LiNbO 3 , and tcoeff is the associated
temperature coefficient[5]. With a surface length between the input IDT and the first
reflector of
1=
d1
Vsub '
(1.3)
= 3992m/s - 670ns
= 2.7mm
lending to a distance measurement error of approximately;
euncomp =
'*
1d-
(Vsub
-v
- 670ns -
= 3
[67
2.7mm
(3992m/s - 3m/s) 1
(1.4)
= 151mm
An error of 15 1mm is decent, and probably much worse than what would be
expected under normal conditions. However, such an error would be a significant
degradation of achievable performance. As briefly discussed at the beginning of chapter 1, a multi-reflector scheme will be used to determine the temperature of the
SAW transponder. Several schemes for using SAW transponders to measure temperature and or compensate for temperature have been developed and implemented
by others[21, 22]. By using temperature compensation methods much better results
should be attainable. SAW transponders have been demonstrated to measure temperature with a resolution of 0.02"C[21]. With such precise temperature measurements
the error due to temperature may be reduced through compensation to;
dv =
Vsubterrortcoeff
=3992
.
s
= 6 mm
s
0.02 0C - 75 0C
oC
(1.5)
1.1. ANALYSIS
lending to a distance measurement error of approximately;
ecomp= C.
=
3 -108.
=
0.3mm
-
(Vub
670ns 1
dv)]
2.7mm
(3992m/s - 6mm/s)_
(1.6)
Therefore, with only 0.3mm of error due to temperature effects, they can be safely
ignored for the application and design discussed in this thesis.
Given we are using a low-cost FPGA to digitize the received signal, measuring
temperature will be a problem. By utilizing the fast oscilloscope we will be able to
measure the temperature accurately enough to prove the concept. Later more capable
receiver electronics will be designed to create a cost-effective independent solution.
Another issue with system utilizing RF for tracking is the degradation and spoofing due to multipath[18]. The 2.4GHz carrier frequency is susceptible to multi-path
in environments where the transponder does not have line-of-sight to all the measurement stations. The problem of accurate localization becomes one of observability,
which is out of the scope of this thesis. There several approaches that would help with
mitigating effects of multipath such as positioning or adding measurement stations or
implementation of Kalman filtering or estimation techniques[23, 24, 25, 26, 27, 28, 29].
By using the same correlation techniques explained at the beginning of this chapter
and in section 2.3, multiple echos due to multipath can be detected and corrected
for[19]. Continuing work after the basic goals of this project are met will include implementation and research into algorithms that exploit system state and constraints
to mitigate the effects of multipath.
CHAPTER 1. INTRODUCTION
1.2
Motivation
Probably the most lucrative application for a passive localization system is asset,
people, and/or animal tracking. The ability to locate products and possessions in
real-time and 3-d will improve security and retrieval of items with significant improvements over existing technologies, such as RFID.
Encoding human body motion is an example of a dynamic application which illustrates the utility of 3-d tracking[30]. Traditionally body motion has been recorded
with vision instrumented rooms[31], inertial measurement units (IMU)[32], or ultrasonic sensors[33]. A person wearing chip-sized SAW transponders sewn into the
wrists, ankles, and joints of their clothing would have their body motion tracked in
real-time. Such encoding could be used for a variety of human computer interfaces.
Two of the many applications which this system is uniquely suited for include allowing unhindered natural motion in a virtual reality environment, training a robot
through intuitive movements, or interactive computer games.
Because of their small size, low-cost, and the ability to use numerous tags, SAW
transponders are well suited for disposable applications such as tracking animals, for
research, or domestic control. An additional benefit of SAW transponders is that
they do not requiring external power and their useful life is virtually unlimited and
maintenance free.
1.3. RELATED WORK
1.3
Related Work
Existing technologies are inadequate for the applications a SAW localization system is
suited for. Ultrasonic transponders are bulky, require a power source, and have limited
line-of-sight and are susceptible to environmental interference. IMUs are bulky, costly,
require a power source, and are limited by drift, bandwidth, and accuracy. A visionbased tracking system requires a carefully controlled environment to ensure line-ofsight and sufficient contrast between the obtrusive visual markers and background
objects. Differential GPS systems are bulky, costly, mainly limited to outdoors, and
have marginal update rates[34]. The key advantages of SAW based transponders is
an unintrusive, robust, and low-cost tracking system with high update rates that can
be deployed with thousand of tags. The applications of localizing SAW transponders
is broad and poorly met by existing solutions.
Many commercial indoor location and tracking systems have been implemented
or are in development.
Chipcon has developed a hardware core that uses signal
strength and bit-error-rate to estimate the relative location of transceivers [35, 34].
A system of using small active tags was developed by Carios for the use of tracking
objects at high-speed, such as soccer balls. An asset tracking system was developed
by Ubisense utilizing ultra-wide-band technology[36]. All of these systems have one
thing in common, bulky active tags, a major disadvantage in comparison to the
passive SAW transponders.
Meaningful quantitative comparisons between the mentioned technologies is difficult as there are many application specific trade-offs which affect performance. A few
of the inherent trade-offs are between accuracy, power, cost, update rate, and effective
range. For simplicity, many assumptions were made while compiling the data shown
in figure 1.1[31]. The best performance as stated from the vendor's documentation
sheet was assumed. Minimal external interference under the best conditions were
CHAPTER 1. INTRODUCTION
uTags
Differential GPS
Vision
Ultrasonic
Radar
1x1 cm
< 2g
$1.00
$5k
< 10cm
1-100kHz
0
1-100m
16x9x17 cm
1.4kg
$lk-$10k
NA
< 5cm(xy), < 10cm(z)
1-20Hz
5W
NA
4x4 cm
<i
$0.30
~ $10k
< 2cm
30-60Hz
0
1-10m
5x5x5 cm
~ 100g
~ $100.00
NA
< 1c,
~ 120Hz
200mW
1-10m
NA
NA
NA
$2k+
meters
1Hz
0
miles
Yes
Yes
no
Yes
Yes
In/Out
In/Out
In
In/Out
Out
Chipcon
Carios
Ubisense
varies
varies
unknown
unknown
2x2x0.5 cm
5g est.
57 EUR
200k EUR
5.8x9.2x1 cm
45g
50 EUR
15k EUR
Resolution
1 - 2m
1 - 2cm
20cm
Sample Rate
Power/Tag
Range
ID
In/Out Doors
varies
100mW
70m
Yes
In/Out
100kHz
70mW-175mW
300m
Yes
In/Out
39Hz
unknown
50m
Yes
In/Out
I
Tag Size
Tag Weight
Cost/Tag
Reader Cost
Resolution
Sample Rate
Power/Tag
Range
ID
In/Out Doors
Tag Size
Tag Weight
Cost/Tag
Reader Cost
Table 1.1: Comparison between widely used localization systems and SAW transponder [6, 7, 8, 9].
implied on some data sheets, and nominal specifications were given by other data
sheets. A comprehensive comparison is out of the scope of this thesis, however table
1.1 illustrates how SAW transponders are uniquely suited for a niche which existing
technologies do not fill.
Design and fabrication of SAW filters and correlators has been extensively researched. The uses of SAW devices is expanding in the area of chemical sensing,
optics, and RFID applications[13, 37, 38]. SAW devices are emerging in such novel
uses as an optical wave-guide scanning system to steer a laser beam using the birefringent properties of LiNbO 3 [39]. Shortly after this project was started companies
producing SAW devices for RFID application started to appear[17, 40]. The market
1.3. RELATED WORK
37
for utilizing SAW RFID technology is relatively untapped, probably for several reason including the amount invested in other RFID technologies, recent developments
in SAW designs, and the prior difficulty in manufacturing and reading SAW devices
in comparison to other technologies. A search of the literature has not yielded any
projects relating SAW transponders to ranging and localization similar to the goals
and methods of this project.
38
CHAPTER 1. INTRODUCTION
Chapter 2
Surface Acoustic Wave Devices
This chapter covers the basic concept of SAW functionality, the approach taken to
model these devices for this project, and an explanation of the device designs implemented on masks 1 through 3. The approach taken to tackle the complexity of this
project was to iterate on design, modeling, fabrication, and testing of SAW devices.
Simple models that were used in the beginning will become more sophisticated and
accurate with each iteration. Using real test data at each step will verify our increasingly sophisticated models and designs, as well as progressively build experience
with fabrication, electronics, and design. Existing methods for encoding data into
the SAW transponders will also be experimented with, but are not the primary focus
of this project.
Acoustic surface waves are a physical, as opposed to electromagnetic, compression
disturbance moving along the surface of a substrate. Visualizing waves on the surface
of a SAW device as ripples on a pond can be helpful with understanding the transient
operation of these devices. Surface waves can be initiated in many ways depending on
the substrate. The SAW devices in this project consists of a piezoelectric substrate
patterned with a thin film of aluminum. When electrical signals are applied to the
CHAPTER 2. SURFACE ACOUSTIC WAVE DEVICES
metal on surface of the piezoelectric substrate, the electric field causes a physical
disturbance. A cyclical electrical field causes ripples to be generated. To magnify the
response, many input features are actuated in resonance for constructive interference
of the waves[5].
The SAW transponders in this project consists of a piezoelectric substrate patterned with a thin film of aluminum. Any type of conductive metal can be used
to make the IDT, however there is a trade-off between adhesion, resistance, and
weight. Some metals have poor adhesion to LiNbO3 . Even though they are very
thin (~ 200nm), the weight of the metal fingers causes signal attenuation and reflections. Aluminum was chosen for reasonable adhesion to LiNbO3 , low mass, and low
resistivity.
substrate
reflectors
bond pad
input IDT
Figure 2-1: Simplified diagram of basic SAW transponder functional components[1].
A notational diagram of the patterning used for a simplified SAW transponder is
shown in figure 2-1. An antenna is connected to the bond-pads which couples the
RF chirp into the transponder. The inter-digital transducer (IDT) is a linear array
of metal fingers which change incident electrical energy from the bond-pads into a
surface acoustic wave on the piezoelectric substrate. This wave travels along at a slow
velocity (in comparison to RF) until reflecting off discontinuities on the path of travel
such as metallic strips of reflectors. The reflected signals return to the IDT and are
retransmitted via the antenna to the base-station. The gap between the IDT and the
first reflector builds in a delay between the incident RF burst to the first reflector,
which allows multi-path clutter to diminish before a rebroadcast, ensuring the base
station receives a clear signal from the SAW transponder [13, 5, 14].
Anytime the surface wave encounters a discontinuity, three things may happen.
Some of the energy in the wave may be reflected, continue on unaffected, or be dissipated. Any pattern of material may cause a disturbance or transformation of surface
waves traveling underneath. Every finger in an IDT or reflector will reflect some of
an incident wave. These reflected waves will then interact with other fingers to repeat
the process until all of the energy has been dissipated. Secondary reflections can be
a significant problem and pose a design challenge by ruining the desired response, or
they may be exploited as part of the design.
Clever designs of SAW patterns allows sophisticated signal processing of the surface wave. Proper design of the patterns will even cause the substrate to steer light[39].
As well as being periodically resonant, SAW patterns are also designed to resonate
to a specific sequence of patterns, as in the case of SAW correlators[5, 14].
RF wave inmatch
surface wave out
RF wave in
time
positio
ie/p
Figure 2-2: Saw correlator with corresponding code and output pulse waveform. "time
/ position"is the waveform over time at a single point between IDTs, or the waveform
over position between IDTs at a particular time.
The design of phase-shift SAW correlators involves alternating the arrangement
of the IDT finger pairs. Figure 2-2 shows a SAW correlator IDT with the respective
matching waveform.
As the waveform enters the IDT, at each cycle each finger
CHAPTER 2. SURFACE ACOUSTIC WAVE DEVICES
pair starts a wave of a certain polarity. These waves constructively or destructively
interact. With the proper input waveform, the total sum of the waves interfering
with each other will give the maximum response, which is launched along the surface
towards another IDT or reflector. The "RF wave in match" in figure 2-2 illustrates
how the input waveform matches to the IDT's finger pair polarity. In this example
the correlated sequence is a Barker code which results in a pulse surface wave with
side lobes of unity magnitude[14, 5]. Design and simulation of SAW correlators will
be covered in is sections 2.2 & 2.3.
2.1
Properties of Lithium Niobate
The design of the SAW devices in this project is limited by the properties of LiNbO3.
Lithium niobate was chosen for several reasons. The high coupling-coefficient, or
the amount of electrical energy transfered to the surface wave, of LiNbO3 is much
better than many other suitable materials[5, 2]. LiNbO3 also has a relatively high
characteristic surface wave velocity. Faster surface velocities enables higher frequency
devices to have larger metal patterns, making fabrication easier.
+z
'
I28drection of propaaton
+y.
Figure 2-3: Illustration of the crystal cut of a 128*-RY wafer[2], with an X-Flat, from
Crystal Technologies Inc.
The crystalline structures of LiNbO3 , constrains the surface waves to move along a
particular direction. Varying the orientation of the crystalline structure with respect
2.2. MODELING
Y0* direction of propagation
+Z
+y.
Figure 2-4: Illustration of the crystal cut of a Y wafer [2], with a Z-Flat, from Crystal
Technologies Inc.
to the surface of the wafer changes the properties of substrate. Some of the properties
affected by the crystalline orientation are the surface velocity, coupling coefficient, and
temperature dependency [14, 41, 2]. The 128*-RY lithium niobate wafer cut has the
best coupling coefficient (K 2 = 5.3%) and surface velocity (3992m/s) with a decent
temperature degradation coefficient (75ppm/*C). All of the devices discussed in this
thesis were made with 128*-RY wafers, though devices were also fabricated out of
Y-cut wafers.
The effects of temperature on the surface velocity of LiNbO3 SAW devices has
been well characterized[5]. Changes in temperature cause a shift in the band-pass
SAW center frequencies of a SAW filter[14, 5].
Most implementations appear to
safely ignore temperature effects. In cases where the surface velocity is critical, some
designs use a heater to control temperature[14]. Some transducers exploit the temperature dependence of lithium niobate to measure temperature[2 1]. For this project,
subtracting out the effects of temperature on the ranging solution will be important.
2.2
Modeling
Accurately modeling a SAW device's response to stimulus is very complicated. Higher
order finger reflections are usually modeled using finite-element-analysis (FEA) or
CHAPTER 2. SURFACE ACOUSTIC WAVE DEVICES
boundary-element-analysis (BEA). Several methods of modeling finger pairs in FEA
or BEA exist, such the P-Matrix, S-Matrix, coupling-of-modes (COM) modeling
methods[5]. FEA and BEA are both computational intensive, time consuming, and
not particularly intuitive. Intuition into the operation of SAW devices is essential
for understanding the effects of design choices.
The design of more complicated
implementations lead to longer simulations, making visualizing SAW responses even
more important.
A simple method of simulation was explored to quickly obtain some experience
with the macro characteristics of SAW behavior. The approach taken estimates the
loss in power resulting from first-order finger reflections given the initial acoustic
waveform. The resulting surface waves are then convolved with the output IDT to
simulate the electrical output generated by the surface waves.
absorption block
200pmr
input IDT
output IDT
Figure 2-5: SAW filter made with mask 1. Device Ox2C9, 25 finger pairs that are
200pm long.
A simple example illustrating simplified modeling is shown in figures 2-6. This is
the simulated impulse response through a SAW filter as designed and implemented
on mask 1, which is shown in figure 2-5. The surface wave response is modeled by a
sine wave in which each finger pair corresponds to one cycle. The magnitude of the
surface wave, at any given point between the two IDTs, decreases with time because
of reflection caused by the input IDT fingers. Another way to visualize this is that
at the moment the impulse couples into the IDT there is a surface wave generated
45
2.2. MODELING
Electrical output at second IDT
Input generated surface acoustic wave
0.8
0.8
0.6
0.6
0.4
0.4
00
(D
=
E
0
N
-0.2
-
CU
E -0.4
C
0.2
-
0.2
E
CU
-0.2
E -0.4
,
C
0
-0.6,
-0.6
-0.8'
-0.8
0
20
40
ns
60
80
0
50
ns
100
150
Figure 2-6: MATLAB" simulation of the normalized impulse response of a 323MHz
SAW band-pass filter shown if figure 2-5.
that spans the IDT with no attenuation of signal. This surface wave travels out from
each IDT finger pair in both directions, and anytime an individual cycle encounters
a finger some of the energy is lost due to reflection and absorption. As the surface
wave couples into the output IDT, further attenuation occurs due to reflections. By
convolving the two waveforms resulting from the geometry of the input and output
IDTs, the electrical signal at the output can be estimated as shown to the right in
m
figure 2-6. The code used to generate this simulation is given in MATLAB appendix
F.
An oscilloscope trace from the actual device corresponding to this simulation is
shown in figure 2-7. The test setup and data collection procedures are detailed in
section 4.4. The first 25 cycles correspond very closely to the simulation, because only
first order effects of finger reflections are dominant. As the surface wave moves further
across the output IDT the secondary reflection start to have a visible impact, which is
why the tail end of the test data deviates from the simulated output. Reflections will
continue to bounce back and forth between the two IDTs, and internal IDT fingers,
until all the surface waves have dissipated. This effect, shown in section 5.1, is also
CHAPTER 2. SURFACE ACOUSTIC WAVE DEVICES
MATLAB 1 : MATLAB source for simulation in figure 2-6
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
% Simple simulation of the impulse
or 25
% of a response 50 fingers
% finger pairs , saw filter
f = 323e6;
% frequency = 323 MHz
w = 2*pi*f;
% omega
p = 1/f;
% period
pairs
fingerPs = 25 % number of finger
% time step is 100ps
t = 0:100e-12: fingerPs*p;
% model input pulse
in-p = (1-t*f/40).*sin(w*t);
% normalize
in-p = in-p./max(in-p);
pulse
% model output
out-p = conv(in-p , in-p);
% normalize
out-p = out-p./max(max(out-p),-min(outp ));
not covered by this model. The purpose of the higher order models is to take into
account multiple finger reflections.
2.2. MODELING
Measuwe
vake
status
PI:freq(C2)
318.1 MHz
A
P2:freq(C3) P3:ddely(C2,...
1.853 GHz
A
P4;freq(C2)
318.1 MHz
A
PS:---
PS:---
P7:- - -
X1-
37.95trs
AX- -lR85lns
-79.90ns -1/&X= -. 485 MHz
X2-
P8:-- -
Figure 2-7: Result of an impulse through device 0x209 as recorded on an oscilloscope.
CHAPTER 2. SURFACE ACOUSTIC WAVE DEVICES
2.3
Design
Only a simplified number of design parameters were specified for the first devices.
The center frequency of the mask 1 designs was primary specification. The complete
frequency response has been ignored for simplicity.
bond-pad
width
line-width
bond-pad
height
length
apodization
rail width
pitch
Figure 2-8: Parameters for the design of a SAW IDT in this project.
Figure 2-8 summarizes the basic parameters for the devices on mask 1. The finger
pitch along with the characteristic surface velocity determines the resonant frequency
of the IDT.
V
AV(2.1)
2 -p
where v is the characteristic surface wave velocity, A is the surface wave-length, and
f is the
center frequency[5].
For the devices with 3pum line-widths, and a pitch of 6pm on a 128 0-RY crystal cut with a surface velocity of 3992m/s, the center frequency is 332MHz. This
differs from the measured center frequency response of 323MHz, which may be due
to secondary effects such as electromagnetic feedthrough, triple-transit-interference,
capacitive effects of the fingers, or the RF-Network Vector Analyzer that we were
2.3. DESIGN
using was out of calibration (the calibration was last done over ten years ago). More
investigation into the discrepancy is underway.
Apodization, or the amount of finger overlap, may be varied to evoke a certain
response from a SAW filter. For example a sinc-function apodization of the IDT will
yield a flat pass-band response. The simple filter devices on mask 1 had constant
apodization.
The number of finger pairs and length of the apodization determines the input
capacitance of the IDT. Capacitance per unit length is a fundamental property of
the particular substrate and crystal cut used. For 128 0-RY cut lithium niobate, the
capacitance per finger pair per unit length is 5pF/cm/finger-pair.Therefore:
Ct = cf - 100(cm/m) - a, - f,
(2.2)
Where C is the total IDT capacitance, cf is the fundamental capacitance per finger
pair per unit length, a, is the apodization in meters, and
f, is
the number of finger
pairs. For device Ox2C9 detailed in section 5.1, a, = 200pm, cf = 5pF/cm/pairs,and
f, =
25 resulting in a Ct of 2.39pF, which is close to the measured input capacitance
of 2.13pF.
The bond pads were made large enough for easy wire-bonding. They were much
larger than necessary in an attempt to mitigate the problems caused by the thin
metal and fragile substrate. The width of the rails only needs to be wide enough to
ensure the signal is not attenuated substantially due to their internal resistance. An
absorption block, see figure 2-5, stops unwanted signals from reflecting back towards
the IDT. The 200pm width chosen was arbitrary for this design. Future designs will
use angled reflectors that won't take up as much device area[14].
Three different reflectors for encoding of the return signature were tried on mask
1, shown in figure 2-9. The "open" reflector had the largest return response of the
CHAPTER 2. SURFACE ACOUSTIC WAVE DEVICES
open
short
interleaved
Figure 2-9: The three types of SAW reflectors were implemented on mask 1.
three designs and was the only design to return a significant signal. Not much time
was taken to characterize the different reflectors for lack of equipment and because
fabricating the 915MHz devices became the priority.
SAW correlators are extensively used in SAW filter and communications applications [11, 12, 13, 5]. Implementation of SAW correlators for encoding was one of
the goals of mask 2 & 3. Several 915MHz narrow-band and wide-band correlator
designs were made, with three of them explained here. To keep this stage of the
project as uncomplicated as possible, secondary effects, such as reflections, have been
ignored in the following examples and corresponding simulations. Secondary effects
will need to be account for in future designs. The Matlab M scripts used to generate
the simulation for the following are located in appending F.
input IDT
output
IDT
1 1 1 0 1
Figure 2-10: Narrow-band output correlator with n = 5 Barker code illustration.
A narrow-band correlator consists of a tightly packed set of IDT fingers for a
continuous code. To encode '0' or '1', the phase of the finger is reversed from one to
2.3. DESIGN
Figure 2-11: Narrow-band output trace for figure 2-10.
another (see the digits under the finger pairs of output IDT in figure 2-10). When
the proper code couples into the input IDT, the resulting SAW waveform will create
a peaked waveform at the output. Multiple finger-pairs may be used to implement
the encoding which increases the total amount of energy in the signals and increases
signal peaking. A simplified narrow-band SAW configuration is shown in figure 2-10
with a Barker code of length five encoding. The proper code received by the input
IDT will result in the signal shown in figure 2-11 at the output. Notice the continuous
nature of the output waveform.
CHAPTER 2. SURFACE ACOUSTIC WAVE DEVICES
input IDT
I
4-- output IDT
Figure 2-12: Narrow-band output correlator with code [1, 1, 1, 0, 1, 1, 1, 1, 1, 1] utilizing one finger-pair encoding.
Figure 2-13: Narrow-band correlator response for device fabricated on mask 3, shown
in figure 2-12. Generated with nb.m in appendix F.
Figure 2-12 shows a design for a narrow-band SAW correlator on mask 1. This
devices has a code that is different from the Barker sets of codes, resulting in a unique
signature to the optimal interrogation code. The expected output is shown in figure
2-13.
2.3. DESIGN
output IDT
input IDT
II|1|
|
|
|
Figure 2-14: Wide-band output correlator illustration with n = 5 Barker code with
two finger-pair encoding.
Figure 2-15: Wide-band output trace for figure 2-14.
A wide-band correlator differs from a narrow-band correlator by interspersing
the phase encoded signal with a delay based on the number of fingers at the input.
When the set of delayed pulses matches the output code the output waveform peaks,
as shown in figure 2-14.
- M111
I
CHAPTER 2. SURFACE ACOUSTIC WAVE DEVICES
input IDT
output IDT
Figure 2-16: Wide-band output correlator.
jwl
q"qr-
i
T
Ah.
"Iqw-
Figure 2-17: Wide-band correlator response for device fabricated on mask 3, shown
in figure 2-16. Generated with wb.m in appendix F.
Figure 2-16 shows the layout of a wide-band SAW correlator on mask 3. The
five finger input does not have an encoding. The output encoding is implemented in
the output IDT. A Barker code of length five was used, which with the correct input
sequence gives the output waveform in figure 2-17.
2.3. DESIGN
input IDT
output IDTs
Figure 2-18: Dual narrow-band transponder with a Barker code of length five with a
five finger encoding.
rx signal
first response
0
rn
second response
400ns
Figure 2-19: Dual narrow-band transponder's simulated waveform. The "rx signal"
was transmitted by the measurement station and is what the input IDT sees. The
'first response" and "second response" are the waveforms from each output IDT.
Measuring and compensating for temperature will be tried with the design in figure
2-18. This dual narrow-band transponder has three IDTs which will give two distinct
responses as explained by the example in chapter 1. An actual implementation would
have all three IDTs connected to the same antenna. They were left disconnected in
this design to allow independent testing of each port. Figure 2-19 shows the expected
waveform when the correct code sequence is received by the input IDT and probed at
the output IDTs. The phase relationship and the distance between the two responses
I
CHAPTER 2. SURFACE ACOUSTIC WAVE DEVICES
56
will be proportional to the temperature of the substrate.
rxsignal
0
first response
second response
400ns
Figure 2-20: Simulation including the effect of surface waves originating from the
output IDTs of the transponder shown in figure 2-18.
Figure 2-19 does not contain the effects of the initial input signal coupling into the
output IDTs in the configuration where all IDTs are connected to the same source
/
antenna. When the input IDTs and output IDTs are connected to a common
antenna (typical for a self-contained transponder), the output IDTs also generate
a signal from the output to the input IDT. This signal combine with the signals
originating from the input IDT to create the slightly distorted waveform shown in
figure 2-20. In the future, designs we will exploit the ability to use all three IDTs
as input and output transducers, to both increase the returned power and enhance
encoding and temperature compensation.
Chapter 3
Micro-Fabrication
Fabricating devices with feature sizes in the rage of micrometers to nanometers
requires specialized sciences, engineering, and a significant degree of art.
High-
resolution processing is carried out in a clean-room facility with a variety of chemical
processing and meteorology tools. The path generally taken to constructing nanostructures as created in this project starts with design and layout of artwork describing the desired features with a CAD tool. A scanning-electron-beam-lithography
(SEBL) tool then writes this CAD artwork into a photoresist on a wafer. The wafer
may be the final substrate or an optical mask used to duplicate the artwork onto
the desired substrate. The photoresist is then developed with a chemical solution
to remove areas of photoresist. The substrate now contains a transfered pattern of
exposed material onto which more material (i.e. metal, oxide) may be deposited or
removed. After the deposition or etching step, the remaining photoresist is stripped
from the wafer leaving the desired features. When the devices are completed, they
are cut up into small rectangles, mounted to packages, and electrical leads are wirebonded from pins on the package to pads on a device. Also note that nanofabrication
may be carried out with processes other than lithography, such as nanoimprint and
CHAPTER 3. MICRO-FABRICATION
atomic force patterning technologies, which use physical means to transfer a pattern
[42, 43].
There are many emerging methods and applications of nanotechnology being developed on a variety of novel custom fabrication tools at MIT. The use of shared
experimental fabrication tools, as opposed to commercial production tools, made developing a processes much more difficult. Many of the tools required a significant
amount of experimentation to yield the desired results.
Adding to existing chal-
lenges, some of the tools would behave differently after other lab users processed with
them. Many factors and a array of processing variables made fabricating working
devices a daunting challenge. As with most research projects, costs vary widely and
are difficult to project ahead of time without significant experience. For this type of
work a typical budget runs between $7000 and $8000 USD per semester. This project
was my first exposure to micro-fabrication, and I have learned an enormous amount
about the field. Topics in this chapter aim to explain all the challenging problems
and their solutions, as well as all the process details that went into fabricating these
devices necessary to reproduce this work.
The devices in this project were fabricated utilizing the resources of several MIT
micro-fabrication facilities. The Nanostructures Laboratory (NSL), directed by Professor Henry Smith and Professor Karl Berggren, provided the high-resolution nanolithography tools necessary to created the 915MHz and 2.4GHz transponders. The
Research Laboratory of Electronics (RLE) provided the shared scanning-electronbeam-lithography facility (SEBL at RLE) to write the high-resolution lithography
masks. The Microsystems Technologies Laboratory (MTL) provided the Experimental Micro-fabrication Laboratory (EML), where the 3pLm devices were fabricated.
Fabrication started in the EML because of the ease of access and reduced cost
while meeting our initial resolution requirements.
A wide variety of experimental
micro-fabrication projects are supported by EML, where the research of over a hundred students is underway. EML is an excellent laboratory to inexpensively develop
processes that don't require a high-degree of cleanliness and have feature sizes greater
than ~ 2[m . Another advantage of EML is that more latitude is allowed for new
processing methods and materials. The tools in EML utilized by this project were
an electron-beam vapor deposition tool, the solvent and acid hoods, a resist coater,
a profilometer, microscopes, and a mask aligning and exposure tool.
NSL is a community of researchers and students who emphasize collaboration and
mentoring, which were invaluable to the progress of this project. The Nanostructures
Laboratory is a cleaner cleanroom that provides the specialized lithography tools
needed to achieve 1. 1pm and 300nm feature sizes. A cleaner laboratory was critical for
conformable vacuum-mask lithography, covered in detail in section 3.4. Conformable
vacuum mask lithography was a more cost effective method of making many duplicate
devices with line-widths as small as 300nm[42]. A plasma asher and ellipsometer were
also utilized in addition to all of the same tools used in EML.
Devices with line-widths of 300nm were required for operation in the 2.4GHz
Instrumentation-Scientific-and-Medical (ISM') frequency band. As a starting point,
323MHz devices with 3pm line-widths were made first for two reasons. Firstly, 3pm
was the minimum resolution reasonably achievable using tools in EML. 3[tm mask
fabrication is also considerable less difficult and less expensive than 300nm masks
fabrication. Many more devices may be patterned on a single 3pm mask at no extra
cost.
Experienced gleaned in learning the 3pm fabrication and testing processes
directly transfer to the more difficult fabrication and testing processes of the 1.1pm
and 300nm.
Wafers were handled from tool to tool with several different types of specialized
isee FCC regulation 18.301
I
CHAPTER 3. MICRO-FABRICATION
tweeters.
The fragile wafers required a certain degree of skill to handle without
breaking them. Wafer were stored in individual and 25-wafer plastic carriers. Die
were put into sticky-gel containers 2
clean
wafer
develop
coat
pattern
photoresist
deposit
metal
lift-off
Figure 3-1: Simplified one-step lift-off process.
The SAW devices were made using a typical micro-fabrication one-step lift-off
process. Refer to figure 3-1. A wafer coated with a photoresist is patterned with
a mask and then developed to remove the exposed positive photoresist, covered in
section 3.4.1. Then a thin layer of metal is deposited over the whole wafer using
electron-beam vapor deposition. The wafer is then immersed in a solution to remove
the photoresist and metal overlay from the surface. The remaining metal pattern
forms the desired features.
A chemical wet-etch is another standard fabrication process that was used to make
masks. In the wet etch process that was implemented, a layer of metal was deposited
on the wafer before the photoresist. See figure 3-2. The photoresist is then patterned
and developed in the same manner as in the lift-off processes. The wafer is then
submerged in a liquid chemical etchant to remove the exposed metal. The wet-etch
2
Wafer containers were purchased from MTI corporation http://www.mtixtl. com/
Figure 3-2: Simplified wet-etch process.
step, in some cases, can be much easier to implement than a lift-off depending on
various factors and requirements.
To create working devices from a new design "always" requires iteration of the
design, fabrication, and testing/evaluation tasks. At best, development of a fabrication process is a difficult and tedious task, much of which is skillful trial and error. A
process designer not only relies on a vast collection of knowledge resources, but also
ingenuity is essential for success. To design a fabrication process, one must choose
values for a dizzying list of parameters that often do not have precisely determined
specifications. Process parameters vary greatly with luck, time, temperature, humidity, and the chemicals used. Even minute particulate contamination will ruin a device
or process step; thus success depends on cleanliness. The challenges of constructing
CHAPTER 3. MICRO-FABRICATION
small structures is difficult not only because of the inherent physical limitations, but
the laboratory skill required by a student to implement a process. The substrate used
for SAW devices, LiNbO3 , caused many additional problems. LiNbO3 is particularly
fragile and inherent piezoelectric properties caused degradation of masks and adhesion problems. The challenges to developing a robust process with repeatable results
yielding reliable devices are significant.
3.1
Mask Design and Layout
The lithography process often makes use of a mask, a piece of glass patterned with
metal defining the structure of the devices[42, 43]. The metal blocks the light causing
only illuminated parts of the photoresist to be exposed. Different mask substrates are
commonly used such as Soda-lime (commonly called glass), which is amorphous SiO2
with various additives. Pure, or nearly pure, SiO2 is also used as a mask substrates.
The proper mask substrate must be chosen to match the wavelength of light emitted
by aligner source. For example, soda-lime blocks almost all light with wavelengths
less than 300nm and thus can not be used for 220nm deep-UV wavelengths. Pure
SiO 2 , which will transmit nearly all light with wavelengths above 200nm 4 , is used for
deep-UV lithography.
The first mask layout was drawn using the open-source software package MAGIC.
The device geometries and parameters were chosen based on what I thought would
be reasonably easy to design and fabricate given a broad survey of the literature in
the field of SAW devices. The goal was to make as many different devices as possible
3SiO masks
are often referred to by the semiconductor industry as "Quartz masks." However,
2
these substrates are not crystalline SiO2 "Quartz," which can be confusing because crystalline SiO2
"Quartz" is used in SAW device fabrication.
4
Further information may be found at http://www.nanof ilm.com/SubstateMaterial.PDF.
5MAGIC was originally developed by the University of California
at Berkley. Additional infor-
mation can be found at http://opencircuitdesign. com/magic/.
MASK DESIGN AND LAYOUT
3.1.
because the number of devices does not effect the cost of the mask, By automating the
drawing of these devices using MAGIC's built-in TCL language6 773 different designs
with various parameters where able to be put on a single mask. The TCL scripts
used to generate the mask 1 artwork are located in appendix A.1. Simplicity was
the driving factor of our first designs because I had no experience with the analysis,
fabrication, or testing of SAW devices.
70mm
die cutout
_________t_____
reflective
devices
, P-mg-
alignment
marks
-
- -
dual-port
I
filter devices
title block
Figure 3-3: Artwork for mask 1 showing a die section.
bond pads
device ID
reflectors
test features
Figure 3-4: Typical layout of a device on Mask 1.
The artwork for the final mask is shown in figure 3-3. Each device includes two absorption blocks, which attenuate surface wave reflections, and a set of test structures,
which are used to determine exposure and developing parameters. The resolution was
6
TCL is a versatile open-source scripting language often chosen for simplicity.
CHAPTER 3. MICRO-FABRICATION
limited by how well the mask would contact the substrate using the EML aligner.
The hard-contact mechanism on the EML aligner would, with some major difficulty,
achieve contact sufficient for 1 - 3pm line-widths. Mask 1 was made of a 100mm
square, 2.29mm thick, soda-lime plate with a chrome coating.
This mask would
fit in the EML aligner, cover a 77mm LiNbO3 wafer, and be compatible with the
A = 365nm light source. The mask artwork filled a 70x70mm square at the center
of the mask. A defect criteria was specified to the vendor as "zero defects greater
than 5pum and less than one defect per square inch." Tolerances of ±500nm were
specified for line-widths and geometries. These specifications were decided though
discussions with the mask vendor 7 and based primarily on our budget and the desired
geometry of our devices. There are a variety of file formats supported by CAD tools
and accepted by mask vendors. This design was submitted in a GDS2 file format and
the order was placed March
1 5 th,
2006 and cost $575.00.
A lot was learned though the problems encountered by using this first mask. Alignment of the devices to the crystal orientation of the LiNbO3 wafer was problematic.
The alignment flat on the wafer must be oriented to the devices using a microscope
built into the aligner. To do the alignment, the substrate wafer needed to be shifted
to the edge of the substrate chuck, while the mask was shifted to the limits of the
microscope's xy-travel. The result of this shifting was that many of the devices on
the side towards the wafer flat were unusable. In fact, all of the devices within a half
inch of the wafer's edge were unusable due to downstream tool limitations and handling. Another problem was that the devices were not arranged into small squares
that could be cut up into ~ 5x5mm die, the size which fits the test packages. In
hindsight a less expensive 77mm mask with fewer devices and proper layout would
have been equally as productive as this 100mm mask. The original reason for elim7
The masks were purchased from Advance Reproductions Corporation, 100 Flagship Drive, North
Andover, Massachusetts 01845, http: //www. advancerepro. com.
3.1. MASK DESIGN AND LAYOUT
65
inating the area required to allow for partitioning the mask into die was that more
room would be left for additional devices. Unfortunately, finding the desired devices
and setting up the die-saw to cut out the correct area was very problematic.
The second series of masks, none of which were successfully made, incorporated
both higher frequency and phase-shift encoded devices. See figure 3-5. The designs
on these masks had line-widths of 300nm and 1.lpm, which yield a center frequency
of 915MHz and 2.4GHz. See section 2.3. Fabrication of these devices proved to be
very difficult and time consuming because of their small features.
These designs where drawn using another open-source software tool, layout'. layout was much easier to use than MA GIC and also provided a useful macro language.
Macros were created to automate generation of devices using both layout's built in
macro language and PERL 9 . The macro source code is provided in appendix A.2.
devices
die outline
marks
._"_
m
lithography
4.2mm
exposure
test features
Figure 3-5: Artwork for mask 2.
This mask was designed with a bond pad layer, and a device layer. The device
8
http://ayout.sourceforge.net
9
Practical Extraction and Reporting Language. A very popular, well established, open-source,
and full featured scripting language.
CHAPTER 3. MICRO-FABRICATION
1. export from layout in a single sell as a . cif file. Ensure layer names are less
than four characters in length.
2. Remove duplicate layers with perl script.
3. run ciftokic. output is the name of the first layer.
4. Adjust number of kic units per pm in nanowriter .
Table 3.1: Steps to convert a file to .kic for use on the VS-26.
line-widths were small enough that they had to be written with the high-resolution
VS-26 Scanning Electron-Beam Lithography (SEBL) tool. Higher-resolution requires
lower power and a narrower electron beam, which causes the write time increase. By
placing the bond-pads on a separate layer, they could be written much faster at a
lower resolution, saving time and money. To ensure the bond-pads were connected
to the devices between the two writes, as precise alignment can be a problem, some
overlap between the layers was added to the design.
Two methods of fabricating these masks were tried.
marginal results, discussed in detail later in this chapter.
Lift-off was used with
The complete process
is detailed in Appendix ?? and ??. In summary, ~ 120nm of PMMA 10 was deposited
on a clean quartz wafer. A thin film of 7nm of Chromium was then evaporated onto
the surface of the PMMA to shield the magnetic lens from electric fields during the
SEBL write. See section 3.4.5. The artwork as then written to the wafer using a
VS-26" SEBL tool. Alignment of the artwork to the wafer flat was important to
ensure the devices would be aligned to the lithium-niobate crystal structure. The
Chromium was then etched off and the PMMA developed using a dilution of one
part MIBK
to two parts Isopropyl alcohol, followed by a descum to remove resid-
0 PMMA is a very high-resolution positive
photoresist from MicroChem Inc. www microchem. com
"Operated by Mark Mondol at the Research Laboratory for Electronics at MIT.
12
MIBK (methyl isobutyl ketone) or (4-Methyl 2-Pentanone) available from AlfaAesar PN#A1 1618
3.1. MASK DESIGN AND LAYOUT
uals. 40nm of Chromium was then deposited by evaporation to make the actual
mask features[44, 45]. The 40nm thickness of was chosen for the 17dB of attenuation provided at 220nm deep-UV light, which is sufficient for exposure of PMMA
photoresist[44]. Unwanted Chromium was then removed via lift-off by striping the
remaining PMMA with NMP 13 , finishing the process and leaving the desired mask.
A wet-etch mask making process simplifies the number of fabrication steps. Masks
made by wet-etch using SEBL were dark-field masks, and could be used to directly
pattern to the LiNbO3 substrate using the positive photoresist PMMA. First the mask
was coated with 40nm of chrome. An 80nm of PMMA photoresist was deposited on
top of the chrome. Only a thin layer of PMMA was necessary to mask the chrome
from the etchant. The mask was submerged in the etchant after the mask was written
and developed. More details on etching are provided in section 3.7.
Cost
Task
Time
Coat & Bake
Evaporate Cr
Write Pattern (SEBL)
Strip Cr & Develop
Evaporate Cr
Lift-off
Total
1hr $80.00
30min $40.00
2hr $160.00
$40.00
30min
$40.00
30min
$40.00
30min
5hr $400.00
Table 3.2: Processing costs and time estimates to process one mask with lift-off. This
does not include meteorology.
The reason we made these masks in-house was two fold. Commercially made
masks with line-widths smaller than 1pm would have been very expensive, in the
$1, 500.00 range. Also, by making the lithography masks at the NSL we were able
to afford flexibility in testing different transponder designs more economically. The
unprocessed clean quartz mask wafers cost ~ $50.00/ea.. The bulk of the cost goes
13
NMP (1-methyl 2-pyrrolidinone)
CHAPTER 3. MICRO-FABRICATION
into processing the mask wafer to pattern the devices.
die outline
and alignment
marks
bond pads
and leads
U
ju1t
4.2mm
Figure 3-6: Artwork for mask 3 version 2. Bond-pads and leads are on a different
layer than the devices.
The third mask was designed to eliminate the bond-pads and 100pm die boundary
marking squares to save valuable and expensive SEBL machine time. Instead the
large bond-pads would be added later in a separate step using a cheaply printed
transparency film 14 . An added advantage is that the bond-pads will have a thicker
layer of metal deposited making them more robust.
Mask 3 version 3, shown in figure 3-7 was written with a different SEBL tool, the
Raith-150. The Raith-150 SEBL tool has an interferometric stage with a large range
of motion, allowing larger areas to be written with little degradation in resolution. A
large write area allowed separating the individual devices into separate die, making
it easier to test them individually.
14 Transparency films with 25tm resolution are supplied by www. pageworks. com.
3.2. SUBSTRATES
die outline
and alignment
1?
marks
4.2mm
bond pads
and leads
devices
Figure 3-7: Artwork for mask 3 version 3.
3.2
Substrates
Two different substrates were used in the micro-fabrication part of this project,
Quartz and lithium niobate wafers See table 3.3 substrate details.
Amorphous Silicon dioxide (also called fused SiO2 and sometimes referred to
incorrectly as Quartz) is used for deep UV photo-lithography masks because, unlike
glass or other substrates, quartz is transparent to 220nm deep UV radiation.
A
relatively thick 1mm quartz wafers were chosen for the mask written by SEBL and
used for hard contact printing or transfer to flex masks. The secondary mask has
a thickness of 250pam, to allow for conformal flexing during vacuum mask contact
pattern transfer. Transferring the pattern to a secondary mask allows a flat and
ridged structure for the SEBL to write to. Handling the thin 250Lm quartz wafers
was a challenge, as they are very fragile. If they are broken, transferring the pattern
from the primary mask is much easier and less time consuming than writing a new
mask via SEBL.
CHAPTER 3. MICRO-FABRICATION
Mark Optics
www.markoptics . com
PN# WF3000X03931101
Quartz* w/ flat
OD: 3.000 i 0.008inch
THK: 1mm +/- 25pm
Double Side Polished
PN# WF3000X00131101
Quartz* w/ flat
OD: 3.000 + 0.008inch
THK: 250 + 25pm
Double Side Polished
Crystal Technology Inc.
www. crystaltechnology. com
Lithium Niobate
Part Number : 99-60011-01
128' RY-Cut
OD: 3.000 + 0.008inch
THK: 0.0197 i 0.0008inch
Single Side Polished
X-flat and marker flat
Lithium Niobate
Part Number : 99-60011-01
Y-Cut
OD: 3.000 + 0.008inch
THK: 0.0197 i 0.0008inch
Single Side Polished
Z-flat and marker flat
Table 3.3: Suppliers and specifications of substrates used. *Amorphous Si0 2.
Mark Optics specializes in semi-conductor lithography optical substrates and supplied the quartz wafers. These wafers arrived in a plastic canister with foam cushions
and paper in between each wafer. Even though these optical wafers were supplied
from a company selling semi-conductor grade substrates, they were especially dirty.
Dust from the paper and other unidentified particles were on the surface and very
difficult to remove. These particles caused problems with obtaining intimate contact between the conformal masks and the substrate. Cleaning these wafers was also
costly. Contacting the vendor to ensure the wafers are manufactured and shipped
from a clean-room in clean packaging is highly recommended if not essential".
"Mark Optics does supply clean-room cleaned and packed substrates upon request. Their clean
process is advertised as; the wafers are SC-1 cleaned, followed by machine scrubbing. Then they
3.3. SUBSTRATE PREPARATION AND CLEANING
Lithium niobate is a manufactured in crystalline ingots and then cut and polished
into flat wafers. The properties of surface acoustic waves traveling on lithium niobate
are influenced by the crystalline orientation with respect to the wafer's surface. Each
Lithium niobate wafer has a different set of flats to identify a particular crystal
orientation. For this project two different crystal cuts (referring to crystal orientation)
were used, Y-cut and 128 0RY-cut. Refer to section 2.1 for details on the differences
in the properties of these two crystal cuts [2, 41]. Lithium niobate wafers are also
very fragile and must be handled with extra care.
The piezoelectric charging properties of lithium niobate caused problems in the
fabrication process. Whenever the wafer was heated, either to cure photo resist or
during processing such as e-beam evaporation, the wafer would charge and then arc
near conductive surfaces. Unfortunate electrostatic discharges through the chrome
on the mask occurred often, each time a millimeter size area of features on the mask
would be destroyed. The arcing caused extensive damage to mask 1. The resulting
degradation rendered many devices unusable.
3.3
Substrate Preparation and Cleaning
Ideally substrates arrive from the vendor clean and free of residues and particulate
contamination. Contamination comes in the form of organic residues, metals, and
particles. Residues, such as oils, photo resist, and scum cause adhesion problems for
photo resist and metals. Particulate contamination causes intimate contact problems
in contact mask lithography and will distort or ruin any device features in close
proximity. Unwanted metals can cause the same problems as particles as well as
shorting adjacent metal features, rendering the device inoperable. Before a new or
mega-sonically clean in recirculating filtered over-flow baths. The final step is scrubbing with machines using soft sponge brushes.
CHAPTER 3. MICRO-FABRICATION
recycled wafer is processed, a cleaning procedure is used to remove contaminates
unless the wafer was sufficiently cleaned by the vendor[42, 46].
Wafers that have chrome on them (such as the wafers used for the chrome masks)
are stripped with CR-716 or equivalent chrome etchant. The chrome etch is repeated
several times after the RCA"7 or Piranha1 8 clean to ensure that all the chrome underneath the photoresist is removed.
A mixture of three parts sulfuric acid (H 2 SO4 ) to one part hydrogen peroxide
(H 2 02) is called "piranha." This cleaning step is is used to vigorously clean a wafer
and remove heavy metals, particles, and organics such as aluminum and photoresist.
The quartz and lithium niobate wafers were immersed in a piranha solution for ~
20min[46]. Over time the heat generated by the sulfuric acid and hydrogen peroxide
reaction dissipates. The mixture is carefully heated to maintain temperature and
vigor.
Standard clean 1 (SC-1, also known as RCA-1 cleaning), was used to clean glassware, masks, and wafers before use. This was used as the last cleaning step before
coating wafers with photo resist. Using a solvent clean after SC-i is unnecessary
and only increased the likelihood of contamination. Wafers were submerged in 4:1:1
solution of water:ammonium hydroxide:hydrogen peroxide heated to 80"C for 20min
After a dozen or so contact prints a thin residue film (scum) of photo resist would
build up on the mask. To remove this scum the mask was cleaned in an oxygen plasma
asher. The very reactive plasma-excited atomic oxygen reacts with the photoresist
molecules taking them away from the surface.
The plasma asher causes a small
amount the resist molecules to clump together into very hard balls firmly stuck to
the surface of the mask. A quick reactive ion etch (RIE) removes these clumps, but
6 A standard 7% chromium etch solution.
'7 A cleaning process developed by RCA corporation and often referred to as SC-1, or standard
clean 1. A mixture of ammonium-hydroxide, deionized water, and hydrogen-peroxide.
18
A solution of sulfuric acid to hydrogen peroxide.
3.3. SUBSTRATE PREPARATION AND CLEANING
Figure 3-8: Micrography of PMMA scum on a quartz light-field mask with chrome.
care must be taken not to etch too far into the mask's metal[47, 42].
One clever solution to the buildup of scum that also resolves the problem with
the mask sticking to the substrate is to Teflon coat the light-field masks. This process, suggested by another student 19 , will be implemented as soon as new masks
are ready.
The material is Tridecafluoro-1,2,2-Tetrahydrooctyl, Trichlorosilane 20
(CF3 - (CF 2 )5
-
CH 2 - CH 2 SiCl3 ), a very durable self-assembling teflon mono-
layer that coats the exposed quartz[48]. Some Nanoimprint stamps use this coating
to keep the resist from sticking to and breaking the relief structures. The coating is
hydrophobic and tolerates RCA and solvent cleaning. A wafer is placed in a desiccator with a drop of the Teflon material. When the air is pumped out the Teflon coats
the wafer in about 2mins. The wafer will turn cloudy if too much Teflon has been
deposited.
Removing particles from quartz wafers was very difficult. In addition to SC-1 and
Piranha cleaning, sonication was also tried with limited success. Wafers were also
placed in a bath of Liqui-Nox TN heated to ~ 50"C for up to an hour. An ultrasonic
acetone bath was also tried, with limited success.
Spin drying wafers with high
acceleration on the coater with acetone, methanol, and isopropanol 21 was marginally
19 Filip Llievski of the MIT Materials Science and Engineering Department
20
21
Available from Gelest Inc. part number: S1T8174.0-106M
Often referred to as IPA or 2-proponal.
CHAPTER 3. MICRO-FABRICATION
effective at removing stubborn particles. Acetone must be followed by methanol while
the wafer is kept wet because Acetone displaces methanol.
Likewise, isopropanol
displaces methanol. If either acetone or methanol dries before being displaced, then
dissolved organics may redeposit onto the surface of the sample. Some particles were
removed by scraping them off with a needle under a microscope. Scraping is used as a
last resort because of the hight likelihood of damaging the mask. Stubborn particles
may also blasted off with a snow gun (compressed CO2 gun), that creates tiny ice
crystals which help sweep away particles.
Equipment and supplies, such as glassware and parts for the deep-UV aligner,
must be throughly cleaned when they are brought into the lab. Liqui-Nox
, and the
powdered form Alconox"', are strong detergents used to clean laboratory equipment
in the same manner as one washes dishes. These detergents remove grease, oils, and
other organic contaminates. Following washing and drying, the parts or glassware
would be followed up by a solvent rinse before use. A quick rinse of the glassware
with the solution to be used removes any contaminations that may dissolve in the
chemical. Glassware, such as flasks used for photoresist, are cleaned with RCA-1 to
insure absolute cleanliness.
3.4
Lithography
Lithography is a technique used in microfabrication to transfer an image to a photoresist (photo sensitive polymer). The photoresist is then developed to remove areas
which correspond to the artwork desired.
Further processing uses the photoresist
to mask off areas of the substrate to allow for deposition or etching. Several different processes exist for transferring artwork into a photoresist. The two methods
of photo-lithography used in this project are scanning-electron-beam-lithography
(SEBL) and contact printing. High-resolution masks and one-off devices are pat-
3.4. LITHOGRAPHY
Figure 3-9: Typical lithography process steps used in this project. SEBL or contact
printing can be used to transfer a pattern to the photoresist.
terned with SEBL, while photo-lithography is generally used when many duplicates
of the same devices are needed. This section describes the entire lithography processes
used, from applying photoresist to a wafer, through exposure, and development. Refer
to figure 3-9.
A photoresist polymer is made of long chains of molecules and often comes dissolved in a solvent from a vendor. The wafer is coated with a uniformly thick layer of
photoresist by spinning a small drop of liquid photoresist on the wafer and spinning
at between 2000 and 4000rpm. Some of the solvent evaporates out of the photoresist
while spinning the wafer. Before the wafer can be exposed, the photoresist must be
cured though heating to completely remove the solvent, producing a durable layer
that can resist etching, ion-bombardment, and evaporation. In the case of PMMA
photoresist, exposing the photoresist to radiation causes the polymer chains break
down. A developer is used to dissolve away the exposed photoresist. When a negative photoresist is used, the exposed area of the polymer are cross-linked after a
post-bake step, causing unexposed area to develop away.
CHAPTER 3. MICRO-FABRICATION
3.4.1
Photoresists
Photoresist are designed to be sensitive to different types of electromagnetic radiation (X-Ray, UV, deep-UV) and support different thicknesses, development rates,
sensitivity, and maximum resolution. These parameters are all related and have corresponding trade-offs. Three different photoresists were used for this project; NR8,
NR7, and PMMA[42].
The negative photoresists NR8-1000P
22
and NR7-1000P were used for the 3 pLm
devices on mask 1. These resists are particularly suited for lift-off applications because
exposure dose controls undercut, see section 3.7. See figure 3-24 on page 90.
The NR8-1000p was the first photoresist used and was based on a process already
developed by another student working on a similar project. A similar resist, NR71000p, was later substituted for NR8-1000p for several reasons. NR8-1000p required
cold storage and must be warmed to room temperature before use, while NR7-100p
is stored at room temperature. NR8-1000p is an older resist that has a very limited
shelf life where as NR7-1000p is a standard product with a longer shelf life.
NR7 is a specialty resist that is available in P and PY variants. NR7-1000PY
is formulated for liftoff applications, whereas NR7-1000P is optimized for RIE/ION
Milling masks. NR7-1000P was available in EML and is also suitable for the $3pm
line width lift-off. The "1000" refers to a particular formulation that corresponds to
a thickness of 1000nm.
Polymethyl methacrylate (PMMA) was the third photoresist used. For this project,
PMMA was used for SEBL and contact photo lithography to achieve line-widths as
narrow as 300nm. PMMA allows for higher resolution than NR7 and is also formulated to be exposed with SEBL or deep-UV radiation. The advantages of PMMA are
higher contrast, higher resolution, high robustness, ease of use, and it can be open
22
NR7-1000p and NR8-1000P are available from FUTURREX, INC. 12 Cork Hill Road Franklin,
NJ 07416 www.futurrex.com
3.4. LITHOGRAPHY
to sun-light if kept shielded in plastic containers. PMMA also works well in variety
of environments, tolerating varying humidity and temperature well. Chlorobenzene
and Anisole are two solvents used to dilute PMMA. The safer and environmentally
friendly Anisole formulation was selected. Stock 11% 950k molecular weight PMMA
solution dissolved in Anisole was diluted to achieve different film thicknesses. A solution of 3 parts Anisole to one part 11% 95OPMMA results in the spin-curve shown
in figure 3-10.
3.4.2
Coating
140,
C
E13 0 --------120 ------
2000
. . .-..-..---. ... . .
---. -.-.. --------- -.- ...
-. . ..
-..-.
....
2soo
. ...
..
s000
3s00
Spin Speed (RPM)
....-- --- -- --- -
..-
-..-..-..-...
4M0
4Wo
Figure 3-10: Spin curve of 3 parts Anisole to 1 part PMMA 950k All.
A coater tool was used to deposit a thin uniform film of photoresist onto the
substrate. Photoresist dilution and spin speed parameters determine the thickness
of the photoresist. The procedure is to place 1 - 5mL of photoresist in the center
of the wafer and then spin for 60sec. A slow acceleration rate is used to allow the
photoresist to spread out slowly, which yields a more uniform coating. When a new
batch of photoresist is diluted, the first step is to run several silicon wafers through
at various speeds to determine the thickness for a given speed. The thickness of each
wafer is initially measured with an ellipsometer. After exposure and development,
CHAPTER 3. MICRO-FABRICATION
which leaves a physical trench in the photoresist, a profilometer is used to measure
the photoresist thickness.
3.4.3
Contact Lithography
Contact lithography brings the mask into contact with the photoresist. The equipment for contact lithography is relatively simple and much less costly compared to
optical projection systems, making the process ideal for research applications. Contact lithography leaves a small gap between the mask and substrate, which limits the
resolution due to near-field diffraction. For the best contact lithography systems, the
resolution is limited to ~ 1pm[49]. Industry prefers other methods, because contact
lithography wears down the expensive masks quickly in production systems. Contact
mask lithography is more than adequate for research applications. Contact lithography system usually contain an (x, y, 6) stage, allowing precise alignment of a mask
to previously patterned wafer or wafer flat. Contact lithography systems are referred
to as "aligners," describing their alignment capabilities. The lithium-niobate wafer
flats were aligned using an (x, y, 6) stage. Lithography systems are also referred to
by their exposure wavelength, such as I-line for A = 365nm[50].
The EML I-Line aligner was used for making the 3pm devices. This commercially
produced tool had limitations and problems due to wear and age, which caused some
difficulty. The exposure timer was not working properly, and with 6second exposures,
accurate manual timing was difficult. Alignment was tricky as the (x, y, 0) stage's
motion was limited. To view the LiNbO3 wafer flat in the microscope, the wafer
needed to be offset by a few centimeters, which leads to degraded contact between
the mask and the wafer.
3.4. LITHOGRAPHY
3.4.4
Conformable Vacuum Mask Lithography
A conformable vacuum mask lithography tool in NSL was used to achieve higherresolution than the EML I-line aligner was capable of. Conformable contact lithography is a simple method of yielding very high resolution at low cost for research
and low-volume production[15]. The vacuum aligner in NSL is a unique custom-built
experimental system, which is capable of resolving line-widths of 100nm[45, 44]. A
XeHg lamp provided A = 220nm deep-UV light. Air is evacuated from between
the conformable vacuum mask and the substrate, causing them to be in intimate
contact. This close contact allows features smaller than the diffraction limit to be
resolved[15, 49]. The vacuum aligner uses very thin, 250pm thick, flexible quartz
masks to allow conforming around contamination particles and to accommodate any
flatness variation in the wafers.
The NSL deep-UV aligner required a new mask chuck to use the 3inch wafers
in this project. The mask chuck holds the mask for alignment and makes vacuum
contact with the mask. I designed a three inch chuck, which was fabricated at the MIT
central machine shop. The existing vacuum system was controlled by on/off needle
valves, which did not release the vacuum on the wafer or substrate. These valves were
replaced with venting ball valves to allow proper operations. A light-tight housing
made of acrylic was also fabricated to protect the lab space from hazardous deep-UV
radiation. Details of these modifications are provided in Appendix C.2.
As air escapes from between the mask and the substrate when they are brought
in closer contact with each other. Before the two wafers contact fully, fringe patterns
appear, as shown in figure 3-11. The number of fringes directly relates to the wavelength of the light. There may still be a significant gap at A = 220nm, even if no
fringes are detected in the visible spectrum[15].
CHAPTER 3. MICRO-FABRICATION
patterns
frnge
Figure 3-11: Fringe patterns resulting from imperfect contact between mask and
substrate while under vacuum and illuminated with a green monochromatic light.
This shows the OAI 77mm chuck with a top-down rubber gasket over the mask. The
mask was 1mm quartz and the substrate was a 77mm silicon wafer.
3.4.5
Scanning Electron Beam Lithography
A scanning-electron-beam-lithography tool is essentially a scanning-electron-beammicroscope (SEM) used to aim electrons at a sample to expose patterns onto a photoresist. SEBL electron beam-widths can approach 1nm with 30nm resolution[42].
The Raith-150 is able to write lines as narrow as 17nm and gratings of 70nm. While
SEBL is able to write very small features, the drawback is that this is a scanned
beam which means writing large high-resolution patterns will be very time consuming. For example, to write a simple mask takes about two hours on a SEBL including
40minutes of setup time. More complicated masks take much longer to write. In
comparison, an exposure into PMMA on the OAI takes only 30minutes, no matter
how complicated the pattern.
The first step to writing a pattern with the SEBL is to correct for misalignment,
focus, aberrations, and stigmation.
100nm gold particles deposited from a liquid
suspension were dried onto the surface of the sample and imaged. Adjustments are
3.4. LITHOGRAPHY
electron source
anode
beam blanker
condenser lenses
correction coils
aberration canceling coils
deflection coils
objective lens
detector
xy-stage
V samplelaser interferometer
meter
Figure 3-12: Simplified diagram of a SEBL tool. The detector is used for imaging
test particles that are used to adjust for focus, aberration, stigmation, and write field
alignment.
made to give a nice image of a gold particle. The area that the electron-beam scans is
small, from 50pm to 500pm depending on beam- width. To increase the writable area
an xy-stage repositions the sample after each scan field has been written. Moving the
stage introduces further errors, and calibrations must be made to ensure proper field
stitching alignment. Field stitching errors were a common problem and some of the
results are shown in figure 3-13. Stitching problems were most likely due to improper
execution of the write-field alignment procedure.
Electrons that impinge on the photoresist can build up a surface charge, which
can cause an unwanted electric field to deflect the scanned beam and thus distort the
written pattern. A thin layer of conducting film is used to shield the electric fields
when writing on insulating substrates. Conductive samples, such as the chrome on
the etched masks, do not need additional shielding. A thin 7nm chrome layer was
deposited on top of the PMMA and later etched off with a standard chrome etch (CR-
CHAPTER 3. MICRO-FABRICATION
Figure 3-13: Micrographs of field stitching problems.
7) with no effect on the exposed PMMA. Chrome was selected for easy deposition
and etching properties and low-cost in comparison to exotic conductive polymers,
such as Aquasave".
3.4.6
Exposure
Exposing PMMA causes the long polymer chains to break down in a process referred
to as scission. The amount of energy imparted in the photoresist determines how
much the long polymers are chopped up. Determining the correct amount of energy
to expose a photoresist is critical for the artwork to be exactly reproduced[42, 43].
An incorrect exposure dose will lead to widening or narrowing of features.
Test features, such as those shown in figure 3-14, were used to evaluated the effect
of different doses. Nested L exposure test features allow for checking line uniformity
and minimum achievable line separation.
Diagonal boxes are useful for checking
proper exposure and development. When the boxes just barely touch, the optimal
parameters have been achieved.
23
Aquasave' can be spun on with a coater and is useful for coating samples that can not go into
an e-beam evaporator. Available from Mitsubishi Rayon Co. www. mrc .co . jp
3.4. LITHOGRAPHY
nested Ls
1pm to 20nm
line widths
Figure 3-14: Exposure test features allow inspection of focus, dose, and development
parameters.
80pC/cm 2
104pC/cm
128pVC/cm 2
Figure 3-15: Micrograph of a dose matrix written in 100nm of PMMA on Quartz.
Exposed with the Raith 150 SEBL tool.
Figure 3-15 shows the test structures with three different doses. The nested Ls in
this figure are made up of a pair of lpm lines, a pair of 0.5pm lines and three lines with
100nm widths. As the dose is increased the line-width widens, eventually causing
them to join with adjacent lines. At a dose of 128pC/cm 2 the 100nm lines have
blurred together and the connection point between the diagonal boxes has widened.
On the other hand, exposure doses that are too low will cause line-widths to
be narrower than desired. One method of checking for proper exposure is to use
diagonally connected boxes. The exposure is correct when the boxes are just touching.
CHAPTER 3. MICRO-FABRICATION
1.1 pm line width, 19min exposure, 0.45mW/cm 2
4pm line pitch
19min exposure
0.45mW/cm 2
4pm line pitch
25min exposure
0.45mW/cm 2
Figure 3-16: The top micrograph shows clearing problems with PMMA on Quartz.
The bottom two exposure show improperly cleared (left) and properly cleared (right)
4pm grating of PMMA on Silicon. The darker areas are PMMA and the light areas
are substrate. These exposures were made with the OAI deep-UV exposure tool in
NSL.
In extreme cases of underexposure, the photoresist will not clear when developing.
Figure 3-16 shows such clearing problems due to underexposure.
NR-7 photoresist was very sensitive to exposure dose. With a dose-rate of 4.5mW/cm 2
at I-line (A= 365nm), an exposure time of only 7seconds achieved good results. For
contact lithography with a deep-UV (A = 220nm) at 0.47mW/cm 2 , PMMA did not
clear until after 1320seconds. Good result where achieved with an exposure time of
1500seconds[50].
3.4. LITHOGRAPHY
3.4.7
Resist Developing
Developing photoresist involves submerging the wafer into a solution that will dissolve
away exposed areas. The polymer chains in the exposed areas of PMMA are shorter
due to scission, making removing this material easier for the developer in comparison
to the unexposed PMMA. The proper temperature and development times are the
two most critical parameters.
substrate
photoresist
Figure 3-17: Developed exposure/developing test features showing the degree of
over/under developing. The left panel shows underdeveloped clearing problems, and
the right panel shows overdeveloping. The center panel show ideal exposure, with the
two boxes coming into perfect contact.
Unfortunate temperature was not taken into account or measured when developing
NR-7. In hindsight, the temperature of NR-7 should have been recorded and made
consistent. Development time appeared to be the most important parameter for NR7. Too short a development time caused insufficient clearing of resist from unexposed
regions (NR-7 is a negative resist). A longer than necessary development time caused
pitting of the resist and led to line-width widening, see figure 3-17. The correct
development times for NR-7 were determined by trial and error. A 2% solution of
resist developer called RD22 1 was used. When RD2 was not available RD6 was diluted
1:3 with deionized water into the equivalent of RD2. Development was stopped by
24
RD2 is a standard 2% developer for resist supplied by Futurrex, Inc.
CHAPTER 3. MICRO-FABRICATION
submerging the sample in deionized water.
21PCto 20.5*C
21.20C to 20.80C
21.50C to 20.00C
Figure 3-18: Changes in width of 1.1pm lines due to developer temperature.
PMMA was developed in a one part MIBK25 diluted with 2 parts IPA. Temperature and development time for PMMA appeared to be very sensitive at the 100nm
to 300nm scale. Development times were kept as accurate as possible to approximately i2seconds. Line-widths would show noticeable differences with temperature
variations as little as half a degree Celsius. A quantity of 500mL of developer was
placed in a 1L flask and heated on a hotplate to exactly 21"C using a thermometer
accurate to a 10th of a degree. The flask was removed from the hotplate at exactly
21"C and the 90second development was started. The temperature of the developer
would drop about half a degree during the 90seconds. The development was stopped
by spraying isopropanol for 60seconds. A spray was used over immersion to make
sure isopropanol entered the small features quickly enough to avoid over development.
3.5
Descum
Besides cleaning and etching (as discussed in section 3.3), the 02 plasma asher and
reactive-ion-etching (RIE) can also be used for removing residuals from the exposed
substrate areas on the wafer. Such a "descum" step helps fix certain adhesion problems. The drawbacks of using the 02 asher for descum in liftoff applications is that
25
MIBK(methyl isobutyl ketone) or 4-Methyl 2-Pentanone (From AlfaAesar #A11618)
3.5. DESCUM
photoresist
scum
substrate
surface roughness
R
rounded profile
substrate
substrate
RIE descum
plasma asher descum
Figure 3-19: Exaggerated illustration of the effect on resist profile from RIE or plasma
asher descum processes. The top figure is the photoresist profile after development
and before any descum step.
the etch is isotropic. Thus the quality of the sidewalls can be degraded causing the
metal to bridge, ruining liftoff. Descum results from using the RIE is generally better because the ions are accelerated under a bias voltage resulting in an etch nearly
perpendicular to the substrate, leaving a better profile for liftoff[42, 47].
The etch rate of PMMA in the 02 plasma asher was characterized using silicon
test wafers. A single wafer was coated with 106nm of PMMA and then oven baked
for 30min at 170*C. This wafer was then repeatedly put into the asher and measured
with the ellipsometer until the thickness of PMMA was less than 70nm (the point at
which the accuracy of the ellipsometer used becomes questionable).
To better characterize the difference between using the 02 asher or 02 RIE for
descum, some silicon test wafers were processed. Preliminary results show roughing
of the surface of the PMMA, see figure 3-21. The difference in surface roughness may
be due to the amount of time or the parameters used in the descum step. More work
is underway to better characterize and optimize the parameters for descum.
88
CHAPTER 3. MICRO-FABRICATION
30
25-
-J- measured data
- - -best fit 1.4 nm/s
E20-215 -----
10-
5
10
seconds
15
20
Figure 3-20: Etch depth vs. time of 106nm PMMA on Si in 02 plasma asher using
50W power and 0.305psi average pressure. Thickness measured with an ellipsometer.
3.6
Deposition
Electron-beam evaporation was used to deposit aluminum and chrome onto substrates. Evaporation works by heating a source of material in a crucible with an
electron beam in a vacuum [47]. The source material sublimates onto an opposing
sample. Usually the source is at the bottom of the crucible and the target is at the
top facing down. For liftoff applications, the target wafer must be located directly
over the crucible to mitigate the effects of sidewall shadowing (see figure 3-22).
Aluminum was used to create the interdigital transducers on the lithium niobate
for the SAW devices. The thickness of aluminum ranged from 50 - 200nm. The SiO2
masks used 40nrm of chrome for the patterns and 7nm of chrome for shielding of the
electron field for SEBL (see section 3.4.5).
Two different evaporation tools were used. A custom built evaporator assembled
from older evaporator components in EML evaporated the aluminum for the 3pum
3.6. DEPOSITION
Cr on PMMA
no descum
02 plasma ash
Cr on Quartz
02 RIE
Figure 3-21: Results from 2sec of 02 plasma asher and RIE descum methods. The
figures show Cr on Quartz and Cr on PMMA before the liftoff step. 10nm of PMMA
were taken off with the 02 asher. 7nm of PMMA were taken off with the RIE.
angle of depositio
metal
Figure 3-22: Effect of off-angle deposition on side-wall coating.
devices. The EML tool operation allows the tool to use a selection of many different
materials26 . Contamination from these materials was an issue due to the way the
tool was designed, cleaned, and used. Another problem with the EML e-beam evaporator was that the film thickness was manually controlled with a shutter, yielding
tolerances of i20nm for aluminum, and as bad as ±l00nm for chrome. Depositing
chrome was problematic as intermittent spikes in deposition rates made controlling
film thicknesses difficult. One theory was that the chrome would grow thin filaments
2
1Often evaporation tools are limited in their selection of materials to avoid contamination prob-
lems.
CHAPTER 3. MICRO-FABRICATION
40nm Cr
on PMMA
40nm Cr
on Quartz
Figure 3-23: Micrograph of a problem encounter when depositing 40nm Cr onto
100nm of PMMA on an SiO2 wafer using the NSL evaporation tool.
during evaporation, which would short to the electron gun under the magnetic field.
The resulting shorts would cause spikes in power and deposition rate, referred to
as "spitting." Films put down under spitting conditions had poor uniformity. The
comet spray patterns shown in figure 3-23 are believed to be the result of chrome
spitting problems. The evaporation tool in NSL was under computer control and
yielded much more consistent and higher quality films in comparison to the EML
evaporator.
3.7
Lift-off and Etching
undercut
metal
photoresist
substrlve p
Figure 3-24: Undercut allows solvent to dissolve photoresist and remove metal overlay.
3.7. LIFT-OFFAND ETCHING
After the photoresist has been patterned, and metal has been evaporated onto
the sample, the photoresist is removed taking away the unwanted metal in a process
called lift-off. Lift-off takes place in a solvent bath that dissolves the photoresist and
lifts the metal off of the substrate in the processes. The solvent needs access to the
photoresist underneath the metal, which can be facilitated through sidewall undercut,
photoresist thickness, or as a last resort sonication. See figure 3-24.
Acetone or Microstrip was used to lift-off NR7. Much better results were obtained
using Microstrip, as the acetone took a lot of time to completely remove the NR7.
The profile of NR7 has a decent amount of undercut aiding in lift-off. On the other
hand, PMMA does not have undercut, which made executing a clean lift-off very
difficult. NMP 27 is used for dissolving PMMA in lift-off and is slowly heated to 80*C.
Heating NMP must be done very carefully as NMP's flash point is 93"C, which is
clearly written on the bottle. Poor results were obtained when using unheated NMP.
Lift-off must be completed before removing the sample from the solvent, or there is
the possibility that metal will fall into the trenches and be very difficult or impossible
to remove. Gently scrubbing the area where stubborn metal pieces are stuck with a
small fab-swab, while the wafer is wet with acetone, may remove them.
The process of lift-off, in theory, should only require immersion in a solvent.
However imprecise profiles or deposition could leave bridging between metal on the
substrate and metal on the photoresist. A hydrophobic photoresist may also prevent
the solvent from entering very small trenches. Ultrasonic agitation of the sample
in a solvent may aid in lift-off by removing stubborn photoresist and metal. This
technique must be used sparingly and only when necessary, as too much sonication
will damage devices. See figure 3-25.
Problems due to bridging were found in SEM micrographs of test devices patterned
1 7NMP
(1-methyl 2-pyrrolidinone)
CHAPTER 3. MICRO-FABRICATION
Figure 3-25: Damage likely resulting from too much sonication (> 1min) during
lift-off.
onto silicon. Figure 3-26 shows how bridging between metal in the trenches and metal
on the surface of the photoresist will ruin lift-off. The SEM image shown in figure
3-27 was a clear indication of the bridging that caused lift-off problems. A sectioned
illustration of the side wall problem is shown in figure 3-28. The lift-off for this
device was aided with sonication, and due to the brittle nature of chrome, some of
the unwanted overhangs broke off.
Too better understand the lift-off problems, some SEM micrographs were taken
of the sample after evaporation of less chrome (30nm instead of 40nm) and before
lift-off, figures 3-29 & 3-31. These images show that there is adequate separation
between the metal on the photoresist and the metal on the substrate, which should
(and did) lead to a successful liftoff. Only minor bridging was observed at the corners
of the metal fingers. Viewing a PMMA coated sample in the SEM will cause cracking
and melting of the photoresist. This cracking is clearly shown in the figures. Lift-off
in the areas scanned by the SEM failed due to the changes caused by the bombarding
electrons. Figure 3-30 shows the area that was scanned by the SEM after lift-off
when taking the image shown in figure 3-29.
3.7. LIFT-OFFAND ETCHING
Figure 3-26: Incomplete liftoff problems as a result of too much chrome being deposited. Shows 500nm line-widths with 210nm of chrome on quartz. The desired
thickness of chrome was 100nm. The PMMA thickness was 250nm.
250nm
Figure 3-27: SEM of bridging caused by poor profile and photoresist that was too
thin for the thickness of metal deposited.
CHAPTER 3. MICRO-FABRICATION
subrte
(a) Profile before lift-off.
(b) Profile after lift-off.
Figure 3-28: Illustration of lift-off problems when the metal on top of the photoresist
bridges to the metal on the substrate.
Figure 3-29: SEM showing a wafer after deposition and before lift-off. The images of
the 100nm gold particles in the bottom left are given as a reference for image quality.
3.7. LIFT-OFFAND ETCHING
incomplete
lift-off
Figure 3-30: Micrograph showing a patch of incomplete lift-off due to inspection by
the SEM before liftoff to take the image shown in figure 3-29.
Figure 3-31: Test patterns of Cr on Quartz and Cr on PMMA on Quartz. Same
sample as shown in figures 3-29 & 3-30.
CHAPTER 3. MICRO-FABRICATION
chrome
before etch
PMMA
after etch
Figure 3-32: Show the change in image contrast before and after the etch has been
completed. PMMA was used as a photoresist on top of chrome and quartz.
Wet etching with a standard electronics grade chromium etchant (CR-7) was
used. Etching chrome is very simple, is done at room temperature, and only requires
immersion into the chrome etchant. For etching mask artwork, CR-7 was diluted
1:2 with deionized water allowing for more precise control over the etch. With the
diluted 1:2 solution, etching through 40nm of chrome takes about 40seconds. Etching
chromium is very similar to developing photoresist. Leaving the sample in the etchant
for too long will cause an over-etch and line-width widening. If the sample is not
left in the etchant long enough there will be clearing problems. In general, proper
etching was very easy to accomplish.
3.8
Mounting/Packaging
A Disco DAD-2H/6T die cutting tool, provided by MTL, was used to cut a wafer into
rectangular die. The devices on mask 1 were not positioned so they could easily be cut
out. To ensure that the devices I wanted to test were not destroyed, the die size was
adjusted between ~ 5mm and ~ 10mm on a side. The devices on mask 2 and 3 were
positioned so that they could easily be cut out and would fit on a 4mm x 5mm die. A
28-pin SOIC with a 165x205mil cavity was purchased from Spectrum Semiconductor
3.8. MOUNTING/PACKAGING
Materials, Inc. 28 part number CS0028P2. The test package, with the lid removed,
was sized to take a 4mm x 5mm die. This package was selected for size, ease of
wire-bonding to the level cavity, and surface mount leads, which have lower parasitic
impedance.
The die was super-glued 29 to the package and then wire-bonded. Care needed to
be taken in application as any excess glue covering the leads would make wire-bonding
impossible.
Wire-bonding proved to be very problematic. The tool was very difficult to set
up, which involved threading a very thin wire through an ultrasonic tip and adjusting
the bonding power and duration. To simplify the process for mask 1, the bond pads
were made in the same step as the devices, and thus only had a thickness of ~ 200nm.
These thin bond pads on top of the fragile lithium niobate caused cracking of the wafer
underneath the pads, leaving the pads to break off. A very narrow range of settings
would allow for proper bonding without ruining the pad and having a mechanically
and electrically sturdy connection. In an attempt to make wire bonding easier, as
well as reduce write time on the Raith 150 SEBL tool, masks 2 and 3 are designed to
include a separate bond pad layer. These bond pads will be made thicker and out of
gold or other easily bonded to material.
The test PCB was designed and drawn in Mentor Graphics® Design ViewTM and
Expedition PCB"4 software packages. See figure 3-33. Advanced Circuits fabricated
the PCBs from the gerber files generated with Expedition PCBT M. This high-frequency
design incorporates several important features. The end-launch SMA connectors are
in-line with the signal path to reduce impedance variation and signal reflections.
The traces on the PCB are impedance matched to 50Q, and a test trace was placed
on this board to verify proper implementation. An impedance matching network
28
29
http: //www. spectrum-semi . com
Tech Hold" Cyanoacrylate adhesive by TechSpray.
CHAPTER 3. MICRO-FABRICATION
package
bond pads
impedance
SAW
cmatching
devices
network
Figure 3-33: SAW test devices mounted to a package, wire-bonded, and soldered to
a test PCB.
was placed as close to the SAW test package as possible to reduce parasitics. All
the parts were surface mount and placed top-side as closely together as possible to
reduce parasitics and prevent noise from coupling into the signal path. Rounded pads
were used on RF packages so solder would flow with reduced discontinuity for better
signal propagation[3]. Details, artwork, and schematics are available in appendix D.
Chapter 4
Electronic Design
Included in this section is a detailed description of the architecture, design, and implementation of all of the electronics and supporting software used in this project.
Requirements of the design and the approach taken to meet those requirements are
also covered. The field-programmable-gate-array (FPGA) design went through several iterations of increasing complexity. Only the highlights are reviewed here because
each implementation is very complex. Programs written to control of the FPGA
hardware peripherals running on FPGA's embedded processor are covered in section
4.7. User interface programs are also covered in section 4.7. To keep the size of the
appendix manageable, only a few of the most important source files were included.
A short radar chirp containing a phase-encoded signal is transmitted by a measurement station to the SAW transponder (covered in detail in chapter 1).
The
measurement station measures the round-trip time-of-flight to and from the SAW
transponder.
Specialized high-speed electronics are necessary for a measurement
station to operate at 2.4GHz. Signal range, accuracy, and noise were difficult requirements for the measurement station's design to meet. On top of that, limitations
in the both the project's budget and cost for commercially viable systems made the
CHAPTER 4. ELECTRONIC DESIGN
100
measurement station's design even more challenging.
Figure 4-1: Conceptual measurement station transceiver block diagram.
The basic design of the first system is shown in figure 4-1. A simpified design was
used first to make the system tractable. Better performing more complicated designs
will be pursued once the concept has been proven. A microprocessor determines
the correct digital code which needs to be transmitted to select a particular tag.
The phase encoded digital code is then shifted out at the carrier frequency. Before
transmission via the antenna, the digital signal is conditioned into suitable radio
frequency waveform and amplified.
The receiver continually samples for both the transmitted signal and the SAW
reflected signal. In this way, the microprocessor can determine the time between when
the transmitted signal was received and the time the transponder's signal is received.
The receiver's front end is typical, containing a low-noise amplifier (LNA), a bandpass
101
filter, and a gain controller. The gain controller is set by the microprocessor in such
a way that the digitizer does not saturate when the high-power transmitted signal is
received. A one-bit digitizer and high-speed shift-register captures the signal, which
is processed by the microprocessor. To simplify the design, and more importantly
reduce the cost of the demonstration electronics, only a one-bit digitizer (ADC) is
used in the demonstration system. Future systems would utilize more sophisticated
ADC's with multi-bit resolution.
The receiver is the most challenging component of the electronics to design and
implement. To make the initial system evaluation easier a high-speed oscilloscope
will be used to digitize the return signals. MATLAB@ will then process and simulate
different receiver configurations before the initial design and implementation of the
custom receiver electronics.
The measurement station was implemented with a very fast oscilloscope, an FPGA
development kit, and some custom RF electronics.
While detecting a particular
transponder and measuring time-of-flight would be possible using a low cost FPGA,
the demanding challenges involved were outside of the practical goals of this project.
Therefore we chose to leave an integrated solution for future work. Instead we chose to
use a very fast oscilloscope with 5GHz of band-width and capable of 20-Gigisamplesper-second, to implement the receiver.
Commercial instruments 1 are available that can generate the radar chirps required.
However, with prices ranging between $40 - 60k commercial instruments are prohibitively expensive for our budget. With a significant amount of work, the necessary
functionality was achieved with an ~ $1k FPGA development board and ~ $1.5k of
auxiliary electronics. A typical desktop computer with no additional hardware was
utilized as the user interface. The programming languages were PERL for the user
'For example, the Agilent 81133A, 3.35GHz, single channel Pulse Pattern Generator.
102
CHAPTER 4. ELECTRONIC DESIGN
interface, MATLAB@ for real-time signal analysis, C and VHDL for programming
the FPGA.
One approach to measure time-of-flight that was initially investigated is to use one
of a numerous collection of existing time-to-digital converter (TDC) designs. TDCs
have been used in physics research and radar applications for over three decades.
Accuracies of 3 0 ps are tractable, and would lead to a range resolution of c -30ps/2 =
4.5mm. Existing TDC designs are not easily interfaced to correlated responses as
required by our approach. Utilizing a high-speed multi-gigibit-transceiver appears
to be the most flexible, easy to implement, and economical solution.
4.1
System Architecture
RF
ransceiver
FPGA
Chirp Generator
e
Ethmet
Transceiver
:
-..
MGT
:PowerPC
Memory and
Control Registers
Figure 4-2: Measurement station FPGA and transmitter block diagram.
The envisioned architecture called for an integrated measurement station as shown
in figure 4-2. A Xilinx@ embedded development kit (EDK) printed circuit board
makes up the backbone of this system. The EDK PCB consists of a versatile FPGA
4.1. SYSTEM ARCHITECTURE
103
with various peripherals such as Ethernet, a multi-gigabit-transceiver (MGT), and
a compact flash interface. Ethernet allows the measurement station to communicate with other devices including other measurement stations and the user interface
running on a remote desktop, laptop, or oscilloscope computers. An external clock
generator provides the precise frequency used by the FPGA to synthesize the radar
chirps. The EDK PCB uses files written to the Compact Flash card by the developer
to configure the FPGA. Configuration data includes the FPGA hardware code and
software running on the FPGA's built-in PowerPC processor. The RF Transceiver
was implemented with custom electronics. Phase-shift encoded data from the FPGA
is transmits though an amplifier and antenna as radar chirps.
LVPECL
output
NECL to
VPECL
NECL
clock
generator
Figure 4-3: Photo of NECL clock generator (part number PRL-174ANT-1350) and
NECL to LVPECL logic level translator (part number PRL-460ANLPD).
The clock generation hardware consists of two commercial modules. The configurable clock source is generated from a Pulse Research Lab2 model PRL-174ANT1350 programmable VCO clock source.
A PRL-460ANLPD NECL to LVPECL
logic level translator module was used to convert the negative-emitter-coupled-logic
(NECL) outputs from the clock source to the low-voltage-positive-emitter-coupled2
www.pulseresearchlab.com
CHAPTER 4. ELECTRONIC DESIGN
104
logic (LVPECL) required by the Xilinx Virtex-4 FPGA. NECL and LVPECL are
both widely used differential logic standards advantageous for their high-speed and
superior immunity to noise.
transmit output
Ethernet
-_LVPECL
clock
FPGA
compact
flash
Figure 4-4: Photo of Xilinx ML405 evaluation board.
FPGAs allow the implementation of very fast custom electronics hardware that
is reconfigurable. The performance provided by FPGAs is far greater than software
implemented on a DSP, and yet FPGAs are flexible and low-cost compared with
application-specific-integrated-circuits (ASICs).
The Xilinx@ ML4053 Evaluation
Platform was chosen for the on-board Ethernet controller, Virtex-4 FPGA, which
includes multi-gigabit-transceiver (MGT), on-chip PowerPC, and the systems $1k
low-cost price. The MGT is a versatile port capable of many different communications standards such as Gigabit Ethernet and PCI Express"N. RocketIO"M is Xilinx's
implementation of an MGT.
Radar chirps are generated using a custom configuration of the MGT, as opposed
to standard communications protocols, such as gigabit-ethernet. Data describing the
3
More information available at http: //www. xilinx. com.
4.1. SYSTEM ARCHITECTURE
105
(a) Digital output from FPGA's MGT port.
(b) Ideal analog output after RF signal conditioning of
digital signal.
Figure 4-5: Illustration of signal conversion from digital to RF.
chirp pattern is loaded into the MGT and then shifted out serially as a phase-shift
encoded digital signal. The digital signal is filtered, conditioned, amplified, and then
transmitted via the antenna by the custom RF electronics. The ideal digital to RF
transformation is illustrated by figure 4-5.
The PowerPC embedded processor in the FPGA runs software written in C to
communicate with the user interface via Ethernet. The user software running on a
remote PC is able to collect data from the system as well as to control the specialized
FPGA radar chirp-generating logic interfaced with the MGT. Using an embedded
processor has the advantage of flexibility in implementation of control and data collecting algorithms, while keeping the high-speed signal processing implemented in
FPGA logic. The PowerPC software is easy to quickly change without the time
consuming compilation of FPGA logic from VHDL source code.
Several software tools are necessary to develop systems using Xilinx FPGAs. A
suite of tools contained in the Xilinx Embedded Development Kit (EDK) is organized
through the Xilinx Platform Studio (XPS) integrated development environment. XPS
runs external tools that configure the PowerPC and system buses, compile the soft-
106
CHAPTER 4. ELECTRONIC DESIGN
ware running on the embedded processors, compile the VHDL code to configure the
FPGA, and generate the bit-level code used to program the FPGA with the software
and hardware configuration. Another collection of Xilinx@ software tools is packaged
as the ISE Foundation integrated development environment. ISE provides low-level
FPGA layout and planing tools, many of which can be called from XPS. The FPGA
simulation software provided by Xilinx@ was rudimentary. Thus the industry standard simulation suite, called ModelSim@, developed by Mentor Graphics@, was used
for simulating before and after the FPGA code was compiled 4 .
The ML405 development board loads FPGA configuration bit-files and programs
to run on the embedded processor from the compact flash card. Once the FPGA
code is compiled using either XPS or ISE, the generated project-file.bit file
needed to be converted to a project-file.ace with the ml40x.bit2ace program.
The projectfile . ace is copied to the compact flash card in the /m1405/ace/
di-
rectory and is loaded when the "My own ACE file" is select from the boot loader
menu. See references [54] and the section "My Own ACE File" in reference [55] for
detailed information.
4.2
Analog Components and Test Equipment
This section briefly details the variety of test equipment and electronic components
used in this project. A custom printed circuit board (photos and schematics are given
in Appendix D), was designed and fabricated to allow testing of the SAW devices.
RF amplifiers and design components were purchased for modularly prototyping the
many test configurations covered in chapter 5. Cables, connectors, and power supplies
needed to be carefully selected, as this system is very sensitive to noise and losses
4
Developing FPGA code is very complicated with many different stages to implementation. Readers are encouraged to consult with [51, 52, 53]
4.2. ANALOG COMPONENTS AND TEST EQUIPMENT
107
at high-frequency. The electronics design for both testing and implementation is
preliminary. While results are being gathered, there is still more work to be done on
the electronic design. The components listed here will be added to as the testing and
development progresses.
The most important piece of equipment for this project is a high-speed and very
sensitive digital-sampling-oscilloscope (DSO). A fast oscilloscope is necessary is to
accurately capture the transponder's return responses with enough resolution to allow
for proper signal processing. A fast DSO was also necessary to debug signals at the
operating frequency of 2.4GHz, and to pinpoint unwanted parasitic oscillations at
even higher frequencies. Capturing the subtle higher-order return signals from even
the slower 323MHz SAW transponders is critical for proper characterization and
understanding of these designs. Observing the return signal is essential for the design,
implementation, and debugging of the RF receiver. Before the receiver is designed
the DSO will allow us to complete functional testing and evaluation of the system,
including time-of-flight calculations.
A LeCroy WaveMaster 8500A DSO with 5GHz of bandwidth was purchased in the
spring of 2007 for this project. With a DSO capable of a 20 giga-samples-per-second
rate, evaluation of the round-trip time-of-flight to accuracies of approximately 10cm
should be practical. A vertical sensitivity of 2mV/division with 8bits of resolution
made this the most sensitive oscilloscope we could afford and will exceed the requirements of a demonstration system. The sensitivity of the DSO limited the input
voltage range to ±4V. This limitation required attenuators for some of the larger
signals. This scope also has a direct interface to MATLAB@, allowing real-time control of this oscilloscope as a highly configurable RF-digitizer. The wide bandwidth
allowed inspection of oscillations on the low-noise-amplifier that appeared to be noise
on previously available DSOs. The data capture and report generating features have
CHAPTER 4. ELECTRONIC DESIGN
108
greatly increased the efficiency of data collection, analysis, and debugging.
An Agilent 8714ET RF Network Analyzer was used for measuring and compensating for input transducer impedance as well as measuring the transmissibility of
the SAW filters. This was a relatively old unit ( > 10yrs ) with no record of calibration. One device was characterized with this unit, and then measured on a newer
and recently calibrated RF Network Analyzer, and the results were reasonable close.
Details on the use of the RF network analyzer for impedance matching are given in
section 4.3. The section 4.4 covers testing the SAW filter transmissibility with RF
Network Analyzer.
splitter
ZFSCJ-2-4-S+
balun / transformer
amplifier
TB-409-84+
low-noise amplifier
ZX60-33LN-S+
terminator
directional coupler
attenuator
ZX30-17-5-S+
vswa
Figure 4-6: Photo of analog components from Mini-Circuits@.
Several packaged RF prototyping circuits were purchased from Mini-Circuits@.
Low-noise amplifiers were needed for the RF receiver front-end and power amplifiers were need for the RF transmitter. Several amplifiers were purchased based on
availability and price. A selection of couplers were necessary for interfacing devices
4.2. ANALOG COMPONENTS AND TEST EQUIPMENT
Part Number
Description
ZFSCJ-2-4-S
Test board with Gali-84+ DC to 6GHz, 25.6dB
of gain amplifier with 38dBm output.
Transformer test board.
Directional Coupler, DC to 2GHz.
Low-noise amplifier with 20dB of gain and output power up to 17.5dBm.
Power Splitter / Combiner, 2 way 1800, 50 to
K1-TMC+
Designer's transformers kit.
K2-VAT+
Designer's fixed attenuator kit. DC to 6GHz, 1
TB-409-84+
TB-145
ZX30-17-5-S+
ZX60-33LN-S+
1000MHz.
to
ANNE-50L+
109
10dB.
50Q DC to 12GHz Attenuators.
Table 4.1: Components used in this project that were purchased from Mini-Circuits@.
to various test equipment; more details are provided in section 4.4 & 4.5. Transforms and baluns were used for decoupling signals and matching signals such as the
RocketIOTM output to the RF transmitter impedance. The transformers and baluns
were purchased in a kit, and then the desired one was installed on the Mini-Circuits@
test board TB-145. A few 50Q terminators and a set of attenuators were purchased
to terminate unused connections and attenuate large signals for test equipment, especially the DSO. We found that at the time Mini-Circuits@ was the most cost effective
source of these components in SMA-compatible packages. RF filters have not yet been
purchased but will be required as the measurement system is developed. See table
4.1 for a summary of components.
In addition to providing a carrier for the SAW devices, the custom PCB was
created to amplify the minute signals as close to the devices a possible. The idea
was to have the amplifier close to the device so the signals could be amplified with as
little noise as possible added before amplification. Unfortunately, the very fast 18GHz
transistors that were selected caused oscillations in the design. These problems were
CHAPTER 4. ELECTRONIC DESIGN
110
not worked out at the time of writing this thesis. A possible solution to removing the
oscillations would be to add a ferrite bead to the base of the transistor, which will be
tried soon.
Figure 4-7: 323MHz antennas made from 16-AWG copper wire and an SMA connector. Used for preliminary isolated indoor tests.
Several other components and auxiliary equipment were used for this project. A
low-noise fixed linear power supply from Power-One@, part number HAA15-0.8-A,
was used to power many of the Mini-Circuits* active components. Custom 323MHz
antennas were built, as pictured in figure 4-7, for a few isolated indoor tests. Other
antennas were purchased for use on the 915MHz instrumentation-scientific-andmedical (ISM) band. A small 58mm Helical Antenna, part number WTH430003 from
S.P.K Electronics Co. LTD., was purchased along with a 236mm monopole antenna,
part number WAN-00514-D8 from Wanshih Electronics Co. LTD. 50Q SMA patch
cables were purchased for their low-loss SMA connectors and RG-316 coax cable.
Many other discrete components, such as inductors and capacitors used for impedance
matching, were selected for low-loss/high-Q. Surface mount inductors from EPCOS,
series B82498, were used for most implementations in this project. NPO/COG rated
capacitors were used for their low-loss. Selection of discrete components for RF design
is very important and the reader is referred to [3].
111
4.3. IMPEDANCE MATCHING
Figure 4-8: RF Network Vector Analyzer test setup for reflectance and impedance
measurements.
r
~
~~I------------ r
L
I
I
I
I
|
C
I
Matching Network
L---------
I
I
j
--
--
--
-- I
R+jR'
I
I
SAWIDT
---
Figure 4-9: Simple L matching network [3, 4].
4.3
Impedance Matching
Matching the characteristic impedance at higher frequencies is very important. Any
of a number of problems, such as reflections and oscillations, may occur without a
proper impedance match[3, 56]. Loss of power due to an improper match can also
distort the characterization of a design. The IDTs of SAW devices are normally
capacitive, thus a matching network must be added to bring the input port back to
50Q. The procedure was to measure the real and complex impedances of the input
IDT with the RF network vector analyzer using the setup shown in figure 4-8. The
measured complex impedance was then used to determine the values of components
needed to make a an impedance match. The match was made by using an inductor
and capacitor in an L-match network configuration that is added to the front of the
input port of the IDT (as shown in figure 4-9). Low-loss (high-Q) high-frequency
components were necessary to make the match without signal degradation[3, 4].
112
CHAPTER 4. ELECTRONIC DESIGN
Calculating the correct values is straight forward and may be done with a Smith
chart or by solving a system of equations. The equivalent resistance looking into the
network is a simple voltage divider with L and R + jR' in parallel with C (equation
4.1). By setting this to our desired characteristic impedance,
Rmatch,
and solving,
we are given the proper values for L and C. Equation 4.1 is split into a real and
imaginary equations 4.2 and 4.3 and then solved numerically.
-L-(sL + R + jR')
sC
5 + (sL + R + jR')
L+R
(4.1
= jC
(4.2)
WRmatchR
R
-
Rmatch
Rmatch(-W 2 L
:Amwlmtan
02: Off
-
wR')
I U Ps
eC7
Sta1r013.0,400
Figure 4-10: Measured Smith chart on the RF Network Vector Analyzer of a SAW
transponder.
One problem with measuring the characteristic input impedance of a SAW IDT is
that there are reflections and resonances due to the device characteristics that appear
to cause problems with measurements taken with the RF Network Vector Analyzer.
113
4.4. SAW FILTER MEASUREMENTS
Figure 4-10 shows the measurement taken of a simple SAW transponder on mask 1.
The curly Qs are supposedly from a combination of reflections from input fingers and
off of the downstream reflectors. One way around this that has yet to be explored (for
lack of access to the proper equipment), is making the measurements instead with a
time-domain-reflectometer. Another possibility that will be tried is to make a bare
input IDT that is not connected to anything (i.e. an output IDT as in the case of a
SAW filter, or coupled reflectors as in the case of a transponder) for measuring the
input impedance of similar transducers.
4.4
SAW Filter Measurements
RF-Network
Analyzer
TX
RX
DUT
Figure 4-11: RF Network Vector Analyzer test setup for Transmittance measurements.
Transmissibility measures the amount of loss between a transmitter and receiver
at a particular frequency through a black box.
The transmissibility of the SAW
filters was measured to determine correct function as well as the loss and frequency
response of the device. Transmissibility measurements were also used to determine
how well the impedance matching adjustments worked. A better match yields lower
transmission losses at the pass-band frequencies.
The same RF Network Vector
Analyzer as was used to determine input impedance was used for transmissibility
measurements. Figure 4-11 shows the setup used, and figure 4-12 gives an example of
CHAPTER 4. ELECTRONIC DESIGN
114
- anti-resonance
Figure 4-12: Measured transmission chart of a SAW filter on the RF Network Vector
Analyzer. Notice the anti-resonance artifact, which is ignored for this work.
a measured response. For convenience, a logarithmic magnitude scale was selected.
Figure 4-13: Setup for transient measurements of a SAW filter using an oscilloscope.
The setup shown in figure 4-13 was used to measure the impulse response and the
chirp response of a SAW filter. Both measurements helped with understanding SAW
IDT operation and characterization of the devices. The impulse response was taken
by generating a pulse at the resonance frequency with the FPGA. One channel of the
oscilloscope measures and triggers off of the transmitted impulse. The response was
measured on the other channel.
115
4.5. SAW TRANSPONDER MEASUREMENTS
4.5
SAW Transponder Measurements
oscilloscope
ch3
ch2
FPG
board
Noamp
>
coupler **
DUT
Figure 4-14: Test setup for SAW transponder measurements.
The early 323MHz SAW transponders have only one port from which to inter5
rogate and measure the return response. A directional coupler allows triggering off
of the FPGA-generated chirp pulse while observing the transponder's return signal.
The setup is shown in figure 4-14. There are some problems with the FPGA's transmitted signal saturating the input of the oscilloscope. Solutions to these and other
measurement problems are in the works.
oscilloscope
FPGA
antenna
ch2
apam
amp
board
ch3
Figure 4-15: SAW transponder measurements using antennas.
Measuring of the SAW transponders in their intended configuration, with the
transponder connected to an antenna, is shown in figure 4-15. The operation is
similar to the previous setup, except the coupler is replaced by three antennas. Some
5
Mini-Circuits@
(http: //www .minicircuits
has
a
few
. com/)
useful
application
notes
on
directional
couplers
116
CHAPTER 4. ELECTRONIC DESIGN
input filtering (not shown) after the receiver amplifier will probably be necessary.
The best receiver design is currently being investigated.
4.6
FPGA Hardware Description
The internal logic of an FPGA can be specified through several different languages
(such as VHDL, verilog, even MATLAB) or with high-level schematic capture programs. VHDL was one of the first FPGA programming languages and resembles
ADA. The project used VHDL exclusively, based on personal preference. Many other
FPGA languages would have worked equally as well.
VHDL 1
library.
1 ..
.
2
3
4
5
6
7
8
9
Example of IO pad description used VHDL and the Xilinx UNISIM
Xilinx primitives
---library UNISIM;
use
UNISIM.VComponents.
all;
...
10
--
11
12
IBUFGDS-usrclk
generic rnap
13
******************
IBUFGDS
IBUFDELAYVALUE
14
15
16
17
18
=> " 0",
IOSTANDARD
=> "LVPECL_25",
DIFF-TERM
=> TRUE)
port rnap (
=> usrclk-b
0
I
=> usrclk-ip , -Diff-p clock
19
IB
=>
usrclk-in
-
Diff-n
clock
20
21
22
23
--
24
IBUF-reset
25
26
27
IBUF
generic map (
IBUF-DELAY-VALUE => "0",
IFD-DELAY-VALUE
=> "ALTo",
28
IOSTANDARD
29
30
31
32
33
******************
:
=>
"LVTTL")
port map (
0 => reset-n-b
I => reset.n
...
Developers take many different approaches to organizing their system designs[57].
The VHDL source for this project was organized to be hierarchically tailored for
two configurations, simulation and implementation. The top-level simulation files are
4.6. FPGA HARDWARE DESCRIPTION
117
known as "testbenches", and are denoted by the naming convention of f ilename-tb. vhd.
A testbench provides simulated simulation signals to the VHDL code that will become
the description for the real hardware as well as checking the outputs. The implementation's top-level source file is denoted by filename-pad. vhd, which represents the
physical "pads" of the FPGA's package. The filename-pad. vhd file uses Xilinx device family dependent logic black-boxes to select specifically how an input or output
pad should be configured. For example, the IBUFGDS and IBUF are both black boxes
in VHDL listing 1. The pad configuration parameters can also be specified using a
constraints file, however specifying the configuration in a filenaiepad. vhd allows
M
further compatibility among tools from different vendors, such as ModelSim . Only
VHDL code that describes the entire implementation uses the filename-pad.vhd
file. The chirp-generating implementations that do not use the PowerPC have a
f ilename-pad.vhd file.
The VHDL code specifies the physical connections between Configurable Logic
Blocks (CLBs), the basic building block of an FPGA. Programming the CLBs configures them as flip-flops, encoders, and other logic elements, which are connected in
a fixed configuration implementing the desired functionality . There are also many
different types of specialized fixed ASIC components on an FPGA, such as the MGTs
and PowerPC core. The proper way to correctly specify the connections and topology
to imply specifically the hardware desired must be done by following vendor-specific
VHDL coding standards. Often these specification are provided in a separate "Synthesis Manual," which may be provided by the FPGA vendor and/or the simulation
and synthesis vendor (i.e.
Mentor Graphics@ or Simplicity®). For example, the
FPGA provided by Xilinx@ may have the VHDL configuration code compiled by
Xilinx@ software, or Precision SynthesisTM from Mentor Graphics@, or similar product
from Synopsis@. Following the synthesis specification provided by the vendor of the
118
CHAPTER 4. ELECTRONIC DESIGN
tool being used for the particular FPGA selected is essential for an accurate simulation and successful implementation[51]. The UNISIM VHDL libraries provide all the
primitive black-boxes along with the timing parameters for accurate simulation and
are supplied by Xilinx@.
As mentioned earlier, there are several increasingly complicated implementation
of the chirp-generating FPGA code. The first chirp-generating implementation did
not use the MGT or a graphical user interface. For simplicity, the buttons on the
ML405 development board increased or decrease the number of cycles in a chirp by
five.
The chirp output was a gated clock limited to 400MHz chirps without any
encoding functionality. A gated clock is a poor implementation because the first and
last cycle of a chirp would be randomly truncated, causing degraded performance.
The output frequency was fixed by the clock synthesizer.
In the next design iteration the MGT configuration was added. The MGT allowed
phase encoded chirps to be transmitted at the maximum speed capable of the FPGA
development board. The output chirp was hard-coded for simplicity (the configurable
implementation was to use the PowerPC processor and Ethernet controller) and could
only be changed by recompiling the FPGA source code, a time consuming task.
The internal FPGA processor architecture is very flexible and very complex, with
several different buses, memory architectures, bridges, input-output controllers, and
processors (MicroBlaze m and PowerPC"). Figure 4-16 shows a simplified depiction
of the organization of the FPGA's embedded processor bus as configured for this
implementation. The PowerPC has direct access to on-chip SRAM configured for
both program instructions and program data. High-speed peripherals are connected
directly to the PowerPC on the processor local bus. While all peripherals can be
placed on any bus, good design practices separate high-speed components that only
communicate with the processor from slower peripherals that may communicate with
4.6. FPGA HARDWARE DESCRIPTION
+
Ethemet
UART
119
BrideBM
GPIO
LEDs
GPIO
Buttons
chirp2
Figure 4-16: Block diagram of FPGA PowerPC processor configuration.
each other as well as the processor.
The processor local bus (PLB) bridge connects the PowerPC to the on-chip peripheral bus (OPB). The "UART" allows the program running on the PowerPC to
send simple debug messages via RS-232 to a terminal. Debugging problems with
Ethernet communication was greatly aided by the "UART". The general purpose input output (GPIO) peripherals are generated automatically via a peripheral wizard in
XPS and can be connected to anything. The "GPIOLEDs" peripheral was configured
to set LEDs as another simple debug status output. The "GPIO buttons" allowed the
program running on the processor to check the buttons on the ML405 development
board. The only custom peripheral was "chirp2", the second implementation which
transmits the phase-encoded chirp.
The organization of the "chirp2"IP is shown in figure 4-17. Many of these source
files were automatically generated skeleton template files from XPS that were later
appended and modified as needed. The chirp2. vhd and user-logic sources were automatically generated by the XPS peripheral wizard. They provide a register transfer
CHAPTER 4. ELECTRONIC DESIGN
120
chirp2 IP
[chirp2.vhd]
PowerPC bus interface glue logic
[user..logic.vhd]
control register glue logic
[rocketioglue .vhd]
control and MGT glue logic
Figure 4-17: Top level block diagram of chirp2 VHDL code.
interface to the PowerPC processor that allows the program to write to registers that
configure and control this peripheral. These files must be modified to bring input
and output signals to the custom peripheral. All of the custom logic is placed in the
user-logic.vhd source file.
Specialized hardware, or "cores", in the FPGA are configured with a Xilinx@ tool
called CoreGen. Optimized implementation of complex functions, such as a fastfourier-transform, are also provided through CoreGen as black-boxes. The MGT
was configured through CoreGen, which generated a VHDL template from all of the
setting specified in the CoreGen Wizard. These files are then integrated into the
design by instantiating the provided component code into a higher level component.
Figure 4-17 shows the MGT configured by CoreGen integrated into the chirp2 IP
wrapped by the rocket io-glue. vhd source file. The CoreGen generated code needs
several modifications to work properly in this design. The clock distribution and
connections were not setup as required. Details on setting up the MGT clocks is out
of the scope of this thesis and requires careful study of [58].
4.6. FPGA HARDWARE DESCRIPTION
121
Figure 4-18: VHDL code organizational block diagram of the "chirp2" peripheral
implementing the rocketIO multi-gigabit-transceiver and support FPGA cores.
All of the custom peripheral management code as well as the implementation
of the MGT are contained in rocket io-glue. vhd. This code makes all the proper
connections between the MGT hard-wired cores and the higher-level custom logic.
VHDL listing fragment 2 shows the custom logic that periodically sends the configured chirp by loading the output register with data when the counter reached
delay-time. The majority of the rocket io.glue. vhd is shown in block diagram 418. The "MGT clock" black-box buffers the user clock (set by the external VCO),
separating the clock domains, and phase locking to the MGT user clock. Synchronization with adjacent MGT blocks as well as converting the MGT clocks to the proper
frequency is also handled by the "MGT clock". The MGT wrapper encapsulates the
hundreds of RocketIO configuration parameters to simplify the interface for higherlevel components. Most of the complexity of the MGT configuration is due to the
hardware implementation of different high-speed encoding and decoding standards.
The "user clock out" signal is generated to synchronize the high-speed parallel data
to the rest of the FPGA logic. The "digital clock management" (DCM) buffers and
reduces the clock rate of the "system clock" to drive the MGT power-on reset and
initialization hardware. The receiver is not connected in this implementation. The
MGT hardware comes in pairs of transceivers. The "unused wrapper" component is
CHAPTER 4. ELECTRONIC DESIGN
122
VHDL 2 : txdata-p process in rocketioglue.vhd
1
2
3
4
5
purpose
provides data to MGTOTX
type
: sequential
inputs : usr-clk-i
, reset
outputs:
txdata-p : process ( usr-clk-i , tx-system-ready -i
--
chirppatt ern ,
delay..time)
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
begin
-process txdata-p
if tx-system-ready-i = '0'
then
counter
<= (others = >
mgtO.txdata-i <= (others =>
elsif
usr-clk-i 'event
if
and
counter >= delay-time
--
asynch ronous reset
(active
low)
'0');
'0');
usr-clk-i
=
'1'
then
rising
clock
edge
then
counter
<= (others = > '0');
mgtO-txdata-i <= chirp-pattern;
else
counter <= counter + 1;
mgtO-txdata-i
end
<= (others
=>
'0');
if;
end if;
end process
txdata-p;
the unused transceiver in the same ASIC MGT block as the utilized MGT [58].
Some of the status and logic indicators were brought out to the LEDs to help with
debugging. System ready, clock management phase locking, reset signals, and buffer
ready status conditions were monitored via the LEDs.
Normally every level of VHDL code is simulated individually to check correct operation, and simulated as a system to check integration. The complexity of the MGT
made simulation infeasible due to the complexity of setup and amount of time to
run. Sometime compiling the VHDL code and running on the FPGA, with carefully
chosen debug signals made available to test ports, is the best way to debug an implementation. Other options for debugging code are available, such as ChipScope" from
Xilinx, however they were not within our budget.
123
4.7. SOFTWARE
4.7
Software
There are two software platforms currently under development. The PowerPC on the
FPGA runs an Internet server that services requests from other devices communicating via the TCP/IP sockets port. A PC runs a user interface that allows changes to
the transmitted pattern and frequency of periodic chirp. The software was developed
with the help of an undergraduate, Roshni Cooper, as a part of the Undergraduate
Research Opportunities Program (UROP) [59]. While the code is usable, and has basic functionality required to configure the chirp peripheral, much more work will be
done as this project progresses. Future software development will allow MATLAB@
running on the LeCroy oscilloscope, through the Java sockets library, to signal the
FPGA to transmit a particular code. MATLAB@ will then trigger the oscilloscope
and collect and analyze the data from the return RF signal.
The current implementation has the embedded PowerPC processor running a very
simple program to service requests from the user interface. The source code is located
in Appendix E. There are three libraries and associated source code used for this
program;
e enet .c : A customized high-level Ethernet interface which calls the Xilinx
provided network APIs.
" xromicd. c : Provides the interface to the ML405's LCD display. This source
code was a part of some Xilinx demo code.
" chirp2. c : Interface device driver for the chirp2 peripheral.
The top level source file is chirpnet. c.
First the "chirp2" and "Ethernet" pe-
ripherals are initialized. Then the main program loop services connection requests
with enet-accept().
Up to MAXNET.CONNS from different computers are allowed.
CHAPTER 4. ELECTRONIC DESIGN
124
This feature will be useful when multiple measurement stations must communicate to triangulate a tag's position. Commands are processed and parsed with the
enet.proc-conns 0 function, which checks each connection and executes any pending
requests. Only one command, "chirp2,delay,high, low;", has been implemented;
where delay is an integer specifying the number of cycles between chirp transmissions,
and high and low give the binary code for the chirp in two 16bit words.
lo W"
w~f
Figure 4-19: chirp ui. pl User interface program written in PERL.
The simple user interface, shown in figure 4-19, communicates over Ethernet with
a TCP/IP sockets library. Programmed in PERL, the interface is portable, simple,
and easily extended. The IP address and the port number of the measurement station
is entered under "Host TCP/IP Address" and "Port." Two buttons are provided to
connect and disconnect to the measurement station. Many patterns may be specified
by the three columns of configurations, which are stored on disk for later use. The
selected pattern is sent to the measurement station when the "Send" button is pressed.
The user interface, while functional and in use, is preliminary, and therefore the
full source code is not provided. However the most important code fragments are
given in PERL listing 1. A TCP/IP socket is opened to the measurement station
125
4.7. SOFTWARE
with 10: :Socket: :INET->new(
...
). The handle $sock is then written to, read
from, and closed the same as any file handle. The set-chirp( ...
) subroutine
demonstrates how the "chirp2, delay,high, low;" command is assembled and sent.
PERL 1 : Code fragments illustrating how to use TCP/IP sockets.
use
use
use
use
use
IO:: Handle;
10:: Socket ;
Net : : hostent
POSIX qw/ s e ts id /;
subs qw/client-connect /;
sub host-connect {
$sock = 10:: Socket ::INET->new(
$sock->autoflush ( 1
PeerAddr => $host
=> 'tcp '
Proto
PeerPort => $port
);
}
sub host.disconnect {
return unless defined
close ( $sock
$sock
}
sub set.chirp {
my $delay = shift
= shift
rny $high
= shift
rry low
host-send ( "chirp2 , $delay
sub host-send {
my $data = shift
print $sock $data."\n"
}
sub host-recv
my $data =
{
$sock->recv(
return
$data;
$data,128 );
Shigh ,$low"
);
126
CHAPTER 4. ELECTRONIC DESIGN
Chapter 5
Testing and Characterization
All of the results presented here are very preliminary. The 915MHz devices of interest
have not yet been successfully fabricated (these devices should ready withing the first
two months of the PhD program). The purpose of the data taken thus far is to
confirm that the design is on the right track. To check our first simplified designs, the
3pum fabrication process, and the test setup, some data was taken. Until recently, we
did not have the necessary test equipment (oscilloscope, amplifiers, RF prototyping
components, etc.) therefore very little presentable data was collected. However, the
following is useful as an illustration of the operation of three SAW devices along with
some insight into their performance.
5.1
SAW Device Ox2C9
Device Ox2C9 was a band-pass filter with a reasonably good filter response. See table
5.1 for the detailed specifications. Figure 5-1 shows the CAD artwork (layout was
done in MAGIC). This is a bi-directional device, and for the purposes of this data,
one port is the input and one is the output. The transmissibility (measurement setup
127
CHAPTER 5. TESTING AND CHARACTERIZATION
128
is explained in section 4.4) shows very good band-pass filtering with a pass-band of
~ 20MHz (figures 5-2 and 5-3). A simple impedance match was tried and seemed to
work. As shown in figures 5-4 and 5-5, the matching network appears to improve the
impedance. The pass-band loss also improved about 3dB after the match was made.
One possible explanation for the curlicues shown in figure 5-5 is that the resonant
reflections were confusing the RF Network Vector Analyzer (more investigation is
underway).
Figure 5-6 shows the effect of internal back-and-forth reflections between the
input and output IDTs. The magnitude of the internal reflections may be in part due
to an impedance mismatch. The data is taken at the output port, and a short 4-cycle
chirp is sent into the input port. The first signal that is detected is unwanted feedthrough from the input to output port. The main signal is the largest waveform to
be received at the output. The signals that show up after the main signal are caused
by additional reflections off of the input and output IDTs. These macro reflections
are a set of waves bouncing between the input and output IDTs. There are also
intra-finger reflections in each IDT, which are shown in figure 5-7. The secondary
reflections are discussed in section 2.2.
IDT line-width and spacing
IDT fingers
IDT Length
IDT Apodization
IDT Rail Width
Pad width and height
Input to output separation
3pm
50
200pm
191pm
20pm
200pm
1050pm
Table 5.1: Specifications for device Ox2C9
5. 1. SAW DEVICE OX2C9
129
...
..
Figure 5-1: Drawing of SAW filter device Ox2C9
MsTr4Uanssoen
Figure 5-2:
Lo HaM 10.0 I/
Ref
-0.00 a
Frequency response from 50MHz to 1GHz.
322.249MHz.
The pass band is at
CHAPTER 5. TESTING AND CHARACTERIZATION
130
M:TvWitiSSi@fl
323MHz -
L" Ma
'.0SAVt
-30' 00 dl
ir ~
aleenM
,
i
I
I
-t~i
scal 5N
!
S.0 4
-- 41
s0.0p aio0
start MD. o0 of
Figure 5-3: Pass-band bandwidth shown as
Smith
I U 75
c7?IS
~1-=I
30
e~-'
It
20MHz.
~323MHz
§'-Z"
Figure 5-4: Smith chart before impedance matching circuit.
5.1. SAW DEVICE OX2C9
131
323MHz
Figure 5-5: Smith chart after impedance matching circuit with 27nH and 10pF.
MOGmUM
value
staFus
P1:freq(C2)
324.9 htz
It
P2frc(C3) P3:ddeley(C2,..
337.0AMlz
11.72 ns
ar
c
P4fre4C2)
324.9htz
b
P5>- -
P-
- -
P7:-- -
P:-
--
tw
Figure 5-6: Internal reflection between two ID)Ts in device 0x2C9.
132
CHAPTER 5. TESTING AND CHARACTERIZATION
Figure 5-7: Example of inter-finger reflections within a single IDT.
5.2. SAW DEVICE OX2E8
5.2
133
SAW Device Ox2E8
With only 20 fingers and half the apodization (IDT finger overlap) of device Ox2C9,
device Ox2E8 has a much lossier response. Not as much data was collected as for
Ox2E8 due to lack of time. Figure 5-9 shows the measured band-pass responses as
well as signs of electromagnetic feed-through, which is the coupling of the input signal
to the output via electromagnetics[5]. The impulse response shown in figure 5-10 has
been labeled to show the relationship of the output signal to the number of fingers in
the device. For this device, 20 fingers or 10 finger pairs on each IDT yields a 20cycle
output.
IDT line-width and spacing
IDT fingers
IDT Length
IDT Apodization
IDT Rail Width
Pad width and height
Input to output separation
3pm
20
100pm
91ptm
20pm
200pm
36 0pm
Table 5.2: Specifications for device Ox2E8
a 1
-
Figure 5-8: Drawing of SAW filter device Ox2E8
134
CHAPTER 5. TESTING AND CHARACTERIZATION
P Tr
sloped
Log14mg10.0 dEl ~t -40.006
.t.n
........
I I
Hjmtitl~PI
wit
~g~*
~
-
g.
2S
off
k
O
-
response
tooM
Figure 5-9: The sloped frequency response is due to electromagnetic feed-through[5].
. . ......
. .. ..........
......
..........
20
MeNWse
vale
Pft.ffeC2)
217.2 hL
Aus
P2freq(C3) PMddelay(C2,..
-2.80 Hz
P4tfreq(C2)
PM-- -
P&-
P7
P
-
217.2 Miz
A
X1- 0.00 ns
.Y5.
I
77
atX. 3.07 ns
_UA.
'ggRL
Figure 5-10: Impulse response of SAW filter Device Ox2E8. The number of cycles has
been labeled (1,10,and 20). Channel Z2 is the zoomed view of Channel C2.
5.3. SAW DEVICE OXOE3
5.3
135
SAW Device OxOE3
One of the four saw reflectors that were tested is presented here. OxOE3 was the only
SAW reflector device that was tested with the fast 5GHz oscilloscope. Limited data
was taken on three other SAW reflectors with a 500MHz oscilloscope. Due to the
inadequate bandwidth of the 500MHz oscilloscope, that data is not worth presenting.
Figure 5-11 show the device with five sets of reflector gratings. The response from
an 11-cycle chirp signal is shown in figure 5-12. Two groups of reflected signals are
shown, though more are there, just out of view. Only the reflections from the first
three gratings are measurable, as too much of the signal is lost by the time the surface
wave reaches the fourth and fifth reflector. The delay between the interrogation chip
and the round trip to and back from the first reflector is 171ns. This delay corresponds
to the surface velocity and distance between the input IDT and first grading. The
surface velocity is ~ 4000m/s and the distance between the gratings is 300pm. The
very first return response will start at 150ns. However the first detectable response
will be shortly after because more than one wave will need to couple into the IDT.
As shown in figure 5-12, the time until signal is significant is 171ns, as expected.
IDT line-width and spacing
IDT fingers
IDT Length
IDT Apodization
IDT Rail Width
Pad width and height
Reflector spacing
3tm
50
300pm
291pm
20pm
200pm
300pm
Table 5.3: Specifications for device Ox0E3
CHAPT ER 5. TESTING AND CHARACTERIZATION
136
..
..
Figure 5-11: Drawing of SAW filter device 0x0e3
-tx chirp + input IDT
reflection i1011l
second reflection
171ns
---- -------------
first reflection
--T - -------
......
....
.
Ism
Mess
P:freoC2)
'2.28 0Hz
x
P21req(C3) Paddey(C2,..
29.1l7ns
3362MHz
X
-
M&Ti
P4:freq(C2)
2.28 0Hz
x
Xi.
.20rs
)(2m 159.5
AX-
170.15ns
I0X3s 5843PMt
411352007
1:5934 PM
Figure 5-12: The four cycle chirp response of device OxOE3. Channel Z3 is the zoomed
view of the first reflection on Channel C3.
Chapter 6
Conclusion
From the beginning we knew this project was very ambitious. Micro-fabrication
projects are particularly difficult to complete over the short duration of a masters
degree. Additional challenges to this project were the high-frequency electronics
design and testing. An an enormous amount has been accomplished and learned in
the two years since the start of this project. Extensive investigations into the state-ofthe-art of existing solutions and an analysis of probable performance of SAW devices
were completed. The idea of a SAW based transponder with ranging capabilities was
conceptualized and a patent was filed on the technology. The implementation of the
SAW transponders is now progressing quickly and should conclude with positive data
and results soon.
Significant progress has been made understanding the properties of lithium niobate
and utilizing this substrate for SAW applications. The first simple models of SAW
operation were developed, implemented, and verified with our initial devices. The
designs of new devices, currently being fabricated, were based on these models. Three
masks were drawn using two CAD tools, "layout" and "Magic." The foundation has
been laid for quickly implementing new designs using the tools and methods developed
137
CHAPTER 6. CONCLUSION
138
in the thesis.
The most difficult aspect of this project was attaining proficiency in microfabrication of SAW devices. The majority of the problems were due to inexperience
with the complicated processes and laboratory methods. The use of numerous tools
were learned and successfully utilized. Amorphous silicon dioxide masks and lithium
niobate SAW substrates were selected and purchased based on our requirements.
Cleaning and preparation processes were learned and modified for our uses, allowing
us to recycle wafers from unsuccessful runs, saving a significant amount of money..
I became proficient in the use of two lithography aligners, one of which significant
upgrades were made to meet requirement of this project. Knowledge necessary to
use the scanning electron beam lithography tool has allowed inspection and writing of masks. After debugging, the lift-off processes we achieved reliable fabrication
of devices. 3pm devices were successfully fabricated. Several 3inch quartz masks
with 1.1pm and 300nm devices on them were successfully fabricated.
Debugging
of the mask making process is nearly complete. The tools and hardware necessary
for mounting the SAW devices to suitable packages and wire-bonding them to the
leads has been figured out and implemented. A lot of work as been accomplished in
learning the details of microfabrication necessary to make our desired devices. The
foundation for fabricating SAW transponders has been made, and the skill necessary
for making our desired devices is ready for the final implementation.
The architecture necessary for the electronics test suite was designed and developed to a point where devices are able to be tested. A prototype test suite has
been assembled, with an FPGA signal source, supporting high-frequency electronics
such as low-noise amplifiers, and a high-speed oscilloscope capturing return signals
and debugging. Significant progress has been made in verifying that the electronics
will work for the ultimate goals of this project. The FPGA hardware and software
139
has been developed sufficiently to generate the required signals. An Ethernet capable user interface program was written to communicate and control the FPGA.
Impedance matching of the SAW devices to the standard 50Q electronics has been
figured out. Topologies for testing the various SAW devices has been prototyped and
has collected some useful data. The equipment acquired should be nearly everything
necessary to attain our initial results for ranging measurements. Data taken thus far
with the electronics looks encouraging and good results are expected soon.
Basic testing of devices made to date has been accomplished, and the results are
reasonable. The test setup and methods for testing SAW filters has given us result
from four 3pm devices. Frequency and impulse responses of the 3pm devices have
been measured and correspond to the expected results. The effect of impedance
matching the SAW IDTs has been verified to be an improvement. The response of
several 3pm reflector devices have also been investigated. Initial test results show
that the available test equipment, such as the RF Network Vector analyzer and oscilloscope, are adequate.
The work left to be done before ranging results can be attained are as follows.
Fabrication will continue with making the 915MHz and 2.4GHz devices. The processes to make the devices have been developed and only need to be tweaked before
working devices are made. Once the high-frequency devices are made, the electronics
suite will be put to the test. Some significant debugging is expected and different approaches to testing the devices will be explored. Testing of all of the different devices
will take place after the electronics have been fully debugged. Following the collection
of the test data, a paper containing the results will be published. The end goal of
this project is to transfer SAW transponder ranging and localization technology to
industry.
Localization using small passive transponders has excited several sponsors of the
140
CHAPTER 6. CONCLUSION
MIT Media Laboratory. The usefulness of the project is evident in the amount of
work being put into other less elegant solutions to the tracking problem, summarized
in section 1.3. Successful completion of this project will solve many tracking problems
for which there is currently no practical solution.
Bibliography
[1] K. Finkenzeller, RFID Handbook. West Susses, England: John Wiley & Sons,
second ed., 2003.
[2] A. Slobodnik, E. Conway, , and R. Delmonico, Microwave Acoustics Handbook,
vol. 1A. Surface Wave Velocities. L.G. Hanscom Field, Bedford, Massachusetts:
Air Force Cambridge Research Laboratories, 1973.
[3] T. H. Lee, Planarmicrowave engineering: a practical guide to theory, measurement, and circuits. Cambridge UK: Cambridge University Press, 2004.
[4] D. M. Pozar, Microwave Engineering Third Edition. Hoboken, NJ: John Wiley
& Sons, Inc., 2005.
[5] C. K. Campbell, Surface Acoustic Wave Devices for Mobile and Wireless Communications. San Diego: Academic Press, 1998.
[6] OmniSTAR 8400HP User Manual, (http: //www. omnistar. com. au).
[7] G. Loegering, "A performance comparison between a SCAT-1 DGPS system
and the Omnistar DGPS system," PositionLocation and Navigation Symposium,
vol. 48, pp. 310-314, APRIL 2004.
141
BIBLIOGRAPHY
142
[8] C. Shuxin, W. Yongsheng, and C. Fei, "A study of differential GPS positioning accuracy," in Microwave and Millimeter Wave Technology 3rd International
Conference on, vol. 17, pp. 361 - 364, August 2002.
[9] Carios information, (vdg@iis.fraunhofer.de).
[10] A. Pohl, R. Steindl, and L. Reindl, "The "intelligent tire" utilizing passive SAW
sensors measurement of tire friction," Instrumentation and Measurement, IEEE
Transactionson, vol. 48, no. 6, pp. 1041-1046, December 1999.
[11] R. W. Brocato,
"Passive microwave tags,"
Sandia National Laboratories,
no. SAND2004-4924, 2004.
[12] R. W. Brocato, "Programmable SAW development," Sandia National Laboratories, no. SAND2004-5255, 2004.
[13] L. Reindl, "Wireless passive SAW identification marks and sensors," in 2nd
Int. Symp. Acoustic Wave Devices for Future Mobile Communication Systems,
(Freiburg, Germany), pp. 1-15, Institute for Microsystem Technology, AlbertLudwigs-University Freiburg, March 2004.
[14] H. Matthews, ed., Surface Wave Filters: Design, Construction, and Use. New
York: John Wiley & Sons, 1977.
[15] H. Smith, "Fabrication techniques for surface-acoustic-wave and thin-film optical devices," Proceedings of the IEEE, vol. 62, pp. 1361-1387, October 1974.
[16] RF Code, (http: //rf code. com/).
[17] RF SAW,(http://rf saw. com/).
[18] M. I. Skolnik, Introduction to Radar Systems. Boston Massachusetts: McGraw
Hill, 1980.
BIBLIOGRAPHY
143
[19] J. D. Taylor, ed., Introduction to Ultra-wideband Radar Systems. Boca Raton:
CRC Press, 1995.
[20] A. V. Oppenheim and R. W. Schafer, Discrete-time signal processing. New
Jersey: Prentice-Hall Inc., 1998.
[21] L. Reindl, G. Scholl, T. Ostertag, H. Scherr, U. Wolff, and F. Schmidt, "Theory and application of passive SAW radio transponders as sensors," Ultrasonics, Ferroelectricsand Frequency Control, IEEE Transactions on, vol. 45, no. 5,
pp. 1281-1292, 1998.
[22] B. K. Sinha, "A stress and temperature compensated orientation and propagation direction for surface acoustic wave devices," IEEE Transactions on Ultrasonics, Ferroelectrics, and Frequency Control, vol. 34, no. 1, pp. 64-74, 1987.
[23] M. Rlinami, H. Morikawa, and T. Aoyama, "An adaptive multipath mitigation
technique for gps signal reception," IEEE Vehicular Technology Conference Pro-
ceedings, vol. 2, no. 15-18, pp. 1625-1629, 2000.
[24] C. J. Comp and P. Axelrad, "Adaptive SNR-based carrier phase multipath mitigation technique," Aerospace and Electronic Systems, IEEE Transactions on,
vol. 34, no. 1, pp. 264-276, 1998.
[25] R. E. Phelts and P. Enge, "Multipath mitigation for narrowband receivers,"
IEEE Position Location and Navigation Symposium, no. 13-16, pp. 30-36, 2000.
[26] W.-J. Chang and J.-H. Tarng, "Effects of bandwidth on observable multipath
clustering in outdoor/indoor environments for broadband and ultrawideband
wireless systems," Vehicular Technology, IEEE Transactions on, vol. 56, no. 4,
pp. 1913-1923, 2007.
144
BIBLIOGRAPHY
[27] D. C. K. Lee, K. W. Sowerby, and M. J. Neve, "Extracting fine multipath detail
from measured data at 5.8 GHz," IEEE Vehicular Technology Conference, vol. 1,
no. 17-19, pp. 74-78, 2004.
[28] P. C. Ching and H. C. So, "Two adaptive algorithms for multipath time delay
estimation," Oceanic Engineering, IEEE Journal of, vol. 19, no. 3, pp. 458-463,
1994.
[29] C.-T. Chen, Linear system theory and design. New York: Oxford university
press, third ed., 1999.
[30] P. Maes, T. Darrell, B. Blumberg, and A. Pentland, "The ALIVE system: wireless, full-body interaction with autonomous agents," Multimedia Syst., vol. 5,
no. 2, pp. 105-112, 1997.
[31] J. Hightower and G. Borriello, "Location systems for ubiquitous computing,"
Computer, IEEE, vol. 34, no. 8, pp. 57-66, 2001.
[32] A. Y. Benbasat and J. A. Paradiso, "An inertial measurement framework for
gesture recognition and applications," in Gesture Workshop, pp. 9-20, 2001.
[33] A. Smith, H. Balakrishnan, M. Goraczko, and N. Priyanthae, "Tracking moving
devices with the cricket location system," in 2nd International Conference on
Mobile Systems, Applications and Services (Mobisys 2004), (Boston, MA), June
2004.
[34] A. Savvides, M. Srivastava, L. Girod, and D. Estrin, Wireless sensor networks,
chapter Localization in sensor networks. Norwell, MA, USA: Kluwer Academic
Publishers, 2004.
145
BIBLIOGRAPHY
[35] Chipcon
Application
Note
AN042
-
CC2431
Location
Engine,
(http://www.chipcon.com/).
[36] Ubisense, (http://www.ubisense. net/).
[37] M. Penza, G. Cassano, P. Aversa, F. Antolini, A. Cusano, A. Cutolo, M. Giordano, and L. Nicolais, "Recognition of organic solvents molecules by simultaneous detection using SAW oscillator sensors and optical fiber devices coated
by Langmuir-Blodgett Cadmium Arachidate films," IEEE Transactions on Ultrasonics, Ferroelectrics, and Frequency Control, vol. 58, no. 8, pp. 1493-1502,
2006.
[38] R. W. Brocato, "Passive wireless sensor tags," Sandia National Laboratories,
no. SAND2004-1288, 2006.
[39] D. E. Smalley,
Q. Y.
J. Smithwick, and V. M. Bove Jr., "Holographic video
display based on guided-wave acousto-optic devices," in Proceedings of SPIE PracticalHolography XXI, vol. 6488, February 2007.
[40] Thoronics, (http: //www. thoronics. com/).
[41] K. K. Wong, ed., Properties of Lithium Niobate. London, UK: INSPEC, 2002.
[42] K. K. Berggren and H. I. Smith, Class Notes for MIT Course 6.781 "Submicrometer and Nanometer Technology". Cambridge Massachusetts: Massachusetts In-
stitute of Technology, 2007.
[43] J. D. Plummer, M. D. Deal, and P. B. Griffin, Silicon VLSI Technology. Australia:
Pearson Education International, 2000.
[44] J. G. Goodberlet, "Patterning 100nm features using deep-ultraviolet contact
photolithography," Applied Physics Letters, vol. 76, no. 6, pp. 667-669, 2000.
BIBLIOGRAPHY
146
[45] J. G. Goodberlet and B. L. Dunn, "Deep-ultraviolet contact photolithography,"
MicroelectronicEngineering, vol. 53, pp. 95-99, 2000.
[46] W. Kern, Handbook of Semiconductor Wafer Cleaning Technology - Science,
Technology, and Applications. William Andrew Publishing/Noyes, 1993.
[47] J. L. Vossen and W. Kern, Thin Film Processes. New York: Academic Press
Inc., 1978.
[48] T. Bailey, B. J. Choi, M. Colburn, M. Meissl, S. Shaya, J. G. Ekerdt, S. V.
Sreenivasan, and C. G. Willson, "Step and flash imprint lithography: Template
surface treatment and defect analysis," Vacuum Science Technology, vol. 18,
no. 6, pp. 3572-3576, 2000.
[49] C. P. Fucetolao, "Resolution limits and process latitude of conformable contact
nano-lithography," Master's thesis, Massachusetts Institute of Technology, 2007.
[50] S. Berek, U. Knauer, and H. Zottl, "I-line lithography for highly reproducible
fabrication of surface acoustic wave devices," SPIE Optical/LaserMicrolithogra-
phy IV, vol. 1463, pp. 515-520, 1991.
[51] Virtex-4 User Guide. San Jose, CA: Xilinx@, 2006.
[52] EDK 9.1 Documentation. San Jose, CA: Xilinx@, 2006.
[53] ModelSim@ SE User Manual. Wilsonville, Oregon: Mentor Graphics@, 2007.
[54] ML405 User Guide. San Jose, CA: Xilinx@, 2007.
[55] ML40x Getting Started Tutorial. San Jose, CA: Xilinx@, 2006.
[56] P. R. Gray, P. J. Hurst, S. H. Lewis, and R. G. Meyer, Analysis and design of
analog integrated circuits. New York: John Wiley & Sons, Inc., 2001.
BIBLIOGRAPHY
147
[57] P. J. Ashenden, G. D. Peterson, and D. A. Teegarden, The Systems Designer's
Guild to VDHL-AMS. San Francisco California: Morgan Kaufmann, 2003.
[58] Virtex-4 RocketIO Multi-Gigabit Transceiver User Guide. San Jose, CA: Xilinx@,
2006.
[59] R. Cooper, "Initial implementation of the pTags localization transponders," Master's thesis, Massachusetts Institute of Technology, 2007.
[60] K. Pahlavan, X. Li, and J.-P. Mikels, "Indoor geolocation science and technology," Communications Magazine, IEEE, vol. 40, no. 2, pp. 112-118, 2002.
[61] C. S. Hartmann, D. T. Bell Jr., and R. C. Rosenfeld, "Impulse model design of
acoustic surface-wave filters," Sonics and Ultrasonics, IEEE Transactions on,
vol. 20, pp. 80-93, April 1973.
[62] P. Ventura, J. M. Hod6, M. Solal, J. Desbois, and J. Ribbe, "Numerical methods
for SAW propagation characterization," IEEE Ultrasonics Symposium, pp. 175186, 1998.
[63] K. Uehara, C.-M. Yang, T. Shibata, S.-K. Kim, S. Kameda, H. Nakase, and
K. Tsubouchi, "Fabrication of 5-GHz-Band SAW filter with atomically-flatsurface AlN on sapphire," IEEE Ultrasonics Symposium, vol. 1, no. 23-27,
pp. 203-206, 2002.
[64] F. Moeller, A. Rabah, M. A. Belkerdid, and D. C. Malocha, "Differential phase
shift keying direct sequence spread spectrum single SAW based correlator receiver," IEEE Ultrasonics Symposium, pp. 189-193, 1994.
[65] J. Temmyo and S. Yoshikawa, "On the fabrication and performance of SAW delay
148
BIBLIOGRAPHY
line filters for GHz SAW oscillators," Sonics and Ultrasonics, IEEE Transactions
on, vol. 25, no. 6, pp. 367-371, 1978.
[66] L. B. Milstein and P. K. Das, "Surface acoustic wave devices," Communications
Magazine, IEEE, vol. 17, no. 5, pp. 25-33, 1979.
[67] R. W. Brocato, "A zero-power radio receiver," Sandia National Laboratories,
no. SAND2004-4610, 2004.
[68] K.Yamanouchi, G.Shimizu, and K.Morishitat, "2.5 GHz-range SAW propagation and reflection characteristics and application to passive electronic tag and
matched filter," IEEE Ultrasonics Symposium, pp. 1267-1270, 1993.
[69] Skeie et al, "Surface acoustic wave passive transponder having acoustic wave
reflectors," United States Patent 4, 625, 208, November 25, 1986.
[70] Hartmann et al, "Single phase unidirectional surface acoustic wave transducer
and improved reflectors," United States Patent 7,173, 360, February 6, 2007.
[71] Lanzl et al, "Dual mode tracking system," United States Patent 6, 353, 3406,
March 5, 2002.
[72] Nysen et al, "Passive interrogator label system having offset compensation and
temperature compensation for a surface acoustic wave transponder,"
United
States Patent 4, 734, 698, March 29 1988.
[73] Skeie, "Surface acoustic wave passive transponder having amplitude and phasemodifying surface pads," United States Patent 4, 625, 207, November 25, 1986.
[74] Nysen et al, "System for interrogating a passive transponder carrying phaseencoded information," United States Patent 4, 725, 841, February 16, 1988.
BIBLIOGRAPHY
149
[75] Epstein, "Passive transponders using acoustic surface wave devices," United
States Patent 4, 059, 831, November 22, 1977.
[76] L. Reindl, C. C. W. Ruppel, S. Berek, U. Knauer, M. Vossiek, P. Heide, and
L. Oreans, "Design, fabrication, and application of precise SAW delay lines used
in an FMCW radar system," Microwave Theory and Techniques, IEEE Trans-
actions on, vol. 49, no. 4, pp. 787-794, 2001.
[77] U. Wolff, F. L. Dickert, G. K. Fischerauer, W. Greibl, and C. C. W. Ruppel,
"SAW sensors for harsh environments," IEEE Sensors Journal,vol. 1, pp. 4-13,
June 2001.
[78] J. Bachrach and C. Taylor, Book Chapter: Localization in Sensor Networks.
Cambridge Massachusetts: Computer Science and Artificial Intelligence Laboratory at Massachusetts Institute of Technology, 2004.
[79] D. Smalley and T. Pastureaud, "An eigenmode method for fast cascade of Pmatrices," Master's thesis, SAW Research and Development, TEMEX Microsonics, 2005.
[80] S. Lindebner, H. H. Friihauf, J. Heubeck, R. Wansch, and M. Schiihler, "Evaluation of direction of arrival location with a 2.45GHz smart antenna system," in
Proceedings of Signals, Sensors and Devices, (Sousse), 2005.
[81] K. Yamanouchi, G. Shimizu, and K. Morishita, "2.5 ghz-range saw propagation and reflection characteristics and application to passive electronic tag
and matched filter," in Ultrasonics Symposium, 1993. Proceedings., IEEE 1993,
vol. 2, pp. 1267 - 1270, October 1993.
[82] L. Reindl and W. Ruile, "Programmable reflectors for SAW-ID-tags," in Ultrasonics Symposium, IEEE Proceedings, vol. 1, pp. 125 - 130, October 1993.
150
BIBLIOGRAPHY
[83] D. P. Morgan, "Reflective array modeling for saw transducers," in Ultrasonics
Symposium, 1995. Proceedings., 1995 IEEE, vol. 1, pp. 215 - 220, November
1995.
[84] OPB PCI v1.02.a User Guide. San Jose, CA: Xilinx@, 2006.
[85] PowerPC405 ProcessorBlock Reference Guide. San Jose, CA: Xilinx@, 2007.
Appendix A
Lithography Masks
A.1
Mask 1 Generation Scripts
Mask 1 was generated using TCL scripts located in the
./msk/saw.1_3.10.2006/scripts/
directory. The make-all. tcl script was used to layout the majority of the mask.
This script uses the saw .tcl
library of procedures. After the make-all.tcl script
was run, some manual touch-up was necessary. First the devices were bumped around
to make room for a horizontal alignment mark. Then the devices near the edges of
the mask were duplicated in the remaining area. The devices on the left side were
rotated and flipped so their common edge was towards the center of the mask. The
make-string.tcl script was then run to make the title block at the bottom of the
mask. This script makes use of a char. glyph data file which is generated by the
make-char. pl script. Postscript documentation was automatically created. Some
bugs in Magic 7.3 necessitate the use of a f ix.pl script to fix the postscript output.
A comma-separated-variable listing of all the parameters for each device is output
to the specs . csv file. Note that there is an error in the make-all . tcl script. When
151
APPENDIX A. LITHOGRAPHY MASKS
152
the first 9 saw devices are made the REF-Apodization is not set correctly for the first
device. The half-fingers are not shorted correctly. This was not worth the time to
correct before making the mask.
TCL : make-all.tcl
: Make
All
Make
#
the mask
make.all.tcl
filename
authors
Jason LaPenta (JL)
date
3/4/2006 (JL)
target
Magic v7.3
[http
version
// op encircuit design. com/magic/]
: 0.3
abstract :
alpha (branch 0)
generates parameterized SAW
gratings and test features
#
Mask Layout
<-
I
I
(0,0)
(70mm,70mm)
II
I
I
->
#
the
#
the mask
#
the
bottom
is
corner of 7
is
(0,0)
4" .square, .with..an..inset ...to
artwork of 15mm on each
a square of 70x70mm for
the
#
Changes
#
Date
#
2/12/06
JL
New File
#
3/5/06
JL
Added in
#
3/6/06
JL
redid layout
Who
saw
creation library
source saw.tcl
giving
artwork
Description
devices
#
side,
dual port saws
in
to pack many
a 70mm x 70mm area
153
A. 1. MASK 1 GENERATION SCRIPTS
#
next
#
moves
available space on the die
to the next
proc next { } {
global
offset-x
global
offset-y
global
id
incr
id
set pos
set
pos]
[magic::box
size
size]
[ magic::box
set x
[lindex $pos
0]
set y
[lindex
Spos
1]
set w
[lindex
$size
01
set h
[lindex
$size
1)
#we've
run
{ $y
if
of room, stop moving
out
< $h && $offset-x
>
[expr 70000/2}
} {
puts "\n\n..****OUT..OFROOM..***\n\n"
return
#
check
#
if
if
if
device
last
fits
not then move
{ $x + $w
> [expr
magic::move
magic::box
(70000 /
+
2)
$offset-x -
2000]
to
$offsetx
[expr $y -
$h -
move east
[expr Sw +
$offset-y]
move east
[expr $w +
$offset-y]
$offset.y]
} else {
magic::box
if { $y < 2*$h } {
set
offset-x
magic::box
#
output
#
makes postscript
} {
visible
magic::select
[expr 70000/2
position
outputs
+ 1000]
[expr 70000 -
Soffset-x
1500]
154
APPENDIX A. LITHOGRAPHY MASKS
100
101
proc output { x y bw bh id } {
102
103
#
104
set bw2 Sbw
limit
width so
105
if
documentation is
readable
{ Sbw2 > 4000 } {
106
set bw2 4000
}
107
108
109
magic::box
position
110
magic::box
size
111
magic::plot
$x
$bw2
[expr $y -
450]
[expr $bh + 450]
postscript
saw-{format
"%\#05x"
112
113
# delete
114
magic::box
115
magic::select
116
magic::delete
documentation labels
size
$bw2 450
visible
117
118
magic::box
position
119
magic::box
size
120
$x
$y
$bw $bh
}
121
122
,
123
#
124
#
125
#
#
-
x
position
of first
finger
126
y
-
y
position
of first
finger
127
#
h
-
height of surrounding box
128
#
w
-
width
make-cell
of surrounding box
129
-
130
131
proc make.cell
{ } {
132
133
global
saw.spec
the
134
135
#
136
set
save
pos
box
137
set
x [lindex
138
set y
position
for
[magic::box
[lindex
$pos
0]
$pos
1]
later
position]
139
140
set
141
set w
$saw-spec(IDT-Width)
142
set
I
$saw-spec(IDT.Length)
143
set
a
$saw-spec (IDT-Apodization)
145
set
lw
$saw-spec(Leg-Width)
146
set
po
$saw-spec( Pad -Offset)
147
set
pw
$saw-spec(Pad-width)
148
set
ph
$saw-spec( Pad-height)
150
set
in-f
$saw-spec(IN-Fingers)
151
set
r-f
$saw-spec( REF-Fingers)
152
set
r-s
$saw-spec (REF-Spacing)
153
set
r.n
$saw-spec(REF..Number)
s
$saw-spec(IDT-Spacing)
144
149
$id] .ps
metall
labels
155
A. 1. MASK 1 GENERATION SCRIPTS
154
set
s-l
$saw-spec(Stop-Length)
set
id
$saw-spec(ID)
155
156
157
box
width
of the
158
#
159
# 50um of
padding
160
set
50
161
# width of the test features
162
set
calculate the
pad-x
surrounding box
250
test-w
163
+ Spw + $po +
($s+$w)*$inff]
164
set bw [expr 2*$pad-x
165
set bw [expr
$bw + $r-n*($r-f*($s+$w)+$r-s )]
166
set bw [expr
$bw + 2*$s1 +
$po +
$r-s +
$test-w]
167
168
#
calculate the box
169
#
50um of padding
170
set pad-y 50
height
of the
surrounding box
171
set bh
172
[expr 2*Spad-y + 2*$ph + (2*$1-$a)]
173
174
# make the surrounding box
175
make-outline
$bw Sbh 20
176
177
# make the device
178
magic::box
179
make-saw
position
$x
saw-spec
[expr
$x +
$pad-x)
$y $bw $bh Spad-x
[expr
$y +
$pad-y]
Spad-y
180
181
# make
182
magic::box
183
make-test
structures
test
position
[expr $x + $bw -
$test-w
]
[expr $y +
Spad-y]
$bh
184
185
# make index
186
magic::box
187
make-id
number
position
[expr $x
+ $pad-y +
$id
188
189
# document parameters
190
magic::box
position
191
magic::box
move
192
document
saw.spec
194
# output
postscript
195
output
$x $y
south 50
$x $y $bw $bh
193
196
drawing
$x Sy $bw $bh Sid
}
#
make-dual
x
-
x
first
finger
#
y
-
y position of first
finger
#
h
-
height
#
w
-
width
position of
proc make-dual
of surrounding box
of
{
surrounding
} {
box
$s_1
+ 2*Spo + $pw]
[expr
$y +
$pad-y]
156
APPENDIX A. LITHOGRAPHY MASKS
208
209
global
saw-spec
210
211
save
the
box
212
set
pos
213
set
x [lindex
214
set y
position for
[magic::box
[lindex
later
position]
$pos
0]
Spos
1}
215
216
set
217
set w
s
$saw-spec(IDT-Spacing)
$saw-spec(IDT-Width)
218
set
1
$saw-spec (IDT-Length)
219
set
a
$saw-spec(IDT-Apodization)
221
set
lw
$saw-spec(Leg-Width)
222
set
po
$saw-spec(Pad-Offset)
223
set pw
$saw-spec(Pad-width)
224
set
ph
$saw-spec(Pad-height)
220
225
226
set
in-f
$saw-spec(IN-Fingers)
227
set
r-s
$saw-spec(REFSpacing)
228
set
s-1
$saw-spec(Stop-Length)
set
id
$saw-spec(ID)
229
230
231
232
#
233
# 50um of padding
calculate the
234
set
235
#
236
set
pad-x
width
box
width of
the surrounding box
50
of the
test-w
test
features
250
237
238
set bw [expr 2*$pad-x
239
set bw [expr $bw +
+ 2*$pw + 2*$po + 2*($s+$w)*$in-f]
Sr-s + 2*$s-l
+ 2*$po +
Stest-w}
240
242
# calculate the box height of the surrounding box
# 50um of padding
243
set
pad-y
set
bh [expr 2*$pad-y
241
50
244
245
+ 2*$ph +
(2*$1-Sa)]
246
247
# make the surrounding box
248
make-outline
$bw
$bh 20
stop
block
249
250
# make
251
magic::box
position
252
magic::box
size
253
magic::paint
left
[expr $x + Spad-x]
$s-l
[expr $bh -
[expr
$y
+ $pad..y]
2*$pad-y]
metall
254
255
# Make Input and Output IDTs
256
set
saw-spec(IDT-Fingers)
257
set
saw-spec(Include-Pads)
258
magic::box
move
north
[expr $ph]
259
magic::box
move
east
[expr
260
make-idt
261
magic::box
$saw-spec (IN -Fingers)
1
$s-l
+ 2*$po + Spw]
saw-spec
move
east
[expr
($s+$w)*$in-f +
$r-s
)
157
A. 1. MASK 1 GENERATION SCRIPTS
set
saw-spec(Include-Pads)
make-idt
# make
saw-spec
right stop block
east
magic::box move
south
magic::box
$ss1
size
magic::paint
metall
magic::paint
metall
make
#
$ph]
[expr
$bh -
[expr
2*$pad-y]
structures
test
[expr $x + Sbw -
position
magic::box
$pw + 2+$po + ($s+$w)*$in-f]
[expr
magic::box move
$test-w
make-id
[expr
position
magic::box
$x +
$pad.y +
$s.1
Sid
document parameters
#
magic::box
position
magic::box
move south 50
saw.spec
document
Sx
$x
drawing
Sy $bw $bh
output $x
Sy
$y $bw $bh
output postscript
#
Sid
-N-
offset-x
1000
set
offset-y
50
device
set
#
id
id
0
position
start
magic::box
#
#. . . . .
postscript
.
.
.
.
.
files
fileld
.
.
.
.
.
to print out
a file
exec rm -f
set
old
". /delps"
# open
set
1000 [expr 70000
position
any
delete
exec
device
spacing of each
offset
set
#
Sy
+ $pad.y]
make index number
#
#
] [expr
$bh
make-test
.
.
.
.
docs
specs.csv
[open
fileVars
{
IDT.Spacing
specs.csv w 0600]
.
-
1500]
+ 2*Spo +$pw}
[expr
$y+
$pad-y}
158
APPENDIX A. LITHOGRAPHY MASKS
316
IDTWidth
317
IDT-Length
318
IDT-Apodization
319
IN-Fingers
320
REF-Fingers
321
REF-Spacing
322
REF.Number
323
REF-Apodization
324
REF-Leg-Width
325
Stop-Length
326
Leg-Width
327
Pad-Offset
328
Pad-width
329
Pad-height
Include-Pads
330
331
}
332
333
set
334
foreach
335
set
336
}
337
puts
buf
"ID,-x,-y,-w,-h,"
v $fileVars
{
buf "$buf$v, ."
Sfileld
"$buf-\n"
338
339
340
341
342
#
Make
Devices
343
344
345
346
347
348
# make a few
very
long SAW
349
350
351
array set
{ID}
saw-spec {
0
10
352
{IDT-Spacing}
353
{IDT-Width}
354
{IDT-Length}
300
355
{IDT-Apodization}
270
356
{IN-Fingers }
357
{REF-Fingers}
40
358
{REF-Spacing}
2000
359
{REF.Number}
360
{REF-Apodization}
361
{REF-Leg-Width}
362
{Stop-Length}
363
{Leg-Width}
364
{Pad-Offset}
365
{Pad-width}
200
366
{Pad-height}
200
367
{Include-Pads}
368
369
}
10
20
10
270
20
200
20
50
1
devices
159
A. 1. MASK 1 GENERATION SCRIPTS
370
set
$saw.spec(IDT-Length)
len
371
372
foreach w {
10 5 3
373
374
set
saw-spec(IDT-Spacing)
$w
375
set
saw.spec(IDT.Width)
$w
376
set
saw-spec(IDT-Apodization)
[expr
378
set
saw-spec(REF.Leg-Width)
20
379
set
saw-.spec(ID)
380
make-cell
381
next
377
Sid
382
383
set
saw.spec(REF-Apodization)
384
set
saw-spec(ID)
385
make-cell
386
next
300
Sid
387
388
set
saw-spec(REF-Apodization)
300
389
set
saw.spec(REF-Leg-Width)
0
390
set
saw.spec(ID)
391
make-cell
392
next
Sid
393
394
}
395
396
397
#
398
# For testing
only
399
400
# ..............................................
401
# make
402
#
403
# set
404
#
405
# next
set
vertical
alignment marks
saw-spee(REF-Spacing) 300
saw-spec(ID)
$id
make.cell
406
100
407
# set
saw-spec(IDT.Length)
408
# set
saw-.spec(IDT-Apodization)
90
409
#
set
saw-spec(REFApodization)
90
410
#
make-cell
411
#
next
412
1000
413
#
set
saw.spec(REF.Spacing)
414
#
set
saw-spec (IDT-Length)
415
#
set
saw-spec(IDT-Apodization)
90
416
# set saw-spec(REF-Apodization)
90
417
418
#
make.dual
419
420
#return
421
#
422
423
testing
100
$len
3
*
Sw]
160
APPENDIX A. LITHOGRAPHY MASKS
424
425
array
set
saw-spec
426
{ID}
427
{IDT-Spacing}
428
{IDT-Width}
429
{IDT-Length}
430
{IDT.Apodization} 296
431
{INFingers}
20
432
{REF.Fingers}
40
433
{REF.Spacing}
0
434
{REFNumber}
435
{REF-.Apodization}
436
{REF.Leg-Width}
437
{StopLength}
438
{Leg-Width}
439
{Pad-Offset}
50
440
{Pad-width}
200
441
{Pad-height}
200
442
{Include-Pads}
443
0
10
10
300
5
296
20
200
20
1
}
444
445
446
# finger
447
foreach
448
length
len { 300 200 100 }
foreach w { 10 5
{
3}{
449
451
# set reflector
apodiztion for fully shorted(0), 1/2 shorted(1)
# and grating(2)
452
foreach
450
a { 0 1 2}{
453
454
set
saw-spec(IDT-Length)
$len
455
set
saw-spec(IDT-Spacing)
$w
456
set
saw-spec(IDT.Width)
Sw
457
set
saw-spec(IDTApodization)
[expr
Slen -
3 *
$w]
458
459
if
Sa
{
< 2}{
460
set
saw-spec(REF-Apodization)
[expr
461
set
saw.spec (REF-LegWidth)
$saw-spec (LegWidth)
462
3
* Sw *
$a]
} else {
463
set
saw-spec(REFApodization)
$len
464
set
saw.spec (REF..Leg.Width)
0
465
Slen -
}
466
467
468
#
469
foreach
spacing
s {2.0
470
#
471
foreach i-f
1.3
number of in
2.5} {
fingers
{10 50 20} {
472
#
473
foreach
number of reflector
rf
{2.0
fingers
1.0
1.5}
{
474
475
set
saw-spec(REF.Number)
5
476
477
#
limit
width
with
number of
reflectors
to no more than
161
A. 1. MASK 1 GENERATION SCRIPTS
# 10000um
set we
*
[expr int((Sr-f
$i.f)*2*$w
+
($s
* $w))*5]
*
*i-f
2
int($s
*
$i-f *
while { $we > 8000 } {
-1
incr saw-spec(REFNumber)
{ $saw-spec(REF.Number) <= 2 } {
if
break;
}
if
*
(int(Sr-f
set we [expr
{ $saw.spec(REFNumber)
$i-f)*2*$w
$i-f
set
saw-spec(REF-Fingers)
[expr
int(Srf
set
saw.spec(REF-Spacing)
(expr
int($s
set
saw-spec(ID)
Sid
make-cell
magic::box
$pos
dual port IDTs
1}
position
[expr $y
Soffset-x
len { 300 200 100
foreach w
making
pos]
[magic::box
set y [lindex
foreach
before
line
move to next
-
1000]
} {
{ 3 5 10 } {
set
saw.spec(IDT-Length)
$len
set
saw-spec(IDT.Spacing)
$w
set
saw-spec(IDT.Width)
$w
set
saw-spec( IDT.Apodization)
foreach
set
i
{10 20 50}
[expr
$len
3
*
Sw]
{
saw-spec(IN.Fingers)
$i
foreach s {2.0 2.5 3.0 3.5} {
set
saw-spec(REF.Spacing)
set
saw-spec(ID)
make-dual
next
Sid
[expr
2 * $w))*$saw-spec(REF.Numb
> 2 } {
set saw-spec(IN.Fingers)
next
set pos
+
int($s*2*$w*$i)]
*
*
Si.f)]
Si-f
*
2
*
$w)]
162
APPENDIX A. LITHOGRAPHY MASKS
#........ . . . . . . . . . . . . . .
# make vertical
magic::box
alignment marks
size 250 70000
# .... .. . . . . . . . . . . . . . . .
# make vertical
magic::box
foreach
i
alignment marks
size 250 70000
{ 0 34750 69750 } {
magic::box
position
magic::paint
$i
0
metall
}
magic::box
foreach
i
size
70000 250
{ 0 69750 } {
magic::box
magic::paint
position 0
$i
metall
}
magic::select
magic::plot
postscript
all.ps
puts "fixing..postscript..files"
#exec
" . /fix"
close
$fileld
{metall}
A. 1. MASK 1 GENERATION SCRIPTS
TCL : saw.tcl
1
5-
-
-
-
-
-
-
-
SAW Library
#
filename
saw.tcl
#
authors
Jason LaPenta (JL)
#
date
: 3/2/2006 (JL)
#
target
: Magic v7.3
[http://opencircuitdesign.com/magic/]
#
: 0.2 alpha (branch
version
#
abstract
generates parameterized SAW gratings
and
test
#
#
Changes
#
2/12/06
JL
New File
#
3/5/06
JL
added in
Who
Date
0)
features
Description
right pads on IDT
# make.saw
# makes a SAW at the cursor 's
location
# pass saw spec
proc make-saw
upvar
{ sawSpecName
SsawSpecName
x y bw bh pad-x
saw-spec
s
$saw-spec
w
$saw.spec (IDT.Width)
(IDT-Spacing)
$saw-spec (IDT-Length)
$saw.spec (IDTApodization)
a
10
1w
$saw-spec
po
$saw-spec ( PadOffset)
pw
$saw-spec (Pad-width)
ph
$saw.spec (Pad-height)
in-f
$saw.spec (IN.Fingers )
r-f
$saw-spec (REFFingers)
s-1
$saw-spec(Stop-Length)
# save
set
the
box..pos
# reflector
set
r-space
(Leg-Width)
box position for
[magic::box
later
position]
spacing
$saw-spec(REFSpacing)
pady } {
163
APPENDIX A. LITHOGRAPHY MASKS
164
#
make
left
magic::box
stop block
size
magic::paint
#
[expr $bh -
$s-l
2*$pad-y]
metall
make input IDT
magic::box
move north
[expr
$ph]
magic::box
move east
[expr
$ssJ
+ 2*Spo + $pw}
set
saw-spec ( IncludePads)
1
set
saw-spec(IDT-Fingers)
$saw-spec(IN.Fingers)
make-idt
#
saw-spec
reflectors
setup for
set
saw.spec(Include-Pads)
0
set
saw-spec(IDT-Fingers)
$saw-spec (REF-Fingers)
set
saw-spec(IDTApodizatior i)
$saw-spec(REF-Apodization)
set
saw-spec(LegWidth)
$saw-spec (REF.LegWidth)
# make
reflectors
set
r-num
for
{ set
set
$saw-spec(REFNumber)
i
0}
size
{ Si
size]
move east
[expr
magic::box
[lindex
restore led
saw-spec(LegWidth)
S1w
set
saw-spec(IDT-Apodization)
$a
add in
stop
+
Sr-space]
block
magic::box
move
magic::box
move south
#
0]
width and apodization
set
#
$size
saw-spec
make-idt
#
{
i}
< $r-num} { incr
[ magic::box
east
[lindex $size 0] +
[expr
Sr-space]
[expr $ph]
magic::box move south [expr $l/2]
[expr 2.$l]
magic::box size $s-l
size
magic::box
magic::paint
#
box
[expr $bh -
$s..
2*$pad-y]
metall
around the
whole
device
# draw box around new idt
# todo y overshoots by a small amount
magic::box
position
magic::box
move
magic::box
move west
set
r-x-dist
magic::box
[lindex
[expr
$size
0]]
[lindex
$box-pos
1]
[expr $ph]
[expr $pw+Spo]
[expr ((Ss +
size
0)
[lindex $box-pos
south
Sw)*$r-f +
Sr.x-dist
$r-space) *$r-num +
+ $pw + $po + 2*[Iindex
[expr 2*$1-$a
+ 2*Sph]
# make-idt
# makes and IDT at the cursor 's
location
($s
+ $w)*Sin-f}
$size
01 +
165
A. 1. MASK 1 GENERATION SCRIPTS
107
#
108
# pass spec
109
110
{ specName }
make-idt
proc
111
box
save
position and size
112
#
113
set
box.pos
[magic::box
position]
114
set
box-size
{magic::box
size]
115
spec
$specName
upvar
116
117
118
set s
Sspec(IDT.Spacing)
119
set w
Sspec(IDT.Width)
120
set
121
set a
$spec (IDT.Apodization)
122
set num
$spec(IDT-Fingers)
123
set lw
$spec(LegWidth)
124
set po
$spec(Pad-Offset)
125
set pw
$spec(Pad-width)
126
set ph
Sspec(Pad-height)
1
Sspec(IDT.Length)
127
128
#
puts "\n--Making.3AW.IDT.(-$s,-$w,.$1,.$a,..num,.$1w.)\n"
129
[magic::box
130
set
start.pos
131
set
start-pos-x
[lindex
$start-pos 0]
132
set
start-pos-y
[lindex
$start-pos
position]
1]
133
134
# apodization offset
135
set
ao
[expr ($1 -$a)/2]
136
137
# make one finger
138
magic::box
139
magic::paint
at 0,0
size $w
$1
metall
140
finger
second offset
141
# make
142
magic::box
move
143
magic::box
move up $ao
144
magic::paint
[expr $w +
right
Ss]
metall
145
number of finger times
146
# array 2 fingers
147
magic::box
move
148
magic::box
move down $ao
149
magic::box
size
150
magic::select
[expr $w +
left
[expr 2
$s]
[expr
($w+$s)]
*
$1 + Sao]
visible
151
152
if
{
{expr Snum % 2] > 0
} {
odd number of finger
153
#
154
magic::array
155
// delete
[expr
last
($num
+
1)
/
2] 1
finger
clear
156
magic::select
157
magic::box
move
right
158
magic::box
size
$w
159
magic::select
160
magic::delete
[expr
[expr
visible
($w
+
$1 + Sao]
$s)*$num]
166
APPENDIX A. LITHOGRAPHY MASKS
} else {
#
even number of finger
magic::array
(expr
$num /
2] 1
}
# make bottom
leg
magic::box
position
magic::box
move up
if
$start-pos-x
$start-pos-y
[expr -Slw]
{ [expr $num % 2] > 0 } {
#
odd number of finger
magic::box
} else
#
size
[expr
($w
+ $s)
*
$num -
$s]
+ $s)
*
($num
1)
$1w
{
even number of finger
magic::box
size
[expr
($w
-
$s]
$1w
}
#
if
correct for
shorted grating
{ Sa >= $1 } {
if
{ [expr
#
Snum
> 0 } {
% 2]
odd number of finger
magic::box
size
[expr
($w
+ $s)
* ($num
-
1)
+
$w]
$w
+ $s)
* ($num
-
1)
+
$w]
$w
} else {
even number of finger
#
magic::box
size
[expr
($w
}
magic::paint
#
make
top
leg
magic::box
if
metall
position
#
} else
#
]expr
$start-pos-y +
$1 + Sao]
[expr ($w
+ $s)
* (Snum -
2)
-
$s]
$1w
+ $s)
* ($num
1)
-
$s]
$w
even number of finger
correct for
{ $a >=
{
size
[expr
-
shorted grating
position
[expr $num % 2]
#
($w
} {
$1
magic::box
if
size
{
magic::box
if
$start-pos.x + $w + $s]
odd number of finger
magic::box
#
[expr
{ [expr $num % 2] > 0 } {
[expr
$start-pos-x ] [expr
$start-pos-y +
> 0 } {
odd number of finger
magic::box
size
[expr
($w
-
2)]
Sw
* (Snum -
1)]
$lw
* ($num
+ $s)
} else {
#
even number of finger
magic::box
magic::box
magic::paint
size
metall
size
[expr
[expr ($w
(Sw + $s )
+ $s)
*
$num -
Ss]
Slw
$1
+ Sao]
167
A. 1. MASK 1 GENERATION SCRIPTS
# Make bond pads
if
requested to
if
{$spec(Include-Pads)
the
left
{
1}
=
puts ".-Making...pads.(...$po,-$pw,.$ph.)\n"
leg
# make bottom
magic::box
position
magic::box
size
magic::paint
leg
magic::box
move up
magic::box
size
magic::paint
$po]
$po
I
{expr
$start-pos-y
-$1w]
$1w
$1 +
$ao +
$s +
$1w]
$po}
S1w
bottom pad
position
size
[expr
-$po
-$pw
$start-pos.x
-$po
-pw]
]
[expr $start.pos-y
-$ph]
leg
top
magic::box
position
magic::box
size
[expr
[expr $start-posy
$pw $ph
metall
magic::paint
# Make bond pads if
requested to
{$spec(Include-Pads)
position
the
right
{
-11
=
$po,...Spw,...$ph.)\n"
puts "..Making...pads...(
magic::box
$start-pos-x
Spw $ph
metall
magic::paint
if
+
metall
magic::box
make
[expr
[expr $w +
magic::box
#
$s
metall
# make top
# make
$start.pos-x -
[expr
[expr $w +
$start-pos.x
$start-pos-y
# make bottom leg
magic::box
move east
magic::box
size
magic::paint
[expr ($w
{expr
$w +
+
* (Snum
$s)
$s + $po]
-$1w
metall
# make bottom pad
[expr Sw +
magic::box
move east
magic::box
move north
magic::box
size
magic::paint
$pw
+
Spo]
-$ph
metall
# make top
leg
magic::box
move up
magic::box
move west
magic::box
size
magic::paint
$s
$1w
[expr
$1 + $ao + $ph]
[expr $w +
$s +
$po}
$s +
Spo]
$1w
[expr Sw +
metall
# make top pad
[expr $w + $s
magic::box
move
east
magic::box
size
$pw $ph
magic::paint
metall
+ $po]
1)
$s]
+ $i
+ $ao]
168
APPENDIX A. LITHOGRAPHY MASKS
269
# draw box around new idt
270
magic::box
position
271
magic::box
size
272
[lindex
[expr (Ss
$box-pos
+ $w)*$num -
0]
[lindex
$s]
[expr
$boxpos
2*$I-Sa]
}
273
274
#
275
#
276
#
277
# labels SAW with paramaters
# w - width
# h - height
278
279
document
280
281
{
proc document
specName
x y w h } {
282
283
upvar $specName
284
global
offset-x
285
global
offset-y
spec
286
287
288
# vertical
offset
289
set
100
os
between
lines
290
291
292
293
# check if last device fits
# if not then move
if
{ $x + $w
294
set
295
296
/ 2)
> (70000
-
$offset.x
x Soffset-x
[expr $y -
set y
Sh -
$offset-y]
}
297
298
# document with lables
299
300
set
vals
{
301
IDT-Spacing
302
IDT-Width
303
304
IDT-Length
}
305
306
set
307
foreach
308
set
309
doc
"[format."%\#05x"-$spec(ID)]($x,$y)\[Sw.x-$h\]"
$vals {
var
doc "Sdoc:Svar=$spec
($var)"
}
310
311
magic::box
312
regsub
size 1 1
313
puts
314
magic::label
315
magic::box
{\s} $doc {-} string
-all
$string
$string
move
south
316
317
318
set
vals
Leg-Width
319
Pad-Offset
320
Pad-width
321
Pad-height
322
IDT-Apodization
southeast
Sos
1]
169
A. 1. MASK 1 GENERATION SCRIPTS
set
doc ""
Svals
foreach var
regsub
{
"Sdoc:$var=$spec (Svar)"
set doc
{-} string
{\s} $doc
-all
puts $string
set
southeast
$string
magic::label
$os
move south
magic::box
{
vals
IN.Fingers
REF-Fingers
REF-Spacing
}
set
doc
var
foreach
Svals
{
doc " $doc:Svar=$spec ( Svar)"
set
}
regsub
puts
{\s} $doc {-} string
-all
$string
magic::label
#
$string
southeast
add to CSV file
global
fileld
global fileVars
set buf " [format."%\#05x"..$spec(ID)
foreach v $fileVars
set
{
buf "$buflspec($v),."
I
puts
$fileld
"$buf"
# make.test..boxes
# make two boxes
{ } {
proc make-test-boxes
set
size
64
while { $size
magic::box
> 2 } {
size
magic::paint
magic::box
move
magic::paint
magic::box
$size
$size
metall
northeast
metall
move
west
$size
$size
,..x,-$y,
.. w, .h,"
APPENDIX A. LITHOGRAPHY MASKS
170
377
size
{expr
378
set
379
magic::box
$size
/ 2]
move north
{expr
$size
+ 10]
$size
+
380
381
382
383
384
# make-test-grating
385
386
# horizontal test
lines
387
388
proc
make.test-grating
{ y bh } {
389
390
set
size
391
set
total 0
3
392
set
width 200
393
while
394
< 50 } {
{ $size
395
magic::box
size
396
magic::paint
Swidth
$size
metall
397
398
magic::box
399
set
total
400
set
size
move north
[expr
[expr
[expr
$total +
$size
$size
10]
+ 10]
* 1.5]
401
402
{ $bh < 750 } {
if
403
404
return
405
406
407
magic::box
move
north
$size
408
409
set
410
while
size 3
< 30 } {
{ $size
411
412
size
413
magic::box
414
magic::paint
$width 20
metall
415
416
magic::box
417
set
size
move north
[expr
$size
[expr
* 1.5 ]
418
419
420
421
422
# make-test
423
424
# makes both boxes and gratings
425
426
proc
make-test
{ bh } {
427
428
set
429
set y
430
pos
[magic::box pos]
[lindex Spos 1]
$size
+
20]
A. 1. MASK 1 GENERATION SCRIPTS
#
puts "Making.Test..Features"
make.test.boxes
Sbh
$y
make-test-grating
#
50
move north
magic::box
make..ticbox
# Makes corner and outline dashes
# w -
width
#
height
h -
# Is # ts -
size
(tic
length)
size
(tic
thickness)
{w h
ts} {
Is
proc
make-ticbox
#
puts "Making..Tic..Box"
#
bottom
left
size
magic::box
size
magic::box
$ts
metall
magic::paint
#
$Is
metall
magic::paint
bottom
magic::box
move east
magic::box
size
magic::paint
#
bottom
$Is
{expr
1s /2]
Sw/2 -
$Is /2]
metall
right
magic::box
move
east
magic::box
size
Us
magic::paint
[expr
$ts
metall
magic::box
move
east
$Is
magic::box
size
-$ts
$Is
magic::paint
#
Sw/2 -
$ts
metall
right
magic::box move
north
magic::box
$ts
size
magic::paint
$h/2 -
$1s/2]
[expr Sh/2 -
$is/2]
[expr
$Us
metall
# top right
magic::box
move
magic::paint
north
metall
magic::box
move north
[expr
$Is
-
$ts]
magic::box
move west
[expr
$Is
-
$ts]
magic::box
size
magic::paint
# top
$Us $ts
metall
171
APPENDIX A. LITHOGRAPHY MASKS
172
magic::box
move west
magic::box
size
magic::paint
$Is
[expr Sw/2 -
$1s/2]
$ts
metall
# top left
magic::box
move west
magic::box
size
magic::paint
magic::box
$1s/2]
metall
size
magic::paint
[expr $w/2 -
$Is $ts
$ts
[expr
-$Is
+
$ts]
metall
# left
magic::box
move south
magic::box
size
magic::paint
[expr $h/2 -
$s
$ts $Is
metall
make-outline
# makes
#
a box
outline
width
w
#
h
height
#/
lw
line
width
{w h lw} {
proc
make.outline
#
puts "Making..Tic..Box"
#
bottom
magic::box
size
magic::paint
$w $1w
metall
# top
magic::box
move north
magic::paint
[expr $h -
$lw]
[expr $h -
$Iw]
metall
# left
magic::box
move south
magic::box
size
magic::paint
#
$1w
Sh
metall
right
magic::box
move
east
magic::box
size
$1w
magic::paint
[expr $w -
Siw}
Sh
metall
# make-id
# Makes a binary identification
tic
feature
/21
A. 1. MASK 1 GENERATION SCRIPTS
bin = list
of 0
and 1
proc make.id
{ id
} {
#
set
bin
set
i 0
while
{0 0 0 0 0 0 0 0 0 0}
> 0 1 {
{ Sid
[expr Sid % 2]
set
t
set
id
[expr
Iset
bin
incr
i
# size
of
/ 2]
Sid
$i]
[expr 9 -
$t
tics
set s 20
magic::box
set
size
$s
$s
i 3
foreach var
Sbin {
magic::paint
metall
{ $var
1 1 {
if
=
north
magic::move
magic::paint
magic::move
magic::move
if
{ $i % 4
0
magic::move
incr
#
[expr
south
east
=
[expr
[expr
$s
east
[expr
i
make.text
source
{ str } {
char.glyph
puts "mtext"
# set pixel
$s]
+ Ss/2]
1 {
make text
proc
$s]
metall
width and height
$s]
173
174
APPENDIX A. LITHOGRAPHY MASKS
593
set
pw 20
594
set
ph 20
595
596
magic::move
597
magic::box
north
[expr 8*Sph]
size $pw $ph
598
wright out text
599
#
600
foreach
chr
[split
{
$str
601
602
if
{ Schr =
{
"
603
magic::move
604
continue
[expr 6*$pw]
east
}
605
606
607
puts
$chr
608
set
609
glyph
[lindex
[array get
cmap $chr
610
611
foreach
612
if
613
dot
$glyph
[split
{ $dot
magic::move
} elseif
614
615
east
{ $dot
=
magic::paint
616
magic::move
} elseif
617
618
619
{
""] {
} {
"
=
$pw
} {
"0"
metall
east
$dot =
Spw
"\n"
magic::move
south
magic::move
west
} {
Sph
[expr 9*$pw]
}
620
}
621
622
623
magic::move
east
[expr 16*$pw}
624
magic::move
north
[expr 8*$ph]
625
}
626
627
628
}
] 1
175
A. 1. MASK 1 GENERATION SCRIPTS
TCL : make-string.tcl
1
{
proc mtext
} {
str
2
source char.glyph
3
4
pos]
5
set
pos [magic::box
6
set
x
[lindex
Spos 0]
7
set y
[lindex
Spos
1]
8
# set pixel width and height
9
10
set pw 40
11
set
ph 40
12
13
magic::move
14
magic::box
north
size
[expr 8*$ph]
Spw $ph
15
16
# wright out text
17
foreach
{
$str "
chr [split
18
if
19
{
} {
=
$chr
20
magic::move
21
continue
[expr 6*$pw}
east
}
22
23
set glyph
24
[lindex
[array
get cmap
Schr
25
foreach dot
26
if
27
$glyph
[split
{ $dot
east
magic::move
28
{ $dot
} elseif
29
magic::paint
30
{ $dot
} elseif
32
33
34
$pw
} {
"0"
=
metall
east
magic::move
31
{
"")
} {
=
=
Spw
"\n"
magic::move
south
magic::move
west
} {
$ph
[expr 9*$pw]
}
35
}
36
37
38
magic::move
east
[expr 16*$pw[
39
magic::move
north
[expr 8*$ph}
}
40
41
magic::box
42
43
position
$x [expr
$y
-
10*$ph]
}
44
45
mtext "Massachusetts.Institute.of..Technology"
46
mtext "uTags.SAW-Mask.1..Rev"
47
mtext
48
mtext "copyright.2006-Jason .LaPenta"
49
mtext "MIT..Media.Laboratory"
"March..10.2006"
[
1
176
APPENDIX A. LITHOGRAPHY MASKS
TCL : make-char.pl
1
#!/usr/bin/perl
-w
2
3
4
use Text::Banner;
5
$a = Text::Banner->new;
6
7
8
$a->size (1);
9
Sa->fill ('O');
10
$a->rotate('h');
11
12
13
print
"array-set...cmap-{\n";
14
15
#
16
foreach
17
#
generate a string
$c
print
"[$c]\n";
18
$c = chr($c);
19
next
20
$a->set( "$c.." );
21
print
22
Ss
if
$c =-
"{$c}...{\n"
= Sa->get;
23
$s
24
chop $s;
25
chop $s;
26
chop $s;
27
$s =
s/
28
$s
s/
29
print
$s ;
30
print
"}\n"
31
~s/\w.$//;
}
32
33
print
of all
(40..126){
"}\n"
\n/\n/mg;
/./mg;
characters
177
A. 1. MASK 1 GENERATION SCRIPTS
TCL : fix.pl
1
#!/usr/bin/perl
2
#
-w
3
#
fix
4
#
will be
postscript
generated by
files
Magic so they
displayed properly.
5
6
foreach
$fn (<*.epsi>)
{
7
print
"\n-processing.$fn\n"
10
open(
Sfh.in,
"<$fn"
11
open(
$fh.out1,
">outl.temp"
);
12
open(
Sfh-out2, ">out2.temp"
);
8
9
$1 (<Sfh-in>) {
foreach
close(
"<out1.temp"
Sfh-inl,
seek(
Sfh-in, 0,
(
$fh-outl
$1; }
);
0 );
$1 (<Sfh-in>) {
foreach
next
{ print
);
Sfh-outl
open(
if
)
$1 =~ /fb$/
(
if
);
if
$1
/fbS/
/^\/ co17/ ) {
$1
print
$fh.out2 "/col18-{0.279.0.128.0.000,0.000.sc}.bind.def\n";
I
print
if
$fh-out2
Si;
( $= =- /^115 / ) {
fb lines
# insert
print
$fh-out2
foreach
print
"5-sI\ncol18\n";
(<$fh-inl >)
$12
$fh-out2
close
Sfh.in
close
Sfh-inl
close
Sfh-out2
);
);
);
'my out2.temp $fn ';
"coll2\n"
{ print
$fh-out2
$12;
}
APPENDIX A. LITHOGRAPHY MASKS
178
A.2
Mask 2 & 3 Generation Scripts
PERL : fix.cif .layers.pl
1
#!/usr/bin/perl
-w
2
3
4
?)\. cif$/
$ARGV[0]
$fn =
$1;
print
" fixing.Sfn . cir\n-output-is...$fn .out. cif\n\n"
5
6
7
8
" dos2unix..fn . cif"
system(
);
9
10
open(
Sfhi , "<Sfn. cif"
11
open(
$fho , ">Sfn .out. cif"
)
or
die $!;
)
or die
$
12
13
$line (<Sfhi >) {
foreach
14
15
if
(
$line
=~ /^L
) {
(.*?);$/
16
17
Slast-layer = $1;
18
unless
(
defined
$1ayers{
$1ayers { $1ast-layer
19
}
$1ast-layer
=
$line;
}
20
21
} elsif
22
23
(
Sine =-
$layers {
} elsif
) {
/^B/
$last-layer
( Sline =-
}
.=
/^(DFIE)/
next;
} else
print
$fho
$line;
foreach
$key
(keys %layers)
print
$fho
$1ayers{Skey};
I
print
$fho "DF;\nE\n";
43
close (
$fhi
);
44
close(
$fho
);
{
$line;
) {
} ) {
A.2. MASK 2 & 3 GENERATION SCRIPTS
PERL : layout.pm
1
#!/usr/bin/perl
2
#
-w
3
#
Package to
4
#
'layout ' CAD
5
-4-----------------------------
generating scripts
simplify
for
tool
package layout;
BEGIN{
require Exporter;
@EXPORT, @EXPORT-OK, %EXPORT.TAGS
( @ISA,
our
@EXPORT = qw(
mirror
pt
clearPts
{
sub head
setup
selectAll
deselectAll
flatAll
macro filename
# generate the macro heading
mry $fn =
mac(
' ' ; #
point2
copy
);
newCell
rmy $mac-fn =
make-idt
mac
end
head
box
open(
);
= qw( Exporter );
@ISA
shift ;
) |
$mac.file , ">$fn"
die
$
'#!/usr/bin/layout
mac(
"#name=Macro:...Sfn..Perl.Generated"
mac(
'#help=Recorded...Thu.Jan...7..2007');
mac(
'int..main({
sub end
);
');
{ # end the macro
mac('return.0;}');
sub mac { #
print
sub
make..idt
a macro
insert
Smac-file
(shift )."\n";
{ # generate macro sequence for an IDT
$name
=
shift
Spolarity
=
shift
$c
=
shift ; # config
};
Sw = $c->{ -Width
$1 = Sc->{ -Len
};
$g =
$c->{ -Gap
};
$f
Sc->{ -Fingers
=
$a = $c->{ -Ap
hash
}; #
};
Apodization
179
180
APPENDIX A. LITHOGRAPHY MASKS
#
delete
existing idt
mac(
"layout->drawing->setCell(\"$name\");");
mac(
'layout ->drawing->delete ActuellCell ();
setup ()
#
draw IDT finger pairs
newCell ();
mac(
"layout ->drawing->c urrentCell ->cellN ame=\"$name\" ;"
box(
0,
$1 );
0, $w,
selectAll ();
copy(
0,
0,
(Sw +$g),
($1-$a)/2
);
selectAll ();
foreach
copy(
( 2.. $f
0,
0,
)
{
2*($w + $g),
);
I
if
(
Spolarity
eq
'odd'
) {
clearPts ();
selectAll ();
mirror(
0,
(3*
1,
(3* $1
$1
-
Sa)/4,
$a)/4
);
}
sub
setup
{ # setup drawing mode for metal features
deselectAll ()
clearPts ();
mac(
'layout->drawing->activeLayer=0;'
mac(
'layers ::num[O].name="metall";'
mac(
'layers::num[0].setStyle(6);' );
mac(
'layers ::num[O]. setColor (130,43,43);'
sub
box
{ #
point2(
mac(
);
);
);
draw a box
0.
);
'layout ->drawing->box();
'
}
sub
mirror
point2(
mac(
sub
'layout ->drawing->mirror();
copy { #
point2(
mac(
sub
{ # mirror the selected
copy
selected
'
objects
.. );
'layout ->drawing->copy();
point2
my (
objects
@. );
{ #
select
$xl, Syl, $x2,
$y2)
objects
= -;
'
between
two points
);
181
A.2. MASK 2 & 3 GENERATION SCRIPTS
mac(
'layout ->drawing->clearPoints(;'
pt(
$x1,
$yl);
pt(
$x2,
$y2);
sub selectAll
mac(
sub pt
mac(
{
'layout->drawing->selectAll(;
'
{ # clear selection
sub clearPts
mac(
);
();
'layout-->drawing->clearPoints
{ # start
a
)
selection
'layout-->drawing->point ('(shift
).
}
sub
flatAll
mac(
{ #
flatten
cell
'layout->drawing->flatA11;
'
}
sub
deselectAll
mac(
{
'layout-->drawing->deselectAll(;
}
sub
newCell
mac(
}
{
'layout->newCell(;
'
'
'
.(shift
).'
182
APPENDIX A. LITHOGRAPHY MASKS
PERL : idt generator : idt . pl
1
#!/usr/bin/perl
-w
2#
3
#
4
#
generates IDTs
5
6
use layout;
7
8
$macfn = $ARGV[0];
9
head(
$macfn
);
10
11
#
12
setup();
13
#
14
$g
15
$w = $IDT{ -Width
16
$1 = $IDT{ -Len
17
$f
initial
setup
all parameters in
nm
}
= SIDT{ -Gap
=
1100;
} =
1100;
}
= 100000;
} = 5;
= SIDT{ -Fingers
18
19
$IDT{ -Offset
20
$IDT{ -Ap
}
}
= 2;
= 100000;
21
22
#
23
make.idt (
make
IDTs
24
draw-rails ( 2*( $g+$w)* $f
25
$name =
26
mac(
'CODEO' ,
'even',
\%IDT );
);
"IDT-" .($w/1000)."um/" . $f."f/"
.($1/1000)."L";
"layout ->drawing->currentCell ->cellName=\" $name\";"
27
28
#
finish
up
29
selectAll();
30
flatAll ();
31
deselectAll()
32
endo;
33
exit;
34
35
#
36
sub
draw-rails
{
37
38
= shift;
my $len
39
# Rail Width
40
$rw
= 30000;
41
Srlen
=$en
42
$1
=
43
$a
= $IDT{ -Ap
+ $rw;
SIDT{ -Len
};
};
44
45
clearPts (
46
#
47
box(
48
#
49
box(
top
-$rw,
0,
$rlen , -$rw
}
);
rail
-$rw,
$1 +
($1
$rlen , $rw +
50
51
bottom rail
-
$a)/2,
$1 + ($1
-
$a)/2
)
);
A.2. MASK 2 & 3 GENERATION SCRIPTS
PERL : wide-band idt generator : wb.pl
1
#!/usr/bin/perl
2
#
3
#
A
4
-w
generates Wide Band SAW IDTS
use layout;
Smac.fn = $ARGV[0];
#
);
$mac.fn
head (
setup
initial
setup ();
# all parameters in nm
3000;
$IDT{ -Gap}
=
$IDT{ -Width
} =
3000;
=
200000;
SIDT{ -Len
}
$IDT{ -Ap}
=
194000;
$IDT{ -Fingers
}
-
20;
-
2;
}
$IDT{ -Offset
$code
= [1,0,1 ,1
1];
( 1 , 5 , 20 ){
foreach my $f
}
SIDT{ -Fingers
-
$f;
# make IDTs
make-idt (
'CODEO'
make.idt (
'CODE1'
(
$wt , $len
draw-RandP(
#
finish
' even ', \%IDT );
'odd ' , \%IDT );
) = encode(
$code,
$len );
Swt,
up
selectAll ();
flatAll ();
deselectAll ();
end ();
exit ;
# Draw Rails and pads
sub draw.RandP
{
my $wt = shift;
ry
Slen
= shift;
# Rail Width
Srw
=
30000;
Srlen
=
$wt * Slen
+ $rw;
$1
=
$IDT{ -Len
};
\%IDT
);
183
184
APPENDIX A. LITHOGRAPHY MASKS
$a
= $IDT{ -Ap
};
clearPts ();
#
rail
bottom
box( -Srw,
#
top
0,
box( -$rw,
$1 +
Srlen ,
#
)
$rlen , -$rw
rail
-
($1
$rw + $1
$a)/2,
+ ($1
Sa)/2
-
);
Draw Pads
= 100000;
Spad-size
# bottom pad
box(
#
0,
, $pad-size , (-
-Srw
box(
0,
$rw +
-
$1 + ($1
$pad-size , Srw +
sub
Spad.size
-
Srw) )
top pad
($1
-
$a)/2 +
$pad-size
);
{
encode
my $en = shift
# encoding
= shift ; # config
my $c
$a )/2,
$1 +
Sw =
$c->{ -Width
$1 =
$c->{ -Len
};
$g
=
$c->{
};
$f
=
$c->{ -Fingers
$s =
-Gap
Sc->{ -Offset
$name =
hash
};
};
}; #offset
spacing between IDTs
' ' ;
newCell ( );
# Draw Finger Encodings
my $len
= 0; #
my $wt
=2*$f*(Sw + Sg); #
total
foreach my $encoding
$name
.=
lenthing in
X
width per idt
total
( M$en ) {
Sencoding;
clearPts ();
Sen*$wt , 0);
pt(
mac(
'layout->drawing->cellref("CODE");'
mac(
'layout->drawing->celref("CODE1");'
Sien +=
print
$name
-
$name .mac(
) if
) if
Sencoding
-=
0;
Sencoding
==
1;
$s ;
Sen*$wt."...$en....\n"
"WB.[Sname].."
(Sw/1000)."um/" . $f ."f/" .( $1/1000)."L"
"layout->drawing->currentCell->celName=\"$name\";"
return (Swt ,
Sien );
);
A.2. MASK 2 & 3 GENERATION SCRIPTS
PERL : narrow-band idt generator : nb.pl
1
#!/usr/bin/perl
2
#
3
#
-w
Narrow Band SAW IDTS
generates
use
layout;
Smac_fn = SARGV[0];
head (
#
Smac.fn
);
setup
initial
setup ();
#
all parameters in
}
SIDT{ -Gap
=
}
SIDT{ -Width
= 200000;
}
SIDT{ -Ap
194000;
=
} = 1;
$IDT{ -Fingers
SIDT{
3000;
=
}
SIDT{ -Len
nm
3000;
}
-Offset
= 1;
# make IDTs
make-idt(
'CODEO',
'even',
make-idt (
'CODE1' ,
'odd',
@encode
( [1,0,1 ,1 ,1],
=
\%IDT );
\%IDT );
[0,1,1,1,1],
[1 ,j 0 ,1 1]
foreach my $code
( Swt,
Slen
draw-RandP(
#
finish
(@encode)
) =
encode(
$wt,
Slen
{
Scode, \%IDT
);
);
up
selectAll ();
flatAll ();
deselectAll ();
end();
exit;
.4
sub draw.RandP
{ # Draw Rails and pads
my Swt = shift ;
my $len =
$rw
=
shift
30000;
#
Rail Width
185
186
APPENDIX A. LITHOGRAPHY MASKS
53
$rlen = $wt *
54
$1
= $IDT{ -Len
55
$a
= $IDT{ -Ap
$en
+ $rw;
};
};
56
57
clearPts (;
58
59
# bottom rail
60
box(
61
# top rail
62
box( -$rw,
-$rw,
0,
Srlen,
$1
+
-
($1
$rlen , $rw +
63
-Srw
$1
);
$a)/2,
+ ($1
-
$a)/2
);
64
# Draw Pads
65
66
$pad-size
67
#
68
box(
69
#
70
box(
100000;
0,
-$rw
, $padsize,
$rw)
(-$padsize
);
top pad
0 , $rw +
$1
73
}
#
74
sub encode
{
-
+ ($1
$pad-size , Srw +
71
72
=
bottom pad
$a )/2,
$1 +
($1
Sa)/2 +
# make incoded finger
Spad-size
)
pattern
75
76
my Sen =
77
my $c
# encoding
shift
; # config hash
= shift
78
79
rny $w = $c->{ -Width
80
my $1 = Sc->{ -Len
};
};
};
81
my $g
= $c->{ -Gap
82
my $f
= $c->{ -Fingers
83
my $s = $c->{ -Offset
};
};
#offset
spacing between IDTs
84
85
my $name
86
mac(
-
'layout ->newCell(; '
87
88
#
89
my Slen
Draw Finger Encodings
=
90
my $wt
= 2*$f*($w
0; #
lenthing in
total
+ $g); #
X
width per idt
total
91
92
foreach my $encoding
93
$name .=
94
clearPts ();
pt ( $len *$wt , 0);
95
( @$en ) {
$encoding;
96
97
mac(
'layout ->drawing->c eIIref
98
mac(
'layout->drawing->ceIIref("CODE1");'
99
Sen +=
("CODEO"); '
) if
) if
$encoding
$encoding
$s
}
100
101
102
$name = "NB..[$name]..."
103
$name
104
mac(
105
return
106
}
($w/1000).
"um/" . $f. " f/" .( $1 /1000)."L";
"layout ->drawing->currentCe
($wt,
$en
);
l->cellName=\"$name\";"
);
0;
==
1;
187
A.2. MASK 2 & 3 GENERATION SCRIPTS
layout : outline.layout
1
#!/usr/bin/layout
2
#name= Magic
3
#help=Adds
a
Outline
items
selected
around
box
on current
layer
4
5
int maxX,maxY,minX,minY;
6
int
selected
int
getCellExtents(
= 0;
was something
/*
selected
*/
7
8
cell
int
*cellp
baseX,
int
baseY,
bool
selectall
9
10
elementList *elements;
11
element
12
cell
*element
*tmp;
13
14
pointArray
15
point p;
pa;
16
17
18
19
20
cellp
if(
!= NULL
{
= cellp->firstElement ; elements
for(elements
21
element =
22
if(
23
24
25
!=
NULL;
elements
{
elements ->thisElement
element
!= NULL )
element->select
if(
|1
)
selectall
{
selected++;
26
27
//
28
if(
reference
cell
)
element->isCellref()
{
29
30
tmp = element ->depend ();
31
pa = element ->getPoints();
32
p
33
getCellExtents(
=pa.point(0);
only change
selected
35
/*
36
i f (element ->isBox () )
37
p.y(),
p.x(),
tmp,
true
}
34
boxes
*/
{
coordinates */
38
/*
get
39
pa
= element ->getPoints(;
40
41
int
42
for(
43
idx;
idx =
0;
idx < pa.size();
p = pa. point (idx);
44
45
if(
47
if(
if(
52
baseX > maxX )
p.y() +
p.x() +
+ baseX;
baseY > maxY )
+ baseY;
baseX < minX )
minX = p.x() +
50
51
+
maxY = p.y()
48
49
p.x()
maxX = p.x()
46
if(
p.y()
+
baseX;
baseY < minY )
minY = p.y()
+
baseY;
idx++ ){
);
elements->nextElement
188
APPENDIX A. LITHOGRAPHY MASKS
}
53
54
55
}; /*
end if
element
selected */
56
57
58
}
59
%
60
int getExtents ( )
{
61
*cells;
62
cell List
63
maxX = -99999999;
64
minX =
65
maxY = -99999999;
66
minY = 99999999;
99999999;
67
68
/*
69
for(cells
check
70
{
if
something was selected
at
all */
= layout ->drawing->firstCell;
cells!=NULL;
getCellExtents( cells ->thisCell , 0 , 0 ,
71
cells=cells->nextCell)
false
72
73
74
if(
selected
== 0)
return 0;
75
76
77
return
1;
78
}
79
%
80
void drawBox ( int x1 , int yl ,int x2, int y2 ){
81
layout ->drawing->point(x1 ,y1);
layout ->drawing->point(x2,y2);
82
83
layout ->drawing->box();
84
}
85
%
86
int border ()
{
87
88
int
width
= layout ->getInteger ( "Input" , "width(um)"
89
int
offset
=
layout ->getInteger(
"Input",
"offset(um)"
)
s
90
91
minX -
offset;
92
minY -=
offset
93
maxX +=
offset
94
maxY +=
offset
95
96
drawBox(
97
drawBox ( minX,
98
drawBox(
maxX -
99
drawBox(
minX,
100
}
101
102
%int main({
103
getExtents ();
border(;
104
105
106
minX,
return 0;
}
minY,
maxX,
minY + width
);
minY + width , minX + width , maxY width , minY + width , maxX,
maxY -
width,
maxX,
maxY );
maxY -
1000;
) * 1000;
width );
width );
Appendix B
Fabrication Processes
B.1
Device Fabrication Process Details
B.1.1
Cleaning
1. Ultrasonic immersion in Alconox Detergent 10min, unheated.
2. Deionized H2 0 spray, then 10min deionized H2 0 soak.
3. Spin dry at 3000rpm.
This procedure is used to remove stubborn particles and organics from heavily contaminated dirty wafers or parts.
Table B.1: Alconox N cleaning procedure.
189
190
APPENDIX B. FABRICATION PROCESSES
1. Ultrasonic cleaning in Acetone 20min, unheated.
2. Spray clean with Acetone then Methanol then Isopropanol, and Spin dry at
3000rpm.
Acetone may also be used to remove stubborn particles and organics. While the
wafer is on the coater the Acetone then Methanol then Isopropanol may be applied
at ~~1000rpm to help dislodge particles, and then accelerated to 3000rpm to dry.
Table B.2: Ultrasonic cleaning with Acetone.
1. Mix a 3:1 H2 S0 4 :H20 2 solution by slowly adding sulfuric acid to hydrogen
peroxide
2. Gently heat on hotplate at low temperature to keep the reaction at constant
vigor.
3. Immerse sample for 20minutes. After 20minutes the efficacy of the piranha
mixture is reduced.
Table B.3: Piranha cleaning procedure.
1. Select a large Pyrex dish for spill containment and a sufficiently large Pyrex
beaker for the SC-1 solution. Place on a hotplate.
2. Fill the beaker with 4 parts deionized H2 0, then fill the Pyrex dish a 1/4 full
of H 20. Heat to 55"C.
3. Add one part ammonium-hydroxide (NH 4 0H) when solution reaches 550C.
4. Add one part hydrogen-peroxide (H2 0 2 ) when the water reaches 650C
5. Insert sample when solution reaches 750C. Maintain temperature between 750C
and 80"C.
6. When finished, remove substrate, let solution cool and then dump down drain
with lots of water. Rinse the beaker three times before drying.
Table B.4: RCA or standard clean 1 (SC-1) procedure.
B.1. DEVICE FABRICATION PROCESS DETAILS
B.1.2
191
Lithography
1. Ready coater by checking the acceleration is at the minimum setting, that the
target speed is 3500rpm t 100rpm, and the timer is set for 0 : 60s. Install the
proper containment insert and chuck (check for cleanliness).
2. Mount wafer of the chuck, dust with N 2 , and then apply ~ 0.5mL of photo
resist covering the useful area (where devices will be located) plus about 1cm
extra. Wait 10sec for photoresist to spread out and interact with the wafer's
surface.
3. Spin the wafer, remove and place in a Quartz wafer boat and then bake in the
oven at 170"C for 30minutes (PMMA).
General procedure for coating a wafer with photoresist. Bake times and temperatures
vary with resists. This procedure is for PMMA. For NR7-1000P bake for 10minute
at 130"C. The oven was used for SiO2 and lithium niobate wafers for even heating
because they have low thermal conductivity, causing poor results when using the
hotplate. An optional 0. 4 5pm filter may be used when applying the PMMA with a
calibrated syringe.
Table B.5: Photoresist coating procedure.
192
APPENDIX B. FABRICATION PROCESSES
1. Insert the long-wavelength-filter. Measure optical power output. Should be
3.5mW/cm 2 measured at a wavelength of 320nm.
2. Select the 4inch mask chuck, mount the mask pattern-side out (to contact the
wafer). Press the [VAC Mask] button. Insert and tighten the mask chuck nuts.
3. Insert the wafer with the contact lever disengaged (towards the operator). Adjust position and alignment and press the [Hard] contact button.
4. Set the exposure time to 6seconds (nominal dose for NR7-1000P, a sweep of
exposure times is often necessary to optimize the dose). Engage the contact
lever (by moving away from the operator), then press the [Expose] button.
5. NR7-1000P must be post-baked for 10minutes at 100"C.
Table B.6: Exposing using the EML high-resolution MJB3 aligner.
1. Turn Lamp ON, wait 10sec. Press Lamp Start, wait 5sec, green led to the right
of the on button should illuminate. If the lamp does not come on, wait 30sec
and then retry starting the Lamp. Wait 5 - 10min for the lamp warm up.
2. Set optical power meter to use the 220nm sensor with the switch located on the
back of connector. Slide back vacuum chuck with optical power meter sensor.
Replace housing door. Turn on exposer timer (the switch is located on the back
of the box) and take reading from the power meter. Typical values are in the
0.45mW/cm 2 . Turn off exposer and turn off optical power meter.
3. Adjust exposure time and decimal point. Use multiple exposures for times in
excess of 1000sec.
4. Proceed with substrate/mask alignment. See section C.2. Push back chuck,
replace housing door and turn on exposer.
Table B.7: Exposing using the NSL OAI.
B.1. DEVICE FABRICATION PROCESS DETAILS
193
1. Ensure enough IPA is available in the spray bottle to stop the developer.
2. Prepare 500mL of 2 part IPA to 1 part MIBK developer in 1L beaker. Place on
a hotplate set initially to ~~50"C. Heat the solution to exactly 21"C, lowering
the hotplate temperature to 30"C as the solution's temperature rises. Mixing
IPA with MIBK causes an endothermic reaction, thus the temperature must be
carefully monitored.
3. Remove the developer from the hotplate and immediately start developing the
sample for exactly 90seconds. Immediately spray with IPA for 60seconds after
wards. Dry with N2 .
4. Oven bake at 95"C for 30minutes to remove residuals. Make sure the oven
temperature is below the glass transition temperature to avoid distortions. By
increasing the temperature, some scalloping may be removed.
The developer may be reused many times. The 1L beaker should be rinsed with a
small amount of developer to remove any containments before pouring in the rest of
the developer. The developer may be stored at room temperature.
Table B.8: PMMA development procedure.
1. Develop in RD2 at room temperature for 50seconds with light agitation.
2. Submerge in deionized H2 0 for 2minutes to stop development, then dry with
N2 3. Bake at 90"C for 1minute.
This procedure was poorly implemented. The temperature of the developer should
be monitored, which may explain the inconsistent results.
Table B.9: NR7-1000P development procedure.
194
B.1.3
APPENDIX B. FABRICATION PROCESSES
Lift-Off and Etching
1. Place sample in a bath of NMP carefully heated to 80"C (NMP has a low flashpoint).
2. Gently agitate the wafer for 20min.
3. Carefully remove by spraying a sheet of NMP over the surface of the sample as
it is removed from the beaker. Rinse clean with Acetone, Methanol, IPA and
then N 2 and spin dry.
Ensure lift-off has completed as any material that has not finished liftoff may fall back
onto the wafer and be impossible to remove. Light rubbing with a swab saturated
with acetone may help stubborn lift-off and remove unwanted metal that has adhered
to surface. Only sonicate as a last resort for no more than 10seconds with < 3seconds
usually being sufficient.
Table B.10: Lift-off of PMMA.
1. Place sample in a bath of Microstrip" and Gently agitate the wafer for 20min.
2. Carefully remove by spraying a sheet of Acetone over the surface of the sample
as it is removed from the beaker. Rinse clean with Acetone, Methanol, IPA and
then N 2 and spin dry.
Table B.11: Lift-off of NR7-1000P.
B.1. DEVICE FABRICATION PROCESS DETAILS
195
1. Prepare a 75mL of one part deionized H2 0 to one part CR-7 chrome etchant
in a 250mL processing dish at room temperature.
2. Submerse PMMA coated sample in solution for 40seconds. Spray rinse in deionized H20 for 2minutes.
Table B.12: Etching chrome to fabricated a patterned mask.
APPENDIX B. FABRICATION PROCESSES
196
B.1.4
Vacuum Mask Fabrication
This process involves making a 1mm mask master using E-Beam Lithography. The
master mask is then used to create 250pm daughter masks using vacuum mask exposure tool. The daughter masks are then used for making the devices. Daughter
masks are very fragile, which is the reason a 1mm master mask is used.
The end-to-end PMMA process allows image reversal of the daughter mask. Because the daughter mask is mostly metal, Cr, the conduction should help with the
sparking caused by the LiNbO 3 handling.
adz (1mm mask)
Quartz (250pm mask)
PMMA / E-Beam Litho
PMMA Contact Litho
PMMA Contact Litho
Figure B-1: Illustrates the process for making devices by first writing a pattern to a
1mm quartz mask master, then transferring the pattern using contact lithography to
a conformal mask, and finally patterning the lithium niobate substrate to make the
desired devices.
B.1. DEVICE FABRICATION PROCESS DETAILS
1. Clean 1mm master mask.
2. Deposit 100nm PMMA.
3. Deposit 7nrm chrome.
4. Pattern with SEBL.
5. Remove Cr.
6. Develop PMMA with IPA:MIBK.
7. Descum with 2s ash (optional).
8. Deposit 40nm of chrome.
9. Lift-off with NMP to finish making master mask.
10. Clean 250um daughter mask.
11. Deposit 100nm PMMA onto daughter mask
12. RCA clean and plasma ash master mask as required.
13. Expose daughter mask with OAL.
14. Develop daughter mask with IPA:MIBK.
15. Deposit 40nm of chrome on daughter mask.
16. Lift-off with NMP to finish making daughter mask.
Table B.13: Process steps for making a conformal mask.
197
APPENDIX B. FABRICATION PROCESSES
198
Raith 150 Operational Procedure
B.1.5
Loading :
1. Load sample into load-lock chamber.
(a) Deposit 100nm gold particles in identifiable location on conductive surface.
Make a sketch.
(b) Ensure all screws are secure and gold solution is dry.
(c) Check continuity is < 3MegQ. aluminum foil.
(d) Make sure wafer flat is parallel to x-axis for alignment.
(e) N 2 dust and load sample tray ensuring counter-bore hole is aligned, then
rotate clockwise until stop.
(f) DOUBLE CHECK THAT THE CHUCK HAS BEEN INSERTED
CORRECTLY!
(g) Then close load-lock door. Ensure transfer rod is all the way out.
2. Log into Raith machine. Passwords are not used.
3. [Desktop 1-+Sample Loading-+Load Sample]
4. Ensure Roughing Pump becomes quiet.
5. Slowly insert transfer rod when prompted. Then check insertion on video
screen before continuing.
6. [OK]
Move to Upper Exchange Position.
7. Slowly remove transfer rod when prompted.
8. [OK]
Reset Coordinates System.
9. Record Extractor Current and Gun Vacuum.
B.1. DEVICE FABRICATION PROCESS DETAILS
10. [OK]
Switch On Beam.
11. [OK]
Set voltage to 10keV.
12. [OK]
Set aperture to 30pm.
13. [OK]
Set working distance to default.
14. [OK]
Set focus and stigmation.
199
15. Goto the Stage Control window's Destination tab.
(a) LENGTH = mm
(b) BASE = XYZ
(c) POSITION = absolute
(d) Z = 16.8mm
16. Put SEM into TV mode. DOUBLE CHECK PREVIOUS STEP
17. [Start] , watch motion on TV, if there is a problem click the red STOP
button.
18. [File-+Open Script-SHAKEIT. js] , press green run button. View in Height
Control window.
19. [Tools--+Goto Control Panel-+SEM Control-Detector-+InLens]
[Detector-+Auto BC]
un-blank beam, check for stable current on Keithley picoampmeter.
20. Record the Extractor I current
Focus, Align, and Stigmation:
1. Zoom to 23X and find gold particles
APPENDIX B. FABRICATION PROCESSES
200
2. Zoom to 10OkX, Focus, Stigmation
3. Focus Wobble, Align, then re-Focus.
Align Write Field :
1. Adjust UV coordinates and rotation.
(a) TV mode, goto wafer flat. Pick first point for rotation, move, pick second
point for rotation, [Adjust Rotation-+Adjust]
Make Sure Rotation
Coordinates go from LEFT to RIGHT
(b) Blank beam and move to desired write location.
[Adjust UVW(Global) -+Origin Correction-+Adjust]
Sets UV position
to (0,0)
2. Image and center gold particles, zoom out to 620X.
3. [Desktop 2->Microscope Control]
[select (''set''
620x100pm)-+Set Button]
4. [Detectors-+Auto BC Off]
Ensure Detector is InLens NOT TV.
5. [File->New Image] , [ImageScan->Single]
To move stage, [CTRL-right-click-+F5]
6. [File-*New Position List]
(a) Zoom to features with [right-click]
menu
(b) [Scan Manager-+Align write field procedures]
drag course, medium, and fine to Position List
(c) Add 100pm WF - Auto ALWF 1pm window
(d) Select and run each procedure from position list one with [F9]
B.1. DEVICE FABRICATION PROCESS DETAILS
(e) [ctrl-left]
201
and drag to reference feature.
7. Check convergence in Web Browser.
Exposing :
1. Layout a GDSII file, then import to CleWin and the save from CleWin. This
corrects various file format problems.
2. Move stage to Faraday Cup
[Stage Control--Command-+User Positions-*OCT2005-CHUCK]
3. [Desktop 4] , Zoom to 1OOkX, record picoampmeter ~~145pA at 10keV, 30pm
aperture. [Measure]
4. Add GDSII file and setup exposure
(a) [File-+New Position List]
[GDSII Database-+load file]
Drag cell to Position List.
(b) [Position List-+right-click Properties-+Expose Properties]
(c) [Expose Layer]
select layers to expose.
(d) Set UV position to expose at.
(e) Set [dose factor-41]
(f) [Calculate Dialog]
fill in step size and dose.
[dwell--time calculate icon]
(g) [Times]
to calculate write time.
(h) [Desktop 4-+Exposure-+uncheck line and dot]
(i) [OK]
to close Expose Properties
5. Add GDSII dose matrix file and setup exposure
APPENDIX B. FABRICATION PROCESSES
202
(a) Add GDSII file to Position List and setup exposure as in previous step.
(b) [Expose Properties-Calculate-+Dose]
less than main file.
(c) Select Dose Matrix cell in Position List
[Filter-*Matrix Copy]
{selected,1x6,0x( > device height),V-first,dose factor 0.1, add, auto}
6. Check UV coordinates in Position List.
7. Record all settings.
8. MAKE SURE SEM IS IN SEM MODE (NOT TV MODE)!!
9. [Beam Blank]
Check Raith beam is blanked.
10. [Position List-+Highlight Entries]
[Scan-+All]
11. Check
(a) Proper XY and UV coordinates
(b) High Performance Scan Processor, Beam On
(c) Picoampmeter.
Unloading :
1. [Desktop 1-*Sample Loading-+UnLoad Sample]
2. Insert transfer rod when prompted. Then check insertion on video screen
before continuing.
3. [OK]
Move to Lower Exchange Position.
4. Remove transfer rod when prompted.
B.1. DEVICE FABRICATION PROCESS DETAILS
Ly
Date
Wafer
Write
Vacuum Before ON
Extract-I Before ON
Extract-I After ON
Voltage
Working Distance
Stigmation
(xy)
Aperture
Beam Current
Gold
(x,y)
Field Size
Area Step
Dwell Time
Area Dose
Beam Speed
Est. Write Time
Start Write Time
Write Time
Dose Matrix
(U,V)-(xy)
Rotation
#
203
204
APPENDIX B. FABRICATION PROCESSES
Appendix C
OAI documentation
C.1
Housing Drawings
The OAI deep-UV vacuum mask lithography tool in NSL was upgraded to include
a radiation shield over the working area. The shield was made of acrylic which
attenuates A = 200nm by 60dB and A = 440nm by 40dB. To simplify the design
no fasteners were used. Instead the housing was designed with press-fit slot in hole
joints. 4-40 tapped holes were drilled along the edges for gaskets. Two clean room
corrosion-resistant magnetic catches (McMaster part number 6680A15) were used
to keep the front door in place. The patterns were drawn in Pro-Engineer, then
exported as DXF, imported into CorelDraw, and then printed using a laser-cutter at
the Media Laboratory's fabrication facilities.
205
I
206
APPENDIX C. OAI DOCUMENTATION
Figure C-1: OAI deep-UV aligner radiation shield. Made from Standard Cast
Acrylic, 0.236inch thick Clear with Bronze Tint, McMaster part numbers. 8505K921,
8505K941, and 8505K951.
I
I
I
I
I
I
26.50
SCALE
0.150
SCALE
0.100
Enginerfsh,
JasonM. LaPento (4.2007)
Massachusetts Institute of Technology
Media Laboratory
Nanostructures Laboratory
OAl Radiation Guard
"""s
i nch
A|
I 3rd,.20071|"
I A
"
Page
i of
2
207
\IIZ\
Errw(s)
Jason M. LcPento (4.2007)
Massachusetts Institute of Technology
Media Laboratory
Title
Nanostructures Laboratory
OAl Radiation Guard
hIs
SCALE
0.160
inch
Dote
April
rV0/
3rd,
I
REing
I A
200T
Page 2 of
2
I
208
2.00
4.00
9 . 50
17.00
6.00
13.50
.250
SCALE
0.400
Massachusetts Institute of Technology
hmreJcsonM.
id
LPento (4.2007)
inc h
Media Laboratory
Nanostructures Laboratory
OAl Radiation Guard (Top)
Aprt 3rd, 200711)
209
3.00
Engweer(s),
SCALE
0.350
JasonM. LaPento (4.2007)
uns
inch
Massachusetts Institute of Technology
Media Laboratory
Nanostructures Laboratory
OAl Radiation Guard (Bottom)
Apr I 3rd. 20071
I
r I
I
Page i of
i
210
I
I
10.25
Massachusetts Institute of TechnoLogy
Engineer(sh
JosonM. Lento
(4.2007)
Media Laboratory
Nanostructures Laboratory
OAI Radiation Guard (Left)
is-
h
DateDrawngNmberREV
Apr 3r d, 20071
Pagei of
I
I
/
211
I
lI
2.00
16. 50 -
R.25SCALE
0.500
Engnew(s)
JasonM. LaPento (4.2007)
Massachusetts Institute of TechnoLogy
Media Laboratory
Nanostructures Laboratory
OAI Radiation Guard (Right)
Units
inch
Dote
Apr
Drowing
N ber
REV
A
3rd, 20071
Page
I
of
I
212
I
I
I
2.00
I . 50
SCALE
0.500
Engineer(sh
o
M LaPento (4.2007)
Massachusetts Institute of Technology
Media Laboratory
""'
uths
i nc h
Nanostructures Laboratory
OAI Radiation Guard (Back)
I
3rd. 20o7 DowiREV
I
i
Page
of
I
213
APPENDIX C. OAI DOCUMENTATION
214
C.2
Mask Chuck Drawings
top gasket
mask
vacuum
lower
gasket
I
contact
vacuum
wafer
vacuum
substrate
gasket
Figure C-2: OAI 3inch chuck assembly.
A new OAI 3inch vacuum mask chuck was designed for use on this project. The
existing mask chuck required 5inch mask and operated in a different manner. The
3inch chuck assembly is illustrated in figure C-2. The lower plate (shown in figure ??
but not in figure C-2) and substrate chuck were pre-existing. The 3inch upper chuck
plate was the new part. This part was machined in the MIT Central Machine Shop.
The substrate gasket allows atmospheric pressure to be applied to the backside of the
substrate, as well as keep the substrates back side from contacting the chuck (useful
when making a mask). The top gasket makes the seal to the mask and the lower
gasket make the seal to the chuck for the vacuum contact. The mask vacuum holds
the mask to the chuck during alignment. There are three supports underneath the
chuck as part of the lower plate used to level the mask to the substrate. An xy-level is
used to make sure the mask chuck and substrate chuck are perfectly parallel (usually
only done once).
The operational procedure for alignment and contact is as follows;
* Lower substrate chuck to bottom of limit.
* Put down substrate gasket, substrate, and apply substrate vacuum.
" Mount mask to chuck and apply mask vacuum.
C.2. MASK CHUCK DRAWINGS
215
" Place mask chuck onto 3-point support.
" Raise substrate stage until fringe patterns are visible, then back off a turn.
" Use the microscope to align mask to substrate.
" Raise substrate stage until to contact mask to substrate.
" Engage contact vacuum, slowly increasing pressure with the adjustable ball
valve.
" Turn off substrate vacuum to allow backside pressure on the substrate.
The valves originally on the OAI were single throw needle valves. These valves do
not vent, meaning the sealed vacuum chambers would not release after an exposure.
To allow for self-venting and some amount of vacuum throttling, the valves were
replace with SwageLok part number B-41VS2 brass vented ball valves.
wafer
3inch chuck
plate
lower plate
Figure C-3: OAI 3inch chuck assembly.
The machining cost for this chuck was nearly $1600.00. An important note is that
parts with more drawings cost more than parts with fewer drawings. The more sheets
a machinist has to flip through the higher likelihood of a mistake and the more time
is taking matching up features on different pages. For this reason, only one drawing
page is used to specify this part.
SEE DETAIL
DI
SECTION
S4l-S41
'
DETAIL
SCALE
DI
I .500
.50
5/16 0-Ring
McMaster PN 9452Kl5
F///////////,
SECTION
S20-S20
.360
.10
S20
.31
S20
DETAIL VAC PORT
SCALE 1.000
DETAIL
PORT
*.06
0.400
SECTION S21
SCALE I.000
Engnri(sh,
Massachusetts Institute of TechnoLogy
JasonM. LaPento (4.2007)
Media Laboratory
the50lmit.edu
Title
NanoSfructures Laboratory
OAI 3inch Mask Chuck
Uits
SECT ION S32-S32
i
tPoge
of
D
I
216
Appendix D
Auxiliary Electronics
power SAW
package
-
location
-
amplifier
Figure D-1: Analog test board. Holds SAW test package, low-noise amplifiers, and
power regulators.
input
output
amplifier
Figure D-2: Closeup of one low-noise amplifier channel.
217
APPENDIX D. AUXILIARY ELECTRONICS
218
S
c2
eMIT
o
c
edi
RESENV
-
-
e
R23 R22
SAW1
C2313l
R2.
cBO
R35©~
4-.Ci NR33
L
~
*
a
-
N
g
13
TP+
m
ORO
ao
T=g
ra
R~
I
g[]
g
2.J
[ L 70 C&Ias mo
Figure D-3: PCT top-side silkscreen.
Figure D-4: PCB top-side metal layer.
219
QTY
REFDES
DEVICE
PACKAGE
VALUE
1
2
5
2
C1210-TBD
C1210P-TBD
CAP
CAP
2.2pF
22pF
3
13
C10,C1l,C2,C13,C16
C14,C15
C21,C23,C31,C32,C33
C42,C43,C61,C62,C63
C0805-TBD
CAP
1OnF
1OOpF
1pF
1OnF
2.2pF
1nF
C71,C72,C73
4
5
6
7
8
1
1
1
1
2
C22
C50
C51
C52
C60,C70
C0805-TBD
C1210-TBD
C1210-TBD
C1210-TBD
C1210-TBD
CAP
CAP
CAP
CAP
CAP
9
4
CGND1,GND1,VCC1,VIN1
5016KCT
TP1
1
Dl
LTST-C170KGKT
TO-5
9
142-0701-801
J2,J3,J5,J6,J7,J8
1, J60,J70____________________
COAX-1
J1o
640453-5
SIP-5P
94Z
10
11
___~~~il
12
1
13
4
L1,L2,L3,L4
L0805-TBD
14
2
L60,L70
L0805-TBD
94Z
15
2
Q2,Q3
BFG424FTR
TO-18
16
6
R10,R11,R12,R13,R16
R1210-TBD
RES
OQ
210Q
500Q
3KQ
210Q
680Q
1OQ
OQ
1U
R50
17
18
19
20
21
22
23
24
25
26
1
2
2
2
2
2
1
1
1
R15
R21,R31
R22,R32
R23,R33
R24,R34
R25,R35
R41
SAW1
U50
R0805-TBD
R0603-TBD
R0603-TBD
R0603-TBD
R0603-TBD
R0603-TBD
R0603-TBD
SAW-SOIC-1
LP2985A-18DBVR
RES
RES
RES
RES
RES
RES
RES
SAW-i-NC
2
U60,U70
UPC2711TB
AMP-6PINS-1
27
1
U80
B3710
SAW_6
Table D.1: Parts list for test board
[ . F
42ET~9002-L2-
. T ....
1 ......- 2 --
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1........................
8
dnoag
suu
JTAu3
q
esuodse
saa
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s20N5i
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63
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051-60101T
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6
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4
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J.
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3-27-2006-10,33
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ab o r a t o r y
En v :1r o nm en t s
p on s ve
G r au p
5 AW
-n
-
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11 - 8-2 0 0 6_18
13
223
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-
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-
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--
.
1..
P1111
P1111
01
ii
C10
CC11 .
C 2
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PUR
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CAPS
DECDUPLING
R 12
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tp2965mS-1dbvr
VOL T AGE
V9
REGULATDA
v I V OUT
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..........
-
----
C4 2
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R50
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52
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C62
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use
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MI T
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L a b o r a t o r y
Me d A a
R e s pan s
cuozo
i
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Gr oup
BI
5 AW
. su..
.s..
B
f'AT'T ENTA
B
B
11-8-2006-18-13
225
226
APPENDIX D. AUXILIARY ELECTRONICS
Appendix E
FPGA VHDL/C/XPS
VHDL : rocketio-glue.vhd
1
-
2
--
Copyright 2007 Massachusetts Institute
4
--
Company:
Massachusetts Institute
5
--
Engineer:
Jason M. LaPenta (JML)
of Technology
:
All
rights
reserved
3-
6
-
7
--
Create
13:30:08
Date:
8
--
Design Name:
uTags -
of
Technology
02/13/2007
chirp2..rio
9
-
Module Name:
rocketio.test
10
-
Project Name:
uTags
11
--
Target Devices :
Virtex4
12
--
Tool
13
--
-
Behavioral
ML405 devel
board
versions:
14
--
Description :
15
--
cyclically
16
--
Test
configuration of a rocket-io port .
17
18
--
19
-
Dependencies:
20
--
21
--
Revision:
22
--
Revision 0.01
23
--
24
--
-
File Created
Changes
Date
Who
Description
Additional Comments:
227
Transmitts a pattern
228
APPENDIX E. FPGA VHDL/C/XPS
33
library
34
use IEEE. STD.LOGIC-1164. a
IEEE;
35
use IEEE. STD-LOGIC.ARITH. a
36
use IEEE . STD.LOGIC-UNSIGNED. a
37
use IEEE.numeric-std . all;
ll ;
ll ;
ll ;
38
39
-
Uncomment
the following
any Xilinx
40
primitives
library
in
41
library
42
use UNISIM. VComponents. all;
this
declaration if
instantiating
code.
UNISIM;
43
44
entity
45
rocketio-glue
is
46
port (
usrclk-ip
in
std-logic
--
varies
47
usrclk-in
in
std-logic
--
varies
48
49
system-clk
in
std-logic
50
reset
in
std-logic
-100
MHz
51
std-logic-vector ( 63 downto 0
52
chirp-pattern
53
delay-time
:
55
RX1N..IN
in
std-logic-vector (0
to
56
RX1PIN
in
std-logic-vector (0
to
57
TX1N-OUT
out
std-logic-vector (0
to
58
TX1POUT
out
std-logic-vector (0
to
:
in
in
unsigned ( 31 downto
0
);
);
54
59
60
led
out
std-logic-vector (1
61
usrclk-out-p
out
std-logic;
62
usrclk-out-n
out
std-logic
to 10);
63
64
end
rocketio-glue
65
66
67
-
ARCHITECTURE
68
69
Behavioral
architecture
of rocketio-glue
is
70
71
72
73
component ROCKETIOWRAPPER
generic
74
75
MGTO.GT1lMODE.P
string
76
MGTO-vGT.ID.P
integer
Default Location
"A";
:=
0
O=A,
77
78
port
79
80
-- MGTO
(XOY3)
Global
MG'ITLPOWERDOWN.IN
: in
std.logic;
Ports
1=B
229
in
std-logic;
MG'tRXLOCKDUT
out
std-logic;
90
MGTO-TXLOCK.OUT
out
std -ogic;
91
-
92
MGTO-TXPOLARITYJN
87
MGTOTXINHIBITIN
88
-
89
PLL Lock
Polarity Control Ports----
--
:
std-_ogic;
in
Ports
---
93
for
Simulation-
94
MGTO.COMBUSINJN
in
std-logic-vector (15
downto 0);
95
MGT-COMBUSOUT.OUT
out
std-logic-vector(15
downto 0);
96
MGTO.REFCLK1.IN
in
std -logic;
99
MGTO.RXPMARESET-IN
in
std -ogic;
100
MGTO.TXPMARESETJN
in
std -logic ;
101
MGTO.TXRESETJN
in
std -logic;
103
MGTO-RX1NJN
in
stdlogic;
104
MGTORX1P-IN
in
std.logic;
105
MGTO-TX1N-OUT
out std -logic
106
MGTO-TX1P.OUT
out std -logic
MGTI-TXBUFERROUT
out
97
Resets
---
98
-
102
Status
std-logic;
Data Path
109
-----------
Transmit
110
MGTO-TXDATA.IN
in
112
MGTOTXOUTCLK1_OUT
out
std logic;
113
MGT0.TXOUTCLK2.OUT
out
std-logic;
114
MGTOTXUSRCLK.IN
in
std-logic;
115
MGTO.TXUSRCLK2-IN
in
std-logic
111
Ports
Serial
-
107
108
Clocks
Reference
-
Control
and
std-logic-vector (63
-
-
Ports
downto 0);
User Clocks
116
117
118
end component;
119
120
121
--
122
component UNUSED.MGT
123
124
...............
generic
(
125
GT11-MODEP
string
"B";
126
MGTIDP
integer
1
--
Default Location
Default
Location
127
128
129
port
(
130
131
-----------------------------
132
-----------------------------
133
-- MGTO
134
135
136
MGTORXLOCKOUT
137
MGTO.TXLOCK.OUT
out
Lock
for
Simulation-
stdlogic;
-Ports
138
PLL
out std-logic;
vector ( 15 downto 0);
139
MGTO.COMBUSINJN
in
std-logic
140
MGTUCOMBUSOUTOUT
out
std.logicvector(15
downto 0);
230
APPENDIX E. FPGA VHDL/C/XPS
-_
Clocks-
-Reference
-
;
MGTO.REFCLK1.IN
in
stdlogic
MGTO.RXPMARESET.IN
in
std logic
MGTO.TXPMARESET.IN
in
std -logic
MGTOTXRESETIN
in
std-logic
MGTO-RX1N.IN
in
std-logic ;
-__--
Resets-
Serial Ports
MGTO_RX1P.IN
in
std-logic;
MGTO-TX1N.OUT
out
std-logic;
MGTO-TX1P.OUT
out
std-logic;
User Clocks
MG'IOTXOUTCLKlOUT
std-logic
MG'T-TXOUTCLK2-OUT
std.logic
MGTOTXUSRCLK-JN
std -logic
MGTOTXUSRCLK2_IN
std logic
end component;
component MGT_USRCLKSOURCE
port
USRCLK.SOURCE
out
std-logic
USRCLK2_SOURCE
out
std logic
DCM.LOCKED
out
std-ogic
TXOUTCLK1.IN
:in
std logic;
DCM.RESET
:in
std logic
end component;
component
GT11..INIT-TX
generic
C.SIMULATION
:
integer
:= 0
port
CLK
in
STARTINIT
in
std.-logic
LOCK
in
stdlogic
USRCLK.STABLE
in
stdlogic
PCS.ERROR
in
std_logic
PMA.RESET
out
stdlogic
PCS.RESET
out
stdlogic;
READY
out
stdlogic
end component;
std-logic;
Set
to
1 for simulation
231
Instantiations
195
196
197
198
signal
usrclk-b
std-logic
199
signal
usrclk-b2
std-logic
200
signal
clk-fb
std-logic
201
signal
clk_33MHz
std-logic;
202
alias
is
std-logic
dcm-clk-b
clk_33MHz;
203
204
Signals----
Clock
-Reference
-
std-logic ;
205
signal
refclk-b
206
signal
dcm-locked
std-logic
207
signal
dcm-reset-i
std-logic ;-
TODO
--
TODO
PLL Lock
208
signal
mgt0-txlock-i
std-logic;
211
signal
mgt0-tx.pmareset.c
std-logic ;
212
signal
mgt0-tx-reset-c
std-logic;
signal
mgt0-txbuferr-i
std-logic ;
209
Resets
210
- -
Status-
213
214
Transmit
--------
215
and
Data Path
Control
Ports
-
------
: std _logic _vector (63 downto 0);
signal
mgtO-txdatai
218
signal
mgtOtxoutclk1_i
std-logic;
219
signal
usr-clki
std-logic;
220
signal
usr-clk2_i
stdilogic;
signal
tx-system.ready-i
216
Clocks
User
217
221
222
System
Reset
223
224
std-logic ;
currently unused,
-
for
reset of user
logic
225
226
signal
227
counter :
unsigned ( 31 downto
0 );
228
229
Main Body
***********
230
--
231
begin
232
233
--
signal Assigments
Static
234
235
led(1)
<= dcm..locked;
236
led(2)
<= dcm-reset-i;
237
led (3)
<= mgt0-tx.pmareset.c
238
led (4)
<= mgt0.tx-reset-c
239
led (5)
<= mgt0-txlock.i;
240
led (6)
<= mgt0.txbuferr.i
241
led (7)
<= tx-system-ready-i
242
led(8)
<=
243
led(9)
<=
244
led(10)
<=
'1';
'1';
'1';
245
246
usrclk-out-p <=
247
usrclk-out-n <= usr-clk2-i;
248
usr-clk-i;
of Code
*******************************
232
APPENDIX E. FPGA VHDL/C/XPS
Processes
purpose
provides data
type
sequential
inputs
usr-clk-i
,
to MGTO-TX
reset
outputs
( usr-clk-i ,
txdata-p:
process
begin
process tzdata-p
--
if
tx-system-ready-i
=
'0'
tx-system.ready-i ,
then
--
counter
<= (others
>
'0');
mgtO-txdata-i
<= (others
>
'0');
elsif
usr-clk-i 'event
if
and
usr..clk.i
counter >= delay-time
counter
= >
'1' then
--
rising
clock
'0');
chirp-pattern
else
counter <= counter
mgtO-txdata-i
end
end
end
-
+
1;
<= (others
=>
'0');
if;
if;
process txdata-p;
Components
-----
-user clocks (for
---
IBUFGDS.usrclk
refclk-b)-----
-
------
IBUFGDS
generic map
IBUF-DELAY-VALUE
=> " 0",
IOSTANDARD
=> "LVPECL.25",
DIFF-TERM
=> true)
port map (
o
I
=> usrclk-b
=>
,
usrclk-ip
-
IB => usrclk-in
BUFG-userclk
-
Diff-p
clock
Diff-n
clock
: BUFG
port map (
o
=> usrclk-b2
I => usrclk-b
----------
Instantiate
-
Clock buffer
output
Clock buffer
input
PMCD/DCM module
delay..time)
asynchronous reset (active
then
<= (others
mgtOtxdata-i <=
=
chirp-pattern ,
for the
user clocks-
edge
low)
233
: MGT-USRCLK.SOURCE
mgt-usrclk-source-i
port rnap
=> usr.clk-i
USRCLK-SOURCE
USRCLK2.SOURCE => usr-clk2-i
DCM.LOCKED
=> dcm-locked
TXOUTCLK1.IN
=> mgtO-txoutc1k1-i
DCM-RESET
=> dcm-reset-i
<= not
dcm-reset-i
mgtO.txlock-i
Instantiate
----
--
This module
the
as recommended in
:
gt11-init_tx-i
GT11.INIT module-
an
responsible for performing the
is
correct reset and
lock procedure
user guide
GT11_INIT-TX
generic map
C-SIMULATION => 0
port map
-
CLK
dcm-clk-b,
START-INIT
reset ,
USRCLK.STABLE
dcm-locked
LOCK
mgtO.txlock-i
PCSERROR
mgtO-txbuferr-i
PMARESET
mgtOtx.pmareset_c
PCS.RESET
mgt0-tx.reset-c ,
READY
tx-system.ready-i
upper-gt11c1k-mgtinst
generic
for upper reference clocks --------
GT11CLK.MGT Instantiations
------
: GT11CLK
map
SYNCLKOUTEN => "ENABLE"
SYNCLK2OUTEN => "DISABLE",
REFCLKSEL
=> "REFCLK"
port map
MCUTLEN
=>
'0',
--
unused
MG'CLKP
=>
'1',
--
unused
REFCLK
=> usrclk-b2
RXBCLK
=>
'0',
--
unused
SYNCLK1IN
=>
'0',
-
unused
SYNCLK21N
=>
'0',
--
unused
SYNCLK1OUT => refclkb
SYNCLK2OUT => open
234
APPENDIX E. FPGA VHDL/C/XPS
Instantiate
-
MGTO
MGT Wrapper
-
(XOY3)
rocketio-wrapper-i
ROCKETIO.WRAPPER
generic map
MGTO.GT11.MODE_P => "B",
MGTO-MGT-IDP
=> 0
port map
-_-
Global
MG'TLPOWERDOWN.IN
=> '0',
MGTO-TXINHIBIT-IN
=> '0',
MGTOJXLOCK.DUT
=> open,
MGTOTXLOCK_OUT
=> mgto-txlocki ,
Ports
PLL Lock
MGTOTXPOLARITYJN
=>
MGTOCOMBUSININ
=> X" 0000",
unused?
-
Polarity
-
Control Ports
------
'0',
_ Ports
for
Simulation
MG'TLCOMBUSOUT.OUT => open,
___
Reference
-
MGTO-REFCLK1-IN
=> refclk-b ,
MGTO-RXPMARESETJN
= > '1',
__
Clocks
Resets
MGTO-TXPMARESETJN => mgt0_tx-pmareset_c,
MGTO-TXRESET.IN
=> mgtO-tx-reset-c ,
MGTO-RX1N.IN
=> RX1N-IN (0)
MGTORX1P-IN
=> RX1PIN(0),
MGTO-TX1N.OUT
=> TX1N.OUT(0),
MGTOTX1P.OUT
=> TX1P.OUT (0) ,
MGTO-TXBUFERR-OUT
=> mgtO.txbuferr-i ,
___- -
Serial
_-
_____
-
MGTOTXDATAJN
Ports
,
Status--
Transmit Data Path and Control Ports~
=> mgtO-txdata.i ,
-_
-
User
Clocks
MGTO-TXOUTCLK1-OUT => mgt0-txoutclk1-i ,
MGTO-TXOUTCLK2-OUT => open ,
-
MGTO-TXUSRCLKJN
=> usr-clk-i
MGTO.TXUSRCLK2.IN
=> usr-clk2.i
Unused MGT paired with MGTO
unused-mgt-0-i
: UNUSED.MGT
235
generic map
GT11.MODEP => "B",
MGTIDP
=>
Based on MGT Location
--
1
port map(
PLL Lock
MGTO.RXLOCKOUT
=> open,
MGTO.TXLOCKOUT
=> open,
MGTO-COMBUSININ
=> X" 0000 ",
--
Simulation
for
Ports
--
MGTO.COMBUSOUT.OUT => open,
Reference
MGT0.REFCLK1JN
Clocks
=> refclk-b ,
R s et s
MGTO.RXPMARESETJN =>
'1',
MGTOTXPMARESETJN => mgt0.tx.pmareset.c,
MGTO.TXRESETJN
=> mgt0-tx-reset_c ,
MGTORX1N.IN
=> RX1NIN (1),
MGTORX1P..N
=> RX1PJN (1),
MGTOTX1N.OUT
=> TX1N..OUT(1),
MGTO-TX1P_OUT
=> TX1POUT( 1),
_-
--
Ports
Serial
-t
_____________
User Clocks
MGTO_TXOUTCLK1_OUT => open,
MGT0.TXOUTCLK2-OUT => open,
--
MGTOTXUSRCLKJN
=> usr-clk..i
MGTOTXUSRCLK2.JN
=> usr-clk2-i
divides down
100MHz /
system clock
by
3.0
to
create
3 = 33 MHz clock
DCM.BASE-inst
: DCM.BASE
generic map
CLKDV.DIVIDE
=>
3.0,
CLKFX-DIVIDE
=>
1,
CLKFX-MULTIPLY
=>
4,
CLKINDIVIDE.BY-2
=> false
CLKIN.PERIOD
Divide by:
-
=> 10.0,
-
Can be any integer
-
TRUE/FALSE
-
two
phase shift
clock
DCMLAUTOCALIBRATION
=> true
DCM.PERFORMANCE.MODE
=> "MAX.SPEED",
DESKEWADJUST
=> "SYSTEMSYNCHRONOUS"
,
-
DCM
-
=> "LOW' ,
-
--
by
of
ns
MAX.SPEED
--
NONE
or 1X
TRUE/FALSE
circuitry
Can be
an integer
in
mode of NONE or FIXED
feedback
calibrartion
,
clock
input
or
MAXRANGE
SOURCE.SYNCHRONOUS,
SYSTEM.SYNCHRONOUS
LOW
to 32
to 1000.00
Specify
=>" 1X" ,
-
1
enable CLKIN divide
Specify
=>"NONE" ,
CLK.FEEDBACK
-
to
period of
1.25
CLKOUT-PHASE.SHIFT
synthesis
from
from 2 to 32
feature
Specify
--
from
DFS.FREQUENCY.MODE
3.0
Can be any interger
from 0
or HIGH frequency
or
to 15
mode for
frequency
236
APPENDIX E. FPGA VHDL/C/XPS
465
DLL.FREQUENCY.MODE
466
DLL
467
DUTY-CYCLE-CORRECTION => true,
468
FACTORYJF
469
X" FOFO
470
------
PHASE.SHIFT ---..-----
--------
472
.------ STARTUP-WAIT----------=
474
475
--
=>X"FOF0"
471
473 -..-
=> "LOW,
LOW,
, --
HIGH,
or HIGH.SER frequency
Duty cycle
correction , TRUE or FALSE
FACTORY
Values
JF
=>_-,----...Amount-offixed
Suggested
).
>.false
--
--
port...map - (
------ CLKO-....-=>-clk-fb ,-------..0...degree..DCM-CLK...ouptput
CLK180 ..- =>-open ,------CLK270--=>...open ,-------------------
-.-. 270.d eg ree.. DCMCLK..output
478
------
CLK2X---
-- .. 2X.DCM.-CLK- output
479
------
CLK2X180->...open ,----------------.--
480
------
CLK90...-. =>-open ,..---
481 ----482 -
CLKDV .-----CLKFX---
----------------
487
-----
488
..
180-degree .DCM.CLK.output
>...open ,-------------------
-.---
=->...clk.33MHz ,------
CLKFX180..-=>-open ,--.------
RST--.. )
489
end-Behavioral
90 . d e gree .DCM.CLK..output
D i v i ded .DCM.-CLK.out -(CLKDV.DIVIDE)
DCM-CLK.s y n t h e sis -out -(M/D)
--
180-d egree -CLK.synthesis -out
DCM-LOCK..status .output
....-----
-.. DCM.. c Ioc k .f eed bac k
CLKIN---=>..systemclk ,----.
2X,-. 18 0 . d egree .DCM-CLK-out
--
=>.open ,------
=>-clk -f b ,-
---
LOCKED--=>.open ,----....---
------ CLKFB --
486
to
Delay..configurat ion ..DONE.u ntil .DCM-LOCK,
------
490
set
TRUE/FALSE
....--.------.---------------------.----------
------
485
be
-phase- shift -from.. -255-to
477
484
to
for
1023
476
483
mode
>..reset -------------
-.. Clock .i n p u t .( from -IBUFG, ..BUFG.or ..DCM)
-
DCM.asynchronous .reset .input ,..active .. high
237
VHDL : chirp3-pads.vhd
1
-
2
--
3
--
4
--
Company:
Massachusetts Institute
5
--
Engineer:
Jason M. LaPenta
6
--
7
--
Create Date:
12:34:27 08/12/2006
8
-
Design Name:
uTags -
9
--
Module Name:
chirp3 -
10
--
Project Name:
uTags
11
--
Target Devices :
Virtex4
12
--
Tool
13
--
14
16
:
Technology
rights reserved
All
Technology
of
chirp1
Behavioral
ML405 devel
board
versions:
Description : A
simple
with
# ./ml40x-bit2ace chirp3-pads. bit
-
a configurable
sends out
chirp demonstration the
make an ace file
-
15
of
Copyright 2007 Massachusetts Institute
chirp3. ace
-
17
Dependencies:
-
18
-
19
--
Revision:
20
--
Revision 0.01
21
--
Additional Comments:
22
-
-
File Created
23
IEEE;
24
library
25
use
IEEE. STD-LOGIC-1164. all;
26
use
IEEE . STD.LOGIC.ARITH. a
27
use
IEEE. STDLOGIC.UNSIGNED. a
l I;
l I;
28
29
----
primitives
Xilinx
30
library
31
use
UNISIM;
UNISIM. VComponents.
all;
32
33
-
34
--
35
-----
chirp3
Entity
_--
chirp3-pads
entity
is
port
(
sysclk-i
: in
std-logic
--
100 mhz system
usrclk-ip
: in
std-logic
--
user supplied clock for
chirp freq
usrclk-in
: in
std-logic
--
user supplied clock for
chirp freq
reset.n
:
in
std-logic
--
active low
trig-i
: in
std-logic
--
trigger
,
clock
button A10
reset
chirp
starts
pb.n-i
:
in
std-logic
--
push button north
pb-s-i
:
in
std-logic
--
push
in
std-logic
--
push button
center
led-reset
: out
std-logic;
--
illuminates
when
led-trig
: out std-logic;
--
illuminates
on
trigger
led.timeout
: out std..logic;
--
illuminates
on
trigger
test-o
: out std-logic;
--
test
pb..ci
button south
device
output H6 diff-clk-out-n
reset
timeout
238
APPENDIX E. FPGA VHDL/C/XPS
chirp-op
out std.logic;
chirp-on
out stdilogic;
chirp-o
end
61
62
:
chirp output
chirp output
--
out std-logic
--
chirp output
signal
chirp3-pads;
-
architecture
63
64
architecture
component
Behavioral
of chirp3-pads
chirp3-top
port (
sysclk-i
in
std-logic
--
100 mhz system
usrclk-i
in
std-logic
--
user supplied clock
reset-n
in
std-logic;
trig-i
in
std-logic
pb-n i
:
pb-s-i
pb-ci
83
:
trigger ,
clock
starts
for chirp freq
chirp
in
std-logic
push button north
in
std-logic
push button south
in
std-logic
push button
led-reset
out std-logic;
led-trig
out std-logic;
led-timeout
out std-logic;
test-o
out std-logic ;
chirp-o
chirp-en-o
--
when
illuminates
on
--
: out std-logic;
: out
illuminates
illuminates
-
center
test
device
reset
trigger
on trigger
timeout
output H6 diff-clk-out-n
chirp output
std-logic
end component;
signal
sysclk-b
std.logic;
signal
usrclk-b
std-logic;
signal
reset-n-b
std-logic;
signal
trig-b
std-logic;
signal
pb-n-b
std-logic
push
button north
signal
pb-s-b
std-logic
--
push
button south
signal
pb-c-b
std-logic;
-
push
button
signal
led-reset-b
std-logic
--
illuminates
when
signal
led-trig-b
std-logic
--
illuminates
on trigger
signal
led.timeout.b
std-logic
-
illuminates
on trigger
signal
test-b
std-logic
signal
chirp-b
:
std-logic ;
100 mhz system
user supplied clock for
--
trigger
-
--
clock
--
test
,
starts
chirp
center
output H6
chirp output
chirp freq
device
diff-clk-out-n
reset
timeout
239
signal
std-logic
:
chirp-en-b
begin
-
top component
top.c
: chirp3-top
sysclki
port rnap(
=> sysclk-b
usrclk-i
=> usrclk-b,
reset-n
=> reset.nb
trig-i
=> trig-b
pb-n-i
=> pb.n-b
pb-s-i
=> pb-s-b
pb-ci
=> pb.c-b
led-reset
=> led-reset-b
led-trig
=> led-trig-b ,
led-timeout => led-timeout..b
test-o
=> test-b ,
chirp-o
=> chirp.b
chirpen-o
=> chirp-en-b
********************************
IBUFGtsysclk
: IBUFG
generic rmap (
IBUF-DELAYVALUE => " 0",
=>"LVTL")
IOSTANDARD
port rnap (
o => sysclk-b
I => sysclk-i
IBUFGDS-usrclk
IBUFGDS
generic map
=> " ",
IBUF-DELAY.VALUE
IOSTANDARD
=> " LVPECL.25",
DIFF-TERM
=> TRUE)
port rnap (
o
I
=> usrclk.b
=> usrclkip
,
IB => usrclk-in
generic
Diff-p
clock
--
Diff-n
clock
******************************
-- **********
OBUF-chirp-o
--
: OBUFDS
rmap (
IOSTANDARD => "LVPECL-25"
port
o
nap
=> chirp-op
OB=> chirp-on
I
=> chirp-b
240
APPENDIX E. FPGA VHDL/C/XPS
161
162
163
******************
164
--
165
IBUF.reset
166
: IBUF
generic map (
167
IBUF.DELAYVALUE => " 0",
168
IFD-DELAYVALUE
=> "AVID",
169
IOSTANDARD
=> "LVTTL")
170
port map (
171
0 => reset-n-b
172
I => reset-n
173
174
175
176
IBUF-trig
177
: IBUF
generic map (
178
IBUF.DELAYVALUE => " 0",
179
IFDJDELAY.VALUE
=> "AUTO",
180
IOSTANDARD
=> "LVTTL")
181
port map (
0 => trigb,
182
I => trigi
183
184
185
186
-******************
187
IBUF-pb-n
188
: IBUF
generic map (
189
IBUFDELAYVALUE => " 0",
190
IFDDELAYVALUE
=> "AUTO",
191
IOSTANDARD
=> "LVTTL")
192
port map (
0 => pb.n-b,
193
194
I => pb-n-i
195
196
******************
197
--
198
IBUF-pb-s
199
: IBUF
generic map (
200
IBUFDELAYVALUE => " 0",
201
IFDDELAY-VALUE
=> "AUTO",
202
IOSTANDARD
=> "LVTTL")
203
port map (
0 => pb-s-b
204
205
I => pb-s-i
206
207
208
--
209
IBUF-pb-c
210
******************
: IBUF
generic map (
211
IBUF.DELAYVALUE => " 0",
212
IFDJDELAY-VALUE
=> "AUTO"
213
IOSTANDARD
=> " LVTTL" )
214
port map (
,
241
215
0 => pb.c-b
216
I => pb.c-i
217
218
219
-******************
220
OBUF.led-reset
OBUF
nap (
generic
221
=> 12,
222
DRIVE
223
IOSTANDARD => "LVITL" ,
=> "SLOW')
SLEW
224
port map (
225
0 => led-reset
226
I => led-reset-b
227
228
229
230
******************
--
231
OBUF-led-trig
232
generic map
OBUF=> 12,
233
DRIVE
234
IOSTANDARD => "LVTTL",
=> "SLOW')
SLEW
235
port map (
236
0 => led-trig
237
I => led-trig-b
238
239
240
******************
241
--
242
OBUF..ed.timeout
: OBUF
generic map (
243
=> 12,
244
DRIVE
245
IOSTANDARD => "LVTTL",
=> "SLOW')
SLEW
246
port map (
247
led.timeout
248
0 =>
249
I => led-timeout-b
250
251
******************
252
--
253
OBUF.test
254
: OBUF
generic map (
=> 12,
255
DRIVE
256
IOSTANDARD => "LVTTL" ,
257
258
=> "SLOW')
SLEW
port map (
259
0 => test-o
260
I => test-b
261
262
263
-*******************
264
OBUF.chirp
265
: OBUFT
generic map (
266
IOSTANDARD => "LVTTL" ,
267
DRIVE
=>
268
SLEW
=> "FAST")
24,
242
269
APPENDIX E. FPGA VHDL/C/XPS
port map
270
T => chirp-en-b
271
0 => chirp-o ,
272
I => usrclk-b
273
274
275
276
end Behavioral
243
VHDL : chirp3-top.vhd
1
--
2
3
-
Copyright 2007 Massachusetts Institute
-
Company:
Massachusetts Institute
Engineer:
Jason M. LaPenta
:
Technology
of
rights
All
reserved
--
4
5
-
-
Create
--
--
12:34:27 08/12/2006
Date:
Design Name:
uTags -
Module Name:
chirp3 -
Project Name:
u Tags
Target Devices
Virtex4
Tool
Technology
of
chirp1
Behavioral
ML405 devel
board
versions:
Description:
15
Sends a
16
a trigger.
chirp on a
trigger
signal ,
or at 10Hz in
the
absence of
17
18
--
19
-
changed using the
shifted
generate phase
push buttons
wide-band chirps.
--
Dependencies:
22
23
to
OSERDES
utilized
version
This
20
21
cycles per chirp can be
The number of
--
24
Revision:
-
Revision 0.01
25
26
--
27
--
File Created
Additional Comments:
28
29
library
30
use
IEEE;
IEEE.STDLOGIC-1164. all;
l;
31
use IEEE . STD-LOGIC.ARITH. a
32
use IEEE. STD.LOGIC-UNSIGNED. a
33
use
IEEE. numeric.std
l I;
all;
34
35
Xilinx
---
primitives
36
library UNISIM;
37
use
UNISIM.VComponents. all;
38
39
40
-
Entity chirp3
41
entity
port
chirp3-top
:
in
std-logic
--
100 MHz system
i
:
in
std-logic
--
user supplied clock for
--
trigger ,
usrclk
reset-n
: in
stdlogic
trig-i
:
std-logic
pbn-i
pb
s-i
pb c-i
52
is
( sysclk-i
in
clock
starts
chirp
: in
std-logic
--
push
button north
: in
std-logic
--
push
button south
:
std-logic
push
button
led.reset
in
: out
std-logic ;
-
--
Illuminates
I
chirp freq
center
when
device
reset
244
APPENDIX E. FPGA VHDL/C/XPS
led-trig
out
std-logic
led-timeout
out
std-logic
test-o
out
std-logic
chirp-o
59
60
: out
chirp-en-o
end
--
-
--
std-logic ;
illuminates
on
trigger
illuminates
on
trigger
test
output H6
timeout
diff-clk-out.n
chirp output
: out std-logic);
chirp3-top;
61
62
--
63
--
architecture
64
65
architecture
component
Behavioral
of chirp3-top
is
chirp3-gen
port (
clock-i
in
std-logic
reset-b
in
std-logic
le-i
in
std-logic
data-i
in
std-logic-vector ( 5 downto 0
chirp-o
: out
variable input clock
--
std-logic
--
data latch enable
chirp
);
--
signal
data latch enable
output
end component;
signal
clk-5MHz
std.logic
--
signal
clk.fb
std-logic
-
signal
reset-b
std-logic
-
84
signal
trig-timeout
std-logic ;
85
signal
trigger
std-logic ;
signal
chirp-en
std-logic;
signal
chirp-len
unsigned (7
--
downto
internal
divided
DCM clock
Active
High Reset for DCM
signals tigger timeout
signals to trigger
0);
chirp
length
begin
--
combinationc
led-timeout <=
trig.timeout
led-trig
<=
led-reset
<= not
test-o
<= clk-5MHz;
reset-b
<= not reset.n;
chirp-en-o
<= chirp-en ;
chirp3-genl
trigger;
reset.n;
chirp3-gen
port rnap
clock-i
=>
usrclk-i,
reset-b
=>
reset-b
,
--
clock
Feed Back
active
low
a chirp on
in
cycles
risinq
edqe
245
107
le -i
=>
108
data-i
=> " 111111",
109
chirp-o
=> chirp-o
'1',
110
111
-
112
113
114
-
115
--
116
chirp-p
uses
chirp output
to gate
trigger
:
,
(usrclk-i
process
reset.n)
117
(7
118
variable
chirp-cntr
unsigned
119
variable
trig-last
std-logic;
downto
0);
120
121
122
process chirp-p
-
begin
123
124
'0'
=
reset-n
if
then
125
chirp-cntr
:=
(others
126
chirp-en
<=
'1';
=>
'0');
127
128
'event
usrclk-i
elsif
'1'
=
usrclk-i
and
then
129
'1'
and
chirp-en
<=
'0';
chirp-cntr
:=
(others
=
trigger
if
130
131
132
=
trig-last
=>
'0'
then
'0');
else
133
134
if
135
chirp-cntr
137
chirp-en
then
chirp-len
/=
chirp-cntr
136
+
chirp-cntr
1;
'0';
<=
else
138
<=
chirp-en
139
'1';
if;
end
140
141
if;
142
end
143
trig-last
:=
trigger;
144
145
end
if;
146
147
end process
chirp-p;
148
149
150
purpose: create internal
151
152
trig-p
:
process (clk-5MHz,
triger
necessary
if
reset.n ,
trig-i)
153
154
--
one second timeout
155
variable
trig-to-cntr
unsigned
156
variable
trig-last
std-logic
(23
downto 0);
157
trig-cntr
used for 10kHz timout
158
--
159
variable
trig-cntr
unsigned
160
variable
trig-internal
std-logic;
(7
downto 0);
rising
clock
edge
246
APPENDIX E. FPGA VHDL/C/XPS
begin
--
process
reset-n =
if
trig-p
'0'
trig-last
then
'0';
:=
trig-tocntr
(others
= >
'0');
trig-cntr
:=
(others = >
trig-internal
:=
'0'
trig-timeout
<=
'0';
trigger
<=0
'0';
elsif
clk-5MHz'event
--
edge
if
and clk_5MHz
=
'1'
trig-to-cntr
and
= '1'
reset timeout
detect TRIG,
trig-i
'0');
trig-last
:= (others
=
=>
then
if
-
rising
detected
'0' then
'0');
else
if
trig-timeout
end
end
=
'0'
:=
trig-to-cntr
then
trig-to-cntr
+ 1;
if;
if;
:= trig-i
trig.last
1 second signal timeout to start
-if
trig-to-cntr
= 2000 then
trig-timeout
<=
'1';
<=
'0';
10kHz
--
else
trig-timeout
end
if;
-
internal
if
trig-cntr
counter
trigger
= 250 then
(others
trig.cntr
trig-internal
:=
not
=>
'O');
trig-internal;
else
trig-cntr
trig-cntr
trig-internal
trig.internal;
end
--
if;
trigger
if
select
trig.timeout
=
'0'
trigger <= trig-i;
else
trigger <= trig-internal;
end
end
end
if;
if;
process
trig-p
then
+
1;
signal
5e6 then
clock
edge
247
--
debounce buttons
purpose
process ( clk-5MHz ,
buttons-p
one second timeout ,
--
reset.n)
disable buttons for
one second after a press
begin
if
:
buttons-to-cntr
variable
downto 0);
unsigned (21
process buttons-p
--
=
reset-n
'0'
then
'0');
buttons-to-cntr
:= (others
chirp-len
<= unsigned (to-unsigned(50,
elsif
clk_5MHz'event
if
buttons-to-cntr
-
and
=>
clk_5MHz =
pb-n-i
=
and
'1'
buttons-to.cntr
:= (others
decrease chirp length
pb-s-i
=
'1'
and
buttons-to-cntr
:= (others
decrease chirp length by
pb-s-i =
'1'
and
buttons-to-cntr
:= (others
reset chirp
pb-c-i
=
=>
5;
'1');
> 10 then
5;
'1');
1
-
<= chirp-len
--
-
chirp-len
chirp-len
elsif
=>
> 1 and
length to 50
'1'
then
<= unsigned (to-unsigned (50,
buttons-to-cntr
:=
(others
=>
'1');
if;
buttons-to-cntr
buttons-to-cntr
end
end
---
-
1;
if;
if;
process buttons-p;
divides down system
100MHz /
clock
20 = 5 MHz clock
DCM.BASE-inst
< 10 then
'1');
else
end
chirp-len
1;
chirp-len
end
edge
by 5
chirp-len
<= chirp-len
--
+
=>
chirp-len
elsif
clock
< 250 then
<= chirp-len
--
rising
5
chirp-len
chirp-len
elsif
--
then
0 then
=
increase chirp length by
if
'1'
chirp-len 'length ));
: DCM..BASE
by
32 to
create
chirp-len 'length));
248
APPENDIX E. FPGA VHDL/C/XPS
generic map (
CLKDVDIVIDE
--
=> 10.0,
-
Divide by: 1.5,2.0,2.5,3.0,3.5,4.0,4.5,5.0,5.5,6.0,6.5
7.0,7.5,8.0,9.0,10.0,11.0,12.0,13.0,14.0,15.0
or 16.0
CLKFX.DIVIDE
=> 1,
-
Can be
any interger
CLKFX.MULTIPLY
=> 4,
--
Can be
any integer
CLKIN..DIVIDE-BY-2
=> true ,
CLKIN-PERIOD
=> 10.0,
CLKOUT-PHASE.SHIFT
=> "NONE' ,
--
CLK.FEEDBACK
=>"1X" ,
-
DCM.AUTOCALIBRATION
=> true,
DCM.PERFORMANCE.MODE
=> "MAX.SPEED"
DESKEW.ADJUST
=> "SYSTEM.SYNCHRONOUS",
-
TRUE/FALSE
Specify
-
to
from 1
enable CLKIN divide
period of input
Specify
phase shift
Specify
clock
--
Can
clock
by
be MAXSPEED
=> "LOW' ,
DLL.FREQUENCY.MODE
=> "LOW,
--
FACTORY.JF
=>X"F0F0" ,
PHASE-SHIFT
=> 0,
STARTUP-WAIT
=> false)
--
Duty
-
cycle
or 1X
or MAX-RANGE
SYSTEM.SYNCHRONOUS
SOURCE.SYNCHRONOUS,
to 15
of fixed
Delay
correction , TRUE or FALSE
Suggested to be
phase shift
from -255
configuration DONE
until
set
DCM LOCK, TRUE/FALSE
degree DCM CLK ouptput
=> clk-fb ,
CLK180
=> open,
-
180 degree DCM CLK output
CLK270
=> open,
-
270 degree DCM CLK output
CLK2X
=> open,
-
2X DCM CLK output
-
2X, 180
90 degree DCM CLK output
CLK2X180 => open,
end
0
CLKO
CLK90
=> open,
-
CLKDV
=> clk-5MHz,
-
CLKFX
=> open,
-
degree DCM CLK out
Divided DGM CLK out
DCM CLK synthesis
(CLKDV-DIVIDE)
out (M/D)
CLKFX180 => open,
180 degree CLK synthesis out
LOCKED
=> open,
DCM LOCK status
CLKFB
=> clk-fb ,
CLKIN
=> SYSCLK.I,
RST
=> reset.b
Behavioral;
--
output
DCM clock feedback
Clock input (from IBUFG,
BUFC or DCM)
DCM asynchronous reset input ,
to X"FOFO
to 1023
port map (
-
synthesis
or HIGH-SER frequency mode for DLL
FACTORY JF Values
Amount
to 1000.00
TRUE/FALSE
LOW or HIGH frequency mode for frequency
LOW, HIGH,
DUTY-CYCLECORRECTION => true ,
feature
or FIXED
an integer from 0
DFS.FREQUENCY.MODE
two
ns from 1.25
of NONE
circuitry
-
in
mode of NONE
feedback
DCM calibrartion
,
to 32
from 2 to 32
active high
or
249
C
1
2
/*
chirpnet.c
_
-----
of
Copyright 2007 Massachusetts Institute
Technology :
All
rights
3
4
--
Create Date:
3/13/2007
5
-
Design Name:
uTags -
File Name:
chirp2 . c
6
7
Tool
-
9
Virtex4
Target Devices :
-
8
xps/chirp-rio/chirp2
ML405 devel
board PowerPC 405
Xilinx XPS 8.2
versions :
--
Description : Simple program to
access UART debug
10
-
11
--
Ethernet User Interface , and
12
--
Peripherial
.
-
13
14
15
#include <stdio. h>
16
#include < stdlib .h>
17
#include <string .h>
18
#include <xgpio-
19
#include < xbasictypes . h>
.h>
20
21
#include
"xparameters .h"
22
#include
"xromlcd .h"
23
#include
"chirp2.h"
24
#include
"enet .h"
25
26
VERSION "ChirpNet..v0.10"
#define
27
28
/
29
int
main (void)
{
30
Setup LCD screen
31
/*
32
XromLCDOn ();
33
XromLCDInit ();
34
XromLCDPrintString
35
xil-printf
(
VERSION,
" Running.
);
( VERSION "\n");
36
chirp2 peripheral
initialize
37
//
38
39
chirp2-reset (;
chirp2-set-delay ( 100
40
chirp2-set-pattern(
41
chirp2-enable ();
);
Ox88AA55AA,
OxFF00FFFF
42
open Ethernet and Accept
43
//
44
enet-open(;
45
for
46
48
1
return 0;
50
52
{
enet-proc.conns(;
49
51
(;;)
enet-accept (;
47
}
New
Connections
);
interface,
the rocket-io
chirp2
reserved
250
APPENDIX E. FPGA VHDL/C/XPS
Stack Overflow
53
/*
54
void
55
56
&
Interrupt
{
xil-printf("Stack..Overflow..\r\n");
}
57
58
Handler Dummy
-stack-overflow-exit (void)
void
-interrupt-handler () {
Functions */
251
C : enet.c
--
Copyright 2007 Massachusetts Institute
--
Create Date:
3/13/2007
--
Design Name:
uTags -
xps/chirp.rio/chirp2
--
Target Devices:
Virtex4
ML405 devel
Tool
--
Technology :
All
rights
board PowerPC 405
Xilinx XPS 8.2
versions :
Description :
of
Supports the
Server TCP/IP SocketIO Interface
#include <stdio .h>
.h>
#include <stdlib
#include <string .h>
.h>
<net/xilnet.config
#include
#include <net/xilsock .h>
#include <net/mac.h>
#include <xemac -. h>
#include <xbasic-types .h>
#include
" xromlcd . h"
#include
"enet.h"
#include
"chirp2.h"
//
connections
Server States for
request
#define
NET.GET
1
//
Got a Get
#define
NET-GETPROC
2
processing a GET request
#define
NETDONE
#define
NET.CONNYREE
//
//
//
3
-1
done with a GET request processing
conn free
to
assign to
net.conn-ent {
struct
/
int sock;
//
state;
int
socket
state
descriptor
of the
connection
};
/**************************************
Global Variables */
*
globals {
struct
isnetinit
int
//
Net
Connections Management
int sock;
struct
net.conn-ent
struct
sockaddr-in
net.conns [MAX.NETCONNS];
addr;
} g;
/**************************************
*
Local Function Definitions */
void
enet-parse-buf
void
enet-free-conn
int
enet-add-conn (
void
enet-proc-req
*********
( char *buf );
( int idx
int
(
int
sock
);
cidx
***********************
client
reserved
252
APPENDIX E. FPGA VHDL/C/XPS
53*
54
open
int
*/
( void
enet-open
55
56
int err
57
int
idx;
58
59
g. isnetinit
60
g.sock
= 0;
= 0;
61
62
//
63
for
64
Initialise
(idx
all net
= 0;
conns
idx++) {
idx < MAXNET.CONNS;
g.net-conns [idx ].sock =-1;
g. net-conns (idx ].state
65
66
}
67
g. isnetinit
=
= NETCONN.FREE;
1;
68
69
//
70
xilnet-eth-init-hw-addr ( "00:00:00:00:22:38" );
71
xilnet-eth-init.hwaddr-tbl
72
xilnet-ip-init
Set
up MAC &4 IP
addresses and intialise
Ethernet HW Table
();
( ENETADDR
);
73
74
//
75
x i l n e t - m a c .. i n i t ( XPARVYETHERBASEADDR
76
XEmac-mSetMacAddress(
77
XEmac..nEnable ( XPARJvfYETHERBASEADDR
MAC Baseaddress ,
Initialize
set MAC
address and enable
it
) ;
XPAR.MYETHERBASEADDR,
mb-hw-addr
);
);
78
79
//
80
g.sock = xilsock-socket(
81
if
Create ,
(g.
Bind,
Listen
xil-printf("socket
83
return
AF.INET,
SOCK.STREAM,
0
);
{
sock == -1)
82
on Server Socket
()..error.\r\n");
0;
}
84
85
86
g.addr.sin-family
87
g. addr. sin-addr .saddr
= AFJNET;
88
g. addr. sin-port
= INADDRANY;
= SERVEFLPORT;
89
90
err
91
if
=
xilsock-bind ( g.sock , (struct
== -1)
(err
92
xil-printf
93
return 0;
{
("bind ()..error...\r\n"
}
94
95
96
err
97
if
98
=
xilsock-listen ( g.sock , 4
(err
== -1)
99
return
{
("listen ()..error..\r\n"
xil.printf
0;
}
100
101
102
103
return
1;
}
104
105
106
/**********************************
*
close
*/
sockaddr
*)&(g.addr),
sizeof(struct
sockaddr)
253
107
void ) {
("warning.:..enet-close ()...not -implemented..\r\n");
xilprintf
1;
return
109
(
enet.close
int
108
110
111
}
112
/**************************************
113
114
accept -
*
Accept
new connections */
( void
enet-accept
int
) {
115
116
int
alen
= 0;
117
int
rtn
= 0;
118
sockaddr );
119
alen
= sizeof(struct
120
rtn
= xilsock.accept(
sockaddr
g.sock , (struct
*)&(g.addr), &alen
121
(
if
122
( "New.Connection-\r\n"
enetadd-conn(
124
& XILSOCK.NEW.CONN
xilsock-status-flag
xil-printf
123
rtn
) {
)
);
}
125
126
return 1;
127
128
}
129
130
/*************************************
Add a net
131
*
132
int
133
134
connection */
int
enet-add-conn(
sock
) {
int idx;
135
( idx = 0; idx < MAXNETCONNS; idx++ ) {
( g. net-conns [idx ]. state == NET..CONN.FREE
for
136
if
137
break;
138
139
1
140
if
(
{
i d x <= MAXNET.CONNS)
= sock;
141
g.net-conns[idx}.sock
142
g. net-conns [idx]. state = NET.GET;
return
143
("no...free...conns.\r\n" );
145
xil-printf
146
return -1;
147
idx;
}
144
}
148
149
150
151
/*************************************
*
Process a Net
Connection */
void enet-proc-req
(
int
cidx
) {
152
153
unsigned
char *sndptr
155
= (unsigned
char*)
\
(send buf+LINK.HDR.LEN+IP-HDR.LEN*4+(TCP.HDR.LEN
154
unsigned
char * buf
= xilsock-sockets [ g .net.conns [cidx]. sock
156
157
if
(
buf)
return;
158
159
160
if
(
xilsock-status.flag
& XILSOCK.TCP.DATA ) {
*4));
]. recvbuf. buf;
254
APPENDIX E. FPGA VHDL/C/XPS
161
XromLCDPrintString ( strtok (buf," \n" ) ,""
162
enet-parse-buf(
163
memset ( sendbuf,
164
memcpy( sndptr,
);
buf );
0,
);
LINK-FRAMELEN
buf,
);
strlen(buf)
xilsock-send ( g. net-conns [cidx ]. sock , sendbuf,
165
strlen (sndptr)+1
}
166
167
168
//
reset buf ptrs
169
if
(
of sockets
1 ) {
g.net.conns [cidx]. sock !=
170
xilsock-sockets [ g. net.conns [cidx
171
xilsock-sockets [ g. net-conns [cidx .sock
172
173
] recvbuf . buf
.sock
=
]. recvbuf . size
}
}
174
175
/*************************************
176
177
Free a net connection */
*
(
void enet-free-conn
int idx
) {
178
xil-printf("Free.Connection-%d-\r\n" , idx);
179
180
xilsock-close ( g.net-conns [
181
g. net.conns [idx] .sock
182
183
state
g.netconns[idx].
idx
].sock
)
= -1;
= NET-CONN.FREE;
}
184
185
/*************************************
186
187
Process all net
*
connections */
void enet-proc-conns ( void
188
189
int idx;
190
for (idx
192
193
=
0;
idx < MAX-NET-CONNS;
enet-proc-req (
191
idx
idx++){
);
}
}
194
195
/*************
***************
196
*
197
* parse , process ,
198
* commands sent
199
enet-parse-buf execute
and then
by
client
void enet-parse-buf
( char
*/
*buf ){
200
201
int
202
char * tok-array [10};
idx = 0;
203
204
//
205
tok-array [0] = strtok (
206
xil-printf("Tokeno..0-=-'%s '-\r\n"
parse no more than 10 tokens
buf,
" ," );
,
tok-array [0]
);
207
208
for
(
idx = 1;
idx
209
tok-array [idx] =
210
if
idx++ ){
tok-array [idx)
==
0 ){
break;
211
}
212
213
214
(
< 10;
strtok ( 0 , " ," );
xil-printf("Token-%d-.-%s-\r\n",
1
idx,
tok-array[idx]
);
NUIL;
= 0;
);
255
/
//
parse commands -
if(
"chirp2, delay , high low;"
tok.array [0] , "chirp2"
! strcmp (
)
){
Xuint32
delay = strtoul (
Xuint32
high
= strtoul ( tok-array [2] , 0 , 0 );
Xuint32
low
= strtoul ( tok-array [3] , 0, 0 );
xil-printf
( "chirp2'%d 'ox%08X'Ox%08X;\ r\n" , delay ,
chirp2-set-delay ( delay
chirp2-set.pattern (
chirp2-enable ();
return;
tok-array [1] , 0, 0 );
);
high ,
low )
high , low );
256
APPENDIX E. FPGA VHDL/C/XPS
Appendix F
MATLAB Source Code
Source code for simulations in section 2.3
MATLAB : pschirpWB.m
chirp = pschirpWB
1
function
2
% 11/29/2006
3
%
4
% creates a phase shifted
5
% the
6
% polarties.
7
% 2 = no signal
encoding
chirp
an array of finger
encoding is
0 =
(
even,
1 = odd phase
8
9
f = 915e6;
% frequency = 915 MHz
10
w = 2*pi*f;
% rad/second
11
p =
1/f;
% period
12
13
len =
size (encoding
2);
14
15
t
= 0:(p/100):p;
16
17
even = sin(w*t);
18
odd
19
chirp
= -even;
=
[0];
20
21
% model input pulse
22
for
23
elseif
30
encoding(i)
0
odd];
== 1
even];
else
chirp = [chirp
28
29
==
= [chirp
chirp = [chirp
26
27
encoding(i)
chirp
24
25
i = 1:len
if
zeros(size(even))];
end
end
257
258
APPENDIX F. MATLAB SOURCE CODE
MATLAB : nb. m Source code for simulations in section 2.3
1
% This
2
% barker codes
code
simulates narrow-band
for SAW correlators.
3
4
%.
5
% n-5 barker code
.................................................
simulation
6
7
% 11101
8
ea
receive
code,
1 0 1
1 1 2];
9
rx = pschirpWB(
[ 2
=
narrow band
ea
10
11
% 10111
12
ea
13
tx
transmit output code ,
= [ 2
1 1 1
narrow band
0 1 2];
pschirpWB ( ea
14
15
% narrow band input
16
ec
17
inidt
=
[2
idt
1 2];
= pschirpWB(
)
ec
18
19
figure
20
tl
21
plot (
= conv( tx,conv(rx,inidt));
)
t1
22
23
% ...
24
% example
.....
...
........
.. ...
....
narrow-band device
..
......
.....
.........
on mask3. v3
25
receive code , narrow band
26
% 1111110111
27
ea =
28
rx = pschirpWB ( ea )
[ 2
1 1 1
1 1
1 0 1
1 1 2];
29
30
% 1011111111
31
ea
= [ 2
transmit output code,
32
tx
= pschirpWB(
1 1 1 0
1 1
ea
1 1
)
33
34
% narrow band input
35
ec
36
inidt
=
[2
idt
1 2];
= pschirpWB(
ec
37
38
figure
39
t2 = conv(
40
plot (
t2
)
tx,conv(rx,inidt));
1 1 2];
narrow band
259
Source code for simulations in section 2.3
MATLAB : wb.m
simulates wide-band and wide
1
% This code
2
% barker codes for SAW
band
correlators.
3
..................................................
4
%..
5
% n-5 barker
code
simulation with 2-cycle
codes
6
2);
7
10
= zeros(1
8
11
= ones(1,2);
9
ss
= 2*ones(1 ,2);
% 10111
code
ea = [ 2
11
wide
ss 10
band
ss 11
ss 11
ss
11
2];
ss
ss
11
2];
rx = pschirpWB ( ea );
% 11101 code
ea =
[ 2
11
wide
ss
11
band
ss
11
10
tx = pschirpWB ( ea );
% narrow band input idt
ec
1 2];
[2 1
=
ec
inidt = pschirpWB(
figure
ti = conv( tx,conv(rx,inidt));
t1 )
plot(
% .... . . . . . . . . .
.. . . . . . . . . . .
wide-band device
% example
10 =
zeros(1,5);
11 =
ones(1 ,5);
on mask3.v3
ss = 2*ones(1,5);
% 11101
ea =
[ 2
code
11
wide
ss
rx = pschirpWB(
% 11101
ea = [ 2
10
ss 11
ss
11
ss 11
ss 11
42
% narrow band input
43
ec
44
ss 10
inidt =
idt
21;
pschirpWB(
ec
45
46
figure
47
t2 = conv( tx,conv(rx,inidt));
48
plot(
t2
)
2];
ss
2];
band
tx = pschirpWB ( ea );
= [2 11
ss 11
ea );
code wide
11
band
11
. .
260
APPENDIX F. MATLAB SOURCE CODE
MATLAB : dual. m Source code for simulations in section 2.3
1
% This
2
% narrow-band SAW
code
simulates the
dual reflector
correlator
transponder
3
velocity
4
v
5
r1
=
6
r2
= 810e-6; % distance to
7
dl
rl/v;
% delay
(s)
to
reflector
1
8
d2
= r2/v;
% delay
(s)
to
reflector
2
= 3992;
% surface
(m/s)
reflector
1
280e-6; % distance to
reflector
2
9
10
f = 323e6;
% frequency = 323 MHz
11
w = 2*pi*f;
% rad/second
12
p = 1/f;
% period
13
t
40 0
= 0:(p/100):
e-9;
% 0
to 400ns
14
15
% + and -
16
10 =
zeros(1
17
11
ones(1
=
patterns , 5
in
cycles
in
length
5);
5);
18
19
% 11101
20
ea =
21
rx = pschirpWB ( ea )
code
[ 2
11
narrow band
10
11
11
11
2
22
23
% 11101
24
ea =
25
tx = pschirpWB ( ea )
code
[ 2
11
wide
11
11
band
10
11
2
26
27
% narrow band input
28
ec =
29
inidt
[2
11
idt
2];
= pschirpWB(
ec
30
31
%
32
% signal from
33
s = conv(
inidt
to
tz
tx,conv(rx,inidt));
34
35
% amount of
time to add to first
36
add
p*3)*100/p;
37
s1
(d1 -
-
[zeros(1,floor(add)),
=
reflector
delay
s];
38
39
% amount of
40
add = (d2
41
s2
-
time
p*
3
to add to second reflector
)*100/p;
[zeros(1,floor(add)),
s];
42
43
s1 =
[s1,
44
st
(sl
zeros(1,(size(s2,2)-size(sl
2)))];
+ s2);%/(2*maz(s1));
45
46
% plot
47
figure
48
plot(
of one way signal path
t(1:size(st
,2))
st
)
49
50
%
51
% signal form
52
s
=
conv(
inidt
tx
to inidt
,conv(rx,rx)
);
delay
261
% amount of
time to add to
add = (dl -
p*3)*100/p;
si =
[zeros(1,floor(add)),
time to add to
% amount of
add = (d2
s2 =
-
first
reflector
s];
second reflector
p*3)*100/p;
[zeros(l,floor(add)),
62
% conbine signals
63
s1
64
st2 =
(s1 +
66
len
size(rx,2);
67
st2(1:len)
[s1,
zeros(1,(size(s2,2) -size(s1,2)))];
s2 +
st)/(2*max(st));
65
= st2(1:len)
+ rx;
68
69
figure
70
plot(
t(1:size(st
2)),
st2
delay
delay