IRF9510
Data Sheet
Title
F95
bt (A, 0V,
00
m,
Chanwer
OST)
utho
eyrds
ter-
July 1999
3.0A, 100V, 1.200 Ohm, P-Channel Power
MOSFET
Features
This P-Channel enhancement mode silicon gate power field
effect transistor is an advanced power MOSFET designed,
tested and guaranteed to withstand a specified level of
energy in the breakdown avalanche mode of operation. All of
these power MOSFETs are designed for applications such
as switching regulators, switching converters, motor drivers,
relay drivers, and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
These types can be operated directly from integrated
circuits.
• rDS(ON) = 1.200Ω
File Number
2214.4
• 3.0A, 100V
• Single Pulse Avalanche Energy Rated
• SOA is Power Dissipation Limited
• Nanosecond Switching Speeds
• Linear Transfer Characteristics
• High Input Impedance
Symbol
Formerly developmental type TA17541.
D
Ordering Information
PART NUMBER
IRF9510
PACKAGE
TO-220AB
G
BRAND
IRF9510
S
NOTE: When ordering, include the entire part number.
Packaging
JEDEC TO-220AB
SOURCE
DRAIN
GATE
rpoon,
Chanwer
OST,
0AB
DRAIN
(FLANGE)
er ()
OCI
O
frk
©2001 Fairchild Semiconductor Corporation
IRF9510 Rev. A
IRF9510
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDGR
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID
TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS
Operating and Storage Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg
IRF9510
-100
-100
-3.0
-2.0
-12
±20
20
0.16
190
-55 to 150
UNITS
V
V
A
A
A
V
W
W/oC
mJ
oC
300
260
oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ = 25oC to 125oC.
Electrical Specifications
TC = 25oC, Unless Otherwise Specified
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Drain to Source Breakdown Voltage
PARAMETER
SYMBOL
BVDSS
VGS = 0V, ID = -250µA, (Figure 10)
-100
-
-
V
Gate to Threshold Voltage
VGS(TH)
VGS = VDS, ID = -250µA
-2.0
-
-4.0
V
Gate to Source Leakage Current
IGSS
VGS = ±20V
-
-
±100
nA
Zero-Gate Voltage Drain Current
IDSS
VDS = Rated BVDSS, VGS = 0V
-
-
-25
µA
VDS = 0.8 x Rated BVDSS, VGS = 0V, TC = 125oC
On-State Drain Current (Note 2)
Drain to Source On Resistance (Note 2)
Forward Transconductance (Note 2)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
(Gate to Source + Gate to Drain)
ID(ON)
rDS(ON)
VGS = -10V, ID = -1.5A, (Figures 8, 9)
gfs
VDS > ID(ON) x rDS(ON) Max, ID = -1.5A,
(Figure 12)
td(ON)
VDD = 0.5 x Rated BVDSS, ID ≈ -3.0A,
RG = 50Ω, VGS = 10V, (Figures 17, 18)
RL = 15.7Ω for VDSS = 50V
RL = 12.3Ω for VDSS = 40V
MOSFET Switching Times are
Essentially Independent of Operating
Temperature
tr
td(OFF)
tf
Qg(TOT)
Gate to Source Charge
Qgs
Gate to Drain “Miller” Charge
Qgd
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
Internal Drain Inductance
VDS > ID(ON) x rDS(ON)MAX, VGS = -10V,
(Figure 7)
LD
LS
Junction to Case
RθJC
Junction to Ambient
RθJA
©2001 Fairchild Semiconductor Corporation
-
-250
µA
-
-
A
-
1.000
1.200
Ω
0.8
1.1
-
S
-
15
30
ns
-
30
60
ns
-
20
40
ns
-
20
40
ns
VGS = -10V, ID = -3A, VDS = 0.8 x Rated BVDSS,
(Figures 14, 19, 20) Gate Charge is
Essentially Independent of Operating
Temperature
-
8.5
11
nC
-
3.8
-
nC
-
4.7
-
nC
VGS = 0V, VDS = -25V, f = 1.0MHz,
(Figure 11)
-
180
-
pF
-
85
-
pF
-
30
-
pF
-
3.5
-
nH
-
4.5
-
nH
-
7.5
-
nH
Measured From the
Contact Screw on Tab
to Center of Die
Measured From the
Drain Lead, 6mm
(0.25in) From Package
to Center of Die
Internal Source Inductance
-3.0
Measured From The
Source Lead, 6mm
(0.25in) From Header to
Source Bonding Pad
Typical Socket Mount
Modified MOSFET
Symbol Showing the Internal Devices
Inductances
D
LD
G
LS
S
-
-
6.4
oC/W
-
-
62.5
oC/W
IRF9510 Rev. A
IRF9510
Source to Drain Diode Specifications
PARAMETER
SYMBOL
Continuous Source to Drain Current
ISD
Pulse Source to Drain Current
(Note 3)
ISDM
TEST CONDITIONS
Modified MOSFET
Symbol Showing the
Integral Reverse P-N
Junction Diode
D
MIN
TYP
MAX
UNITS
-
-
-3.0
A
-
-
-12
A
-
-
-1.5
V
-
120
-
ns
-
6.0
-
µC
G
S
Source to Drain Diode Voltage(Note 2)
VSD
Reverse Recovery Time
trr
Reverse Recovered Charge
QRR
TC = 25oC, ISD = -3.0A, VGS = 0V, (Figure 13)
TJ = 150oC, ISD = -3.0A, dISD/dt = 100A/µs
TJ = 150oC, ISD = -3.0A, dISD/dt = 100A/µs
NOTES:
2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%.
3. Repetitive rating: pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. VDD = 25V, starting TJ = 25oC, L = 31.7mH, RG = 25Ω, peak IAS = 3.0A. See Figures 15, 16.
Typical Performance Curves
Unless Otherwise Specified
-5
1.0
ID, DRAIN CURRENT (A)
POWER DISSIPATION MULTIPLIER
1.2
0.8
0.6
0.4
0.2
-4
-3
-2
-1
0
0
0
25
50
75
100
TC, CASE TEMPERATURE (oC)
125
25
150
ZθJC, NORMALIZED TRANSIENT
THERMAL IMPEDANCE
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
50
75
100
125
TC, CASE TEMPERATURE (oC)
150
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
1
0.5
PDM
0.2
0.1 0.1
t1
0.05
t2
0.02
0.01
NOTES:
DUTY FACTOR: D = t1/t2
TJ = PDM x ZθJC x RθJC + TC
SINGLE PULSE
0.01
10-5
10-4
10-3
10-2
0.1
1
10
t1, RECTANGULAR PULSE DURATION (s)
FIGURE 3. NORMALIZED TRANSIENT THERMAL IMPEDANCE
©2001 Fairchild Semiconductor Corporation
IRF9510 Rev. A
IRF9510
Typical Performance Curves
Unless Otherwise Specified (Continued)
-5
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
VGS = -10V
10µs
100µs
1ms
1
OPERATION IN THIS
REGION IS LIMITED
BY rDS(ON)
10ms
100ms
DC
TC = 25oC
TJ = MAX RATED
0.1
1
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
10
-4
VGS = -9V
-3
VGS = -8V
-2
VGS = -7V
VGS = -6V
-1
VGS = -5V
0
102
0
FIGURE 5. OUTPUT CHARACTERISTICS
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
-12.0
VGS = -10V
-4
VGS = -9V
-3
VGS = -8V
-2
VGS = -7V
-1
VGS = -6V
ID(ON), ON-STATE DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
-5
VGS = -5V
0
0
-2
-4
-6
-8
VDS > ID(ON) x RDS(ON)MAX.
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
-9.6
-7.2
TJ = 125oC
TJ = 25oC
-4.8
TJ = -55oC
-2.4
0
0
-10
-2
-4
-6
-8
VGS, GATE TO SOURCE VOLTAGE (V)
VDS, DRAIN TO SOURCE VOLTAGE (V)
2.5
5
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
4
3
VGS = -10V
2
VGS = -20V
1
0
-4
-8
-12
ID, DRAIN CURRENT (A)
-16
-20
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
©2001 Fairchild Semiconductor Corporation
-10
FIGURE 7. TRANSFER CHARACTERISTICS
NORMALIZED DRAIN TO SOURCE
ON RESISTANCE VOLTAGE
rDS(ON), DRAIN TO SOURCE ON RESISTANCE
FIGURE 6. SATURATION CHARACTERISTICS
0
-50
-10
-20
-30
-40
VDS, DRAIN TO SOURCE VOLTAGE (V)
2.0
VGS = -10V, ID = -1.5A
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
1.5
1.0
0.5
0
-40
0
40
80
120
160
TJ, JUNCTION TEMPERATURE (oC)
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
IRF9510 Rev. A
IRF9510
Typical Performance Curves
Unless Otherwise Specified (Continued)
500
1.15
C, CAPACITANCE (pF)
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
1.25
1.05
0.95
0.85
VGS = 0V, f = 1MHz
CISS = CGS + CGD
CRSS = CGD
400 COSS ≈ CDS + CGD
300
CISS
200
COSS
100
CRSS
0.75
-40
0
40
120
80
0
160
0
-10
TJ, JUNCTION TEMPERATURE (oC)
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
-40
-50
-102
TJ = -55oC
2.0
TJ = 25oC
TJ = 125oC
1.5
1.0
0.5
VDS > ID(ON) x RDS(ON) MAX.
80µs PULSE TEST
0
-1.2
-2.4
-3.6
ID, DRAIN CURRENT (A)
-4.8
-6.0
ISD, SOURCE TO DRAIN CURRENT (A)
gfs, TRANSCONDUCTANCE (S)
-30
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
2.5
0
-20
VDS, DRAIN TO SOURCE VOLTAGE (V)
-10
TJ = 150oC
TJ = 25oC
-1
-0.1
-0.4
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT
-0.6
-0.8
-1.0
-1.2
-1.4
-1.6
VSD, SOURCE TO DRAIN VOLTAGE (V)
-1.8
FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
VGS, GATE TO SOURCE VOLTAGE (V)
0
ID = -4A
-5
VDS = -20V
VDS = -50V
VDS = -80V
-10
-15
0
2
4
6
8
Qg(TOT), TOTAL GATE CHARGE (nC)
10
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
©2001 Fairchild Semiconductor Corporation
IRF9510 Rev. A
IRF9510
Test Circuits and Waveforms
VDS
tAV
L
0
VARY tP TO OBTAIN
-
RG
REQUIRED PEAK IAS
+
VDD
DUT
0V
VDD
tP
VGS
IAS
IAS
VDS
tP
0.01Ω
BVDSS
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 16. UNCLAMPED ENERGY WAVEFORMS
tON
tOFF
td(OFF)
td(ON)
tr
0
RL
DUT
-
VGS
+
10%
10%
VDS
VDD
RG
tf
VGS
0
90%
90%
10%
50%
50%
PULSE WIDTH
90%
FIGURE 17. SWITCHING TIME TEST CIRCUIT
-VDS
(ISOLATED
SUPPLY)
CURRENT
REGULATOR
FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
0
VDS
DUT
12V
BATTERY
0.2µF
50kΩ
0.3µF
Qgs
VGS
Qgd
D
Qg(TOT)
DUT
G
0
0
S
IG(REF)
IG CURRENT
SAMPLING
RESISTOR
+VDS
ID CURRENT
SAMPLING
RESISTOR
FIGURE 19. GATE CHARGE TEST CIRCUIT
©2001 Fairchild Semiconductor Corporation
VDD
IG(REF)
FIGURE 20. GATE CHARGE WAVEFORMS
IRF9510 Rev. A
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effectiveness.
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. H