CMOS-MEMS RESONANT RF MIXER-FILTERS
Fang Chen1, Jay Brotz1, Umut Arslan1, Chiung-Cheng Lo1, Tamal Mukherjee1, Gary K. Fedder1,2
1
Department of Electrical and Computer Engineering and 2The Robotics Institute
Carnegie Mellon University, Pittsburgh, PA 15213, USA.
been integrated on CMOS [7]. Array-based design of mixerfilters in CMOS can integrate high-Q narrow-bandwidth
mixer-filters in a parallel channel selection or rake receiver
architecture. For example, 500 mixer-filters, each with a 10
kHz bandwidth, can be arrayed for parallel downconversion
of a 5 MHz band in only 5 mm2 chip area, 300x smaller than
a transistor-only alternative. Further integration with frequency-hopping RF band pass filters [8], voltage controlled
oscillators [8], and wideband low noise amplifiers can be
used for relocating this 5 MHz band across the radio spectrum.
In this paper, we introduce the first RF-CMOS-MEMS resonant mixer-filters capable of downconverting RF signals as
high as 3.2 GHz. Further, we show integration of CMOSMEMS resonators with CMOS circuits as the first step of system integration for a single-chip radio receiver.
ABSTRACT
An integrated CMOS-MEMS micromechanical resonant
mixer-filter with potential for application in a single-chip
receiver is introduced. Air and anchor damping characterization show quality factor greater than 1500. Downconversion
and filtering of signal frequencies as high as 3.2 GHz is
achieved. This is the highest signal frequency applied so far
to MEMS mixer-filters. Analytical calculations match well
with the experimental measurements and are used to show
that 0 dB mixer conversion loss is achievable. Co-simulation
of the MEMS mixer with readout electronics identifies potential solutions to eliminate mixing feedthrough.
Keywords: resonator, RF mixer-filter, CMOS-MEMS
1. INTRODUCTION
Current radio receivers use off-chip ceramic or surface acoustic wave filters for image rejection and channel selection.
These off-chip discrete components limit miniaturization and
increasing manufacturing cost due to parts assembly and
packaging. Ever since an IC-compatible mechanical resonator was introduced as a band-pass filter [1], MEMS resonant
micromechanical filters have promised minaturization of RF
receivers by inexpensive single chip integration. Recent
research has targeted high quality factor (Q) and high operational frequency: hollow-disk ring resonators with Q >
60,000 (at 24 MHz) and frequencies of 1.2 GHz (with Q >
14000) have been demonstrated [2]. MEMS resonators have
also been coupled mechanically [3] and electrostatically [4]
for signal filtering, albeit at lower frequencies.
Receiver architectures that use MEMS mixer-filters eliminate the need for filters with resonance at RF (i.e. GHz) input
frequencies [5] (assuming a highly linear mixer and a quadrature image rejection architecture). Instead, the nonlinearity of
the electrostatic force with drive voltage on the MEMS resonators is exploited, downconverting GHz RF input signals to
excite MHz mechanical resonance for intermediate frequency
(IF) filtering. Mechanical displacement is then capacitively
transduced into an electrical IF output. In essence, mixing
and filtering functions are achieved simultaneously as the RF
signals are passing through the resonators. To date, the highest frequencies that have been downconverted by MEMS
mixer filters is 200 MHz [5].
Post-CMOS fabrication of MEMS resonator-based mixerfilters enables integration with RF-electronics and capacitive
readout circuits. Micromechanical resonators have already
been fabricated using base processes for Copper interconnect
fabrication in CMOS processes [6], however, the resonator
was not yet coupled to an integrated circuit on the same chip.
Low-frequency comb-drive poly-SiGe resonators have also
0-7803-8732-5/05/$20.00 © 2005 IEEE.
2. CMOS-MEMS FABRICATION
The CMOS-MEMS process [9] starts with a foundry-fabricated four-metal CMOS chip with cross-section shown in
Fig. 1(a). Structures are micromachined through a sequence
of dry etch steps. A CHF3:O2 reactive-ion etch (RIE) of the
intermetal dielectric stack removes any dielectric that is not
covered with metal as shown in (b). The choice of the topmetal layer sets the thickness. Other metal layers can be used
for routing electrical signals within the structure. A timed
directional etch of the exposed silicon substrate using the
Bosch deep-RIE process sets the spacing from the microstructures to the substrate. This is followed by a timed isotropic silicon etch in an SF6 plasma to undercut and release the
structures (resulting in (c)).
Unlike past applications of the CMOS-MEMS process
with older 0.5 µm and above processes for sensors [10], RF
MEMS applications requires advanced CMOS processes for
access to high fT transistors. This brings about several advantages in microstructure fabrication. First, internal stress gradients due to multi-layer fabrication are reduced due to better
stress matching in 200 mm wafers. Furthermore, additional
metal layers lead to thicker beams which provide greater outCMOS micrometal-3
beam anchored
FET structures metal-2 polysilicon metal-4
stator
metal-1
(a)
(b)
(c)
Fig 1: Cross-section of CMOS micromachining process [9];
(a) after foundry CMOS processing, (b) after anisotropic
etch, (c) on final release using a combination of anisotropic
silicon DRIE and isotropic silicon etch.
24
of-plane stiffness for a given internal moment. These two factors combine to reduce out-of-plane curl. Secondly, the minimum metal spacing rule is now smaller than 0.6 µm. Lateral
(in-plane) curl can continue to be designed by offsetting the
embedded metal layers, for use in self-assembly to further
reduce electrode gaps [11]. The limit to small gaps is often
the sidewall polymer buildup (of up to 0.2 µm) that occurs
locally on sidewalls and is caused by incorporation of aluminum into the plasma during the dielectric etch. However, this
sidewall polymer can be reduced by the expense of adding an
extra mask over the aluminum in the non-MEMS areas.
Aoffchip Vout
Aonchip
fRF
fLO
VP+
VP-
3. MIXER-FILTER DESIGN
Fig 3: SEM image of differential cantilever resonators with
an overlaid circuit schematic for mixer-filter test.
CMOS-MEMS mixer-filters can take advantage of the
embedded metal layers for split electrode designs as well as
integration with electronics as shown in Fig. 2. The RF and
LO signals are applied across a drive gap. An electrostatic
2
force proportional to F v VRF – V LO is exerted on the resonant structure. Mixing occurs due to the cross-product term,
where the difference between RF and LO frequencies is generated. Displacement arising from this force is amplified by
the resonator quality factor Q at resonance. An ac displacement (motional) current, i, is generated at the output gap
when it is biased by a dc polarizing voltage, VP. This current
is converted into voltage by the parasitic capacitance at the
input of the on-chip pre-amplifier. The pre-amp then amplifies this voltage to generate Vout, given by:
2”
Fig 4: Mixer/filter test PCB with chip wire-bonded
Initial designs short-circuited all the metal layers in the
vibrating beam, forming a single rotor electrode. Recent
designs have independent wires to the drive and sense electrodes, taking advantage of the embedded CMOS-MEMS
metal layers. While the simple single-conductor design is
adequate for filter applications, the split-conductor design is
preferred for mixing operation as the LO signal appears
solely at the drive electrode (and cannot feedthrough into the
readout circuit).
A differentially configured pair of micromechanical resonators was implemented for common-mode feedthrough
rejection as shown in Fig 3. The same RF and LO signals
drive both resonators across 1.3 µm electrostatic gaps and are
routed under the top-metal mask layer. The LO is ac coupled
to the single moving electrode, with positive dc bias on one
beam and negative bias on the other beam to generate differential displacement motional currents. A fully differential onchip amplifier (protected by the top-metal layer) converts the
motional currents to voltages with an input capacitance of
500 fF and a voltage gain of 77.6. The preamp output voltage
is further amplified by 24x off-chip and then measured with a
spectrum analyzer.
Custom printed circuit boards (PCB) have been designed
as chip-on-board testbeds, as illustrated in Fig 4. The miniaturized PCB is roughly 2 inch in size, with the chips wirebonded directly to pads in the PCB. For RF mixing in GHz,
bondwires are kept as short as possible. SMC connectors and
impedance matching microstrip traces are patterned for the
RF and LO inputs to the chip.
2
A
A H0 te Le 1
V out = ------- ³ i ˜ dt = ------- ----------------------V
------ sin Z r t P V LO V RF Z
CP
C P 2Bg 4
r
(1)
where A is the amplifier voltage gain, B is the damping factor,
Zr is the resonant frequency (other terms defined in Fig. 2).
Cantilever and fixed-fixed beam resonators with intermediate frequencies between 500 kHz to 6 MHz have been
micromachined in the TSMC 0.35 µm 4-metal and Jazz
SiGe60 0.35 µm 4-metal processes. A cantilever design
shown schematically in Fig. 2 is the primary design reported
in this paper. The square frame at end of the cantilever
reduces direct feedthrough by distancing the input and output
static electrodes. The cut in the top-metal layer on the electrodes is used to ensure that the electrode voltages only
appear across the gap. The rest of the electrode length is
shielded with metal connected to ground.
x
Input electrode
Output electrode
F
VIF
VRF
A
Vout
MEMS Chip
VIF
i
Gap = g
Area = teLe
CP
Resonant
structure
VRF
VLO
VP
Fig 2: Schematic of CMOS-MEMS resonant mixer-filter
with embedded electrodes and SEM close-up showing multilayer CMOS metal use in electrode design.
4. RESULTS
In addition to the mixing configuration shown in Fig 3,
turning off the ac LO input allows direct-drive excitation.
Direct-drive measurements of the resonator frequency
25
gain -40
[dB] -50
00
-10
-30
-40
-40
-60
-60
gain
[dB]
-50
-60
-70
-80
910
912
-50
-51
-52
-53
-54
-55
-56
-57
-58
-59
-60
-55
1.1 MHz
fixedfixed
tuning
fork
Q = 2750
914
916
918
10992
1.0992
10994 1.0996
10996 1.0998
10998 1.1000
11000 1.1002
11002 1.1004
11004
1.0994
VRF=VLO=1.25V, VDC+=12.5V and VDC-=6.5V. Each mixing curve is obtained by stepping fRF over a range centered
around fLO + fIF while keeping fLO constant, then recording
the peak amplitude from the spectrum analyzer. A large
amplitude is expected only when the resonator is in resonance
(fIF). The mixing peaks fall right at fIF = 435 kHz and the
mixer output spectra are almost independent of LO at these
frequencies.
Manufacturing variations induce 5% frequency mismatch
between the dual-resonators. To counter this issue, the dc bias
voltages are used for spring-softening frequency tuning to
compensate the difference as seen in Fig 9.
As fLO increases beyond 1 GHz, mixing feedthrough starts
to increase more rapidly which appears as rising mixing
amplitude outside the resonance of 435kHz. This effect may
be eliminated from the mixing curve by measuring the mixing feedthrough separately without dc polarizing voltages,
then subtracting it out. Fig 10(a) demonstrates mixing at fLO
of 1.8 GHz with >70 mV peak amplitude while 12(b) shows
mixing at fLO of 3.2 GHz, the highest mixing fLO achieved so
far. The small 2.5 mV amplitude in (b), is due to attenuations
of the RF and LO inputs by the board-level interconnect.
Mixing feedthrough due to capacitive coupling between
the RF input and preamp Ibias interconnect lines on-chip was
300
300
400
500
600
700
400
500
600
700
Frequency (kHz)
Frequency
(kHz)
Fig 5: Frequency spectrum of a 435 kHz dual resonator
measured under 10 mTorr vacuum with |Vp-Vbias|= 9 V
response at 10 mTorr vacuum shows that the cantilever has a
primary resonance at f0 = 435 kHz as shown in Fig 5. Simulation using behavioral models [12], also shown in Fig 5,
matches the measurements very well.
As seen in equation (1), the mixer’s conversion gain is
inversely proportional to the damping. Resonator damping
can be characterized from the Q seen in the direct-drive frequency response with one of the resonators turned off (by
dialing the polarization voltage until it is equal to the pre-amp
input DC bias voltage). In air, Q is dominated by the squeezefilm damping in the gaps between the electrodes. Measured
air damping matches theoretical prediction above 1 Torr as
shown in Fig 6. In vacuum, air damping is eliminated, and the
anchor losses determine the damping factor, as shown below
1 Torr, where Q around 1400 is obtained for a single cantilever.
The dominance of anchor damping in vacuum is evident
when the simple cantilever Q is compared with that of the
tuning fork resonator. In tuning fork designs, the two identical beams vibrate anti-symmetrically, cancelling out any
motion on the cross-beam connecting their bases. Thus the
beam anchoring the cross-beam to the substrate does not
move, leading to infinite Q (ideally with no material losses).
Fabrication mismatch between the two beams in the tuning
fork will couple vibrations to the cross-beam and anchor
beam, leading to finite Q. Fabricated cantilever and fixedfixed tuning fork designs, shown in Fig 7 demonstrate that Q
> 2000 is possible in CMOS MEMS resonators.
Fig 8 shows the mixer-resonator output spectrum around
fIF at 1 Torr with fLO stepped from 10 MHz to 400 MHz,
120
120
100
100
Mixing Output (mV)
Mixing output (mV)
80
80
10M Hz
20M Hz
30M Hz
50M Hz
100M Hz
200M Hz
400M Hz
60
60
40
40
20
20
00
420 425
425
430
435 440
440
445 450
450
420
430
435
445
IF
Frequency
(kHz)
IF Frequency
(kHz)
Fig 8: Mixer output spectrum for fLO = 10 MHz-400 MHz
using the f0 = 435 kHz resonators.
Resonant
freq (kHz)
Resonant Frequency
(kHz)
1600
1200
800
400
437.5
437.5
437
437
437
436.5
436.5
436
436
436
435.5
435.5
435
435
435
434.5
434.5
Cantilever A
Cantilever B
Mixer
Output
(mV)
Mixing Output
LO=500MHz
(mV)
200
Quality Factor
Q = 2010
-70
-60
914[kHz]916 918 (b) 1.0996 1.1000 1.1004
910 912frequency
frequency [MHz]
(a)
freq (kHz)
freq (MHz)
Fig 7: Quality factor improvement by reducing anchor loss:
(a) cantilever tuning fork; (b) fixed-fixed tuning fork.
-20
-20
-50
0 -3
10
914 kHz
cantilever
tuning fork
gain [dB]
gain [dB]
-30
simulation
-70
200
-50
-20
-30
measurement
10
Transmission (dB)
Transmission (dB)
20
20
100
DC bias with tuning:
DC+ = 12.5V/DC- = -6.5V
80
80
60
60
DC bias without tuning:
DC+ = +10V/DC- = -10V
40
40
20
20
0
434
434
430
432
434
436
438
440
434
-15 -10
-10
-5
10
15
-15
-5
00
55
10
15
434
436
438
440
IF Frequency (kHz)
(a) -10DC Bias on0Beams (V) 10
(b) 432
VP (V)
fIF (kHz)
Fig 9: (a) Frequency and dc tuning voltage relationship for
each resonator; (b) Frequency tuning with dc biases.
10-1
10
103
105
Air Pressure (Pa)
Fig 6: Cantilever Q-factor as a function of air pressure.
26
due to mixing was obtained analytically and via behavioral
simulation and compared with experimental measurements.
On-chip mixing feedthrough, obtained using parasitic extraction and full-chip simulation, suggested that the mixing
feedthrough effect may be eliminated by shielding the RF &
LO lines on chip at frequencies less than 1 GHz. At higher
frequencies mixing is limited by the RF losses in connectors,
cables and board-level interconnect.
The system loss (insertion loss for filter operation and conversion loss for mixer operation) is largely determined by the
size of the electrostatic gap. The relatively large gap of
1.3 µm in the reported design can easily be reduced. Gaps as
low as 0.4 µm have been successfully fabricated by postCMOS micromachining. Further reduction of gaps can be
achieved via lateral-curl self-assembly and are likely to reach
0.2 µm by minimizing local polymerization. Additionally, the
transimpedance circuit used for capacitive readout can be
optimized for more than a factor of 100x higher conversion
gain without any additional power. Therefore the prospects
are promising for integrated MEMS mixer-filters with conversion gain for MEMS-based radios of the future.
71 mV
2.45 mV
0V
0V
(b)
(a)
Fig 10:(a) Mixing at fLO = 1.8 GHz; (b) at fLO = 3.2 GHz.
Table 1: Comparison of mixer performance showing
measured data, NODAS simulation of extracted layout and
analytical model
Parameters
LO Freq.
Measured
10MHz – 3.2GHz
Simulation
50 MHz
Analytical
50 MHz
Resonator Q
1088 (diff. resr.)
1300 (single resr.)
1088
(from meas)
1300
(from meas)
Center Freq.
f0 (kHz)
435
478
514
49.5
45.3
43.7
Conversion
Loss (dB)
ACKNOWLEDGEMENT
This research effort was supported by the DARPA/MTO
NMASP program under award DAAB07-02-C-K001.
understood through parasitic extraction and full-chip simulation. The design solution is to reroute and shield the lines and
has been shown to reduce on-chip feedthrough by about
100 dB (Fig 11). With these improvements the feedthrough is
expected to be negligible compared to the motional signal.
The system conversion loss (CL = VOut/VRF) at
fLO=50 MHz is 50 dB (measured) and 45 dB (simulated) as
shown in Table I. A challenge is to attain 0 dB CL. NODAS
[12] simulations indicate that 0 dB CL is achievable with
VRF=VLO=1.25V, VP+=5V, VP-=0.6V (preamp self-bias is
2.8V), preamp power < 1 mW, transimpedance of 160 M:
and electrode gap of 400 nm.
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micromechanical filter array,” MEMS ‘04, pp. 769-772.
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5. CONCLUSIONS
Mixer Mixer
Conversion
Gain (dB)
Conversion Gain (dB)
Micro-resonators were integrated on a single-chip with
CMOS circuits. Mixing at RF frequencies was successfully
demonstrated using such devices over a wide LO frequency
range from 10 MHz to 3.2 GHz. The system conversion loss
-20
-20
fLO = 1 GHz
fLO = 800 MHz
-40
-40
-60
-60
flo = 800 MHz
flo = 1 GHz
-80
-80
feedthrough at flo = 800 MHz (improved layout)
feedthrough at flo = 1 GHz (improved layout)
-100
-100
-120
-120
fLO = 1 GHz (improved layout)
fLO = 800 MHz (improved layout)
-140
-140
420
425
430
435
440
445
450
420
425
420
435
440
445
450
Frequency (kHz)(kHz)
IF IFFrequency
Fig 11:Mixing throughputs at 800 MHz and 1 GHz
27