Matisse: Carnegie Mellon Update

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Matisse: Carnegie Mellon Update
Gary K. Fedder
Department of Electrical and Computer
Engineering and The Robotics Institute
Carnegie Mellon University
fedder@ece.cmu.edu
http://www.ece.cmu.edu/~mems
Participating Students:
Hasnain Lakdawala, Qi Jing, John Ramsey
Matisse Meeting, October 18, 2001
Carnegie Mellon’s Role in Matisse
n
As Matisse user, leverage large
design and characterization effort at
Carnegie Mellon
n
Active MEMS system-level CAD
effort for linkages to platforms
2
Phase II Status
n
MIT Microvision System Upgraded
n
Supernet routing tuned to > 150 Mbps
n
Mirau interferometer integrated into system
n
n
n
Z-axis and tilt for fringe adjustment
Phase unwrapping software
NODAS Schematic MEMS CAD Verification
n
Mirau measurements of CMOS-MEMS curling
n
AC response comparisons
n
n
MUMPS resonator (with D. Freeman’s group)
CMOS-MEMS thermally stabilized accelerometer
3
CMOS MEMS Fabrication at Carnegie Mellon
Applications: Inertial sensors, RF MEMS, infrared sensors,
acoustic speakers, ultrasonic sensors, flow and force
sensors, … with on-chip detection and conditioning
Integrated systems on chip
4
Post-CMOS Micromachining
n
n
n
Start with foundry digital CMOS
Structures made from
CMOS metal-dielectric layers
Post-CMOS steps for
structure definition and release
Composite beam
Etched pit
Electrodes
G. K. Fedder, S. Santhanam, M. L. Reed, S. C. Eagle, D. F. Guillou, M. S.-C. Lu, and L. R. Carley,
“Laminated High-Aspect-Ratio Microstructures In A Conventional CMOS Process,” Sensors & Actuators A,
vol. A57, no. 2, pp. 103-110, March 1997.
5
Test Structure for Curl Characterization
Alternate symmetrical
and misaligned beams
2.1 µm
Integrated
polysilicon heater
1.2 µm
METAL3
OXIDE
METAL2
Misaligned beam METAL1
cross-section
Temperature
distribution
x
Thermal isolation spring
y
H. Lakdawala and G. K. Fedder
6
Nominally
curled
y
x
dx
Heated
x displacement (µm)
Lateral Curling
0.80
X microvision measured
0.70
X NODAS simulation
0.60
0.50
0.40
0.30
0.20
0.10
0.00
0
10
20
30
40
Temperature change (T-Troom)(°C )
n
n
n
Deflection measured from nominal curled
position
x matches to within 15%
Within measurement error bar
H. Lakdawala and G. K. Fedder
9
Nominally
curled
dz
z
y
Heated
z displacement (µm)
Vertical Curling
0.50
Z microvision measured
0.40
Z NODAS simulation
0.30
0.20
0.10
0.00
0
10
20
30
40
Temperature change, T-T room (°C )
n
n
z matches to within 10%
Well within measurement error bar
H. Lakdawala and G. K. Fedder
10
Simulation Example: Folded-flexure Resonator
n
Device designed and measured at MIT (Salil Desai, et al., MEMS’01)
n
Simulated in Spectre™
n
With linear beam model and estimated overetch δ
Frequency response
Q. Jing, S. Desai, D. Freeman, G. K. Fedder
11
Simulation Example: Folded-flexure Resonator
n
displacement in z-direction
Frequency response
Q. Jing, S. Desai, D. Freeman, G. K. Fedder
12
Simulation Example: Folded-flexure Resonator
n
rotation about x-axis
Frequency response
Q. Jing, S. Desai, D. Freeman, G. K. Fedder
13
Large-Displacement Dynamic Shape
Measurement
n
Phase unwrapping of interferometric images
provides a surface map of the device
n
Cannot provide information about relative motion
between structures
n
Limited by the coherence length of the source
n
Combination Microvision strobing algorithm and
phase unwrapping used to image thermal motion
Modified Microvision system
H. Lakdawala and G. K. Fedder
15
Large Displacement Dynamic Shape Measurement
n
Solution:
n
Create surface maps of the device at different z
displacements and “reconstruct” the image.
n
The relative displacement between disconnected part
“glued” together using intensity variation of the LED fringe
pattern during the phase unwrapping process.
n
Combination of white light interferometry and phase
unwrapping algorithms
+
Phase unwrap set 1
Phase unwrap set 2
=
Final reconstructed Image
H. Lakdawala and G. K. Fedder
16
Microvision Mirau Measurement Demo
n
n
n
Z-axis CMOS-MEMS accelerometer
Image acquisition of the center plate
Embedded heater driven by square
wave V [V]
3
0
H. Lakdawala and G. K. Fedder
0
0.1
0.2
t [s]
17
Dynamic Mirau Measurement Phase #1
n
n
n
Measurement at
one phase when
heater voltage = 0V
Fringes at
maximum curl
6 steps in z-axis
focal plane
spanning 0.27 µm
range
H. Lakdawala and G. K. Fedder
V [V]
3
0
0
0.1
0.2
t [s]
18
Dynamic Mirau Measurement Phase #2
n
n
n
n
Measurement at
one phase
when heater
voltage = 3V
Fringes at
minimum curl
6 steps in z-axis
focal plane
spanning 0.27
µm range
Plate moves up
about 5.5 µm
H. Lakdawala and G. K. Fedder
V [V]
3
0
0
0.1
0.2
t [s]
19
Phase Unwrapping
n
n
n
C-code for unwrapping
Viewing in MATLAB
V = 0V,
maximum curl
n
V = 3V,
minimum curl
H. Lakdawala and G. K. Fedder
20
Carnegie Mellon Planned Thrusts (with help!)
n
Integrate Mirau microvision analysis in Matisse
n
n
n
n
Calculations using computing cluster over Supernet
Automate phase stitching for large z motion
Continue to verify and refine modeling and
simulation using Microvision
Linking the Microvision System with MEMS CircuitLevel and Device-Level CAD Tools
n
n
Flow A) MEMS metrology system
n Extract structure (size and defects)
n Generate solid model and mesh
n Back annotate to MEMS schematic
Flow B) MEMS Automated Testbed
n Design and simulate microstructures
n Download testbed configuration to Microvision system
n Compare simulated and measured results
21
Proposed Testbed Data Flow
Process material properties:
E, ρ, TCE, thickness, σ
Stimulus,
outputs
Test equipment
Microvision
system
x-y drive
Image
registration
G. K. Fedder
Extracted
geometry
simulation
Layout,
nodes
measurements
22
Automated Microvision Testbed
n
n
n
Automated generation of time
and frequency motion data
Need multiple nodes (10-100)
for simulation verification
Typical image set is 20 nodes
* 20 frequencies * 20 phases *
10 z steps =
80000 images * 1 Mb/image =
80 Gb/device
Linux PC
Microvision
SW
Layout/image
registration
Wintel PC
LabView
G. K. Fedder
Simulation
Manager
…
Matisse
Server
Simulation
Manager
Matisse
Server
Supernet
Supernet
MIT
Microvision
System
Automated
Testbed
Hardware
DPSS
Visualization and
Analysis servers23
MEMS Automated Testbed (Work in Progress)
n
n
n
n
Probe
manipulators (4)
X-Y stage moving
chip and
manipulators
Sinks
n
Mirau Microvision
n
Voltmeter, ammeter,
ohmmeter
n
Spectrum analysis
n
Oscilloscope
Microvision
Supernet access
Sources
n
High DC voltages
n
Signal generators
Test
Instruments
PC’s
Air table
G. K. Fedder
24
NODAS MEMS Cell Library
COMB DRIVE -Y
finger_length: 40u
overlap: 20u
gap: 2u
finger_width: 2u
rotor_fingers: 80
angle:90
PLATE MASS
N-S
l: 10u
w: 640u
angle:0
gnd
100meg
gnd
10k
10k
oab
10k
gnd
10k
L:177u
w:4u
angle:0
BEAM
PLATE -MASS
Faces
L: 34u
w: 6u
angle:0
PLATE -MASS
Faces
l: 36u
w: 50u
angle:0
ANCHOR
ANCHOR
PLATE MASS
N-S
l: 66u
w: 18u
angle:0
BEAM
L:177u
w: 4u
angle:0
ANCHOR
ANCHOR
PLATE -MASS
Faces
l: 36u
w: 50u
angle:0
gnd
BEAM
L:177u
w: 4u
angle:0
L:177u
w:4u
angle:0
BEAM
v
35.35
BEAM
BEAM
L:177u
w:4u
angle:0
BEAM
L:177u
w:4u
angle:0
circuit
extraction
oab
L:34u
w:6u
angle:90
PLATE -MASS
Faces
L: 34u
w: 6u
angle:0
BEAM
L:177u
w: 4u
angle:0
BEAM
layout
generation
ANCHOR
BEAM
n
NODAS is the MEMS schematic
design library developed at
Carnegie Mellon
Goal: Develop and validate
NODAS cell library and tools
BEAM
n
L:34u
w:6u
angle:90
BEAM
L:177u
w:4u
angle:0
PLATE MASS
N-S
l: 10u
w: 640u
angle:0
COMB DRIVE -Y
finger_length: 40u
overlap: 20u
gap: 2u
finger_width: 2u
rotor_fingers: 80
x
angle:90
ANCHOR
oab
gnd
100meg
gnd
G. K. Fedder and Q. Jing, “A Hierarchical Circuit-Level Design
Methodology for Microelectromechanical Systems,” IEEE Trans. on
Circuits and Systems-II, vol. 46, no. 10, October 1999, pp.1309-1315.
26
extraction
MEMS
circuit
design
design
simulation circuit
MEMS simulation
schematic
schematic
simulation of integrated
design schematic
generate
generate
top level
circuits
MEMS
layout
schematic
layout
simulation of integrated
extracted schematic
extracted
extracted
extracted
circuit
MEMS
circuit
MEMS electrical
schematic simulation parasitics simulation schematic
T. Mukherjee and G. K. Fedder, “Design Methodology for Mixed Domain Systems on a Chip,” Kluwer
Journal of VLSI Signal Processing on System Design, vol. 21, no. 3, pp. 233-249, July 1999.
layout generation extraction
layout generation
Integrated MEMS/Electronics Design Flow
27
NODAS MEMS Schematic & Layout Generation
T. Mukherjee and G. K. Fedder
28
NODAS MEMS Extraction
B. Baidya and T. Mukherjee,
“Extraction for Integrated Electronics
And MEMS Devices,”
Transducers '01, June 2001,
pp. 280-283.
T. Mukherjee and G. K. Fedder
29
Schematic vs. Extracted comparison
n
CMOS MEMS has more
complex design
requirements, and thus
make sophisticated
system-level models
and CAD capabilities
essential
T. Mukherjee and G. K. Fedder
30
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